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88 #include "arch/x86/miscregfile.hh"
89 #include "arch/x86/tlb.hh"
90 #include "cpu/thread_context.hh"
91 #include "sim/serialize.hh"
93 using namespace X86ISA
;
98 //These functions map register indices to names
99 string
X86ISA::getMiscRegName(RegIndex index
)
101 panic("No misc registers in x86 yet!\n");
104 void MiscRegFile::clear()
106 //When there are actually misc regs implemented, this will clear them
109 MiscReg
MiscRegFile::readRegNoEffect(int miscReg
)
111 // Make sure we're not dealing with an illegal control register.
112 // Instructions should filter out these indexes, and nothing else should
113 // attempt to read them directly.
114 assert( miscReg
!= MISCREG_CR1
&&
115 !(miscReg
> MISCREG_CR4
&&
116 miscReg
< MISCREG_CR8
) &&
117 !(miscReg
> MISCREG_CR8
&&
118 miscReg
<= MISCREG_CR15
));
120 return regVal
[miscReg
];
123 MiscReg
MiscRegFile::readReg(int miscReg
, ThreadContext
* tc
)
125 return readRegNoEffect(miscReg
);
128 void MiscRegFile::setRegNoEffect(int miscReg
, const MiscReg
&val
)
130 // Make sure we're not dealing with an illegal control register.
131 // Instructions should filter out these indexes, and nothing else should
132 // attempt to write to them directly.
133 assert( miscReg
!= MISCREG_CR1
&&
134 !(miscReg
> MISCREG_CR4
&&
135 miscReg
< MISCREG_CR8
) &&
136 !(miscReg
> MISCREG_CR8
&&
137 miscReg
<= MISCREG_CR15
));
138 regVal
[miscReg
] = val
;
141 void MiscRegFile::setReg(int miscReg
,
142 const MiscReg
&val
, ThreadContext
* tc
)
144 MiscReg newVal
= val
;
149 CR0 toggled
= regVal
[miscReg
] ^ val
;
151 Efer efer
= regVal
[MISCREG_EFER
];
152 if (toggled
.pg
&& efer
.lme
) {
154 //Turning on long mode
156 regVal
[MISCREG_EFER
] = efer
;
158 //Turning off long mode
160 regVal
[MISCREG_EFER
] = efer
;
164 tc
->getITBPtr()->invalidateAll();
165 tc
->getDTBPtr()->invalidateAll();
167 //This must always be 1.
175 tc
->getITBPtr()->invalidateNonGlobal();
176 tc
->getDTBPtr()->invalidateNonGlobal();
180 CR4 toggled
= regVal
[miscReg
] ^ val
;
181 if (toggled
.pae
|| toggled
.pse
|| toggled
.pge
) {
182 tc
->getITBPtr()->invalidateAll();
183 tc
->getDTBPtr()->invalidateAll();
189 case MISCREG_CS_ATTR
:
191 SegAttr toggled
= regVal
[miscReg
] ^ val
;
192 SegAttr newCSAttr
= val
;
193 if (toggled
.longMode
) {
194 SegAttr newCSAttr
= val
;
195 if (newCSAttr
.longMode
) {
196 regVal
[MISCREG_ES_EFF_BASE
] = 0;
197 regVal
[MISCREG_CS_EFF_BASE
] = 0;
198 regVal
[MISCREG_SS_EFF_BASE
] = 0;
199 regVal
[MISCREG_DS_EFF_BASE
] = 0;
201 regVal
[MISCREG_ES_EFF_BASE
] = regVal
[MISCREG_ES_BASE
];
202 regVal
[MISCREG_CS_EFF_BASE
] = regVal
[MISCREG_CS_BASE
];
203 regVal
[MISCREG_SS_EFF_BASE
] = regVal
[MISCREG_SS_BASE
];
204 regVal
[MISCREG_DS_EFF_BASE
] = regVal
[MISCREG_DS_BASE
];
209 setRegNoEffect(miscReg
, newVal
);
212 void MiscRegFile::serialize(std::ostream
& os
)
214 SERIALIZE_ARRAY(regVal
, NumMiscRegs
);
217 void MiscRegFile::unserialize(Checkpoint
* cp
, const std::string
& section
)
219 UNSERIALIZE_ARRAY(regVal
, NumMiscRegs
);