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58 #ifndef __ARCH_X86_MISCREGS_HH__
59 #define __ARCH_X86_MISCREGS_HH__
61 #include "arch/x86/x86_traits.hh"
62 #include "base/bitunion.hh"
81 // Most of these are invalid.
83 MISCREG_CR0 = MISCREG_CR_BASE,
101 MISCREG_DR_BASE = MISCREG_CR_BASE + NumCRegs,
102 MISCREG_DR0 = MISCREG_DR_BASE,
112 MISCREG_RFLAGS = MISCREG_DR_BASE + NumDRegs,
115 MISCREG_SEG_SEL_BASE,
116 MISCREG_ES = MISCREG_SEG_SEL_BASE,
123 // Hidden segment base field
124 MISCREG_SEG_BASE_BASE = MISCREG_SEG_SEL_BASE + NumSegments,
125 MISCREG_ES_BASE = MISCREG_SEG_BASE_BASE,
132 // Hidden segment limit field
133 MISCREG_SEG_LIMIT_BASE = MISCREG_SEG_BASE_BASE + NumSegments,
134 MISCREG_ES_LIMIT = MISCREG_SEG_LIMIT_BASE,
141 // Hidden segment limit attributes
142 MISCREG_SEG_ATTR_BASE = MISCREG_SEG_LIMIT_BASE + NumSegments,
143 MISCREG_ES_ATTR = MISCREG_SEG_ATTR_BASE,
150 // System segment selectors
151 MISCREG_SYSSEG_SEL_BASE = MISCREG_SEG_ATTR_BASE + NumSegments,
152 MISCREG_LDTR = MISCREG_SYSSEG_SEL_BASE,
155 // Hidden system segment base field
156 MISCREG_SYSSEG_BASE_BASE = MISCREG_SYSSEG_SEL_BASE + NumSysSegments,
157 MISCREG_LDTR_BASE = MISCREG_SYSSEG_BASE_BASE,
162 // Hidden system segment limit field
163 MISCREG_SYSSEG_LIMIT_BASE = MISCREG_SYSSEG_BASE_BASE + NumSysSegments,
164 MISCREG_LDTR_LIMIT = MISCREG_SYSSEG_LIMIT_BASE,
169 // Hidden system segment attribute field
170 MISCREG_SYSSEG_ATTR_BASE = MISCREG_SYSSEG_LIMIT_BASE + NumSysSegments,
171 MISCREG_LDTR_ATTR = MISCREG_SYSSEG_ATTR_BASE,
174 // Floating point control registers
175 MISCREG_X87_TOP = MISCREG_SYSSEG_ATTR_BASE + NumSysSegments,
177 //XXX Add "Model-Specific Registers"
182 static inline MiscRegIndex
183 MISCREG_CR(int index)
185 return (MiscRegIndex)(MISCREG_CR_BASE + index);
188 static inline MiscRegIndex
189 MISCREG_DR(int index)
191 return (MiscRegIndex)(MISCREG_DR_BASE + index);
194 static inline MiscRegIndex
195 MISCREG_SEG_SEL(int index)
197 return (MiscRegIndex)(MISCREG_SEG_SEL_BASE + index);
200 static inline MiscRegIndex
201 MISCREG_SEG_BASE(int index)
203 return (MiscRegIndex)(MISCREG_SEG_BASE_BASE + index);
206 static inline MiscRegIndex
207 MISCREG_SEG_LIMIT(int index)
209 return (MiscRegIndex)(MISCREG_SEG_LIMIT_BASE + index);
212 static inline MiscRegIndex
213 MISCREG_SEG_ATTR(int index)
215 return (MiscRegIndex)(MISCREG_SEG_ATTR_BASE + index);
218 static inline MiscRegIndex
219 MISCREG_SYSSEG_SEL(int index)
221 return (MiscRegIndex)(MISCREG_SYSSEG_SEL_BASE + index);
224 static inline MiscRegIndex
225 MISCREG_SYSSEG_BASE(int index)
227 return (MiscRegIndex)(MISCREG_SYSSEG_BASE_BASE + index);
230 static inline MiscRegIndex
231 MISCREG_SYSSEG_LIMIT(int index)
233 return (MiscRegIndex)(MISCREG_SYSSEG_LIMIT_BASE + index);
236 static inline MiscRegIndex
237 MISCREG_SYSSEG_ATTR(int index)
239 return (MiscRegIndex)(MISCREG_SYSSEG_ATTR_BASE + index);
243 * A type to describe the condition code bits of the RFLAGS register,
244 * plus two flags, EZF and ECF, which are only visible to microcode.
246 BitUnion64(CCFlagBits)
255 EndBitUnion(CCFlagBits)
261 Bitfield<21> ID; // ID Flag
262 Bitfield<20> VIP; // Virtual Interrupt Pending
263 Bitfield<19> VIF; // Virtual Interrupt Flag
264 Bitfield<18> AC; // Alignment Check
265 Bitfield<17> VM; // Virtual-8086 Mode
266 Bitfield<16> RF; // Resume Flag
267 Bitfield<14> NT; // Nested Task
268 Bitfield<13, 12> IOPL; // I/O Privilege Level
269 Bitfield<11> OF; // Overflow Flag
270 Bitfield<10> DF; // Direction Flag
271 Bitfield<9> IF; // Interrupt Flag
272 Bitfield<8> TF; // Trap Flag
273 Bitfield<7> SF; // Sign Flag
274 Bitfield<6> ZF; // Zero Flag
275 Bitfield<4> AF; // Auxiliary Flag
276 Bitfield<2> PF; // Parity Flag
277 Bitfield<0> CF; // Carry Flag
284 Bitfield<31> PG; // Paging
285 Bitfield<30> CD; // Cache Disable
286 Bitfield<29> NW; // Not Writethrough
287 Bitfield<18> AM; // Alignment Mask
288 Bitfield<16> WP; // Write Protect
289 Bitfield<5> NE; // Numeric Error
290 Bitfield<4> ET; // Extension Type
291 Bitfield<3> TS; // Task Switched
292 Bitfield<2> EM; // Emulation
293 Bitfield<1> MP; // Monitor Coprocessor
294 Bitfield<0> PE; // Protection Enabled
297 // Page Fault Virtual Address
299 Bitfield<31, 0> legacy;
303 Bitfield<51, 12> longPDTB; // Long Mode Page-Directory-Table
305 Bitfield<31, 12> PDTB; // Non-PAE Addressing Page-Directory-Table
307 Bitfield<31, 5> PAEPDTB; // PAE Addressing Page-Directory-Table
309 Bitfield<4> PCD; // Page-Level Cache Disable
310 Bitfield<3> PWT; // Page-Level Writethrough
314 Bitfield<10> OSXMMEXCPT; // Operating System Unmasked
316 Bitfield<9> OSFXSR; // Operating System FXSave/FSRSTOR Support
317 Bitfield<8> PCE; // Performance-Monitoring Counter Enable
318 Bitfield<7> PGE; // Page-Global Enable
319 Bitfield<6> MCE; // Machine Check Enable
320 Bitfield<5> PAE; // Physical-Address Extension
321 Bitfield<4> PSE; // Page Size Extensions
322 Bitfield<3> DE; // Debugging Extensions
323 Bitfield<2> TSD; // Time Stamp Disable
324 Bitfield<1> PVI; // Protected-Mode Virtual Interrupts
325 Bitfield<0> VME; // Virtual-8086 Mode Extensions
329 Bitfield<3, 0> TPR; // Task Priority Register
335 BitUnion64(SegSelector)
336 Bitfield<15, 3> SI; // Selector Index
337 Bitfield<2> TI; // Table Indicator
338 Bitfield<1, 0> RPL; // Requestor Privilege Level
339 EndBitUnion(SegSelector)
342 * Segment Descriptors
345 BitUnion64(SegDescriptor)
346 Bitfield<63, 56> baseHigh;
347 Bitfield<39, 16> baseLow;
348 Bitfield<55> G; // Granularity
349 Bitfield<54> D; // Default Operand Size
350 Bitfield<54> B; // Default Operand Size
351 Bitfield<53> L; // Long Attribute Bit
352 Bitfield<52> AVL; // Available To Software
353 Bitfield<51, 48> limitHigh;
354 Bitfield<15, 0> limitLow;
355 Bitfield<47> P; // Present
356 Bitfield<46, 45> DPL; // Descriptor Privilege-Level
357 Bitfield<44> S; // System
358 SubBitUnion(type, 43, 40)
359 // Specifies whether this descriptor is for code or data.
360 Bitfield<43> codeOrData;
362 // These bit fields are for code segments
363 Bitfield<42> C; // Conforming
364 Bitfield<41> R; // Readable
366 // These bit fields are for data segments
367 Bitfield<42> E; // Expand-Down
368 Bitfield<41> W; // Writable
370 // This is used for both code and data segments.
371 Bitfield<40> A; // Accessed
373 EndBitUnion(SegDescriptor)
375 BitUnion64(GateDescriptor)
376 Bitfield<63, 48> offsetHigh; // Target Code-Segment Offset
377 Bitfield<15, 0> offsetLow; // Target Code-Segment Offset
378 Bitfield<31, 16> selector; // Target Code-Segment Selector
379 Bitfield<47> P; // Present
380 Bitfield<46, 45> DPL; // Descriptor Privilege-Level
381 Bitfield<43, 40> type;
382 Bitfield<36, 32> count; // Parameter Count
383 EndBitUnion(GateDescriptor)
386 * Descriptor-Table Registers
404 #endif // __ARCH_X86_INTREGS_HH__