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40 #ifndef __ARCH_X86_MMAPEDIPR_HH__
41 #define __ARCH_X86_MMAPEDIPR_HH__
46 * ISA-specific helper functions for memory mapped IPR accesses.
49 #include "arch/x86/miscregs.hh"
50 #include "config/full_system.hh"
51 #include "cpu/base.hh"
52 #include "cpu/thread_context.hh"
53 #include "mem/packet.hh"
58 handleIprRead(ThreadContext *xc, Packet *pkt)
61 panic("Shouldn't have a memory mapped register in SE\n");
63 Addr offset = pkt->getAddr() & mask(3);
64 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
65 MiscReg data = htog(xc->readMiscReg(index));
66 // Make sure we don't trot off the end of data.
67 assert(offset + pkt->getSize() <= sizeof(MiscReg));
68 pkt->setData(((uint8_t *)&data) + offset);
70 return xc->getCpuPtr()->ticks(1);
74 handleIprWrite(ThreadContext *xc, Packet *pkt)
77 panic("Shouldn't have a memory mapped register in SE\n");
79 Addr offset = pkt->getAddr() & mask(3);
80 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
82 data = htog(xc->readMiscRegNoEffect(index));
83 // Make sure we don't trot off the end of data.
84 assert(offset + pkt->getSize() <= sizeof(MiscReg));
85 pkt->writeData(((uint8_t *)&data) + offset);
86 xc->setMiscReg(index, gtoh(data));
88 return xc->getCpuPtr()->ticks(1);
92 #endif // __ARCH_X86_MMAPEDIPR_HH__