src/arch/x86/nativetrace.cc

   1 /*
   2  * Copyright (c) 2007-2009 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #include "arch/x86/regs/float.hh"
  32 #include "arch/x86/regs/int.hh"
  33 #include "arch/x86/isa_traits.hh"
  34 #include "arch/x86/nativetrace.hh"
  35 #include "cpu/thread_context.hh"
  36 #include "debug/ExecRegDelta.hh"
  37 #include "params/X86NativeTrace.hh"
  38 #include "sim/byteswap.hh"
  39
  40 namespace Trace {
  41
  42 void
  43 X86NativeTrace::ThreadState::update(NativeTrace *parent)
  44 {
  45     parent->read(this, sizeof(*this));
  46     rax = X86ISA::gtoh(rax);
  47     rcx = X86ISA::gtoh(rcx);
  48     rdx = X86ISA::gtoh(rdx);
  49     rbx = X86ISA::gtoh(rbx);
  50     rsp = X86ISA::gtoh(rsp);
  51     rbp = X86ISA::gtoh(rbp);
  52     rsi = X86ISA::gtoh(rsi);
  53     rdi = X86ISA::gtoh(rdi);
  54     r8 = X86ISA::gtoh(r8);
  55     r9 = X86ISA::gtoh(r9);
  56     r10 = X86ISA::gtoh(r10);
  57     r11 = X86ISA::gtoh(r11);
  58     r12 = X86ISA::gtoh(r12);
  59     r13 = X86ISA::gtoh(r13);
  60     r14 = X86ISA::gtoh(r14);
  61     r15 = X86ISA::gtoh(r15);
  62     rip = X86ISA::gtoh(rip);
  63     //This should be expanded if x87 registers are considered
  64     for (int i = 0; i < 8; i++)
  65         mmx[i] = X86ISA::gtoh(mmx[i]);
  66     for (int i = 0; i < 32; i++)
  67         xmm[i] = X86ISA::gtoh(xmm[i]);
  68 }
  69
  70 void
  71 X86NativeTrace::ThreadState::update(ThreadContext *tc)
  72 {
  73     rax = tc->readIntReg(X86ISA::INTREG_RAX);
  74     rcx = tc->readIntReg(X86ISA::INTREG_RCX);
  75     rdx = tc->readIntReg(X86ISA::INTREG_RDX);
  76     rbx = tc->readIntReg(X86ISA::INTREG_RBX);
  77     rsp = tc->readIntReg(X86ISA::INTREG_RSP);
  78     rbp = tc->readIntReg(X86ISA::INTREG_RBP);
  79     rsi = tc->readIntReg(X86ISA::INTREG_RSI);
  80     rdi = tc->readIntReg(X86ISA::INTREG_RDI);
  81     r8 = tc->readIntReg(X86ISA::INTREG_R8);
  82     r9 = tc->readIntReg(X86ISA::INTREG_R9);
  83     r10 = tc->readIntReg(X86ISA::INTREG_R10);
  84     r11 = tc->readIntReg(X86ISA::INTREG_R11);
  85     r12 = tc->readIntReg(X86ISA::INTREG_R12);
  86     r13 = tc->readIntReg(X86ISA::INTREG_R13);
  87     r14 = tc->readIntReg(X86ISA::INTREG_R14);
  88     r15 = tc->readIntReg(X86ISA::INTREG_R15);
  89     rip = tc->pcState().npc();
  90     //This should be expanded if x87 registers are considered
  91     for (int i = 0; i < 8; i++)
  92         mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i));
  93     for (int i = 0; i < 32; i++)
  94         xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i);
  95 }
  96
  97
  98 X86NativeTrace::X86NativeTrace(const Params *p)
  99     : NativeTrace(p)
 100 {
 101     checkRcx = true;
 102     checkR11 = true;
 103 }
 104
 105 bool
 106 X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
 107 {
 108     if(!checkRcx)
 109         checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
 110     if(checkRcx)
 111         return checkReg(name, mVal, nVal);
 112     return true;
 113 }
 114
 115 bool
 116 X86NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
 117 {
 118     if(!checkR11)
 119         checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
 120     if(checkR11)
 121         return checkReg(name, mVal, nVal);
 122     return true;
 123 }
 124
 125 bool
 126 X86NativeTrace::checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[])
 127 {
 128     if (mXmmBuf[num * 2]     != nXmmBuf[num * 2] ||
 129         mXmmBuf[num * 2 + 1] != nXmmBuf[num * 2 + 1]) {
 130         DPRINTF(ExecRegDelta,
 131                 "Register xmm%d should be 0x%016x%016x but is 0x%016x%016x.\n",
 132                 num, nXmmBuf[num * 2 + 1], nXmmBuf[num * 2],
 133                      mXmmBuf[num * 2 + 1], mXmmBuf[num * 2]);
 134         return false;
 135     }
 136     return true;
 137 }
 138
 139 void
 140 X86NativeTrace::check(NativeTraceRecord *record)
 141 {
 142     nState.update(this);
 143     mState.update(record->getThread());
 144
 145     if(record->getStaticInst()->isSyscall())
 146     {
 147         checkRcx = false;
 148         checkR11 = false;
 149         oldRcxVal = mState.rcx;
 150         oldRealRcxVal = nState.rcx;
 151         oldR11Val = mState.r11;
 152         oldRealR11Val = nState.r11;
 153     }
 154
 155     checkReg("rax", mState.rax, nState.rax);
 156     checkRcxReg("rcx", mState.rcx, nState.rcx);
 157     checkReg("rdx", mState.rdx, nState.rdx);
 158     checkReg("rbx", mState.rbx, nState.rbx);
 159     checkReg("rsp", mState.rsp, nState.rsp);
 160     checkReg("rbp", mState.rbp, nState.rbp);
 161     checkReg("rsi", mState.rsi, nState.rsi);
 162     checkReg("rdi", mState.rdi, nState.rdi);
 163     checkReg("r8",  mState.r8,  nState.r8);
 164     checkReg("r9",  mState.r9,  nState.r9);
 165     checkReg("r10", mState.r10, nState.r10);
 166     checkR11Reg("r11", mState.r11, nState.r11);
 167     checkReg("r12", mState.r12, nState.r12);
 168     checkReg("r13", mState.r13, nState.r13);
 169     checkReg("r14", mState.r14, nState.r14);
 170     checkReg("r15", mState.r15, nState.r15);
 171     checkReg("rip", mState.rip, nState.rip);
 172     checkXMM(0, mState.xmm, nState.xmm);
 173     checkXMM(1, mState.xmm, nState.xmm);
 174     checkXMM(2, mState.xmm, nState.xmm);
 175     checkXMM(3, mState.xmm, nState.xmm);
 176     checkXMM(4, mState.xmm, nState.xmm);
 177     checkXMM(5, mState.xmm, nState.xmm);
 178     checkXMM(6, mState.xmm, nState.xmm);
 179     checkXMM(7, mState.xmm, nState.xmm);
 180     checkXMM(8, mState.xmm, nState.xmm);
 181     checkXMM(9, mState.xmm, nState.xmm);
 182     checkXMM(10, mState.xmm, nState.xmm);
 183     checkXMM(11, mState.xmm, nState.xmm);
 184     checkXMM(12, mState.xmm, nState.xmm);
 185     checkXMM(13, mState.xmm, nState.xmm);
 186     checkXMM(14, mState.xmm, nState.xmm);
 187     checkXMM(15, mState.xmm, nState.xmm);
 188 }
 189
 190 } // namespace Trace
 191
 192 ////////////////////////////////////////////////////////////////////////
 193 //
 194 //  ExeTracer Simulation Object
 195 //
 196 Trace::X86NativeTrace *
 197 X86NativeTraceParams::create()
 198 {
 199     return new Trace::X86NativeTrace(this);
 200 };