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40 #ifndef __ARCH_X86_PAGE_TABLE_WALKER_HH__
41 #define __ARCH_X86_PAGE_TABLE_WALKER_HH__
45 #include "arch/x86/pagetable.hh"
46 #include "arch/x86/tlb.hh"
47 #include "base/types.hh"
48 #include "mem/mem_object.hh"
49 #include "mem/packet.hh"
50 #include "params/X86PagetableWalker.hh"
51 #include "sim/faults.hh"
52 #include "sim/system.hh"
58 class Walker : public MemObject
61 // Port for accessing memory
62 class WalkerPort : public MasterPort
65 WalkerPort(const std::string &_name, Walker * _walker) :
66 MasterPort(_name, _walker), walker(_walker)
72 bool recvTimingResp(PacketPtr pkt);
76 friend class WalkerPort;
79 // State to track each walk of the page table
88 LongPML4, LongPDP, LongPD, LongPTE,
90 PAEPDP, PAEPD, PAEPTE,
91 // Non PAE legacy mode with and without PSE
106 std::vector<PacketPtr> writes;
108 TLB::Translation * translation;
115 WalkerState(Walker * _walker, BaseTLB::Translation *_translation,
116 const RequestPtr &_req, bool _isFunctional = false) :
117 walker(_walker), req(_req), state(Ready),
118 nextState(Ready), inflight(0),
119 translation(_translation),
120 functional(_isFunctional), timing(false),
121 retrying(false), started(false)
124 void initState(ThreadContext * _tc, BaseTLB::Mode _mode,
125 bool _isTiming = false);
127 Fault startFunctional(Addr &addr, unsigned &logBytes);
128 bool recvPacket(PacketPtr pkt);
133 std::string name() const {return walker->name();}
136 void setupWalk(Addr vaddr);
137 Fault stepWalk(PacketPtr &write);
140 Fault pageFault(bool present);
143 friend class WalkerState;
144 // State for timing and atomic accesses (need multiple per walker in
145 // the case of multiple outstanding requests in timing mode)
146 std::list<WalkerState *> currStates;
147 // State for functional accesses (only need one of these per walker)
148 WalkerState funcState;
150 struct WalkerSenderState : public Packet::SenderState
152 WalkerState * senderWalk;
153 WalkerSenderState(WalkerState * _senderWalk) :
154 senderWalk(_senderWalk) {}
158 // Kick off the state machine.
159 Fault start(ThreadContext * _tc, BaseTLB::Translation *translation,
160 const RequestPtr &req, BaseTLB::Mode mode);
161 Fault startFunctional(ThreadContext * _tc, Addr &addr,
162 unsigned &logBytes, BaseTLB::Mode mode);
163 BaseMasterPort &getMasterPort(const std::string &if_name,
164 PortID idx = InvalidPortID);
167 // The TLB we're supposed to load.
172 // The number of outstanding walks that can be squashed per cycle.
173 unsigned numSquashable;
175 // Wrapper for checking for squashes before starting a translation.
176 void startWalkWrapper();
179 * Event used to call startWalkWrapper.
181 EventFunctionWrapper startWalkWrapperEvent;
183 // Functions for dealing with packets.
184 bool recvTimingResp(PacketPtr pkt);
186 bool sendTiming(WalkerState * sendingState, PacketPtr pkt);
190 void setTLB(TLB * _tlb)
195 typedef X86PagetableWalkerParams Params;
200 return static_cast<const Params *>(_params);
203 Walker(const Params *params) :
204 MemObject(params), port(name() + ".port", this),
205 funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system),
206 masterId(sys->getMasterId(this)),
207 numSquashable(params->num_squash_per_cycle),
208 startWalkWrapperEvent([this]{ startWalkWrapper(); }, name())
213 #endif // __ARCH_X86_PAGE_TABLE_WALKER_HH__