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[gem5.git] / src / arch / x86 / predecoder.cc
1 /*
2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
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10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use. Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
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17 *
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25 *
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27 * this list of conditions and the following disclaimer. Redistributions
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35 * output created using the software may be prepared, but only for
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39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58 #include "arch/x86/miscregs.hh"
59 #include "arch/x86/predecoder.hh"
60 #include "base/misc.hh"
61 #include "base/trace.hh"
62 #include "base/types.hh"
63 #include "cpu/thread_context.hh"
64
65 namespace X86ISA
66 {
67 void Predecoder::doReset()
68 {
69 origPC = basePC + offset;
70 DPRINTF(Predecoder, "Setting origPC to %#x\n", origPC);
71 emi.rex = 0;
72 emi.legacy = 0;
73 emi.opcode.num = 0;
74 emi.opcode.op = 0;
75 emi.opcode.prefixA = emi.opcode.prefixB = 0;
76
77 immediateCollected = 0;
78 emi.immediate = 0;
79 emi.displacement = 0;
80 emi.dispSize = 0;
81
82 emi.modRM = 0;
83 emi.sib = 0;
84 m5Reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
85 emi.mode.mode = m5Reg.mode;
86 emi.mode.submode = m5Reg.submode;
87 }
88
89 void Predecoder::process()
90 {
91 //This function drives the predecoder state machine.
92
93 //Some sanity checks. You shouldn't try to process more bytes if
94 //there aren't any, and you shouldn't overwrite an already
95 //predecoder ExtMachInst.
96 assert(!outOfBytes);
97 assert(!emiIsReady);
98
99 //While there's still something to do...
100 while(!emiIsReady && !outOfBytes)
101 {
102 uint8_t nextByte = getNextByte();
103 switch(state)
104 {
105 case ResetState:
106 doReset();
107 state = PrefixState;
108 case PrefixState:
109 state = doPrefixState(nextByte);
110 break;
111 case OpcodeState:
112 state = doOpcodeState(nextByte);
113 break;
114 case ModRMState:
115 state = doModRMState(nextByte);
116 break;
117 case SIBState:
118 state = doSIBState(nextByte);
119 break;
120 case DisplacementState:
121 state = doDisplacementState();
122 break;
123 case ImmediateState:
124 state = doImmediateState();
125 break;
126 case ErrorState:
127 panic("Went to the error state in the predecoder.\n");
128 default:
129 panic("Unrecognized state! %d\n", state);
130 }
131 }
132 }
133
134 //Either get a prefix and record it in the ExtMachInst, or send the
135 //state machine on to get the opcode(s).
136 Predecoder::State Predecoder::doPrefixState(uint8_t nextByte)
137 {
138 uint8_t prefix = Prefixes[nextByte];
139 State nextState = PrefixState;
140 // REX prefixes are only recognized in 64 bit mode.
141 if (prefix == RexPrefix && emi.mode.submode != SixtyFourBitMode)
142 prefix = 0;
143 if (prefix)
144 consumeByte();
145 switch(prefix)
146 {
147 //Operand size override prefixes
148 case OperandSizeOverride:
149 DPRINTF(Predecoder, "Found operand size override prefix.\n");
150 emi.legacy.op = true;
151 break;
152 case AddressSizeOverride:
153 DPRINTF(Predecoder, "Found address size override prefix.\n");
154 emi.legacy.addr = true;
155 break;
156 //Segment override prefixes
157 case CSOverride:
158 case DSOverride:
159 case ESOverride:
160 case FSOverride:
161 case GSOverride:
162 case SSOverride:
163 DPRINTF(Predecoder, "Found segment override.\n");
164 emi.legacy.seg = prefix;
165 break;
166 case Lock:
167 DPRINTF(Predecoder, "Found lock prefix.\n");
168 emi.legacy.lock = true;
169 break;
170 case Rep:
171 DPRINTF(Predecoder, "Found rep prefix.\n");
172 emi.legacy.rep = true;
173 break;
174 case Repne:
175 DPRINTF(Predecoder, "Found repne prefix.\n");
176 emi.legacy.repne = true;
177 break;
178 case RexPrefix:
179 DPRINTF(Predecoder, "Found Rex prefix %#x.\n", nextByte);
180 emi.rex = nextByte;
181 break;
182 case 0:
183 nextState = OpcodeState;
184 break;
185 default:
186 panic("Unrecognized prefix %#x\n", nextByte);
187 }
188 return nextState;
189 }
190
191 //Load all the opcodes (currently up to 2) and then figure out
192 //what immediate and/or ModRM is needed.
193 Predecoder::State Predecoder::doOpcodeState(uint8_t nextByte)
194 {
195 State nextState = ErrorState;
196 emi.opcode.num++;
197 //We can't handle 3+ byte opcodes right now
198 assert(emi.opcode.num < 4);
199 consumeByte();
200 if(emi.opcode.num == 1 && nextByte == 0x0f)
201 {
202 nextState = OpcodeState;
203 DPRINTF(Predecoder, "Found two byte opcode.\n");
204 emi.opcode.prefixA = nextByte;
205 }
206 else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3F))
207 {
208 nextState = OpcodeState;
209 DPRINTF(Predecoder, "Found three byte opcode.\n");
210 emi.opcode.prefixB = nextByte;
211 }
212 else
213 {
214 DPRINTF(Predecoder, "Found opcode %#x.\n", nextByte);
215 emi.opcode.op = nextByte;
216
217 //Figure out the effective operand size. This can be overriden to
218 //a fixed value at the decoder level.
219 int logOpSize;
220 if (emi.rex.w)
221 logOpSize = 3; // 64 bit operand size
222 else if (emi.legacy.op)
223 logOpSize = m5Reg.altOp;
224 else
225 logOpSize = m5Reg.defOp;
226
227 //Set the actual op size
228 emi.opSize = 1 << logOpSize;
229
230 //Figure out the effective address size. This can be overriden to
231 //a fixed value at the decoder level.
232 int logAddrSize;
233 if(emi.legacy.addr)
234 logAddrSize = m5Reg.altAddr;
235 else
236 logAddrSize = m5Reg.defAddr;
237
238 //Set the actual address size
239 emi.addrSize = 1 << logAddrSize;
240
241 //Figure out the effective stack width. This can be overriden to
242 //a fixed value at the decoder level.
243 emi.stackSize = 1 << m5Reg.stack;
244
245 //Figure out how big of an immediate we'll retreive based
246 //on the opcode.
247 int immType = ImmediateType[emi.opcode.num - 1][nextByte];
248 if (emi.opcode.num == 1 && nextByte >= 0xA0 && nextByte <= 0xA3)
249 immediateSize = SizeTypeToSize[logAddrSize - 1][immType];
250 else
251 immediateSize = SizeTypeToSize[logOpSize - 1][immType];
252
253 //Determine what to expect next
254 if (UsesModRM[emi.opcode.num - 1][nextByte]) {
255 nextState = ModRMState;
256 } else {
257 if(immediateSize) {
258 nextState = ImmediateState;
259 } else {
260 emiIsReady = true;
261 nextState = ResetState;
262 }
263 }
264 }
265 return nextState;
266 }
267
268 //Get the ModRM byte and determine what displacement, if any, there is.
269 //Also determine whether or not to get the SIB byte, displacement, or
270 //immediate next.
271 Predecoder::State Predecoder::doModRMState(uint8_t nextByte)
272 {
273 State nextState = ErrorState;
274 ModRM modRM;
275 modRM = nextByte;
276 DPRINTF(Predecoder, "Found modrm byte %#x.\n", nextByte);
277 if (m5Reg.defOp == 1) {
278 //figure out 16 bit displacement size
279 if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2)
280 displacementSize = 2;
281 else if (modRM.mod == 1)
282 displacementSize = 1;
283 else
284 displacementSize = 0;
285 } else {
286 //figure out 32/64 bit displacement size
287 if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2)
288 displacementSize = 4;
289 else if (modRM.mod == 1)
290 displacementSize = 1;
291 else
292 displacementSize = 0;
293 }
294
295 // The "test" instruction in group 3 needs an immediate, even though
296 // the other instructions with the same actual opcode don't.
297 if (emi.opcode.num == 1 && (modRM.reg & 0x6) == 0) {
298 if (emi.opcode.op == 0xF6)
299 immediateSize = 1;
300 else if (emi.opcode.op == 0xF7)
301 immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
302 }
303
304 //If there's an SIB, get that next.
305 //There is no SIB in 16 bit mode.
306 if (modRM.rm == 4 && modRM.mod != 3) {
307 // && in 32/64 bit mode)
308 nextState = SIBState;
309 } else if(displacementSize) {
310 nextState = DisplacementState;
311 } else if(immediateSize) {
312 nextState = ImmediateState;
313 } else {
314 emiIsReady = true;
315 nextState = ResetState;
316 }
317 //The ModRM byte is consumed no matter what
318 consumeByte();
319 emi.modRM = modRM;
320 return nextState;
321 }
322
323 //Get the SIB byte. We don't do anything with it at this point, other
324 //than storing it in the ExtMachInst. Determine if we need to get a
325 //displacement or immediate next.
326 Predecoder::State Predecoder::doSIBState(uint8_t nextByte)
327 {
328 State nextState = ErrorState;
329 emi.sib = nextByte;
330 DPRINTF(Predecoder, "Found SIB byte %#x.\n", nextByte);
331 consumeByte();
332 if (emi.modRM.mod == 0 && emi.sib.base == 5)
333 displacementSize = 4;
334 if (displacementSize) {
335 nextState = DisplacementState;
336 } else if(immediateSize) {
337 nextState = ImmediateState;
338 } else {
339 emiIsReady = true;
340 nextState = ResetState;
341 }
342 return nextState;
343 }
344
345 //Gather up the displacement, or at least as much of it
346 //as we can get.
347 Predecoder::State Predecoder::doDisplacementState()
348 {
349 State nextState = ErrorState;
350
351 getImmediate(immediateCollected,
352 emi.displacement,
353 displacementSize);
354
355 DPRINTF(Predecoder, "Collecting %d byte displacement, got %d bytes.\n",
356 displacementSize, immediateCollected);
357
358 if(displacementSize == immediateCollected) {
359 //Reset this for other immediates.
360 immediateCollected = 0;
361 //Sign extend the displacement
362 switch(displacementSize)
363 {
364 case 1:
365 emi.displacement = sext<8>(emi.displacement);
366 break;
367 case 2:
368 emi.displacement = sext<16>(emi.displacement);
369 break;
370 case 4:
371 emi.displacement = sext<32>(emi.displacement);
372 break;
373 default:
374 panic("Undefined displacement size!\n");
375 }
376 DPRINTF(Predecoder, "Collected displacement %#x.\n",
377 emi.displacement);
378 if(immediateSize) {
379 nextState = ImmediateState;
380 } else {
381 emiIsReady = true;
382 nextState = ResetState;
383 }
384
385 emi.dispSize = displacementSize;
386 }
387 else
388 nextState = DisplacementState;
389 return nextState;
390 }
391
392 //Gather up the immediate, or at least as much of it
393 //as we can get
394 Predecoder::State Predecoder::doImmediateState()
395 {
396 State nextState = ErrorState;
397
398 getImmediate(immediateCollected,
399 emi.immediate,
400 immediateSize);
401
402 DPRINTF(Predecoder, "Collecting %d byte immediate, got %d bytes.\n",
403 immediateSize, immediateCollected);
404
405 if(immediateSize == immediateCollected)
406 {
407 //Reset this for other immediates.
408 immediateCollected = 0;
409
410 //XXX Warning! The following is an observed pattern and might
411 //not always be true!
412
413 //Instructions which use 64 bit operands but 32 bit immediates
414 //need to have the immediate sign extended to 64 bits.
415 //Instructions which use true 64 bit immediates won't be
416 //affected, and instructions that use true 32 bit immediates
417 //won't notice.
418 switch(immediateSize)
419 {
420 case 4:
421 emi.immediate = sext<32>(emi.immediate);
422 break;
423 case 1:
424 emi.immediate = sext<8>(emi.immediate);
425 }
426
427 DPRINTF(Predecoder, "Collected immediate %#x.\n",
428 emi.immediate);
429 emiIsReady = true;
430 nextState = ResetState;
431 }
432 else
433 nextState = ImmediateState;
434 return nextState;
435 }
436 }