hook up stat syscall on 64-bit x86_SE
[gem5.git] / src / arch / x86 / predecoder.hh
1 /*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
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35 * output created using the software may be prepared, but only for
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39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58 #ifndef __ARCH_X86_PREDECODER_HH__
59 #define __ARCH_X86_PREDECODER_HH__
60
61 #include <cassert>
62
63 #include "arch/x86/types.hh"
64 #include "arch/x86/miscregs.hh"
65 #include "base/bitfield.hh"
66 #include "base/misc.hh"
67 #include "base/trace.hh"
68 #include "base/types.hh"
69
70 class ThreadContext;
71
72 namespace X86ISA
73 {
74 class Predecoder
75 {
76 private:
77 //These are defined and documented in predecoder_tables.cc
78 static const uint8_t Prefixes[256];
79 static const uint8_t UsesModRM[2][256];
80 static const uint8_t ImmediateType[2][256];
81 static const uint8_t SizeTypeToSize[3][10];
82
83 protected:
84 ThreadContext * tc;
85 //The bytes to be predecoded
86 MachInst fetchChunk;
87 //The pc of the start of fetchChunk
88 Addr basePC;
89 //The pc the current instruction started at
90 Addr origPC;
91 //The offset into fetchChunk of current processing
92 int offset;
93 //The extended machine instruction being generated
94 ExtMachInst emi;
95 HandyM5Reg m5Reg;
96
97 inline uint8_t getNextByte()
98 {
99 return ((uint8_t *)&fetchChunk)[offset];
100 }
101
102 void getImmediate(int &collected, uint64_t &current, int size)
103 {
104 //Figure out how many bytes we still need to get for the
105 //immediate.
106 int toGet = size - collected;
107 //Figure out how many bytes are left in our "buffer"
108 int remaining = sizeof(MachInst) - offset;
109 //Get as much as we need, up to the amount available.
110 toGet = toGet > remaining ? remaining : toGet;
111
112 //Shift the bytes we want to be all the way to the right
113 uint64_t partialImm = fetchChunk >> (offset * 8);
114 //Mask off what we don't want
115 partialImm &= mask(toGet * 8);
116 //Shift it over to overlay with our displacement.
117 partialImm <<= (immediateCollected * 8);
118 //Put it into our displacement
119 current |= partialImm;
120 //Update how many bytes we've collected.
121 collected += toGet;
122 consumeBytes(toGet);
123 }
124
125 inline void consumeByte()
126 {
127 offset++;
128 assert(offset <= sizeof(MachInst));
129 if(offset == sizeof(MachInst))
130 outOfBytes = true;
131 }
132
133 inline void consumeBytes(int numBytes)
134 {
135 offset += numBytes;
136 assert(offset <= sizeof(MachInst));
137 if(offset == sizeof(MachInst))
138 outOfBytes = true;
139 }
140
141 void doReset();
142
143 //State machine state
144 protected:
145 //Whether or not we're out of bytes
146 bool outOfBytes;
147 //Whether we've completed generating an ExtMachInst
148 bool emiIsReady;
149 //The size of the displacement value
150 int displacementSize;
151 //The size of the immediate value
152 int immediateSize;
153 //This is how much of any immediate value we've gotten. This is used
154 //for both the actual immediate and the displacement.
155 int immediateCollected;
156
157 enum State {
158 ResetState,
159 PrefixState,
160 OpcodeState,
161 ModRMState,
162 SIBState,
163 DisplacementState,
164 ImmediateState,
165 //We should never get to this state. Getting here is an error.
166 ErrorState
167 };
168
169 State state;
170
171 //Functions to handle each of the states
172 State doPrefixState(uint8_t);
173 State doOpcodeState(uint8_t);
174 State doModRMState(uint8_t);
175 State doSIBState(uint8_t);
176 State doDisplacementState();
177 State doImmediateState();
178
179 public:
180 Predecoder(ThreadContext * _tc) :
181 tc(_tc), basePC(0), origPC(0), offset(0),
182 outOfBytes(true), emiIsReady(false),
183 state(ResetState)
184 {
185 emi.mode.mode = LongMode;
186 emi.mode.submode = SixtyFourBitMode;
187 m5Reg = 0;
188 }
189
190 void reset()
191 {
192 state = ResetState;
193 }
194
195 ThreadContext * getTC()
196 {
197 return tc;
198 }
199
200 void setTC(ThreadContext * _tc)
201 {
202 tc = _tc;
203 }
204
205 void process();
206
207 //Use this to give data to the predecoder. This should be used
208 //when there is control flow.
209 void moreBytes(Addr pc, Addr fetchPC, MachInst data)
210 {
211 DPRINTF(Predecoder, "Getting more bytes.\n");
212 basePC = fetchPC;
213 offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
214 fetchChunk = data;
215 outOfBytes = false;
216 process();
217 }
218
219 bool needMoreBytes()
220 {
221 return outOfBytes;
222 }
223
224 bool extMachInstReady()
225 {
226 return emiIsReady;
227 }
228
229 //This returns a constant reference to the ExtMachInst to avoid a copy
230 const ExtMachInst & getExtMachInst()
231 {
232 assert(emiIsReady);
233 emiIsReady = false;
234 return emi;
235 }
236
237 int getInstSize()
238 {
239 DPRINTF(Predecoder,
240 "Calculating the instruction size: "
241 "basePC: %#x offset: %#x origPC: %#x\n",
242 basePC, offset, origPC);
243 return basePC + offset - origPC;
244 }
245 };
246 };
247
248 #endif // __ARCH_X86_PREDECODER_HH__