X86: Implement MOVQ2DQ.
[gem5.git] / src / arch / x86 / process.cc
1 /*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32 /*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use. Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 * Director of Intellectual Property Licensing
52 * Office of Strategy and Technology
53 * Hewlett-Packard Company
54 * 1501 Page Mill Road
55 * Palo Alto, California 94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer. Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution. Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission. No right of
65 * sublicense is granted herewith. Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses. Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89 #include "arch/x86/isa_traits.hh"
90 #include "arch/x86/miscregs.hh"
91 #include "arch/x86/process.hh"
92 #include "arch/x86/segmentregs.hh"
93 #include "arch/x86/types.hh"
94 #include "base/loader/object_file.hh"
95 #include "base/loader/elf_object.hh"
96 #include "base/misc.hh"
97 #include "base/trace.hh"
98 #include "cpu/thread_context.hh"
99 #include "mem/page_table.hh"
100 #include "mem/translating_port.hh"
101 #include "sim/process_impl.hh"
102 #include "sim/syscall_emul.hh"
103 #include "sim/system.hh"
104
105 using namespace std;
106 using namespace X86ISA;
107
108 static const int ArgumentReg[] = {
109 INTREG_RDI,
110 INTREG_RSI,
111 INTREG_RDX,
112 //This argument register is r10 for syscalls and rcx for C.
113 INTREG_R10W,
114 //INTREG_RCX,
115 INTREG_R8W,
116 INTREG_R9W
117 };
118 static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119 static const int ArgumentReg32[] = {
120 INTREG_EBX,
121 INTREG_ECX,
122 INTREG_EDX,
123 INTREG_ESI,
124 INTREG_EDI,
125 };
126 static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128 X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129 SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130 LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131 numSyscallDescs(_numSyscallDescs)
132 {
133 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134 brk_point = roundUp(brk_point, VMPageSize);
135 }
136
137 X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138 ObjectFile *objFile, SyscallDesc *_syscallDescs,
139 int _numSyscallDescs) :
140 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141 {
142 // Set up stack. On X86_64 Linux, stack goes from the top of memory
143 // downward, less the hole for the kernel address space plus one page
144 // for undertermined purposes.
145 stack_base = (Addr)0x7FFFFFFFF000ULL;
146
147 // Set pointer for next thread stack. Reserve 8M for main stack.
148 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
149
150 // Set up region for mmaps. This was determined empirically and may not
151 // always be correct.
152 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
153 }
154
155 void
156 I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
157 {
158 Addr eip = tc->readPC();
159 if (eip >= vsyscallPage.base &&
160 eip < vsyscallPage.base + vsyscallPage.size) {
161 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset);
162 }
163 X86LiveProcess::syscall(callnum, tc);
164 }
165
166
167 I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
168 ObjectFile *objFile, SyscallDesc *_syscallDescs,
169 int _numSyscallDescs) :
170 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
171 {
172 _gdtStart = 0x100000000;
173 _gdtSize = VMPageSize;
174
175 vsyscallPage.base = 0xffffe000ULL;
176 vsyscallPage.size = VMPageSize;
177 vsyscallPage.vsyscallOffset = 0x400;
178 vsyscallPage.vsysexitOffset = 0x410;
179
180 stack_base = vsyscallPage.base;
181
182 // Set pointer for next thread stack. Reserve 8M for main stack.
183 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
184
185 // Set up region for mmaps. This was determined empirically and may not
186 // always be correct.
187 mmap_start = mmap_end = (Addr)0xf7ffd000ULL;
188 }
189
190 SyscallDesc*
191 X86LiveProcess::getDesc(int callnum)
192 {
193 if (callnum < 0 || callnum >= numSyscallDescs)
194 return NULL;
195 return &syscallDescs[callnum];
196 }
197
198 void
199 X86_64LiveProcess::startup()
200 {
201 LiveProcess::startup();
202
203 if (checkpointRestored)
204 return;
205
206 argsInit(sizeof(uint64_t), VMPageSize);
207
208 for (int i = 0; i < contextIds.size(); i++) {
209 ThreadContext * tc = system->getThreadContext(contextIds[i]);
210
211 SegAttr dataAttr = 0;
212 dataAttr.dpl = 3;
213 dataAttr.unusable = 0;
214 dataAttr.defaultSize = 1;
215 dataAttr.longMode = 1;
216 dataAttr.avl = 0;
217 dataAttr.granularity = 1;
218 dataAttr.present = 1;
219 dataAttr.type = 3;
220 dataAttr.writable = 1;
221 dataAttr.readable = 1;
222 dataAttr.expandDown = 0;
223 dataAttr.system = 1;
224
225 //Initialize the segment registers.
226 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
227 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
228 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
229 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
230 }
231
232 SegAttr csAttr = 0;
233 csAttr.dpl = 3;
234 csAttr.unusable = 0;
235 csAttr.defaultSize = 0;
236 csAttr.longMode = 1;
237 csAttr.avl = 0;
238 csAttr.granularity = 1;
239 csAttr.present = 1;
240 csAttr.type = 10;
241 csAttr.writable = 0;
242 csAttr.readable = 1;
243 csAttr.expandDown = 0;
244 csAttr.system = 1;
245
246 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
247
248 Efer efer = 0;
249 efer.sce = 1; // Enable system call extensions.
250 efer.lme = 1; // Enable long mode.
251 efer.lma = 1; // Activate long mode.
252 efer.nxe = 1; // Enable nx support.
253 efer.svme = 0; // Disable svm support for now. It isn't implemented.
254 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
255 tc->setMiscReg(MISCREG_EFER, efer);
256
257 //Set up the registers that describe the operating mode.
258 CR0 cr0 = 0;
259 cr0.pg = 1; // Turn on paging.
260 cr0.cd = 0; // Don't disable caching.
261 cr0.nw = 0; // This is bit is defined to be ignored.
262 cr0.am = 0; // No alignment checking
263 cr0.wp = 0; // Supervisor mode can write read only pages
264 cr0.ne = 1;
265 cr0.et = 1; // This should always be 1
266 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
267 // would be pointless.
268 cr0.em = 0; // Allow x87 instructions to execute natively.
269 cr0.mp = 1; // This doesn't really matter, but the manual suggests
270 // setting it to one.
271 cr0.pe = 1; // We're definitely in protected mode.
272 tc->setMiscReg(MISCREG_CR0, cr0);
273 }
274 }
275
276 void
277 I386LiveProcess::startup()
278 {
279 LiveProcess::startup();
280
281 if (checkpointRestored)
282 return;
283
284 argsInit(sizeof(uint32_t), VMPageSize);
285
286 /*
287 * Set up a GDT for this process. The whole GDT wouldn't really be for
288 * this process, but the only parts we care about are.
289 */
290 pTable->allocate(_gdtStart, _gdtSize);
291 uint64_t zero = 0;
292 assert(_gdtSize % sizeof(zero) == 0);
293 for (Addr gdtCurrent = _gdtStart;
294 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
295 initVirtMem->write(gdtCurrent, zero);
296 }
297
298 // Set up the vsyscall page for this process.
299 pTable->allocate(vsyscallPage.base, vsyscallPage.size);
300 uint8_t vsyscallBlob[] = {
301 0x51, // push %ecx
302 0x52, // push %edp
303 0x55, // push %ebp
304 0x89, 0xe5, // mov %esp, %ebp
305 0x0f, 0x34 // sysenter
306 };
307 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
308 vsyscallBlob, sizeof(vsyscallBlob));
309
310 uint8_t vsysexitBlob[] = {
311 0x5d, // pop %ebp
312 0x5a, // pop %edx
313 0x59, // pop %ecx
314 0xc3 // ret
315 };
316 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
317 vsysexitBlob, sizeof(vsysexitBlob));
318
319 for (int i = 0; i < contextIds.size(); i++) {
320 ThreadContext * tc = system->getThreadContext(contextIds[i]);
321
322 SegAttr dataAttr = 0;
323 dataAttr.dpl = 3;
324 dataAttr.unusable = 0;
325 dataAttr.defaultSize = 1;
326 dataAttr.longMode = 0;
327 dataAttr.avl = 0;
328 dataAttr.granularity = 1;
329 dataAttr.present = 1;
330 dataAttr.type = 3;
331 dataAttr.writable = 1;
332 dataAttr.readable = 1;
333 dataAttr.expandDown = 0;
334 dataAttr.system = 1;
335
336 //Initialize the segment registers.
337 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
338 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
339 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
340 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
341 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
342 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
343 }
344
345 SegAttr csAttr = 0;
346 csAttr.dpl = 3;
347 csAttr.unusable = 0;
348 csAttr.defaultSize = 1;
349 csAttr.longMode = 0;
350 csAttr.avl = 0;
351 csAttr.granularity = 1;
352 csAttr.present = 1;
353 csAttr.type = 0xa;
354 csAttr.writable = 0;
355 csAttr.readable = 1;
356 csAttr.expandDown = 0;
357 csAttr.system = 1;
358
359 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
360
361 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
362 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
363 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
364
365 // Set the LDT selector to 0 to deactivate it.
366 tc->setMiscRegNoEffect(MISCREG_TSL, 0);
367
368 Efer efer = 0;
369 efer.sce = 1; // Enable system call extensions.
370 efer.lme = 1; // Enable long mode.
371 efer.lma = 0; // Deactivate long mode.
372 efer.nxe = 1; // Enable nx support.
373 efer.svme = 0; // Disable svm support for now. It isn't implemented.
374 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
375 tc->setMiscReg(MISCREG_EFER, efer);
376
377 //Set up the registers that describe the operating mode.
378 CR0 cr0 = 0;
379 cr0.pg = 1; // Turn on paging.
380 cr0.cd = 0; // Don't disable caching.
381 cr0.nw = 0; // This is bit is defined to be ignored.
382 cr0.am = 0; // No alignment checking
383 cr0.wp = 0; // Supervisor mode can write read only pages
384 cr0.ne = 1;
385 cr0.et = 1; // This should always be 1
386 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
387 // would be pointless.
388 cr0.em = 0; // Allow x87 instructions to execute natively.
389 cr0.mp = 1; // This doesn't really matter, but the manual suggests
390 // setting it to one.
391 cr0.pe = 1; // We're definitely in protected mode.
392 tc->setMiscReg(MISCREG_CR0, cr0);
393 }
394 }
395
396 template<class IntType>
397 void
398 X86LiveProcess::argsInit(int pageSize,
399 std::vector<AuxVector<IntType> > extraAuxvs)
400 {
401 int intSize = sizeof(IntType);
402
403 typedef AuxVector<IntType> auxv_t;
404 std::vector<auxv_t> auxv = extraAuxvs;
405
406 string filename;
407 if(argv.size() < 1)
408 filename = "";
409 else
410 filename = argv[0];
411
412 //We want 16 byte alignment
413 uint64_t align = 16;
414
415 // load object file into target memory
416 objFile->loadSections(initVirtMem);
417
418 enum X86CpuFeature {
419 X86_OnboardFPU = 1 << 0,
420 X86_VirtualModeExtensions = 1 << 1,
421 X86_DebuggingExtensions = 1 << 2,
422 X86_PageSizeExtensions = 1 << 3,
423
424 X86_TimeStampCounter = 1 << 4,
425 X86_ModelSpecificRegisters = 1 << 5,
426 X86_PhysicalAddressExtensions = 1 << 6,
427 X86_MachineCheckExtensions = 1 << 7,
428
429 X86_CMPXCHG8Instruction = 1 << 8,
430 X86_OnboardAPIC = 1 << 9,
431 X86_SYSENTER_SYSEXIT = 1 << 11,
432
433 X86_MemoryTypeRangeRegisters = 1 << 12,
434 X86_PageGlobalEnable = 1 << 13,
435 X86_MachineCheckArchitecture = 1 << 14,
436 X86_CMOVInstruction = 1 << 15,
437
438 X86_PageAttributeTable = 1 << 16,
439 X86_36BitPSEs = 1 << 17,
440 X86_ProcessorSerialNumber = 1 << 18,
441 X86_CLFLUSHInstruction = 1 << 19,
442
443 X86_DebugTraceStore = 1 << 21,
444 X86_ACPIViaMSR = 1 << 22,
445 X86_MultimediaExtensions = 1 << 23,
446
447 X86_FXSAVE_FXRSTOR = 1 << 24,
448 X86_StreamingSIMDExtensions = 1 << 25,
449 X86_StreamingSIMDExtensions2 = 1 << 26,
450 X86_CPUSelfSnoop = 1 << 27,
451
452 X86_HyperThreading = 1 << 28,
453 X86_AutomaticClockControl = 1 << 29,
454 X86_IA64Processor = 1 << 30
455 };
456
457 //Setup the auxilliary vectors. These will already have endian conversion.
458 //Auxilliary vectors are loaded only for elf formatted executables.
459 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
460 if(elfObject)
461 {
462 uint64_t features =
463 X86_OnboardFPU |
464 X86_VirtualModeExtensions |
465 X86_DebuggingExtensions |
466 X86_PageSizeExtensions |
467 X86_TimeStampCounter |
468 X86_ModelSpecificRegisters |
469 X86_PhysicalAddressExtensions |
470 X86_MachineCheckExtensions |
471 X86_CMPXCHG8Instruction |
472 X86_OnboardAPIC |
473 X86_SYSENTER_SYSEXIT |
474 X86_MemoryTypeRangeRegisters |
475 X86_PageGlobalEnable |
476 X86_MachineCheckArchitecture |
477 X86_CMOVInstruction |
478 X86_PageAttributeTable |
479 X86_36BitPSEs |
480 // X86_ProcessorSerialNumber |
481 X86_CLFLUSHInstruction |
482 // X86_DebugTraceStore |
483 // X86_ACPIViaMSR |
484 X86_MultimediaExtensions |
485 X86_FXSAVE_FXRSTOR |
486 X86_StreamingSIMDExtensions |
487 X86_StreamingSIMDExtensions2 |
488 // X86_CPUSelfSnoop |
489 // X86_HyperThreading |
490 // X86_AutomaticClockControl |
491 // X86_IA64Processor |
492 0;
493
494 //Bits which describe the system hardware capabilities
495 //XXX Figure out what these should be
496 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
497 //The system page size
498 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
499 //Frequency at which times() increments
500 //Defined to be 100 in the kernel source.
501 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
502 // For statically linked executables, this is the virtual address of the
503 // program header tables if they appear in the executable image
504 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
505 // This is the size of a program header entry from the elf file.
506 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
507 // This is the number of program headers from the original elf file.
508 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
509 //This is the address of the elf "interpreter", It should be set
510 //to 0 for regular executables. It should be something else
511 //(not sure what) for dynamic libraries.
512 auxv.push_back(auxv_t(M5_AT_BASE, 0));
513
514 //XXX Figure out what this should be.
515 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
516 //The entry point to the program
517 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
518 //Different user and group IDs
519 auxv.push_back(auxv_t(M5_AT_UID, uid()));
520 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
521 auxv.push_back(auxv_t(M5_AT_GID, gid()));
522 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
523 //Whether to enable "secure mode" in the executable
524 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
525 //The string "x86_64" with unknown meaning
526 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
527 }
528
529 //Figure out how big the initial stack needs to be
530
531 // A sentry NULL void pointer at the top of the stack.
532 int sentry_size = intSize;
533
534 //This is the name of the file which is present on the initial stack
535 //It's purpose is to let the user space linker examine the original file.
536 int file_name_size = filename.size() + 1;
537
538 string platform = "x86_64";
539 int aux_data_size = platform.size() + 1;
540
541 int env_data_size = 0;
542 for (int i = 0; i < envp.size(); ++i) {
543 env_data_size += envp[i].size() + 1;
544 }
545 int arg_data_size = 0;
546 for (int i = 0; i < argv.size(); ++i) {
547 arg_data_size += argv[i].size() + 1;
548 }
549
550 //The info_block needs to be padded so it's size is a multiple of the
551 //alignment mask. Also, it appears that there needs to be at least some
552 //padding, so if the size is already a multiple, we need to increase it
553 //anyway.
554 int base_info_block_size =
555 sentry_size + file_name_size + env_data_size + arg_data_size;
556
557 int info_block_size = roundUp(base_info_block_size, align);
558
559 int info_block_padding = info_block_size - base_info_block_size;
560
561 //Each auxilliary vector is two 8 byte words
562 int aux_array_size = intSize * 2 * (auxv.size() + 1);
563
564 int envp_array_size = intSize * (envp.size() + 1);
565 int argv_array_size = intSize * (argv.size() + 1);
566
567 int argc_size = intSize;
568
569 //Figure out the size of the contents of the actual initial frame
570 int frame_size =
571 aux_array_size +
572 envp_array_size +
573 argv_array_size +
574 argc_size;
575
576 //There needs to be padding after the auxiliary vector data so that the
577 //very bottom of the stack is aligned properly.
578 int partial_size = frame_size + aux_data_size;
579 int aligned_partial_size = roundUp(partial_size, align);
580 int aux_padding = aligned_partial_size - partial_size;
581
582 int space_needed =
583 info_block_size +
584 aux_data_size +
585 aux_padding +
586 frame_size;
587
588 stack_min = stack_base - space_needed;
589 stack_min = roundDown(stack_min, align);
590 stack_size = stack_base - stack_min;
591
592 // map memory
593 pTable->allocate(roundDown(stack_min, pageSize),
594 roundUp(stack_size, pageSize));
595
596 // map out initial stack contents
597 IntType sentry_base = stack_base - sentry_size;
598 IntType file_name_base = sentry_base - file_name_size;
599 IntType env_data_base = file_name_base - env_data_size;
600 IntType arg_data_base = env_data_base - arg_data_size;
601 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
602 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
603 IntType envp_array_base = auxv_array_base - envp_array_size;
604 IntType argv_array_base = envp_array_base - argv_array_size;
605 IntType argc_base = argv_array_base - argc_size;
606
607 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
608 DPRINTF(Stack, "0x%x - file name\n", file_name_base);
609 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
610 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
611 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
612 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
613 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
614 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
615 DPRINTF(Stack, "0x%x - argc \n", argc_base);
616 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
617
618 // write contents to stack
619
620 // figure out argc
621 IntType argc = argv.size();
622 IntType guestArgc = X86ISA::htog(argc);
623
624 //Write out the sentry void *
625 IntType sentry_NULL = 0;
626 initVirtMem->writeBlob(sentry_base,
627 (uint8_t*)&sentry_NULL, sentry_size);
628
629 //Write the file name
630 initVirtMem->writeString(file_name_base, filename.c_str());
631
632 //Fix up the aux vector which points to the "platform" string
633 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM);
634 auxv[auxv.size() - 1].a_val = aux_data_base;
635
636 //Copy the aux stuff
637 for(int x = 0; x < auxv.size(); x++)
638 {
639 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
640 (uint8_t*)&(auxv[x].a_type), intSize);
641 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
642 (uint8_t*)&(auxv[x].a_val), intSize);
643 }
644 //Write out the terminating zeroed auxilliary vector
645 const uint64_t zero = 0;
646 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
647 (uint8_t*)&zero, 2 * intSize);
648
649 initVirtMem->writeString(aux_data_base, platform.c_str());
650
651 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
652 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
653
654 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
655
656 ThreadContext *tc = system->getThreadContext(contextIds[0]);
657 //Set the stack pointer register
658 tc->setIntReg(StackPointerReg, stack_min);
659
660 Addr prog_entry = objFile->entryPoint();
661 // There doesn't need to be any segment base added in since we're dealing
662 // with the flat segmentation model.
663 tc->setPC(prog_entry);
664 tc->setNextPC(prog_entry + sizeof(MachInst));
665
666 //Align the "stack_min" to a page boundary.
667 stack_min = roundDown(stack_min, pageSize);
668
669 // num_processes++;
670 }
671
672 void
673 X86_64LiveProcess::argsInit(int intSize, int pageSize)
674 {
675 std::vector<AuxVector<uint64_t> > extraAuxvs;
676 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs);
677 }
678
679 void
680 I386LiveProcess::argsInit(int intSize, int pageSize)
681 {
682 std::vector<AuxVector<uint32_t> > extraAuxvs;
683 //Tell the binary where the vsyscall part of the vsyscall page is.
684 extraAuxvs.push_back(AuxVector<uint32_t>(0x20,
685 vsyscallPage.base + vsyscallPage.vsyscallOffset));
686 extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base));
687 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs);
688 }
689
690 void
691 X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
692 {
693 tc->setIntReg(INTREG_RAX, return_value.value());
694 }
695
696 X86ISA::IntReg
697 X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
698 {
699 assert(i < NumArgumentRegs);
700 return tc->readIntReg(ArgumentReg[i]);
701 }
702
703 void
704 X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
705 {
706 assert(i < NumArgumentRegs);
707 return tc->setIntReg(ArgumentReg[i], val);
708 }
709
710 X86ISA::IntReg
711 I386LiveProcess::getSyscallArg(ThreadContext *tc, int i)
712 {
713 assert(i < NumArgumentRegs32);
714 return tc->readIntReg(ArgumentReg32[i]);
715 }
716
717 void
718 I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
719 {
720 assert(i < NumArgumentRegs);
721 return tc->setIntReg(ArgumentReg[i], val);
722 }