X86: Implement some SSE fp microops and instructions.
[gem5.git] / src / arch / x86 / regfile.cc
1 /*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 /*
32 * Copyright (c) 2007 The Hewlett-Packard Development Company
33 * All rights reserved.
34 *
35 * Redistribution and use of this software in source and binary forms,
36 * with or without modification, are permitted provided that the
37 * following conditions are met:
38 *
39 * The software must be used only for Non-Commercial Use which means any
40 * use which is NOT directed to receiving any direct monetary
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47 *
48 * If you wish to use this software or functionality therein that may be
49 * covered by patents for commercial use, please contact:
50 * Director of Intellectual Property Licensing
51 * Office of Strategy and Technology
52 * Hewlett-Packard Company
53 * 1501 Page Mill Road
54 * Palo Alto, California 94304
55 *
56 * Redistributions of source code must retain the above copyright notice,
57 * this list of conditions and the following disclaimer. Redistributions
58 * in binary form must reproduce the above copyright notice, this list of
59 * conditions and the following disclaimer in the documentation and/or
60 * other materials provided with the distribution. Neither the name of
61 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
62 * contributors may be used to endorse or promote products derived from
63 * this software without specific prior written permission. No right of
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65 * output created using the software may be prepared, but only for
66 * Non-Commercial Uses. Derivatives of the software may be shared with
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69 * and (ii) such Derivatives of the software include the above copyright
70 * notice to acknowledge the contribution from this software where
71 * applicable, this list of conditions and the disclaimer below.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
74 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
75 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
76 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
77 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
78 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
79 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
80 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
81 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
83 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 *
85 * Authors: Gabe Black
86 */
87
88 #include "arch/x86/regfile.hh"
89 #include "base/trace.hh"
90 #include "sim/serialize.hh"
91 #include "cpu/thread_context.hh"
92
93 class Checkpoint;
94
95 using namespace X86ISA;
96 using namespace std;
97
98 //RegFile class methods
99 Addr RegFile::readPC()
100 {
101 return rip;
102 }
103
104 void RegFile::setPC(Addr val)
105 {
106 rip = val;
107 }
108
109 Addr RegFile::readNextPC()
110 {
111 return nextRip;
112 }
113
114 void RegFile::setNextPC(Addr val)
115 {
116 nextRip = val;
117 }
118
119 Addr RegFile::readNextNPC()
120 {
121 //There's no way to know how big the -next- instruction will be.
122 return nextRip + 1;
123 }
124
125 void RegFile::setNextNPC(Addr val)
126 { }
127
128 void RegFile::clear()
129 {
130 floatRegFile.clear();
131 intRegFile.clear();
132 miscRegFile.clear();
133 }
134
135 MiscReg RegFile::readMiscRegNoEffect(int miscReg)
136 {
137 return miscRegFile.readRegNoEffect(miscReg);
138 }
139
140 MiscReg RegFile::readMiscReg(int miscReg, ThreadContext *tc)
141 {
142 return miscRegFile.readReg(miscReg, tc);
143 }
144
145 void RegFile::setMiscRegNoEffect(int miscReg, const MiscReg &val)
146 {
147 miscRegFile.setRegNoEffect(miscReg, val);
148 }
149
150 void RegFile::setMiscReg(int miscReg, const MiscReg &val,
151 ThreadContext * tc)
152 {
153 miscRegFile.setReg(miscReg, val, tc);
154 }
155
156 FloatReg RegFile::readFloatReg(int floatReg, int width)
157 {
158 return floatRegFile.readReg(floatReg, width);
159 }
160
161 FloatReg RegFile::readFloatReg(int floatReg)
162 {
163 //Use the "natural" width of a single float
164 return floatRegFile.readReg(floatReg, FloatRegFile::SingleWidth);
165 }
166
167 FloatRegBits RegFile::readFloatRegBits(int floatReg, int width)
168 {
169 return floatRegFile.readRegBits(floatReg, width);
170 }
171
172 FloatRegBits RegFile::readFloatRegBits(int floatReg)
173 {
174 //Use the "natural width of a single float
175 return floatRegFile.readRegBits(floatReg,
176 FloatRegFile::SingleWidth);
177 }
178
179 void RegFile::setFloatReg(int floatReg, const FloatReg &val, int width)
180 {
181 floatRegFile.setReg(floatReg, val, width);
182 }
183
184 void RegFile::setFloatReg(int floatReg, const FloatReg &val)
185 {
186 //Use the "natural" width of a single float
187 setFloatReg(floatReg, val, FloatRegFile::SingleWidth);
188 }
189
190 void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
191 {
192 floatRegFile.setRegBits(floatReg, val, width);
193 }
194
195 void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val)
196 {
197 //Use the "natural" width of a single float
198 floatRegFile.setRegBits(floatReg, val, FloatRegFile::SingleWidth);
199 }
200
201 IntReg RegFile::readIntReg(int intReg)
202 {
203 return intRegFile.readReg(intReg);
204 }
205
206 void RegFile::setIntReg(int intReg, const IntReg &val)
207 {
208 intRegFile.setReg(intReg, val);
209 }
210
211 int X86ISA::flattenIntIndex(ThreadContext * tc, int reg)
212 {
213 //If we need to fold over the index to match byte semantics, do that.
214 //Otherwise, just strip off any extra bits and pass it through.
215 if (reg & (1 << 6))
216 return (reg & ~(1 << 6) - 0x4);
217 else
218 return (reg & ~(1 << 6));
219 }
220
221 void RegFile::serialize(std::ostream &os)
222 {
223 intRegFile.serialize(os);
224 floatRegFile.serialize(os);
225 miscRegFile.serialize(os);
226 SERIALIZE_SCALAR(rip);
227 SERIALIZE_SCALAR(nextRip);
228 }
229
230 void RegFile::unserialize(Checkpoint *cp, const std::string &section)
231 {
232 intRegFile.unserialize(cp, section);
233 floatRegFile.unserialize(cp, section);
234 miscRegFile.unserialize(cp, section);
235 UNSERIALIZE_SCALAR(rip);
236 UNSERIALIZE_SCALAR(nextRip);
237 }
238
239 void RegFile::changeContext(RegContextParam param, RegContextVal val)
240 {
241 panic("changeContext not implemented for x86!\n");
242 }
243
244 void X86ISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
245 {
246 panic("copyMiscRegs not implemented for x86!\n");
247 }
248
249 void X86ISA::copyRegs(ThreadContext *src, ThreadContext *dest)
250 {
251 panic("copyRegs not implemented for x86!\n");
252 //copy int regs
253 //copy float regs
254 copyMiscRegs(src, dest);
255
256 dest->setPC(src->readPC());
257 dest->setNextPC(src->readNextPC());
258 }