src/arch/x86/registers.hh

   1 /*
   2  * Copyright (c) 2007 The Hewlett-Packard Development Company
   3  * All rights reserved.
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Gabe Black
  38  */
  39
  40 #ifndef __ARCH_X86_REGISTERS_HH__
  41 #define __ARCH_X86_REGISTERS_HH__
  42
  43 #include "arch/x86/intregs.hh"
  44 #include "arch/x86/max_inst_regs.hh"
  45 #include "arch/x86/miscregs.hh"
  46 #include "arch/x86/x86_traits.hh"
  47
  48 namespace X86ISA
  49 {
  50 using X86ISAInst::MaxInstSrcRegs;
  51 using X86ISAInst::MaxInstDestRegs;
  52 const int NumMiscArchRegs = NUM_MISCREGS;
  53 const int NumMiscRegs = NUM_MISCREGS;
  54
  55 const int NumIntArchRegs = NUM_INTREGS;
  56 const int NumIntRegs =
  57     NumIntArchRegs + NumMicroIntRegs +
  58     NumPseudoIntRegs + NumImplicitIntRegs;
  59
  60 //Each 128 bit xmm register is broken into two effective 64 bit registers.
  61 const int NumFloatRegs =
  62     NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs;
  63 const int NumFloatArchRegs = NumFloatRegs + 8;
  64
  65 // These enumerate all the registers for dependence tracking.
  66 enum DependenceTags {
  67     //There are 16 microcode registers at the moment. This is an
  68     //unusually large constant to make sure there isn't overflow.
  69     FP_Base_DepTag = 128,
  70     Ctrl_Base_DepTag =
  71         FP_Base_DepTag +
  72         //mmx/x87 registers
  73         8 +
  74         //xmm registers
  75         16 * 2 +
  76         //The microcode fp registers
  77         8 +
  78         //The indices that are mapped over the fp stack
  79         8
  80 };
  81
  82 // semantically meaningful register indices
  83 //There is no such register in X86
  84 const int ZeroReg = NUM_INTREGS;
  85 const int StackPointerReg = INTREG_RSP;
  86 //X86 doesn't seem to have a link register
  87 const int ReturnAddressReg = 0;
  88 const int ReturnValueReg = INTREG_RAX;
  89 const int FramePointerReg = INTREG_RBP;
  90
  91 // Some OS syscalls use a second register (rdx) to return a second
  92 // value
  93 const int SyscallPseudoReturnReg = INTREG_RDX;
  94
  95 typedef uint64_t IntReg;
  96 //XXX Should this be a 128 bit structure for XMM memory ops?
  97 typedef uint64_t LargestRead;
  98 typedef uint64_t MiscReg;
  99
 100 //These floating point types are correct for mmx, but not
 101 //technically for x87 (80 bits) or at all for xmm (128 bits)
 102 typedef double FloatReg;
 103 typedef uint64_t FloatRegBits;
 104 typedef union
 105 {
 106     IntReg intReg;
 107     FloatReg fpReg;
 108     MiscReg ctrlReg;
 109 } AnyReg;
 110
 111 typedef uint16_t RegIndex;
 112
 113 }; // namespace X86ISA
 114
 115 #endif // __ARCH_X86_REGFILE_HH__