src/arch/x86/registers.hh

   1 /*
   2  * Copyright (c) 2007 The Hewlett-Packard Development Company
   3  * Copyright (c) 2013 Advanced Micro Devices, Inc.
   4  * All rights reserved.
   5  *
   6  * The license below extends only to copyright in the software and shall
   7  * not be construed as granting a license to any other intellectual
   8  * property including but not limited to intellectual property relating
   9  * to a hardware implementation of the functionality of the software
  10  * licensed hereunder.  You may use the software subject to the license
  11  * terms below provided that you ensure that this notice is replicated
  12  * unmodified and in its entirety in all distributions of the software,
  13  * modified or unmodified, in source code or in binary form.
  14  *
  15  * Redistribution and use in source and binary forms, with or without
  16  * modification, are permitted provided that the following conditions are
  17  * met: redistributions of source code must retain the above copyright
  18  * notice, this list of conditions and the following disclaimer;
  19  * redistributions in binary form must reproduce the above copyright
  20  * notice, this list of conditions and the following disclaimer in the
  21  * documentation and/or other materials provided with the distribution;
  22  * neither the name of the copyright holders nor the names of its
  23  * contributors may be used to endorse or promote products derived from
  24  * this software without specific prior written permission.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  27  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  28  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  29  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  30  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  31  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  32  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  33  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  34  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37  *
  38  * Authors: Gabe Black
  39  */
  40
  41 #ifndef __ARCH_X86_REGISTERS_HH__
  42 #define __ARCH_X86_REGISTERS_HH__
  43
  44 #include "arch/x86/generated/max_inst_regs.hh"
  45 #include "arch/x86/regs/int.hh"
  46 #include "arch/x86/regs/ccr.hh"
  47 #include "arch/x86/regs/misc.hh"
  48 #include "arch/x86/x86_traits.hh"
  49
  50 namespace X86ISA
  51 {
  52 using X86ISAInst::MaxInstSrcRegs;
  53 using X86ISAInst::MaxInstDestRegs;
  54 using X86ISAInst::MaxMiscDestRegs;
  55 const int NumMiscRegs = NUM_MISCREGS;
  56
  57 const int NumIntArchRegs = NUM_INTREGS;
  58 const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs;
  59 const int NumCCRegs = NUM_CCREGS;
  60
  61 #define ISA_HAS_CC_REGS
  62
  63 // Each 128 bit xmm register is broken into two effective 64 bit registers.
  64 // Add 8 for the indices that are mapped over the fp stack
  65 const int NumFloatRegs =
  66     NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8;
  67
  68 // These enumerate all the registers for dependence tracking.
  69 enum DependenceTags {
  70     // FP_Reg_Base must be large enough to be bigger than any integer
  71     // register index which has the IntFoldBit (1 << 6) set.  To be safe
  72     // we just start at (1 << 7) == 128.
  73     FP_Reg_Base = 128,
  74     CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
  75     Misc_Reg_Base = CC_Reg_Base + NumCCRegs,
  76     Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
  77 };
  78
  79 // semantically meaningful register indices
  80 //There is no such register in X86
  81 const int ZeroReg = NUM_INTREGS;
  82 const int StackPointerReg = INTREG_RSP;
  83 //X86 doesn't seem to have a link register
  84 const int ReturnAddressReg = 0;
  85 const int ReturnValueReg = INTREG_RAX;
  86 const int FramePointerReg = INTREG_RBP;
  87
  88 // Some OS syscalls use a second register (rdx) to return a second
  89 // value
  90 const int SyscallPseudoReturnReg = INTREG_RDX;
  91
  92 typedef uint64_t IntReg;
  93 typedef uint64_t CCReg;
  94 //XXX Should this be a 128 bit structure for XMM memory ops?
  95 typedef uint64_t LargestRead;
  96 typedef uint64_t MiscReg;
  97
  98 //These floating point types are correct for mmx, but not
  99 //technically for x87 (80 bits) or at all for xmm (128 bits)
 100 typedef double FloatReg;
 101 typedef uint64_t FloatRegBits;
 102 typedef union
 103 {
 104     IntReg intReg;
 105     FloatReg fpReg;
 106     CCReg ccReg;
 107     MiscReg ctrlReg;
 108 } AnyReg;
 109
 110 typedef uint16_t RegIndex;
 111
 112 } // namespace X86ISA
 113
 114 #endif // __ARCH_X86_REGFILE_HH__