src/broadcom/compiler/v3d40_tex.c

   1 /*
   2  * Copyright © 2016-2018 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "v3d_compiler.h"
  25
  26 /* We don't do any address packing. */
  27 #define __gen_user_data void
  28 #define __gen_address_type uint32_t
  29 #define __gen_address_offset(reloc) (*reloc)
  30 #define __gen_emit_reloc(cl, reloc)
  31 #include "cle/v3d_packet_v41_pack.h"
  32
  33 static void
  34 vir_TMU_WRITE(struct v3d_compile *c, enum v3d_qpu_waddr waddr, struct qreg val,
  35               int *tmu_writes)
  36 {
  37         vir_MOV_dest(c, vir_reg(QFILE_MAGIC, waddr), val);
  38
  39         (*tmu_writes)++;
  40 }
  41
  42 static void
  43 vir_WRTMUC(struct v3d_compile *c, enum quniform_contents contents, uint32_t data)
  44 {
  45         struct qinst *inst = vir_NOP(c);
  46         inst->qpu.sig.wrtmuc = true;
  47         inst->has_implicit_uniform = true;
  48         inst->src[0] = vir_uniform(c, contents, data);
  49 }
  50
  51 void
  52 v3d40_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr)
  53 {
  54         unsigned unit = instr->texture_index;
  55         int tmu_writes = 0;
  56         static const struct V3D41_TMU_CONFIG_PARAMETER_2 p2_unpacked_default = {
  57                 .op = V3D_TMU_OP_REGULAR,
  58         };
  59
  60         struct V3D41_TMU_CONFIG_PARAMETER_0 p0_unpacked = {
  61         };
  62
  63         struct V3D41_TMU_CONFIG_PARAMETER_1 p1_unpacked = {
  64                 .output_type_32_bit = (c->key->tex[unit].return_size == 32 &&
  65                                        !instr->is_shadow),
  66
  67                 .unnormalized_coordinates = (instr->sampler_dim ==
  68                                              GLSL_SAMPLER_DIM_RECT),
  69         };
  70
  71         struct V3D41_TMU_CONFIG_PARAMETER_2 p2_unpacked = {
  72                 .op = V3D_TMU_OP_REGULAR,
  73
  74                 .gather_mode = instr->op == nir_texop_tg4,
  75                 .gather_component = instr->component,
  76
  77                 .coefficient_mode = instr->op == nir_texop_txd,
  78         };
  79
  80         int non_array_components = instr->coord_components - instr->is_array;
  81         struct qreg s;
  82
  83         for (unsigned i = 0; i < instr->num_srcs; i++) {
  84                 switch (instr->src[i].src_type) {
  85                 case nir_tex_src_coord:
  86                         /* S triggers the lookup, so save it for the end. */
  87                         s = ntq_get_src(c, instr->src[i].src, 0);
  88
  89                         if (non_array_components > 1) {
  90                                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUT,
  91                                               ntq_get_src(c, instr->src[i].src,
  92                                                           1), &tmu_writes);
  93                         }
  94                         if (non_array_components > 2) {
  95                                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUR,
  96                                               ntq_get_src(c, instr->src[i].src,
  97                                                           2), &tmu_writes);
  98                         }
  99
 100                         if (instr->is_array) {
 101                                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUI,
 102                                               ntq_get_src(c, instr->src[i].src,
 103                                                           instr->coord_components - 1),
 104                                               &tmu_writes);
 105                         }
 106                         break;
 107
 108                 case nir_tex_src_bias:
 109                         vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUB,
 110                                       ntq_get_src(c, instr->src[i].src, 0),
 111                                       &tmu_writes);
 112                         break;
 113
 114                 case nir_tex_src_lod:
 115                         vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUB,
 116                                       ntq_get_src(c, instr->src[i].src, 0),
 117                                       &tmu_writes);
 118
 119                         if (instr->op != nir_texop_txf &&
 120                             instr->op != nir_texop_tg4) {
 121                                 p2_unpacked.disable_autolod = true;
 122                         }
 123                         break;
 124
 125                 case nir_tex_src_comparator:
 126                         vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUDREF,
 127                                       ntq_get_src(c, instr->src[i].src, 0),
 128                                       &tmu_writes);
 129                         break;
 130
 131                 case nir_tex_src_offset: {
 132                         nir_const_value *offset =
 133                                 nir_src_as_const_value(instr->src[i].src);
 134
 135                         p2_unpacked.offset_s = offset->i32[0];
 136                         if (instr->coord_components >= 2)
 137                                 p2_unpacked.offset_t = offset->i32[1];
 138                         if (instr->coord_components >= 3)
 139                                 p2_unpacked.offset_r = offset->i32[2];
 140                         break;
 141                 }
 142
 143                 default:
 144                         unreachable("unknown texture source");
 145                 }
 146         }
 147
 148         /* Limit the number of channels returned to both how many the NIR
 149          * instruction writes and how many the instruction could produce.
 150          */
 151         uint32_t instr_return_channels = nir_tex_instr_dest_size(instr);
 152         if (!p1_unpacked.output_type_32_bit)
 153                 instr_return_channels = (instr_return_channels + 1) / 2;
 154
 155         p0_unpacked.return_words_of_texture_data =
 156                 (1 << MIN2(instr_return_channels,
 157                            c->key->tex[unit].return_channels)) - 1;
 158
 159         /* Word enables can't ask for more channels than the output type could
 160          * provide (2 for f16, 4 for 32-bit).
 161          */
 162         assert(!p1_unpacked.output_type_32_bit ||
 163                p0_unpacked.return_words_of_texture_data < (1 << 4));
 164         assert(p1_unpacked.output_type_32_bit ||
 165                p0_unpacked.return_words_of_texture_data < (1 << 2));
 166
 167         uint32_t p0_packed;
 168         V3D41_TMU_CONFIG_PARAMETER_0_pack(NULL,
 169                                           (uint8_t *)&p0_packed,
 170                                           &p0_unpacked);
 171
 172         uint32_t p1_packed;
 173         V3D41_TMU_CONFIG_PARAMETER_1_pack(NULL,
 174                                           (uint8_t *)&p1_packed,
 175                                           &p1_unpacked);
 176
 177         uint32_t p2_packed;
 178         V3D41_TMU_CONFIG_PARAMETER_2_pack(NULL,
 179                                           (uint8_t *)&p2_packed,
 180                                           &p2_unpacked);
 181
 182         /* Load unit number into the high bits of the texture or sampler
 183          * address field, which will be be used by the driver to decide which
 184          * texture to put in the actual address field.
 185          */
 186         p0_packed |= unit << 24;
 187         p1_packed |= unit << 24;
 188
 189         vir_WRTMUC(c, QUNIFORM_TMU_CONFIG_P0, p0_packed);
 190         vir_WRTMUC(c, QUNIFORM_TMU_CONFIG_P1, p1_packed);
 191         if (memcmp(&p2_unpacked, &p2_unpacked_default, sizeof(p2_unpacked)) != 0)
 192                 vir_WRTMUC(c, QUNIFORM_CONSTANT, p2_packed);
 193
 194         if (instr->op == nir_texop_txf) {
 195                 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_CUBE);
 196                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUSF, s, &tmu_writes);
 197         } else if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
 198                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUSCM, s, &tmu_writes);
 199         } else {
 200                 vir_TMU_WRITE(c, V3D_QPU_WADDR_TMUS, s, &tmu_writes);
 201         }
 202
 203         vir_emit_thrsw(c);
 204
 205         /* The input FIFO has 16 slots across all threads, so make sure we
 206          * don't overfill our allocation.
 207          */
 208         while (tmu_writes > 16 / c->threads)
 209                 c->threads /= 2;
 210
 211         struct qreg return_values[4];
 212         for (int i = 0; i < 4; i++) {
 213                 /* Swizzling .zw of an RG texture should give undefined
 214                  * results, not crash the compiler.
 215                  */
 216                 if (p0_unpacked.return_words_of_texture_data & (1 << i))
 217                         return_values[i] = vir_LDTMU(c);
 218                 else
 219                         return_values[i] = c->undef;
 220         }
 221
 222         for (int i = 0; i < nir_tex_instr_dest_size(instr); i++) {
 223                 struct qreg chan;
 224
 225                 if (!p1_unpacked.output_type_32_bit) {
 226                         STATIC_ASSERT(PIPE_SWIZZLE_X == 0);
 227                         chan = return_values[i / 2];
 228
 229                         if (nir_alu_type_get_base_type(instr->dest_type) ==
 230                             nir_type_float) {
 231                                 enum v3d_qpu_input_unpack unpack;
 232                                 if (i & 1)
 233                                         unpack = V3D_QPU_UNPACK_H;
 234                                 else
 235                                         unpack = V3D_QPU_UNPACK_L;
 236
 237                                 chan = vir_FMOV(c, chan);
 238                                 vir_set_unpack(c->defs[chan.index], 0, unpack);
 239                         } else {
 240                                 /* If we're unpacking the low field, shift it
 241                                  * up to the top first.
 242                                  */
 243                                 if ((i & 1) == 0) {
 244                                         chan = vir_SHL(c, chan,
 245                                                        vir_uniform_ui(c, 16));
 246                                 }
 247
 248                                 /* Do proper sign extension to a 32-bit int. */
 249                                 if (nir_alu_type_get_base_type(instr->dest_type) ==
 250                                     nir_type_int) {
 251                                         chan = vir_ASR(c, chan,
 252                                                        vir_uniform_ui(c, 16));
 253                                 } else {
 254                                         chan = vir_SHR(c, chan,
 255                                                        vir_uniform_ui(c, 16));
 256                                 }
 257                         }
 258                 } else {
 259                         chan = vir_MOV(c, return_values[i]);
 260                 }
 261                 ntq_store_dest(c, &instr->dest, i, chan);
 262         }
 263 }