nir: Add nir_lower_tex support for Broadcom's swizzled TG4 results.
[mesa.git] / src / broadcom / compiler / vir_dump.c
1 /*
2 * Copyright © 2016-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
26
27 /* Prints a human-readable description of the uniform reference. */
28 void
29 vir_dump_uniform(enum quniform_contents contents,
30 uint32_t data)
31 {
32 static const char *quniform_names[] = {
33 [QUNIFORM_VIEWPORT_X_SCALE] = "vp_x_scale",
34 [QUNIFORM_VIEWPORT_Y_SCALE] = "vp_y_scale",
35 [QUNIFORM_VIEWPORT_Z_OFFSET] = "vp_z_offset",
36 [QUNIFORM_VIEWPORT_Z_SCALE] = "vp_z_scale",
37 };
38
39 switch (contents) {
40 case QUNIFORM_CONSTANT:
41 fprintf(stderr, "0x%08x / %f", data, uif(data));
42 break;
43
44 case QUNIFORM_UNIFORM:
45 fprintf(stderr, "push[%d]", data);
46 break;
47
48 case QUNIFORM_TEXTURE_CONFIG_P1:
49 fprintf(stderr, "tex[%d].p1", data);
50 break;
51
52 case QUNIFORM_TMU_CONFIG_P0:
53 fprintf(stderr, "tex[%d].p0 | 0x%x",
54 v3d_tmu_config_data_get_unit(data),
55 v3d_tmu_config_data_get_value(data));
56 break;
57
58 case QUNIFORM_TMU_CONFIG_P1:
59 fprintf(stderr, "tex[%d].p1 | 0x%x",
60 v3d_tmu_config_data_get_unit(data),
61 v3d_tmu_config_data_get_value(data));
62 break;
63
64 case QUNIFORM_TEXTURE_WIDTH:
65 fprintf(stderr, "tex[%d].width", data);
66 break;
67 case QUNIFORM_TEXTURE_HEIGHT:
68 fprintf(stderr, "tex[%d].height", data);
69 break;
70 case QUNIFORM_TEXTURE_DEPTH:
71 fprintf(stderr, "tex[%d].depth", data);
72 break;
73 case QUNIFORM_TEXTURE_ARRAY_SIZE:
74 fprintf(stderr, "tex[%d].array_size", data);
75 break;
76 case QUNIFORM_TEXTURE_LEVELS:
77 fprintf(stderr, "tex[%d].levels", data);
78 break;
79
80 case QUNIFORM_UBO_ADDR:
81 fprintf(stderr, "ubo[%d]", data);
82 break;
83
84 default:
85 if (quniform_contents_is_texture_p0(contents)) {
86 fprintf(stderr, "tex[%d].p0: 0x%08x",
87 contents - QUNIFORM_TEXTURE_CONFIG_P0_0,
88 data);
89 } else if (contents < ARRAY_SIZE(quniform_names)) {
90 fprintf(stderr, "%s",
91 quniform_names[contents]);
92 } else {
93 fprintf(stderr, "%d / 0x%08x", contents, data);
94 }
95 }
96 }
97
98 static void
99 vir_print_reg(struct v3d_compile *c, const struct qinst *inst,
100 struct qreg reg)
101 {
102 static const char *files[] = {
103 [QFILE_TEMP] = "t",
104 [QFILE_UNIF] = "u",
105 [QFILE_TLB] = "tlb",
106 [QFILE_TLBU] = "tlbu",
107 };
108
109 switch (reg.file) {
110
111 case QFILE_NULL:
112 fprintf(stderr, "null");
113 break;
114
115 case QFILE_LOAD_IMM:
116 fprintf(stderr, "0x%08x (%f)", reg.index, uif(reg.index));
117 break;
118
119 case QFILE_REG:
120 fprintf(stderr, "rf%d", reg.index);
121 break;
122
123 case QFILE_MAGIC:
124 fprintf(stderr, "%s", v3d_qpu_magic_waddr_name(reg.index));
125 break;
126
127 case QFILE_SMALL_IMM: {
128 uint32_t unpacked;
129 bool ok = v3d_qpu_small_imm_unpack(c->devinfo,
130 inst->qpu.raddr_b,
131 &unpacked);
132 assert(ok); (void) ok;
133
134 if ((int)inst->qpu.raddr_b >= -16 &&
135 (int)inst->qpu.raddr_b <= 15)
136 fprintf(stderr, "%d", unpacked);
137 else
138 fprintf(stderr, "%f", uif(unpacked));
139 break;
140 }
141
142 case QFILE_VPM:
143 fprintf(stderr, "vpm%d.%d",
144 reg.index / 4, reg.index % 4);
145 break;
146
147 case QFILE_TLB:
148 case QFILE_TLBU:
149 fprintf(stderr, "%s", files[reg.file]);
150 break;
151
152 case QFILE_UNIF:
153 fprintf(stderr, "%s%d", files[reg.file], reg.index);
154 fprintf(stderr, " (");
155 vir_dump_uniform(c->uniform_contents[reg.index],
156 c->uniform_data[reg.index]);
157 fprintf(stderr, ")");
158 break;
159
160 default:
161 fprintf(stderr, "%s%d", files[reg.file], reg.index);
162 break;
163 }
164 }
165
166 static void
167 vir_dump_sig_addr(const struct v3d_device_info *devinfo,
168 const struct v3d_qpu_instr *instr)
169 {
170 if (devinfo->ver < 41)
171 return;
172
173 if (!instr->sig_magic)
174 fprintf(stderr, ".rf%d", instr->sig_addr);
175 else {
176 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr);
177 if (name)
178 fprintf(stderr, ".%s", name);
179 else
180 fprintf(stderr, ".UNKNOWN%d", instr->sig_addr);
181 }
182 }
183
184 static void
185 vir_dump_sig(struct v3d_compile *c, struct qinst *inst)
186 {
187 struct v3d_qpu_sig *sig = &inst->qpu.sig;
188
189 if (sig->thrsw)
190 fprintf(stderr, "; thrsw");
191 if (sig->ldvary) {
192 fprintf(stderr, "; ldvary");
193 vir_dump_sig_addr(c->devinfo, &inst->qpu);
194 }
195 if (sig->ldvpm)
196 fprintf(stderr, "; ldvpm");
197 if (sig->ldtmu) {
198 fprintf(stderr, "; ldtmu");
199 vir_dump_sig_addr(c->devinfo, &inst->qpu);
200 }
201 if (sig->ldtlb) {
202 fprintf(stderr, "; ldtlb");
203 vir_dump_sig_addr(c->devinfo, &inst->qpu);
204 }
205 if (sig->ldtlbu) {
206 fprintf(stderr, "; ldtlbu");
207 vir_dump_sig_addr(c->devinfo, &inst->qpu);
208 }
209 if (sig->ldunif)
210 fprintf(stderr, "; ldunif");
211 if (sig->ldunifrf) {
212 fprintf(stderr, "; ldunifrf");
213 vir_dump_sig_addr(c->devinfo, &inst->qpu);
214 }
215 if (sig->ldunifa)
216 fprintf(stderr, "; ldunifa");
217 if (sig->ldunifarf) {
218 fprintf(stderr, "; ldunifarf");
219 vir_dump_sig_addr(c->devinfo, &inst->qpu);
220 }
221 if (sig->wrtmuc)
222 fprintf(stderr, "; wrtmuc");
223 }
224
225 static void
226 vir_dump_alu(struct v3d_compile *c, struct qinst *inst)
227 {
228 struct v3d_qpu_instr *instr = &inst->qpu;
229 int nsrc = vir_get_non_sideband_nsrc(inst);
230 int sideband_nsrc = vir_get_nsrc(inst);
231 enum v3d_qpu_input_unpack unpack[2];
232
233 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
234 fprintf(stderr, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
235 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.ac));
236 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.apf));
237 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.auf));
238 fprintf(stderr, " ");
239
240 vir_print_reg(c, inst, inst->dst);
241 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.add.output_pack));
242
243 unpack[0] = instr->alu.add.a_unpack;
244 unpack[1] = instr->alu.add.b_unpack;
245 } else {
246 fprintf(stderr, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
247 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.mc));
248 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.mpf));
249 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.muf));
250 fprintf(stderr, " ");
251
252 vir_print_reg(c, inst, inst->dst);
253 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.mul.output_pack));
254
255 unpack[0] = instr->alu.mul.a_unpack;
256 unpack[1] = instr->alu.mul.b_unpack;
257 }
258
259 for (int i = 0; i < sideband_nsrc; i++) {
260 fprintf(stderr, ", ");
261 vir_print_reg(c, inst, inst->src[i]);
262 if (i < nsrc)
263 fprintf(stderr, "%s", v3d_qpu_unpack_name(unpack[i]));
264 }
265
266 vir_dump_sig(c, inst);
267 }
268
269 void
270 vir_dump_inst(struct v3d_compile *c, struct qinst *inst)
271 {
272 struct v3d_qpu_instr *instr = &inst->qpu;
273
274 switch (inst->qpu.type) {
275 case V3D_QPU_INSTR_TYPE_ALU:
276 vir_dump_alu(c, inst);
277 break;
278 case V3D_QPU_INSTR_TYPE_BRANCH:
279 fprintf(stderr, "b");
280 if (instr->branch.ub)
281 fprintf(stderr, "u");
282
283 fprintf(stderr, "%s",
284 v3d_qpu_branch_cond_name(instr->branch.cond));
285 fprintf(stderr, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
286
287 switch (instr->branch.bdi) {
288 case V3D_QPU_BRANCH_DEST_ABS:
289 fprintf(stderr, " zero_addr+0x%08x", instr->branch.offset);
290 break;
291
292 case V3D_QPU_BRANCH_DEST_REL:
293 fprintf(stderr, " %d", instr->branch.offset);
294 break;
295
296 case V3D_QPU_BRANCH_DEST_LINK_REG:
297 fprintf(stderr, " lri");
298 break;
299
300 case V3D_QPU_BRANCH_DEST_REGFILE:
301 fprintf(stderr, " rf%d", instr->branch.raddr_a);
302 break;
303 }
304
305 if (instr->branch.ub) {
306 switch (instr->branch.bdu) {
307 case V3D_QPU_BRANCH_DEST_ABS:
308 fprintf(stderr, ", a:unif");
309 break;
310
311 case V3D_QPU_BRANCH_DEST_REL:
312 fprintf(stderr, ", r:unif");
313 break;
314
315 case V3D_QPU_BRANCH_DEST_LINK_REG:
316 fprintf(stderr, ", lri");
317 break;
318
319 case V3D_QPU_BRANCH_DEST_REGFILE:
320 fprintf(stderr, ", rf%d", instr->branch.raddr_a);
321 break;
322 }
323 }
324
325 if (vir_has_implicit_uniform(inst)) {
326 fprintf(stderr, " ");
327 vir_print_reg(c, inst, inst->src[vir_get_implicit_uniform_src(inst)]);
328 }
329
330 break;
331 }
332 }
333
334 void
335 vir_dump(struct v3d_compile *c)
336 {
337 int ip = 0;
338
339 vir_for_each_block(block, c) {
340 fprintf(stderr, "BLOCK %d:\n", block->index);
341 vir_for_each_inst(inst, block) {
342 if (c->live_intervals_valid) {
343 bool first = true;
344
345 for (int i = 0; i < c->num_temps; i++) {
346 if (c->temp_start[i] != ip)
347 continue;
348
349 if (first) {
350 first = false;
351 } else {
352 fprintf(stderr, ", ");
353 }
354 fprintf(stderr, "S%4d", i);
355 }
356
357 if (first)
358 fprintf(stderr, " ");
359 else
360 fprintf(stderr, " ");
361 }
362
363 if (c->live_intervals_valid) {
364 bool first = true;
365
366 for (int i = 0; i < c->num_temps; i++) {
367 if (c->temp_end[i] != ip)
368 continue;
369
370 if (first) {
371 first = false;
372 } else {
373 fprintf(stderr, ", ");
374 }
375 fprintf(stderr, "E%4d", i);
376 }
377
378 if (first)
379 fprintf(stderr, " ");
380 else
381 fprintf(stderr, " ");
382 }
383
384 vir_dump_inst(c, inst);
385 fprintf(stderr, "\n");
386 ip++;
387 }
388 if (block->successors[1]) {
389 fprintf(stderr, "-> BLOCK %d, %d\n",
390 block->successors[0]->index,
391 block->successors[1]->index);
392 } else if (block->successors[0]) {
393 fprintf(stderr, "-> BLOCK %d\n",
394 block->successors[0]->index);
395 }
396 }
397 }