v3d: Drop a perf note about merging unpack_half_*, which has been implemented.
[mesa.git] / src / broadcom / compiler / vir_dump.c
1 /*
2 * Copyright © 2016-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
26
27 /* Prints a human-readable description of the uniform reference. */
28 void
29 vir_dump_uniform(enum quniform_contents contents,
30 uint32_t data)
31 {
32 static const char *quniform_names[] = {
33 [QUNIFORM_ALPHA_REF] = "alpha_ref",
34 [QUNIFORM_VIEWPORT_X_SCALE] = "vp_x_scale",
35 [QUNIFORM_VIEWPORT_Y_SCALE] = "vp_y_scale",
36 [QUNIFORM_VIEWPORT_Z_OFFSET] = "vp_z_offset",
37 [QUNIFORM_VIEWPORT_Z_SCALE] = "vp_z_scale",
38 [QUNIFORM_SHARED_OFFSET] = "shared_offset",
39 };
40
41 switch (contents) {
42 case QUNIFORM_CONSTANT:
43 fprintf(stderr, "0x%08x / %f", data, uif(data));
44 break;
45
46 case QUNIFORM_UNIFORM:
47 fprintf(stderr, "push[%d]", data);
48 break;
49
50 case QUNIFORM_TEXTURE_CONFIG_P1:
51 fprintf(stderr, "tex[%d].p1", data);
52 break;
53
54 case QUNIFORM_TMU_CONFIG_P0:
55 fprintf(stderr, "tex[%d].p0 | 0x%x",
56 v3d_tmu_config_data_get_unit(data),
57 v3d_tmu_config_data_get_value(data));
58 break;
59
60 case QUNIFORM_TMU_CONFIG_P1:
61 fprintf(stderr, "tex[%d].p1 | 0x%x",
62 v3d_tmu_config_data_get_unit(data),
63 v3d_tmu_config_data_get_value(data));
64 break;
65
66 case QUNIFORM_IMAGE_TMU_CONFIG_P0:
67 fprintf(stderr, "img[%d].p0 | 0x%x",
68 v3d_tmu_config_data_get_unit(data),
69 v3d_tmu_config_data_get_value(data));
70 break;
71
72 case QUNIFORM_TEXTURE_WIDTH:
73 fprintf(stderr, "tex[%d].width", data);
74 break;
75 case QUNIFORM_TEXTURE_HEIGHT:
76 fprintf(stderr, "tex[%d].height", data);
77 break;
78 case QUNIFORM_TEXTURE_DEPTH:
79 fprintf(stderr, "tex[%d].depth", data);
80 break;
81 case QUNIFORM_TEXTURE_ARRAY_SIZE:
82 fprintf(stderr, "tex[%d].array_size", data);
83 break;
84 case QUNIFORM_TEXTURE_LEVELS:
85 fprintf(stderr, "tex[%d].levels", data);
86 break;
87
88 case QUNIFORM_IMAGE_WIDTH:
89 fprintf(stderr, "img[%d].width", data);
90 break;
91 case QUNIFORM_IMAGE_HEIGHT:
92 fprintf(stderr, "img[%d].height", data);
93 break;
94 case QUNIFORM_IMAGE_DEPTH:
95 fprintf(stderr, "img[%d].depth", data);
96 break;
97 case QUNIFORM_IMAGE_ARRAY_SIZE:
98 fprintf(stderr, "img[%d].array_size", data);
99 break;
100
101 case QUNIFORM_UBO_ADDR:
102 fprintf(stderr, "ubo[%d]", data);
103 break;
104
105 case QUNIFORM_SSBO_OFFSET:
106 fprintf(stderr, "ssbo[%d]", data);
107 break;
108
109 case QUNIFORM_GET_BUFFER_SIZE:
110 fprintf(stderr, "ssbo_size[%d]", data);
111 break;
112
113 case QUNIFORM_NUM_WORK_GROUPS:
114 fprintf(stderr, "num_wg.%c", data < 3 ? "xyz"[data] : '?');
115 break;
116
117 default:
118 if (quniform_contents_is_texture_p0(contents)) {
119 fprintf(stderr, "tex[%d].p0: 0x%08x",
120 contents - QUNIFORM_TEXTURE_CONFIG_P0_0,
121 data);
122 } else if (contents < ARRAY_SIZE(quniform_names) &&
123 quniform_names[contents]) {
124 fprintf(stderr, "%s",
125 quniform_names[contents]);
126 } else {
127 fprintf(stderr, "%d / 0x%08x", contents, data);
128 }
129 }
130 }
131
132 static void
133 vir_print_reg(struct v3d_compile *c, const struct qinst *inst,
134 struct qreg reg)
135 {
136 static const char *files[] = {
137 [QFILE_TEMP] = "t",
138 [QFILE_UNIF] = "u",
139 [QFILE_TLB] = "tlb",
140 [QFILE_TLBU] = "tlbu",
141 };
142
143 switch (reg.file) {
144
145 case QFILE_NULL:
146 fprintf(stderr, "null");
147 break;
148
149 case QFILE_LOAD_IMM:
150 fprintf(stderr, "0x%08x (%f)", reg.index, uif(reg.index));
151 break;
152
153 case QFILE_REG:
154 fprintf(stderr, "rf%d", reg.index);
155 break;
156
157 case QFILE_MAGIC:
158 fprintf(stderr, "%s", v3d_qpu_magic_waddr_name(reg.index));
159 break;
160
161 case QFILE_SMALL_IMM: {
162 uint32_t unpacked;
163 bool ok = v3d_qpu_small_imm_unpack(c->devinfo,
164 inst->qpu.raddr_b,
165 &unpacked);
166 assert(ok); (void) ok;
167
168 if ((int)inst->qpu.raddr_b >= -16 &&
169 (int)inst->qpu.raddr_b <= 15)
170 fprintf(stderr, "%d", unpacked);
171 else
172 fprintf(stderr, "%f", uif(unpacked));
173 break;
174 }
175
176 case QFILE_VPM:
177 fprintf(stderr, "vpm%d.%d",
178 reg.index / 4, reg.index % 4);
179 break;
180
181 case QFILE_TLB:
182 case QFILE_TLBU:
183 fprintf(stderr, "%s", files[reg.file]);
184 break;
185
186 case QFILE_UNIF:
187 fprintf(stderr, "%s%d", files[reg.file], reg.index);
188 fprintf(stderr, " (");
189 vir_dump_uniform(c->uniform_contents[reg.index],
190 c->uniform_data[reg.index]);
191 fprintf(stderr, ")");
192 break;
193
194 default:
195 fprintf(stderr, "%s%d", files[reg.file], reg.index);
196 break;
197 }
198 }
199
200 static void
201 vir_dump_sig_addr(const struct v3d_device_info *devinfo,
202 const struct v3d_qpu_instr *instr)
203 {
204 if (devinfo->ver < 41)
205 return;
206
207 if (!instr->sig_magic)
208 fprintf(stderr, ".rf%d", instr->sig_addr);
209 else {
210 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr);
211 if (name)
212 fprintf(stderr, ".%s", name);
213 else
214 fprintf(stderr, ".UNKNOWN%d", instr->sig_addr);
215 }
216 }
217
218 static void
219 vir_dump_sig(struct v3d_compile *c, struct qinst *inst)
220 {
221 struct v3d_qpu_sig *sig = &inst->qpu.sig;
222
223 if (sig->thrsw)
224 fprintf(stderr, "; thrsw");
225 if (sig->ldvary) {
226 fprintf(stderr, "; ldvary");
227 vir_dump_sig_addr(c->devinfo, &inst->qpu);
228 }
229 if (sig->ldvpm)
230 fprintf(stderr, "; ldvpm");
231 if (sig->ldtmu) {
232 fprintf(stderr, "; ldtmu");
233 vir_dump_sig_addr(c->devinfo, &inst->qpu);
234 }
235 if (sig->ldtlb) {
236 fprintf(stderr, "; ldtlb");
237 vir_dump_sig_addr(c->devinfo, &inst->qpu);
238 }
239 if (sig->ldtlbu) {
240 fprintf(stderr, "; ldtlbu");
241 vir_dump_sig_addr(c->devinfo, &inst->qpu);
242 }
243 if (sig->ldunif)
244 fprintf(stderr, "; ldunif");
245 if (sig->ldunifrf) {
246 fprintf(stderr, "; ldunifrf");
247 vir_dump_sig_addr(c->devinfo, &inst->qpu);
248 }
249 if (sig->ldunifa)
250 fprintf(stderr, "; ldunifa");
251 if (sig->ldunifarf) {
252 fprintf(stderr, "; ldunifarf");
253 vir_dump_sig_addr(c->devinfo, &inst->qpu);
254 }
255 if (sig->wrtmuc)
256 fprintf(stderr, "; wrtmuc");
257 }
258
259 static void
260 vir_dump_alu(struct v3d_compile *c, struct qinst *inst)
261 {
262 struct v3d_qpu_instr *instr = &inst->qpu;
263 int nsrc = vir_get_non_sideband_nsrc(inst);
264 int sideband_nsrc = vir_get_nsrc(inst);
265 enum v3d_qpu_input_unpack unpack[2];
266
267 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
268 fprintf(stderr, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
269 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.ac));
270 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.apf));
271 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.auf));
272 fprintf(stderr, " ");
273
274 vir_print_reg(c, inst, inst->dst);
275 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.add.output_pack));
276
277 unpack[0] = instr->alu.add.a_unpack;
278 unpack[1] = instr->alu.add.b_unpack;
279 } else {
280 fprintf(stderr, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
281 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.mc));
282 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.mpf));
283 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.muf));
284 fprintf(stderr, " ");
285
286 vir_print_reg(c, inst, inst->dst);
287 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.mul.output_pack));
288
289 unpack[0] = instr->alu.mul.a_unpack;
290 unpack[1] = instr->alu.mul.b_unpack;
291 }
292
293 for (int i = 0; i < sideband_nsrc; i++) {
294 fprintf(stderr, ", ");
295 vir_print_reg(c, inst, inst->src[i]);
296 if (i < nsrc)
297 fprintf(stderr, "%s", v3d_qpu_unpack_name(unpack[i]));
298 }
299
300 vir_dump_sig(c, inst);
301 }
302
303 void
304 vir_dump_inst(struct v3d_compile *c, struct qinst *inst)
305 {
306 struct v3d_qpu_instr *instr = &inst->qpu;
307
308 switch (inst->qpu.type) {
309 case V3D_QPU_INSTR_TYPE_ALU:
310 vir_dump_alu(c, inst);
311 break;
312 case V3D_QPU_INSTR_TYPE_BRANCH:
313 fprintf(stderr, "b");
314 if (instr->branch.ub)
315 fprintf(stderr, "u");
316
317 fprintf(stderr, "%s",
318 v3d_qpu_branch_cond_name(instr->branch.cond));
319 fprintf(stderr, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
320
321 switch (instr->branch.bdi) {
322 case V3D_QPU_BRANCH_DEST_ABS:
323 fprintf(stderr, " zero_addr+0x%08x", instr->branch.offset);
324 break;
325
326 case V3D_QPU_BRANCH_DEST_REL:
327 fprintf(stderr, " %d", instr->branch.offset);
328 break;
329
330 case V3D_QPU_BRANCH_DEST_LINK_REG:
331 fprintf(stderr, " lri");
332 break;
333
334 case V3D_QPU_BRANCH_DEST_REGFILE:
335 fprintf(stderr, " rf%d", instr->branch.raddr_a);
336 break;
337 }
338
339 if (instr->branch.ub) {
340 switch (instr->branch.bdu) {
341 case V3D_QPU_BRANCH_DEST_ABS:
342 fprintf(stderr, ", a:unif");
343 break;
344
345 case V3D_QPU_BRANCH_DEST_REL:
346 fprintf(stderr, ", r:unif");
347 break;
348
349 case V3D_QPU_BRANCH_DEST_LINK_REG:
350 fprintf(stderr, ", lri");
351 break;
352
353 case V3D_QPU_BRANCH_DEST_REGFILE:
354 fprintf(stderr, ", rf%d", instr->branch.raddr_a);
355 break;
356 }
357 }
358
359 if (vir_has_implicit_uniform(inst)) {
360 fprintf(stderr, " ");
361 vir_print_reg(c, inst, inst->src[vir_get_implicit_uniform_src(inst)]);
362 }
363
364 break;
365 }
366 }
367
368 void
369 vir_dump(struct v3d_compile *c)
370 {
371 int ip = 0;
372
373 vir_for_each_block(block, c) {
374 fprintf(stderr, "BLOCK %d:\n", block->index);
375 vir_for_each_inst(inst, block) {
376 if (c->live_intervals_valid) {
377 bool first = true;
378
379 for (int i = 0; i < c->num_temps; i++) {
380 if (c->temp_start[i] != ip)
381 continue;
382
383 if (first) {
384 first = false;
385 } else {
386 fprintf(stderr, ", ");
387 }
388 fprintf(stderr, "S%4d", i);
389 }
390
391 if (first)
392 fprintf(stderr, " ");
393 else
394 fprintf(stderr, " ");
395 }
396
397 if (c->live_intervals_valid) {
398 bool first = true;
399
400 for (int i = 0; i < c->num_temps; i++) {
401 if (c->temp_end[i] != ip)
402 continue;
403
404 if (first) {
405 first = false;
406 } else {
407 fprintf(stderr, ", ");
408 }
409 fprintf(stderr, "E%4d", i);
410 }
411
412 if (first)
413 fprintf(stderr, " ");
414 else
415 fprintf(stderr, " ");
416 }
417
418 vir_dump_inst(c, inst);
419 fprintf(stderr, "\n");
420 ip++;
421 }
422 if (block->successors[1]) {
423 fprintf(stderr, "-> BLOCK %d, %d\n",
424 block->successors[0]->index,
425 block->successors[1]->index);
426 } else if (block->successors[0]) {
427 fprintf(stderr, "-> BLOCK %d\n",
428 block->successors[0]->index);
429 }
430 }
431 }