v3d: Store the actual mask of color buffers present in the key.
[mesa.git] / src / broadcom / compiler / vir_dump.c
1 /*
2 * Copyright © 2016-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
26
27 /* Prints a human-readable description of the uniform reference. */
28 void
29 vir_dump_uniform(enum quniform_contents contents,
30 uint32_t data)
31 {
32 static const char *quniform_names[] = {
33 [QUNIFORM_VIEWPORT_X_SCALE] = "vp_x_scale",
34 [QUNIFORM_VIEWPORT_Y_SCALE] = "vp_y_scale",
35 [QUNIFORM_VIEWPORT_Z_OFFSET] = "vp_z_offset",
36 [QUNIFORM_VIEWPORT_Z_SCALE] = "vp_z_scale",
37 [QUNIFORM_SHARED_OFFSET] = "shared_offset",
38 };
39
40 switch (contents) {
41 case QUNIFORM_CONSTANT:
42 fprintf(stderr, "0x%08x / %f", data, uif(data));
43 break;
44
45 case QUNIFORM_UNIFORM:
46 fprintf(stderr, "push[%d]", data);
47 break;
48
49 case QUNIFORM_TEXTURE_CONFIG_P1:
50 fprintf(stderr, "tex[%d].p1", data);
51 break;
52
53 case QUNIFORM_TMU_CONFIG_P0:
54 fprintf(stderr, "tex[%d].p0 | 0x%x",
55 v3d_tmu_config_data_get_unit(data),
56 v3d_tmu_config_data_get_value(data));
57 break;
58
59 case QUNIFORM_TMU_CONFIG_P1:
60 fprintf(stderr, "tex[%d].p1 | 0x%x",
61 v3d_tmu_config_data_get_unit(data),
62 v3d_tmu_config_data_get_value(data));
63 break;
64
65 case QUNIFORM_IMAGE_TMU_CONFIG_P0:
66 fprintf(stderr, "img[%d].p0 | 0x%x",
67 v3d_tmu_config_data_get_unit(data),
68 v3d_tmu_config_data_get_value(data));
69 break;
70
71 case QUNIFORM_TEXTURE_WIDTH:
72 fprintf(stderr, "tex[%d].width", data);
73 break;
74 case QUNIFORM_TEXTURE_HEIGHT:
75 fprintf(stderr, "tex[%d].height", data);
76 break;
77 case QUNIFORM_TEXTURE_DEPTH:
78 fprintf(stderr, "tex[%d].depth", data);
79 break;
80 case QUNIFORM_TEXTURE_ARRAY_SIZE:
81 fprintf(stderr, "tex[%d].array_size", data);
82 break;
83 case QUNIFORM_TEXTURE_LEVELS:
84 fprintf(stderr, "tex[%d].levels", data);
85 break;
86
87 case QUNIFORM_IMAGE_WIDTH:
88 fprintf(stderr, "img[%d].width", data);
89 break;
90 case QUNIFORM_IMAGE_HEIGHT:
91 fprintf(stderr, "img[%d].height", data);
92 break;
93 case QUNIFORM_IMAGE_DEPTH:
94 fprintf(stderr, "img[%d].depth", data);
95 break;
96 case QUNIFORM_IMAGE_ARRAY_SIZE:
97 fprintf(stderr, "img[%d].array_size", data);
98 break;
99
100 case QUNIFORM_UBO_ADDR:
101 fprintf(stderr, "ubo[%d]", data);
102 break;
103
104 case QUNIFORM_SSBO_OFFSET:
105 fprintf(stderr, "ssbo[%d]", data);
106 break;
107
108 case QUNIFORM_GET_BUFFER_SIZE:
109 fprintf(stderr, "ssbo_size[%d]", data);
110 break;
111
112 case QUNIFORM_NUM_WORK_GROUPS:
113 fprintf(stderr, "num_wg.%c", data < 3 ? "xyz"[data] : '?');
114 break;
115
116 default:
117 if (quniform_contents_is_texture_p0(contents)) {
118 fprintf(stderr, "tex[%d].p0: 0x%08x",
119 contents - QUNIFORM_TEXTURE_CONFIG_P0_0,
120 data);
121 } else if (contents < ARRAY_SIZE(quniform_names)) {
122 fprintf(stderr, "%s",
123 quniform_names[contents]);
124 } else {
125 fprintf(stderr, "%d / 0x%08x", contents, data);
126 }
127 }
128 }
129
130 static void
131 vir_print_reg(struct v3d_compile *c, const struct qinst *inst,
132 struct qreg reg)
133 {
134 static const char *files[] = {
135 [QFILE_TEMP] = "t",
136 [QFILE_UNIF] = "u",
137 [QFILE_TLB] = "tlb",
138 [QFILE_TLBU] = "tlbu",
139 };
140
141 switch (reg.file) {
142
143 case QFILE_NULL:
144 fprintf(stderr, "null");
145 break;
146
147 case QFILE_LOAD_IMM:
148 fprintf(stderr, "0x%08x (%f)", reg.index, uif(reg.index));
149 break;
150
151 case QFILE_REG:
152 fprintf(stderr, "rf%d", reg.index);
153 break;
154
155 case QFILE_MAGIC:
156 fprintf(stderr, "%s", v3d_qpu_magic_waddr_name(reg.index));
157 break;
158
159 case QFILE_SMALL_IMM: {
160 uint32_t unpacked;
161 bool ok = v3d_qpu_small_imm_unpack(c->devinfo,
162 inst->qpu.raddr_b,
163 &unpacked);
164 assert(ok); (void) ok;
165
166 if ((int)inst->qpu.raddr_b >= -16 &&
167 (int)inst->qpu.raddr_b <= 15)
168 fprintf(stderr, "%d", unpacked);
169 else
170 fprintf(stderr, "%f", uif(unpacked));
171 break;
172 }
173
174 case QFILE_VPM:
175 fprintf(stderr, "vpm%d.%d",
176 reg.index / 4, reg.index % 4);
177 break;
178
179 case QFILE_TLB:
180 case QFILE_TLBU:
181 fprintf(stderr, "%s", files[reg.file]);
182 break;
183
184 case QFILE_UNIF:
185 fprintf(stderr, "%s%d", files[reg.file], reg.index);
186 fprintf(stderr, " (");
187 vir_dump_uniform(c->uniform_contents[reg.index],
188 c->uniform_data[reg.index]);
189 fprintf(stderr, ")");
190 break;
191
192 default:
193 fprintf(stderr, "%s%d", files[reg.file], reg.index);
194 break;
195 }
196 }
197
198 static void
199 vir_dump_sig_addr(const struct v3d_device_info *devinfo,
200 const struct v3d_qpu_instr *instr)
201 {
202 if (devinfo->ver < 41)
203 return;
204
205 if (!instr->sig_magic)
206 fprintf(stderr, ".rf%d", instr->sig_addr);
207 else {
208 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr);
209 if (name)
210 fprintf(stderr, ".%s", name);
211 else
212 fprintf(stderr, ".UNKNOWN%d", instr->sig_addr);
213 }
214 }
215
216 static void
217 vir_dump_sig(struct v3d_compile *c, struct qinst *inst)
218 {
219 struct v3d_qpu_sig *sig = &inst->qpu.sig;
220
221 if (sig->thrsw)
222 fprintf(stderr, "; thrsw");
223 if (sig->ldvary) {
224 fprintf(stderr, "; ldvary");
225 vir_dump_sig_addr(c->devinfo, &inst->qpu);
226 }
227 if (sig->ldvpm)
228 fprintf(stderr, "; ldvpm");
229 if (sig->ldtmu) {
230 fprintf(stderr, "; ldtmu");
231 vir_dump_sig_addr(c->devinfo, &inst->qpu);
232 }
233 if (sig->ldtlb) {
234 fprintf(stderr, "; ldtlb");
235 vir_dump_sig_addr(c->devinfo, &inst->qpu);
236 }
237 if (sig->ldtlbu) {
238 fprintf(stderr, "; ldtlbu");
239 vir_dump_sig_addr(c->devinfo, &inst->qpu);
240 }
241 if (sig->ldunif)
242 fprintf(stderr, "; ldunif");
243 if (sig->ldunifrf) {
244 fprintf(stderr, "; ldunifrf");
245 vir_dump_sig_addr(c->devinfo, &inst->qpu);
246 }
247 if (sig->ldunifa)
248 fprintf(stderr, "; ldunifa");
249 if (sig->ldunifarf) {
250 fprintf(stderr, "; ldunifarf");
251 vir_dump_sig_addr(c->devinfo, &inst->qpu);
252 }
253 if (sig->wrtmuc)
254 fprintf(stderr, "; wrtmuc");
255 }
256
257 static void
258 vir_dump_alu(struct v3d_compile *c, struct qinst *inst)
259 {
260 struct v3d_qpu_instr *instr = &inst->qpu;
261 int nsrc = vir_get_non_sideband_nsrc(inst);
262 int sideband_nsrc = vir_get_nsrc(inst);
263 enum v3d_qpu_input_unpack unpack[2];
264
265 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
266 fprintf(stderr, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
267 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.ac));
268 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.apf));
269 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.auf));
270 fprintf(stderr, " ");
271
272 vir_print_reg(c, inst, inst->dst);
273 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.add.output_pack));
274
275 unpack[0] = instr->alu.add.a_unpack;
276 unpack[1] = instr->alu.add.b_unpack;
277 } else {
278 fprintf(stderr, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
279 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.mc));
280 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.mpf));
281 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.muf));
282 fprintf(stderr, " ");
283
284 vir_print_reg(c, inst, inst->dst);
285 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.mul.output_pack));
286
287 unpack[0] = instr->alu.mul.a_unpack;
288 unpack[1] = instr->alu.mul.b_unpack;
289 }
290
291 for (int i = 0; i < sideband_nsrc; i++) {
292 fprintf(stderr, ", ");
293 vir_print_reg(c, inst, inst->src[i]);
294 if (i < nsrc)
295 fprintf(stderr, "%s", v3d_qpu_unpack_name(unpack[i]));
296 }
297
298 vir_dump_sig(c, inst);
299 }
300
301 void
302 vir_dump_inst(struct v3d_compile *c, struct qinst *inst)
303 {
304 struct v3d_qpu_instr *instr = &inst->qpu;
305
306 switch (inst->qpu.type) {
307 case V3D_QPU_INSTR_TYPE_ALU:
308 vir_dump_alu(c, inst);
309 break;
310 case V3D_QPU_INSTR_TYPE_BRANCH:
311 fprintf(stderr, "b");
312 if (instr->branch.ub)
313 fprintf(stderr, "u");
314
315 fprintf(stderr, "%s",
316 v3d_qpu_branch_cond_name(instr->branch.cond));
317 fprintf(stderr, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
318
319 switch (instr->branch.bdi) {
320 case V3D_QPU_BRANCH_DEST_ABS:
321 fprintf(stderr, " zero_addr+0x%08x", instr->branch.offset);
322 break;
323
324 case V3D_QPU_BRANCH_DEST_REL:
325 fprintf(stderr, " %d", instr->branch.offset);
326 break;
327
328 case V3D_QPU_BRANCH_DEST_LINK_REG:
329 fprintf(stderr, " lri");
330 break;
331
332 case V3D_QPU_BRANCH_DEST_REGFILE:
333 fprintf(stderr, " rf%d", instr->branch.raddr_a);
334 break;
335 }
336
337 if (instr->branch.ub) {
338 switch (instr->branch.bdu) {
339 case V3D_QPU_BRANCH_DEST_ABS:
340 fprintf(stderr, ", a:unif");
341 break;
342
343 case V3D_QPU_BRANCH_DEST_REL:
344 fprintf(stderr, ", r:unif");
345 break;
346
347 case V3D_QPU_BRANCH_DEST_LINK_REG:
348 fprintf(stderr, ", lri");
349 break;
350
351 case V3D_QPU_BRANCH_DEST_REGFILE:
352 fprintf(stderr, ", rf%d", instr->branch.raddr_a);
353 break;
354 }
355 }
356
357 if (vir_has_implicit_uniform(inst)) {
358 fprintf(stderr, " ");
359 vir_print_reg(c, inst, inst->src[vir_get_implicit_uniform_src(inst)]);
360 }
361
362 break;
363 }
364 }
365
366 void
367 vir_dump(struct v3d_compile *c)
368 {
369 int ip = 0;
370
371 vir_for_each_block(block, c) {
372 fprintf(stderr, "BLOCK %d:\n", block->index);
373 vir_for_each_inst(inst, block) {
374 if (c->live_intervals_valid) {
375 bool first = true;
376
377 for (int i = 0; i < c->num_temps; i++) {
378 if (c->temp_start[i] != ip)
379 continue;
380
381 if (first) {
382 first = false;
383 } else {
384 fprintf(stderr, ", ");
385 }
386 fprintf(stderr, "S%4d", i);
387 }
388
389 if (first)
390 fprintf(stderr, " ");
391 else
392 fprintf(stderr, " ");
393 }
394
395 if (c->live_intervals_valid) {
396 bool first = true;
397
398 for (int i = 0; i < c->num_temps; i++) {
399 if (c->temp_end[i] != ip)
400 continue;
401
402 if (first) {
403 first = false;
404 } else {
405 fprintf(stderr, ", ");
406 }
407 fprintf(stderr, "E%4d", i);
408 }
409
410 if (first)
411 fprintf(stderr, " ");
412 else
413 fprintf(stderr, " ");
414 }
415
416 vir_dump_inst(c, inst);
417 fprintf(stderr, "\n");
418 ip++;
419 }
420 if (block->successors[1]) {
421 fprintf(stderr, "-> BLOCK %d, %d\n",
422 block->successors[0]->index,
423 block->successors[1]->index);
424 } else if (block->successors[0]) {
425 fprintf(stderr, "-> BLOCK %d\n",
426 block->successors[0]->index);
427 }
428 }
429 }