2 * Copyright © 2016-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
27 /* Prints a human-readable description of the uniform reference. */
29 vir_dump_uniform(enum quniform_contents contents
,
32 static const char *quniform_names
[] = {
33 [QUNIFORM_VIEWPORT_X_SCALE
] = "vp_x_scale",
34 [QUNIFORM_VIEWPORT_Y_SCALE
] = "vp_y_scale",
35 [QUNIFORM_VIEWPORT_Z_OFFSET
] = "vp_z_offset",
36 [QUNIFORM_VIEWPORT_Z_SCALE
] = "vp_z_scale",
37 [QUNIFORM_SHARED_OFFSET
] = "shared_offset",
41 case QUNIFORM_CONSTANT
:
42 fprintf(stderr
, "0x%08x / %f", data
, uif(data
));
45 case QUNIFORM_UNIFORM
:
46 fprintf(stderr
, "push[%d]", data
);
49 case QUNIFORM_TEXTURE_CONFIG_P1
:
50 fprintf(stderr
, "tex[%d].p1", data
);
53 case QUNIFORM_TMU_CONFIG_P0
:
54 fprintf(stderr
, "tex[%d].p0 | 0x%x",
55 v3d_tmu_config_data_get_unit(data
),
56 v3d_tmu_config_data_get_value(data
));
59 case QUNIFORM_TMU_CONFIG_P1
:
60 fprintf(stderr
, "tex[%d].p1 | 0x%x",
61 v3d_tmu_config_data_get_unit(data
),
62 v3d_tmu_config_data_get_value(data
));
65 case QUNIFORM_IMAGE_TMU_CONFIG_P0
:
66 fprintf(stderr
, "img[%d].p0 | 0x%x",
67 v3d_tmu_config_data_get_unit(data
),
68 v3d_tmu_config_data_get_value(data
));
71 case QUNIFORM_TEXTURE_WIDTH
:
72 fprintf(stderr
, "tex[%d].width", data
);
74 case QUNIFORM_TEXTURE_HEIGHT
:
75 fprintf(stderr
, "tex[%d].height", data
);
77 case QUNIFORM_TEXTURE_DEPTH
:
78 fprintf(stderr
, "tex[%d].depth", data
);
80 case QUNIFORM_TEXTURE_ARRAY_SIZE
:
81 fprintf(stderr
, "tex[%d].array_size", data
);
83 case QUNIFORM_TEXTURE_LEVELS
:
84 fprintf(stderr
, "tex[%d].levels", data
);
87 case QUNIFORM_IMAGE_WIDTH
:
88 fprintf(stderr
, "img[%d].width", data
);
90 case QUNIFORM_IMAGE_HEIGHT
:
91 fprintf(stderr
, "img[%d].height", data
);
93 case QUNIFORM_IMAGE_DEPTH
:
94 fprintf(stderr
, "img[%d].depth", data
);
96 case QUNIFORM_IMAGE_ARRAY_SIZE
:
97 fprintf(stderr
, "img[%d].array_size", data
);
100 case QUNIFORM_UBO_ADDR
:
101 fprintf(stderr
, "ubo[%d]", data
);
104 case QUNIFORM_SSBO_OFFSET
:
105 fprintf(stderr
, "ssbo[%d]", data
);
108 case QUNIFORM_GET_BUFFER_SIZE
:
109 fprintf(stderr
, "ssbo_size[%d]", data
);
112 case QUNIFORM_NUM_WORK_GROUPS
:
113 fprintf(stderr
, "num_wg.%c", data
< 3 ? "xyz"[data
] : '?');
117 if (quniform_contents_is_texture_p0(contents
)) {
118 fprintf(stderr
, "tex[%d].p0: 0x%08x",
119 contents
- QUNIFORM_TEXTURE_CONFIG_P0_0
,
121 } else if (contents
< ARRAY_SIZE(quniform_names
)) {
122 fprintf(stderr
, "%s",
123 quniform_names
[contents
]);
125 fprintf(stderr
, "%d / 0x%08x", contents
, data
);
131 vir_print_reg(struct v3d_compile
*c
, const struct qinst
*inst
,
134 static const char *files
[] = {
138 [QFILE_TLBU
] = "tlbu",
144 fprintf(stderr
, "null");
148 fprintf(stderr
, "0x%08x (%f)", reg
.index
, uif(reg
.index
));
152 fprintf(stderr
, "rf%d", reg
.index
);
156 fprintf(stderr
, "%s", v3d_qpu_magic_waddr_name(reg
.index
));
159 case QFILE_SMALL_IMM
: {
161 bool ok
= v3d_qpu_small_imm_unpack(c
->devinfo
,
164 assert(ok
); (void) ok
;
166 if ((int)inst
->qpu
.raddr_b
>= -16 &&
167 (int)inst
->qpu
.raddr_b
<= 15)
168 fprintf(stderr
, "%d", unpacked
);
170 fprintf(stderr
, "%f", uif(unpacked
));
175 fprintf(stderr
, "vpm%d.%d",
176 reg
.index
/ 4, reg
.index
% 4);
181 fprintf(stderr
, "%s", files
[reg
.file
]);
185 fprintf(stderr
, "%s%d", files
[reg
.file
], reg
.index
);
186 fprintf(stderr
, " (");
187 vir_dump_uniform(c
->uniform_contents
[reg
.index
],
188 c
->uniform_data
[reg
.index
]);
189 fprintf(stderr
, ")");
193 fprintf(stderr
, "%s%d", files
[reg
.file
], reg
.index
);
199 vir_dump_sig_addr(const struct v3d_device_info
*devinfo
,
200 const struct v3d_qpu_instr
*instr
)
202 if (devinfo
->ver
< 41)
205 if (!instr
->sig_magic
)
206 fprintf(stderr
, ".rf%d", instr
->sig_addr
);
208 const char *name
= v3d_qpu_magic_waddr_name(instr
->sig_addr
);
210 fprintf(stderr
, ".%s", name
);
212 fprintf(stderr
, ".UNKNOWN%d", instr
->sig_addr
);
217 vir_dump_sig(struct v3d_compile
*c
, struct qinst
*inst
)
219 struct v3d_qpu_sig
*sig
= &inst
->qpu
.sig
;
222 fprintf(stderr
, "; thrsw");
224 fprintf(stderr
, "; ldvary");
225 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
228 fprintf(stderr
, "; ldvpm");
230 fprintf(stderr
, "; ldtmu");
231 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
234 fprintf(stderr
, "; ldtlb");
235 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
238 fprintf(stderr
, "; ldtlbu");
239 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
242 fprintf(stderr
, "; ldunif");
244 fprintf(stderr
, "; ldunifrf");
245 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
248 fprintf(stderr
, "; ldunifa");
249 if (sig
->ldunifarf
) {
250 fprintf(stderr
, "; ldunifarf");
251 vir_dump_sig_addr(c
->devinfo
, &inst
->qpu
);
254 fprintf(stderr
, "; wrtmuc");
258 vir_dump_alu(struct v3d_compile
*c
, struct qinst
*inst
)
260 struct v3d_qpu_instr
*instr
= &inst
->qpu
;
261 int nsrc
= vir_get_non_sideband_nsrc(inst
);
262 int sideband_nsrc
= vir_get_nsrc(inst
);
263 enum v3d_qpu_input_unpack unpack
[2];
265 if (inst
->qpu
.alu
.add
.op
!= V3D_QPU_A_NOP
) {
266 fprintf(stderr
, "%s", v3d_qpu_add_op_name(instr
->alu
.add
.op
));
267 fprintf(stderr
, "%s", v3d_qpu_cond_name(instr
->flags
.ac
));
268 fprintf(stderr
, "%s", v3d_qpu_pf_name(instr
->flags
.apf
));
269 fprintf(stderr
, "%s", v3d_qpu_uf_name(instr
->flags
.auf
));
270 fprintf(stderr
, " ");
272 vir_print_reg(c
, inst
, inst
->dst
);
273 fprintf(stderr
, "%s", v3d_qpu_pack_name(instr
->alu
.add
.output_pack
));
275 unpack
[0] = instr
->alu
.add
.a_unpack
;
276 unpack
[1] = instr
->alu
.add
.b_unpack
;
278 fprintf(stderr
, "%s", v3d_qpu_mul_op_name(instr
->alu
.mul
.op
));
279 fprintf(stderr
, "%s", v3d_qpu_cond_name(instr
->flags
.mc
));
280 fprintf(stderr
, "%s", v3d_qpu_pf_name(instr
->flags
.mpf
));
281 fprintf(stderr
, "%s", v3d_qpu_uf_name(instr
->flags
.muf
));
282 fprintf(stderr
, " ");
284 vir_print_reg(c
, inst
, inst
->dst
);
285 fprintf(stderr
, "%s", v3d_qpu_pack_name(instr
->alu
.mul
.output_pack
));
287 unpack
[0] = instr
->alu
.mul
.a_unpack
;
288 unpack
[1] = instr
->alu
.mul
.b_unpack
;
291 for (int i
= 0; i
< sideband_nsrc
; i
++) {
292 fprintf(stderr
, ", ");
293 vir_print_reg(c
, inst
, inst
->src
[i
]);
295 fprintf(stderr
, "%s", v3d_qpu_unpack_name(unpack
[i
]));
298 vir_dump_sig(c
, inst
);
302 vir_dump_inst(struct v3d_compile
*c
, struct qinst
*inst
)
304 struct v3d_qpu_instr
*instr
= &inst
->qpu
;
306 switch (inst
->qpu
.type
) {
307 case V3D_QPU_INSTR_TYPE_ALU
:
308 vir_dump_alu(c
, inst
);
310 case V3D_QPU_INSTR_TYPE_BRANCH
:
311 fprintf(stderr
, "b");
312 if (instr
->branch
.ub
)
313 fprintf(stderr
, "u");
315 fprintf(stderr
, "%s",
316 v3d_qpu_branch_cond_name(instr
->branch
.cond
));
317 fprintf(stderr
, "%s", v3d_qpu_msfign_name(instr
->branch
.msfign
));
319 switch (instr
->branch
.bdi
) {
320 case V3D_QPU_BRANCH_DEST_ABS
:
321 fprintf(stderr
, " zero_addr+0x%08x", instr
->branch
.offset
);
324 case V3D_QPU_BRANCH_DEST_REL
:
325 fprintf(stderr
, " %d", instr
->branch
.offset
);
328 case V3D_QPU_BRANCH_DEST_LINK_REG
:
329 fprintf(stderr
, " lri");
332 case V3D_QPU_BRANCH_DEST_REGFILE
:
333 fprintf(stderr
, " rf%d", instr
->branch
.raddr_a
);
337 if (instr
->branch
.ub
) {
338 switch (instr
->branch
.bdu
) {
339 case V3D_QPU_BRANCH_DEST_ABS
:
340 fprintf(stderr
, ", a:unif");
343 case V3D_QPU_BRANCH_DEST_REL
:
344 fprintf(stderr
, ", r:unif");
347 case V3D_QPU_BRANCH_DEST_LINK_REG
:
348 fprintf(stderr
, ", lri");
351 case V3D_QPU_BRANCH_DEST_REGFILE
:
352 fprintf(stderr
, ", rf%d", instr
->branch
.raddr_a
);
357 if (vir_has_implicit_uniform(inst
)) {
358 fprintf(stderr
, " ");
359 vir_print_reg(c
, inst
, inst
->src
[vir_get_implicit_uniform_src(inst
)]);
367 vir_dump(struct v3d_compile
*c
)
371 vir_for_each_block(block
, c
) {
372 fprintf(stderr
, "BLOCK %d:\n", block
->index
);
373 vir_for_each_inst(inst
, block
) {
374 if (c
->live_intervals_valid
) {
377 for (int i
= 0; i
< c
->num_temps
; i
++) {
378 if (c
->temp_start
[i
] != ip
)
384 fprintf(stderr
, ", ");
386 fprintf(stderr
, "S%4d", i
);
390 fprintf(stderr
, " ");
392 fprintf(stderr
, " ");
395 if (c
->live_intervals_valid
) {
398 for (int i
= 0; i
< c
->num_temps
; i
++) {
399 if (c
->temp_end
[i
] != ip
)
405 fprintf(stderr
, ", ");
407 fprintf(stderr
, "E%4d", i
);
411 fprintf(stderr
, " ");
413 fprintf(stderr
, " ");
416 vir_dump_inst(c
, inst
);
417 fprintf(stderr
, "\n");
420 if (block
->successors
[1]) {
421 fprintf(stderr
, "-> BLOCK %d, %d\n",
422 block
->successors
[0]->index
,
423 block
->successors
[1]->index
);
424 } else if (block
->successors
[0]) {
425 fprintf(stderr
, "-> BLOCK %d\n",
426 block
->successors
[0]->index
);