v3d: Add VIR dumping of TMU config p0/p1.
[mesa.git] / src / broadcom / compiler / vir_dump.c
1 /*
2 * Copyright © 2016-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
26
27 static void
28 vir_print_reg(struct v3d_compile *c, const struct qinst *inst,
29 struct qreg reg)
30 {
31 static const char *files[] = {
32 [QFILE_TEMP] = "t",
33 [QFILE_UNIF] = "u",
34 [QFILE_TLB] = "tlb",
35 [QFILE_TLBU] = "tlbu",
36 };
37 static const char *quniform_names[] = {
38 [QUNIFORM_VIEWPORT_X_SCALE] = "vp_x_scale",
39 [QUNIFORM_VIEWPORT_Y_SCALE] = "vp_y_scale",
40 [QUNIFORM_VIEWPORT_Z_OFFSET] = "vp_z_offset",
41 [QUNIFORM_VIEWPORT_Z_SCALE] = "vp_z_scale",
42 };
43
44 switch (reg.file) {
45
46 case QFILE_NULL:
47 fprintf(stderr, "null");
48 break;
49
50 case QFILE_LOAD_IMM:
51 fprintf(stderr, "0x%08x (%f)", reg.index, uif(reg.index));
52 break;
53
54 case QFILE_REG:
55 fprintf(stderr, "rf%d", reg.index);
56 break;
57
58 case QFILE_MAGIC:
59 fprintf(stderr, "%s", v3d_qpu_magic_waddr_name(reg.index));
60 break;
61
62 case QFILE_SMALL_IMM: {
63 uint32_t unpacked;
64 bool ok = v3d_qpu_small_imm_unpack(c->devinfo,
65 inst->qpu.raddr_b,
66 &unpacked);
67 assert(ok); (void) ok;
68
69 if ((int)inst->qpu.raddr_b >= -16 &&
70 (int)inst->qpu.raddr_b <= 15)
71 fprintf(stderr, "%d", unpacked);
72 else
73 fprintf(stderr, "%f", uif(unpacked));
74 break;
75 }
76
77 case QFILE_VPM:
78 fprintf(stderr, "vpm%d.%d",
79 reg.index / 4, reg.index % 4);
80 break;
81
82 case QFILE_TLB:
83 case QFILE_TLBU:
84 fprintf(stderr, "%s", files[reg.file]);
85 break;
86
87 case QFILE_UNIF: {
88 enum quniform_contents contents = c->uniform_contents[reg.index];
89 uint32_t data = c->uniform_data[reg.index];
90
91 fprintf(stderr, "%s%d", files[reg.file], reg.index);
92
93 switch (contents) {
94 case QUNIFORM_CONSTANT:
95 fprintf(stderr, " (0x%08x / %f)", data, uif(data));
96 break;
97
98 case QUNIFORM_UNIFORM:
99 fprintf(stderr, " (push[%d])", data);
100 break;
101
102 case QUNIFORM_TEXTURE_CONFIG_P1:
103 fprintf(stderr, " (tex[%d].p1)", data);
104 break;
105
106 case QUNIFORM_TMU_CONFIG_P0:
107 fprintf(stderr, " (tex[%d].p0 | 0x%x)",
108 v3d_tmu_config_data_get_unit(data),
109 v3d_tmu_config_data_get_value(data));
110 break;
111
112 case QUNIFORM_TMU_CONFIG_P1:
113 fprintf(stderr, " (tex[%d].p1 | 0x%x)",
114 v3d_tmu_config_data_get_unit(data),
115 v3d_tmu_config_data_get_value(data));
116 break;
117
118 case QUNIFORM_TEXTURE_WIDTH:
119 fprintf(stderr, " (tex[%d].width)", data);
120 break;
121 case QUNIFORM_TEXTURE_HEIGHT:
122 fprintf(stderr, " (tex[%d].height)", data);
123 break;
124 case QUNIFORM_TEXTURE_DEPTH:
125 fprintf(stderr, " (tex[%d].depth)", data);
126 break;
127 case QUNIFORM_TEXTURE_ARRAY_SIZE:
128 fprintf(stderr, " (tex[%d].array_size)", data);
129 break;
130 case QUNIFORM_TEXTURE_LEVELS:
131 fprintf(stderr, " (tex[%d].levels)", data);
132 break;
133
134 case QUNIFORM_UBO_ADDR:
135 fprintf(stderr, " (ubo[%d])", data);
136 break;
137
138 default:
139 if (quniform_contents_is_texture_p0(contents)) {
140 fprintf(stderr, " (tex[%d].p0: 0x%08x)",
141 contents - QUNIFORM_TEXTURE_CONFIG_P0_0,
142 c->uniform_data[reg.index]);
143 } else if (contents < ARRAY_SIZE(quniform_names)) {
144 fprintf(stderr, " (%s)",
145 quniform_names[contents]);
146 } else {
147 fprintf(stderr, " (%d / 0x%08x)", contents,
148 c->uniform_data[reg.index]);
149 }
150 }
151
152 break;
153 }
154
155 default:
156 fprintf(stderr, "%s%d", files[reg.file], reg.index);
157 break;
158 }
159 }
160
161 static void
162 vir_dump_sig_addr(const struct v3d_device_info *devinfo,
163 const struct v3d_qpu_instr *instr)
164 {
165 if (devinfo->ver < 41)
166 return;
167
168 if (!instr->sig_magic)
169 fprintf(stderr, ".rf%d", instr->sig_addr);
170 else {
171 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr);
172 if (name)
173 fprintf(stderr, ".%s", name);
174 else
175 fprintf(stderr, ".UNKNOWN%d", instr->sig_addr);
176 }
177 }
178
179 static void
180 vir_dump_sig(struct v3d_compile *c, struct qinst *inst)
181 {
182 struct v3d_qpu_sig *sig = &inst->qpu.sig;
183
184 if (sig->thrsw)
185 fprintf(stderr, "; thrsw");
186 if (sig->ldvary) {
187 fprintf(stderr, "; ldvary");
188 vir_dump_sig_addr(c->devinfo, &inst->qpu);
189 }
190 if (sig->ldvpm)
191 fprintf(stderr, "; ldvpm");
192 if (sig->ldtmu) {
193 fprintf(stderr, "; ldtmu");
194 vir_dump_sig_addr(c->devinfo, &inst->qpu);
195 }
196 if (sig->ldtlb) {
197 fprintf(stderr, "; ldtlb");
198 vir_dump_sig_addr(c->devinfo, &inst->qpu);
199 }
200 if (sig->ldtlbu) {
201 fprintf(stderr, "; ldtlbu");
202 vir_dump_sig_addr(c->devinfo, &inst->qpu);
203 }
204 if (sig->ldunif)
205 fprintf(stderr, "; ldunif");
206 if (sig->ldunifrf) {
207 fprintf(stderr, "; ldunifrf");
208 vir_dump_sig_addr(c->devinfo, &inst->qpu);
209 }
210 if (sig->ldunifa)
211 fprintf(stderr, "; ldunifa");
212 if (sig->ldunifarf) {
213 fprintf(stderr, "; ldunifarf");
214 vir_dump_sig_addr(c->devinfo, &inst->qpu);
215 }
216 if (sig->wrtmuc)
217 fprintf(stderr, "; wrtmuc");
218 }
219
220 static void
221 vir_dump_alu(struct v3d_compile *c, struct qinst *inst)
222 {
223 struct v3d_qpu_instr *instr = &inst->qpu;
224 int nsrc = vir_get_non_sideband_nsrc(inst);
225 int sideband_nsrc = vir_get_nsrc(inst);
226 enum v3d_qpu_input_unpack unpack[2];
227
228 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
229 fprintf(stderr, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
230 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.ac));
231 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.apf));
232 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.auf));
233 fprintf(stderr, " ");
234
235 vir_print_reg(c, inst, inst->dst);
236 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.add.output_pack));
237
238 unpack[0] = instr->alu.add.a_unpack;
239 unpack[1] = instr->alu.add.b_unpack;
240 } else {
241 fprintf(stderr, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
242 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.mc));
243 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.mpf));
244 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.muf));
245 fprintf(stderr, " ");
246
247 vir_print_reg(c, inst, inst->dst);
248 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.mul.output_pack));
249
250 unpack[0] = instr->alu.mul.a_unpack;
251 unpack[1] = instr->alu.mul.b_unpack;
252 }
253
254 for (int i = 0; i < sideband_nsrc; i++) {
255 fprintf(stderr, ", ");
256 vir_print_reg(c, inst, inst->src[i]);
257 if (i < nsrc)
258 fprintf(stderr, "%s", v3d_qpu_unpack_name(unpack[i]));
259 }
260
261 vir_dump_sig(c, inst);
262 }
263
264 void
265 vir_dump_inst(struct v3d_compile *c, struct qinst *inst)
266 {
267 struct v3d_qpu_instr *instr = &inst->qpu;
268
269 switch (inst->qpu.type) {
270 case V3D_QPU_INSTR_TYPE_ALU:
271 vir_dump_alu(c, inst);
272 break;
273 case V3D_QPU_INSTR_TYPE_BRANCH:
274 fprintf(stderr, "b");
275 if (instr->branch.ub)
276 fprintf(stderr, "u");
277
278 fprintf(stderr, "%s",
279 v3d_qpu_branch_cond_name(instr->branch.cond));
280 fprintf(stderr, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
281
282 switch (instr->branch.bdi) {
283 case V3D_QPU_BRANCH_DEST_ABS:
284 fprintf(stderr, " zero_addr+0x%08x", instr->branch.offset);
285 break;
286
287 case V3D_QPU_BRANCH_DEST_REL:
288 fprintf(stderr, " %d", instr->branch.offset);
289 break;
290
291 case V3D_QPU_BRANCH_DEST_LINK_REG:
292 fprintf(stderr, " lri");
293 break;
294
295 case V3D_QPU_BRANCH_DEST_REGFILE:
296 fprintf(stderr, " rf%d", instr->branch.raddr_a);
297 break;
298 }
299
300 if (instr->branch.ub) {
301 switch (instr->branch.bdu) {
302 case V3D_QPU_BRANCH_DEST_ABS:
303 fprintf(stderr, ", a:unif");
304 break;
305
306 case V3D_QPU_BRANCH_DEST_REL:
307 fprintf(stderr, ", r:unif");
308 break;
309
310 case V3D_QPU_BRANCH_DEST_LINK_REG:
311 fprintf(stderr, ", lri");
312 break;
313
314 case V3D_QPU_BRANCH_DEST_REGFILE:
315 fprintf(stderr, ", rf%d", instr->branch.raddr_a);
316 break;
317 }
318 }
319
320 if (vir_has_implicit_uniform(inst)) {
321 fprintf(stderr, " ");
322 vir_print_reg(c, inst, inst->src[vir_get_implicit_uniform_src(inst)]);
323 }
324
325 break;
326 }
327 }
328
329 void
330 vir_dump(struct v3d_compile *c)
331 {
332 int ip = 0;
333
334 vir_for_each_block(block, c) {
335 fprintf(stderr, "BLOCK %d:\n", block->index);
336 vir_for_each_inst(inst, block) {
337 if (c->live_intervals_valid) {
338 bool first = true;
339
340 for (int i = 0; i < c->num_temps; i++) {
341 if (c->temp_start[i] != ip)
342 continue;
343
344 if (first) {
345 first = false;
346 } else {
347 fprintf(stderr, ", ");
348 }
349 fprintf(stderr, "S%4d", i);
350 }
351
352 if (first)
353 fprintf(stderr, " ");
354 else
355 fprintf(stderr, " ");
356 }
357
358 if (c->live_intervals_valid) {
359 bool first = true;
360
361 for (int i = 0; i < c->num_temps; i++) {
362 if (c->temp_end[i] != ip)
363 continue;
364
365 if (first) {
366 first = false;
367 } else {
368 fprintf(stderr, ", ");
369 }
370 fprintf(stderr, "E%4d", i);
371 }
372
373 if (first)
374 fprintf(stderr, " ");
375 else
376 fprintf(stderr, " ");
377 }
378
379 vir_dump_inst(c, inst);
380 fprintf(stderr, "\n");
381 ip++;
382 }
383 if (block->successors[1]) {
384 fprintf(stderr, "-> BLOCK %d, %d\n",
385 block->successors[0]->index,
386 block->successors[1]->index);
387 } else if (block->successors[0]) {
388 fprintf(stderr, "-> BLOCK %d\n",
389 block->successors[0]->index);
390 }
391 }
392 }