1 ### Makefile for the srio
3 TOP_MODULE:=mkgpio_real
9 BSVINCDIR:= .:%/Prelude:%/Libraries:%/Libraries/BlueNoC
12 export TOP=$(TOP_MODULE)
14 default: full_clean compile link simulate
16 timing_area: full_clean generate_verilog vivado_build
20 @echo Compiling $(TOP_MODULE)....
21 @mkdir -p $(BSVBUILDDIR)
22 @bsc -u -sim -simdir $(BSVBUILDDIR) -bdir $(BSVBUILDDIR) -info-dir $(BSVBUILDDIR) -keep-fires -p $(BSVINCDIR) -D NAME=neel -g $(TOP_MODULE) $(TOP_DIR)/$(TOP_FILE)
23 @echo Compilation finished
27 @echo Linking $(TOP_MODULE)...
29 @bsc -e $(TOP_MODULE) -sim -o ./bin/out -simdir $(BSVBUILDDIR) -p .:%/Prelude:%/Libraries:%/Libraries/BlueNoC:./c_files -keep-fires -bdir $(BSVBUILDDIR) -keep-fires ./c_files/checker.c
30 @echo Linking finished
32 .PHONY: generate_verilog
34 @echo Compiling $(TOP_MODULE) in verilog ...
35 @mkdir -p $(BSVBUILDDIR);
36 @mkdir -p $(VERILOGDIR);
37 @bsc -u -verilog -elab -vdir $(VERILOGDIR) -bdir $(BSVBUILDDIR) -info-dir $(BSVBUILDDIR)\
38 $(define_macros) -D verilog=True $(BSVCOMPILEOPTS) -verilog-filter ${BLUESPECDIR}/bin/basicinout\
39 -p $(BSVINCDIR) -g $(TOP_MODULE) $(TOP_DIR)/$(TOP_FILE) || (echo "BSC COMPILE ERROR"; exit 1)
45 @echo Simulation finished.
49 rm -rf build bin *.jou *.log