1 package slow_peripherals;
2 /*===== Project imports =====*/
3 import defined_types::*;
4 import AXI4_Lite_Fabric::*;
5 import AXI4_Lite_Types::*;
9 import AXI4Lite_AXI4_Bridge::*;
10 `include "instance_defines.bsv"
11 /*===========================*/
12 /*=== package imports ===*/
15 import ClientServer::*;
16 import Connectable::*;
19 /*=======================*/
20 /*===== Import the slow peripherals ====*/
22 import Uart16550 :: *;
26 import RS232_modified::*;
41 import axiexpansion ::*;
50 /*=====================================*/
52 /*===== interface declaration =====*/
55 interface RS232_PHY_Ifc uart0_coe;
58 interface RS232 uart1_coe;
61 interface I2C_out i2c0_out;
64 interface I2C_out i2c1_out;
67 interface QSPI_out qspi0_out;
70 interface QSPI_out qspi1_out;
73 interface Get#(Bit#(67)) axiexp1_out;
74 interface Put#(Bit#(67)) axiexp1_in;
77 interface PWMIO pwm_o;
80 interface Ifc_slow_peripherals;
81 interface AXI4_Slave_IFC#(`PADDR,`Reg_width,`USERSPACE) axi_slave;
82 interface SP_ios slow_ios;
83 method Action external_int(Bit#(32) in);
85 method Bit#(1) msip_int;
86 method Bit#(1) mtip_int;
87 method Bit#(`Reg_width) mtime;
89 `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
90 `ifdef I2C0 method Bit#(1) i2c0_isint; `endif
91 `ifdef I2C1 method Bit#(1) i2c1_isint; `endif
92 `ifdef QSPI0 method Bit#(1) qspi0_isint; `endif
93 `ifdef QSPI1 method Bit#(1) qspi1_isint; `endif
94 `ifdef UART0 method Bit#(1) uart0_intr; `endif
96 interface IOCellSide iocell_side; // mandatory interface
97 interface GPIO_config#(3) pad_configa; // depends on the number of banks
100 /*================================*/
102 function Tuple2#(Bool, Bit#(TLog#(Num_Slow_Slaves))) fn_address_mapping (Bit#(`PADDR) addr);
104 if(addr>=`UART0Base && addr<=`UART0End)
105 return tuple2(True,fromInteger(valueOf(Uart0_slave_num)));
109 if(addr>=`UART1Base && addr<=`UART1End)
110 return tuple2(True,fromInteger(valueOf(Uart1_slave_num)));
114 if(addr>=`ClintBase && addr<=`ClintEnd)
115 return tuple2(True,fromInteger(valueOf(CLINT_slave_num)));
119 if(addr>=`PLICBase && addr<=`PLICEnd)
120 return tuple2(True,fromInteger(valueOf(Plic_slave_num)));
124 if(addr>=`I2C0Base && addr<=`I2C0End)
125 return tuple2(True,fromInteger(valueOf(I2c0_slave_num)));
129 if(addr>=`I2C1Base && addr<=`I2C1End)
130 return tuple2(True,fromInteger(valueOf(I2c1_slave_num)));
134 if(addr>=`QSPI0CfgBase && addr<=`QSPI0CfgEnd)
135 return tuple2(True,fromInteger(valueOf(Qspi0_slave_num)));
136 else if(addr>=`QSPI0MemBase && addr<=`QSPI0MemEnd)
137 return tuple2(True,fromInteger(valueOf(Qspi0_slave_num)));
141 if(addr>=`QSPI1CfgBase && addr<=`QSPI1CfgEnd)
142 return tuple2(True,fromInteger(valueOf(Qspi1_slave_num)));
143 else if(addr>=`QSPI1MemBase && addr<=`QSPI1MemEnd)
144 return tuple2(True,fromInteger(valueOf(Qspi1_slave_num)));
148 if(addr>=`AxiExp1Base && addr<=`AxiExp1End)
149 return tuple2(True,fromInteger(valueOf(AxiExp1_slave_num)));
153 if(addr>=`PWMBase && addr<=`PWMEnd)
154 return tuple2(True,fromInteger(valueOf(Pwm_slave_num)));
159 // give slave number and adress map to whatever peripherals you instantiate on the AXI4_Lite
162 return tuple2(False,?);
166 module mkslow_peripherals#(Clock fast_clock, Reset fast_reset, Clock uart_clock, Reset uart_reset
167 `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif )(Ifc_slow_peripherals);
168 Clock sp_clock <-exposeCurrentClock; // slow peripheral clock
169 Reset sp_reset <-exposeCurrentReset; // slow peripheral reset
171 /*======= Module declarations for each peripheral =======*/
173 Uart16550_AXI4_Lite_Ifc uart0 <- mkUart16550(clocked_by uart_clock, reset_by uart_reset, sp_clock, sp_reset);
176 //Ifc_Uart_bs uart1 <- mkUart_bs(clocked_by uart_clock, reset_by uart_reset,sp_clock, sp_reset);
177 Ifc_Uart_bs uart1 <- mkUart_bs(clocked_by sp_clock, reset_by sp_reset,sp_clock, sp_reset);
180 Ifc_clint clint <- mkclint();
183 Ifc_PLIC_AXI plic <- mkplicperipheral();
184 Wire#(Bit#(TLog#(`INTERRUPT_PINS))) interrupt_id <- mkWire();
185 Vector#(32, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
188 I2C_IFC i2c0 <- mkI2CController();
191 I2C_IFC i2c1 <- mkI2CController();
194 Ifc_qspi qspi0 <- mkqspi();
197 Ifc_qspi qspi1 <- mkqspi();
200 Ifc_AxiExpansion axiexp1 <- mkAxiExpansion();
203 Ifc_PWM_bus pwm_bus <- mkPWM_bus(ext_pwm_clock);
206 Ifc_pinmux pinmux <- mkpinmux; // mandatory
207 MUX#(3) muxa <- mkmux(); // mandatory. number depends on the number of instances required.
208 GPIO#(3) gpioa <- mkgpio(); // optional. depends the number of IO pins declared before.
209 Wire#(Bit#(32)) wr_interrupt <- mkWire();
211 /*=======================================================*/
212 mkConnection(pinmux.peripheral_side.uart.tx, uart0.io.tx);
213 mkConnection(pinmux.peripheral_side.uart.rx, uart0.io.rx);
214 AXI4_Lite_Fabric_IFC #(1, Num_Slow_Slaves, `PADDR, `Reg_width,`USERSPACE) slow_fabric <-
215 mkAXI4_Lite_Fabric(fn_address_mapping);
216 Ifc_AXI4Lite_AXI4_Bridge bridge <-mkAXI4Lite_AXI4_Bridge(fast_clock,fast_reset);
218 mkConnection (bridge.axi4_lite_master, slow_fabric.v_from_masters [0]);
219 /*======= Slave connections to AXI4Lite fabric =========*/
221 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Uart0_slave_num))],
222 uart0.slave_axi_uart);
225 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Uart1_slave_num))],
226 uart1.slave_axi_uart);
229 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(CLINT_slave_num))],
233 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Plic_slave_num))],
234 plic.axi4_slave_plic); //
237 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(I2c0_slave_num))],
241 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(I2c1_slave_num))],
242 i2c1.slave_i2c_axi); //
245 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Qspi0_slave_num))],
249 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Qspi1_slave_num))],
253 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(AxiExp1_slave_num))],
254 axiexp1.axi_slave); //
257 mkConnection (slow_fabric.v_to_slaves [fromInteger(valueOf(Pwm_slave_num))],
262 mkConnection (slow_fabric.
263 v_to_slaves[fromInteger(valueOf(Muxa_slave_num))],
265 mkConnection (slow_fabric.
266 v_to_slaves[fromInteger(valueOf(Gpioa_slave_num))],
268 rule connect_select_lines_pinmux;// mandatory
269 pinmux.mux_lines.cell0_mux(muxa.mux_config.mux[0]);
270 pinmux.mux_lines.cell1_mux(muxa.mux_config.mux[1]);
271 pinmux.mux_lines.cell2_mux(muxa.mux_config.mux[2]);
273 rule connect_i2c0_scl;
274 pinmux.peripheral_side.twi_scl_out(i2c0.out.scl_out);
275 pinmux.peripheral_side.twi_scl_outen(pack(i2c0.out.scl_out_en));
277 rule connect_i2c0_scl_in;
278 i2c0.out.scl_in(pinmux.peripheral_side.twi_scl_in);
280 rule connect_i2c0_sda;
281 pinmux.peripheral_side.twi_sda_out(i2c0.out.sda_out);
282 pinmux.peripheral_side.twi_sda_outen(pack(i2c0.out.sda_out_en));
284 rule connect_i2c0_sda_in;
285 i2c0.out.sda_in(pinmux.peripheral_side.twi_sda_in);
287 rule connect_uart1tx;
288 pinmux.peripheral_side.uart_tx(uart1.coe_rs232.sout);
290 rule connect_uart1rx;
291 uart1.coe_rs232.sin(pinmux.peripheral_side.uart_rx);
294 pinmux.peripheral_side.gpioa_a0_out(gpioa.func.gpio_out[0]);
295 pinmux.peripheral_side.gpioa_a0_outen(gpioa.func.gpio_out_en[0]);
296 pinmux.peripheral_side.gpioa_a1_out(gpioa.func.gpio_out[1]);
297 pinmux.peripheral_side.gpioa_a1_outen(gpioa.func.gpio_out_en[1]);
298 pinmux.peripheral_side.gpioa_a2_out(gpioa.func.gpio_out[2]);
299 pinmux.peripheral_side.gpioa_a2_outen(gpioa.func.gpio_out_en[2]);
300 Vector#(3,Bit#(1)) temp;
301 temp[0]=pinmux.peripheral_side.gpioa_a0_in;
302 temp[1]=pinmux.peripheral_side.gpioa_a1_in;
303 temp[2]=pinmux.peripheral_side.gpioa_a2_in;
304 gpioa.func.gpio_in(temp);
306 rule connect_qspi0_out;
307 let outs=qspi0.out.io_o;
308 let outs_en=qspi0.out.io_enable;
309 pinmux.peripheral_side.qspi_io0_out(outs[0]);
310 pinmux.peripheral_side.qspi_io1_out(outs[1]);
311 pinmux.peripheral_side.qspi_io2_out(outs[2]);
312 pinmux.peripheral_side.qspi_io3_out(outs[3]);
313 pinmux.peripheral_side.qspi_io0_outen(outs_en[0]);
314 pinmux.peripheral_side.qspi_io1_outen(outs_en[1]);
315 pinmux.peripheral_side.qspi_io2_outen(outs_en[2]);
316 pinmux.peripheral_side.qspi_io3_outen(outs_en[3]);
318 rule connect_qspi0_in;
319 qspi0.out.io_i({pinmux.peripheral_side.qspi_io3_in,pinmux.peripheral_side.qspi_io2_in,
320 pinmux.peripheral_side.qspi_io1_in, pinmux.peripheral_side.qspi_io0_in });
322 for(Integer i=0;i<32;i=i+ 1)begin
323 rule connect_int_to_plic(wr_interrupt[i]==1);
324 ff_gateway_queue[i].enq(1);
325 plic.ifc_external_irq[i].irq_frm_gateway(True);
328 rule rl_completion_msg_from_plic;
329 let id <- plic.intrpt_completion;
331 `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
334 for(Integer i=0; i <32; i=i+1) begin
335 rule deq_gateway_queue;
336 if(interrupt_id==fromInteger(i)) begin
337 ff_gateway_queue[i].deq;
338 `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
342 /* for connectin inputs from pinmux as itnerrupts
343 rule connect_pinmux_eint;
344 wr_interrupt<= pinmux.peripheral_side.eint_input;
348 /*=======================================================*/
349 /*=================== PLIC Connections ==================== */
351 /*TODO DMA interrupt need to be connected to the plic
352 for(Integer i=1; i<8; i=i+1) begin
354 rule rl_connect_dma_interrupts_to_plic;
355 if(dma.interrupt_to_processor[i-1]==1'b1) begin
356 ff_gateway_queue[i].enq(1);
357 plic.ifc_external_irq[i].irq_frm_gateway(True);
361 rule rl_connect_dma_interrupts_to_plic;
362 ff_gateway_queue[i].enq(0);
367 rule rl_connect_i2c0_to_plic;
369 if(i2c0.isint()==1'b1) begin
370 ff_gateway_queue[8].enq(1);
371 plic.ifc_external_irq[8].irq_frm_gateway(True);
374 ff_gateway_queue[8].enq(0);
378 rule rl_connect_i2c1_to_plic;
380 if(i2c1.isint()==1'b1) begin
381 ff_gateway_queue[9].enq(1);
382 plic.ifc_external_irq[9].irq_frm_gateway(True);
385 ff_gateway_queue[9].enq(0);
389 rule rl_connect_i2c0_timerint_to_plic;
391 if(i2c0.timerint()==1'b1) begin
392 ff_gateway_queue[10].enq(1);
393 plic.ifc_external_irq[10].irq_frm_gateway(True);
396 ff_gateway_queue[10].enq(0);
400 rule rl_connect_i2c1_timerint_to_plic;
402 if(i2c1.timerint()==1'b1) begin
403 ff_gateway_queue[11].enq(1);
404 plic.ifc_external_irq[11].irq_frm_gateway(True);
407 ff_gateway_queue[11].enq(0);
411 rule rl_connect_i2c0_isber_to_plic;
413 if(i2c0.isber()==1'b1) begin
414 ff_gateway_queue[12].enq(1);
415 plic.ifc_external_irq[12].irq_frm_gateway(True);
418 ff_gateway_queue[12].enq(0);
422 rule rl_connect_i2c1_isber_to_plic;
424 if(i2c1.isber()==1'b1) begin
425 ff_gateway_queue[13].enq(1);
426 plic.ifc_external_irq[13].irq_frm_gateway(True);
429 ff_gateway_queue[13].enq(0);
433 for(Integer i = 14; i < 20; i=i+1) begin
434 rule rl_connect_qspi0_to_plic;
436 if(qspi0.interrupts()[i-14]==1'b1) begin
437 ff_gateway_queue[i].enq(1);
438 plic.ifc_external_irq[i].irq_frm_gateway(True);
441 ff_gateway_queue[i].enq(0);
446 for(Integer i = 20; i<26; i=i+1) begin
447 rule rl_connect_qspi1_to_plic;
449 if(qspi1.interrupts()[i-20]==1'b1) begin
450 ff_gateway_queue[i].enq(1);
451 plic.ifc_external_irq[i].irq_frm_gateway(True);
454 ff_gateway_queue[i].enq(0);
460 SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset);
461 rule synchronize_the_uart0_interrupt;
462 uart0_interrupt.send(uart0.irq);
465 rule rl_connect_uart_to_plic;
467 if(uart0_interrupt.read==1'b1) begin
468 ff_gateway_queue[27].enq(1);
469 plic.ifc_external_irq[27].irq_frm_gateway(True);
473 ff_gateway_queue[27].enq(0);
477 for(Integer i = 28; i<`INTERRUPT_PINS; i=i+1) begin
478 rule rl_raise_interrupts;
479 if((i-28)<`IONum) begin //Peripheral interrupts
480 if(gpio.to_plic[i-28]==1'b1) begin
481 plic.ifc_external_irq[i].irq_frm_gateway(True);
482 ff_gateway_queue[i].enq(1);
488 rule rl_completion_msg_from_plic;
489 let id <- plic.intrpt_completion;
491 `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
494 for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
495 rule deq_gateway_queue;
496 if(interrupt_id==fromInteger(i)) begin
497 ff_gateway_queue[i].deq;
498 `ifdef $display($time,"Dequeing the Interrupt request for ID: %d",i); `endif
505 /*======================================================= */
507 /* ===== interface definition =======*/
508 interface axi_slave=bridge.axi_slave;
509 `ifdef PLIC method intrpt_note = plic.intrpt_note; `endif
511 method msip_int=clint.msip_int;
512 method mtip_int=clint.mtip_int;
513 method mtime=clint.mtime;
516 method i2c0_isint=i2c0.isint;
519 method i2c1_isint=i2c1.isint;
521 `ifdef QSPI0 method qspi0_isint=qspi0.interrupts[5]; `endif
522 `ifdef QSPI1 method qspi1_isint=qspi1.interrupts[5]; `endif
523 `ifdef UART0 method uart0_intr=uart0.irq; `endif
524 interface SP_ios slow_ios;
526 interface uart0_coe=uart0.coe_rs232;
529 interface uart1_coe=uart1.coe_rs232;
532 interface i2c0_out=i2c0.out;
535 interface i2c1_out=i2c1.out;
538 interface qspi0_out = qspi0.out;
541 interface qspi1_out = qspi1.out;
544 interface axiexp1_out=axiexp1.slave_out;
545 interface axiexp1_in=axiexp1.slave_in;
548 interface pwm_o = pwm_bus.pwm_io;
552 interface iocell_side=pinmux.iocell_side;
553 interface pad_configa= gpioa.pad_config;
554 method Action external_int(Bit#(32) in);
558 /*===================================*/