d609d34b465302d067df243d3e6665f41a91bf88
[pinmux.git] / src / bsv / peripheral_gen.py
1 class PBase(object):
2 pass
3
4 def axibase(self, name, ifacenum):
5 name = name.upper()
6 return "%(name)s%(ifacenum)dBase" % locals()
7
8 def axiend(self, name, ifacenum):
9 name = name.upper()
10 return "%(name)s%(ifacenum)dEnd" % locals()
11
12 def axi_reg_def(self, start, name, ifacenum):
13 name = name.upper()
14 offs = self.num_axi_regs32() * 4 * 16
15 end = start + offs - 1
16 bname = self.axibase(name, ifacenum)
17 bend = self.axiend(name, ifacenum)
18 comment = "%d 32-bit regs" % self.num_axi_regs32()
19 return (" `define%(bname)s 'h%(start)08X\n"
20 " `define%(bend)s 'h%(end)08X // %(comment)s" % locals(),
21 offs)
22
23 def axi_slave_idx(self, idx, name, ifacenum):
24 name = name.upper()
25 return ("typedef {0} {1}{2}_slave_num;".format(idx, name, ifacenum), 1)
26
27
28 class uart(PBase):
29 def importfn(self):
30 return " import Uart16550 :: *;"
31
32 def ifacedecl(self):
33 return " interface RS232_PHY_Ifc uart{0}_coe;\n" + \
34 " method Bit#(1) uart{0}_intr;"
35
36 def num_axi_regs32(self):
37 return 8
38
39
40 class rs232(PBase):
41 def importfn(self):
42 return " import Uart_bs::*;\n" + \
43 " import RS232_modified::*;"
44
45 def ifacedecl(self):
46 return " interface RS232 uart{0}_coe;"
47
48 def num_axi_regs32(self):
49 return 2
50
51
52 class twi(PBase):
53 def importfn(self):
54 return " import I2C_top :: *;"
55
56 def ifacedecl(self):
57 return " interface I2C_out i2c{0}_out;\n" + \
58 " method Bit#(1) i2c{0}_isint;"
59
60 def num_axi_regs32(self):
61 return 8
62
63
64 class qspi(PBase):
65 def importfn(self):
66 return " import qspi :: *;"
67
68 def ifacedecl(self):
69 return " interface QSPI_out qspi{0}_out;\n" + \
70 " method Bit#(1) qspi{0}_isint;"
71
72 def num_axi_regs32(self):
73 return 13
74
75
76 class pwm(PBase):
77 def importfn(self):
78 return " import pwm::*;"
79
80 def ifacedecl(self):
81 return " interface PWMIO pwm_o;"
82
83 def num_axi_regs32(self):
84 return 4
85
86
87 class gpio(PBase):
88 def importfn(self):
89 return " import pinmux::*;\n" + \
90 " import mux::*;\n" + \
91 " import gpio::*;\n"
92
93 def ifacedecl(self):
94 return " interface GPIO_config#({1}) pad_config{0};"
95
96 def num_axi_regs32(self):
97 return 2
98
99 def axi_slave_idx(self, idx, name, ifacenum):
100 """ generates AXI slave number definition, except
101 GPIO also has a muxer per bank
102 """
103 name = name.upper()
104 (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
105 (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
106 return ("%s\n%s" % (ret, ret2), 2)
107
108
109 axi_slave_declarations = """\
110 typedef 0 SlowMaster;
111 {0}
112 typedef TAdd#(LastGen_slave_num,`ifdef CLINT 1 `else 0 `endif )
113 CLINT_slave_num;
114 typedef TAdd#(CLINT_slave_num ,`ifdef PLIC 1 `else 0 `endif )
115 Plic_slave_num;
116 typedef TAdd#(Plic_slave_num ,`ifdef AXIEXP 1 `else 0 `endif )
117 AxiExp1_slave_num;
118 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
119 """
120
121
122 class PFactory(object):
123 def getcls(self, name):
124 return {'uart': uart,
125 'rs232': rs232,
126 'twi': twi,
127 'qspi': qspi,
128 'pwm': pwm,
129 'gpio': gpio
130 }.get(name, None)