src/compiler/glsl/builtin_int64.h

   1 ir_function_signature *
   2 umul64(void *mem_ctx, builtin_available_predicate avail)
   3 {
   4    ir_function_signature *const sig =
   5       new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
   6    ir_factory body(&sig->body, mem_ctx);
   7    sig->is_defined = true;
   8
   9    exec_list sig_parameters;
  10
  11    ir_variable *const r0001 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
  12    sig_parameters.push_tail(r0001);
  13    ir_variable *const r0002 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
  14    sig_parameters.push_tail(r0002);
  15    ir_variable *const r0003 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "result", ir_var_auto);
  16    body.emit(r0003);
  17    body.emit(assign(r0003, imul_high(swizzle_x(r0001), swizzle_x(r0002)), 0x02));
  18
  19    body.emit(assign(r0003, mul(swizzle_x(r0001), swizzle_x(r0002)), 0x01));
  20
  21    ir_expression *const r0004 = mul(swizzle_x(r0001), swizzle_y(r0002));
  22    ir_expression *const r0005 = mul(swizzle_y(r0001), swizzle_x(r0002));
  23    ir_expression *const r0006 = add(r0004, r0005);
  24    body.emit(assign(r0003, add(swizzle_y(r0003), r0006), 0x02));
  25
  26    body.emit(ret(r0003));
  27
  28    sig->replace_parameters(&sig_parameters);
  29    return sig;
  30 }
  31 ir_function_signature *
  32 sign64(void *mem_ctx, builtin_available_predicate avail)
  33 {
  34    ir_function_signature *const sig =
  35       new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
  36    ir_factory body(&sig->body, mem_ctx);
  37    sig->is_defined = true;
  38
  39    exec_list sig_parameters;
  40
  41    ir_variable *const r0007 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "a", ir_var_function_in);
  42    sig_parameters.push_tail(r0007);
  43    ir_variable *const r0008 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "result", ir_var_auto);
  44    body.emit(r0008);
  45    body.emit(assign(r0008, rshift(swizzle_y(r0007), body.constant(int(31))), 0x02));
  46
  47    ir_expression *const r0009 = bit_or(swizzle_x(r0007), swizzle_y(r0007));
  48    ir_expression *const r000A = nequal(r0009, body.constant(int(0)));
  49    ir_expression *const r000B = expr(ir_unop_b2i, r000A);
  50    body.emit(assign(r0008, bit_or(swizzle_y(r0008), r000B), 0x01));
  51
  52    body.emit(ret(r0008));
  53
  54    sig->replace_parameters(&sig_parameters);
  55    return sig;
  56 }
  57 ir_function_signature *
  58 udivmod64(void *mem_ctx, builtin_available_predicate avail)
  59 {
  60    ir_function_signature *const sig =
  61       new(mem_ctx) ir_function_signature(glsl_type::uvec4_type, avail);
  62    ir_factory body(&sig->body, mem_ctx);
  63    sig->is_defined = true;
  64
  65    exec_list sig_parameters;
  66
  67    ir_variable *const r000C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
  68    sig_parameters.push_tail(r000C);
  69    ir_variable *const r000D = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
  70    sig_parameters.push_tail(r000D);
  71    ir_variable *const r000E = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
  72    body.emit(r000E);
  73    ir_variable *const r000F = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
  74    body.emit(r000F);
  75    ir_variable *const r0010 = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
  76    body.emit(r0010);
  77    ir_variable *const r0011 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
  78    body.emit(r0011);
  79    body.emit(assign(r0011, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
  80
  81    ir_expression *const r0012 = expr(ir_unop_find_msb, swizzle_y(r000D));
  82    body.emit(assign(r0010, add(r0012, body.constant(int(32))), 0x01));
  83
  84    /* IF CONDITION */
  85    ir_expression *const r0014 = equal(swizzle_y(r000D), body.constant(0u));
  86    ir_expression *const r0015 = gequal(swizzle_y(r000C), swizzle_x(r000D));
  87    ir_expression *const r0016 = logic_and(r0014, r0015);
  88    ir_if *f0013 = new(mem_ctx) ir_if(operand(r0016).val);
  89    exec_list *const f0013_parent_instructions = body.instructions;
  90
  91       /* THEN INSTRUCTIONS */
  92       body.instructions = &f0013->then_instructions;
  93
  94       ir_variable *const r0017 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
  95       body.emit(r0017);
  96       ir_variable *const r0018 = body.make_temp(glsl_type::int_type, "findMSB_retval");
  97       body.emit(assign(r0018, expr(ir_unop_find_msb, swizzle_x(r000D)), 0x01));
  98
  99       body.emit(assign(r0010, r0018, 0x01));
 100
 101       body.emit(assign(r0017, body.constant(int(31)), 0x01));
 102
 103       /* LOOP BEGIN */
 104       ir_loop *f0019 = new(mem_ctx) ir_loop();
 105       exec_list *const f0019_parent_instructions = body.instructions;
 106
 107          body.instructions = &f0019->body_instructions;
 108
 109          /* IF CONDITION */
 110          ir_expression *const r001B = less(r0017, body.constant(int(1)));
 111          ir_if *f001A = new(mem_ctx) ir_if(operand(r001B).val);
 112          exec_list *const f001A_parent_instructions = body.instructions;
 113
 114             /* THEN INSTRUCTIONS */
 115             body.instructions = &f001A->then_instructions;
 116
 117             body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 118
 119
 120          body.instructions = f001A_parent_instructions;
 121          body.emit(f001A);
 122
 123          /* END IF */
 124
 125          /* IF CONDITION */
 126          ir_expression *const r001D = sub(body.constant(int(31)), r0017);
 127          ir_expression *const r001E = lequal(r0018, r001D);
 128          ir_expression *const r001F = lshift(swizzle_x(r000D), r0017);
 129          ir_expression *const r0020 = lequal(r001F, swizzle_y(r000C));
 130          ir_expression *const r0021 = logic_and(r001E, r0020);
 131          ir_if *f001C = new(mem_ctx) ir_if(operand(r0021).val);
 132          exec_list *const f001C_parent_instructions = body.instructions;
 133
 134             /* THEN INSTRUCTIONS */
 135             body.instructions = &f001C->then_instructions;
 136
 137             ir_expression *const r0022 = lshift(swizzle_x(r000D), r0017);
 138             body.emit(assign(r000C, sub(swizzle_y(r000C), r0022), 0x02));
 139
 140             ir_expression *const r0023 = lshift(body.constant(1u), r0017);
 141             body.emit(assign(r0011, bit_or(swizzle_y(r0011), r0023), 0x02));
 142
 143
 144          body.instructions = f001C_parent_instructions;
 145          body.emit(f001C);
 146
 147          /* END IF */
 148
 149          body.emit(assign(r0017, add(r0017, body.constant(int(-1))), 0x01));
 150
 151       /* LOOP END */
 152
 153       body.instructions = f0019_parent_instructions;
 154       body.emit(f0019);
 155
 156       /* IF CONDITION */
 157       ir_expression *const r0025 = lequal(swizzle_x(r000D), swizzle_y(r000C));
 158       ir_if *f0024 = new(mem_ctx) ir_if(operand(r0025).val);
 159       exec_list *const f0024_parent_instructions = body.instructions;
 160
 161          /* THEN INSTRUCTIONS */
 162          body.instructions = &f0024->then_instructions;
 163
 164          body.emit(assign(r000C, sub(swizzle_y(r000C), swizzle_x(r000D)), 0x02));
 165
 166          body.emit(assign(r0011, bit_or(swizzle_y(r0011), body.constant(1u)), 0x02));
 167
 168
 169       body.instructions = f0024_parent_instructions;
 170       body.emit(f0024);
 171
 172       /* END IF */
 173
 174
 175    body.instructions = f0013_parent_instructions;
 176    body.emit(f0013);
 177
 178    /* END IF */
 179
 180    ir_variable *const r0026 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
 181    body.emit(assign(r0026, expr(ir_unop_pack_uint_2x32, r000D), 0x01));
 182
 183    body.emit(assign(r000F, expr(ir_unop_pack_uint_2x32, r000C), 0x01));
 184
 185    body.emit(assign(r000E, body.constant(int(31)), 0x01));
 186
 187    /* LOOP BEGIN */
 188    ir_loop *f0027 = new(mem_ctx) ir_loop();
 189    exec_list *const f0027_parent_instructions = body.instructions;
 190
 191       body.instructions = &f0027->body_instructions;
 192
 193       /* IF CONDITION */
 194       ir_expression *const r0029 = less(r000E, body.constant(int(1)));
 195       ir_if *f0028 = new(mem_ctx) ir_if(operand(r0029).val);
 196       exec_list *const f0028_parent_instructions = body.instructions;
 197
 198          /* THEN INSTRUCTIONS */
 199          body.instructions = &f0028->then_instructions;
 200
 201          body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 202
 203
 204       body.instructions = f0028_parent_instructions;
 205       body.emit(f0028);
 206
 207       /* END IF */
 208
 209       /* IF CONDITION */
 210       ir_expression *const r002B = sub(body.constant(int(63)), r000E);
 211       ir_expression *const r002C = lequal(r0010, r002B);
 212       ir_expression *const r002D = lshift(r0026, r000E);
 213       ir_expression *const r002E = lequal(r002D, r000F);
 214       ir_expression *const r002F = logic_and(r002C, r002E);
 215       ir_if *f002A = new(mem_ctx) ir_if(operand(r002F).val);
 216       exec_list *const f002A_parent_instructions = body.instructions;
 217
 218          /* THEN INSTRUCTIONS */
 219          body.instructions = &f002A->then_instructions;
 220
 221          ir_expression *const r0030 = lshift(r0026, r000E);
 222          body.emit(assign(r000F, sub(r000F, r0030), 0x01));
 223
 224          ir_expression *const r0031 = lshift(body.constant(1u), r000E);
 225          body.emit(assign(r0011, bit_or(swizzle_x(r0011), r0031), 0x01));
 226
 227
 228       body.instructions = f002A_parent_instructions;
 229       body.emit(f002A);
 230
 231       /* END IF */
 232
 233       body.emit(assign(r000E, add(r000E, body.constant(int(-1))), 0x01));
 234
 235    /* LOOP END */
 236
 237    body.instructions = f0027_parent_instructions;
 238    body.emit(f0027);
 239
 240    /* IF CONDITION */
 241    ir_expression *const r0033 = lequal(r0026, r000F);
 242    ir_if *f0032 = new(mem_ctx) ir_if(operand(r0033).val);
 243    exec_list *const f0032_parent_instructions = body.instructions;
 244
 245       /* THEN INSTRUCTIONS */
 246       body.instructions = &f0032->then_instructions;
 247
 248       body.emit(assign(r000F, sub(r000F, r0026), 0x01));
 249
 250       body.emit(assign(r0011, bit_or(swizzle_x(r0011), body.constant(1u)), 0x01));
 251
 252
 253    body.instructions = f0032_parent_instructions;
 254    body.emit(f0032);
 255
 256    /* END IF */
 257
 258    ir_variable *const r0034 = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
 259    body.emit(assign(r0034, r0011, 0x03));
 260
 261    body.emit(assign(r0034, expr(ir_unop_unpack_uint_2x32, r000F), 0x0c));
 262
 263    body.emit(ret(r0034));
 264
 265    sig->replace_parameters(&sig_parameters);
 266    return sig;
 267 }
 268 ir_function_signature *
 269 udiv64(void *mem_ctx, builtin_available_predicate avail)
 270 {
 271    ir_function_signature *const sig =
 272       new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
 273    ir_factory body(&sig->body, mem_ctx);
 274    sig->is_defined = true;
 275
 276    exec_list sig_parameters;
 277
 278    ir_variable *const r0035 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
 279    sig_parameters.push_tail(r0035);
 280    ir_variable *const r0036 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
 281    sig_parameters.push_tail(r0036);
 282    ir_variable *const r0037 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_auto);
 283    body.emit(r0037);
 284    body.emit(assign(r0037, r0035, 0x03));
 285
 286    ir_variable *const r0038 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 287    body.emit(r0038);
 288    ir_variable *const r0039 = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
 289    body.emit(r0039);
 290    ir_variable *const r003A = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
 291    body.emit(r003A);
 292    ir_variable *const r003B = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
 293    body.emit(r003B);
 294    body.emit(assign(r003B, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
 295
 296    ir_expression *const r003C = expr(ir_unop_find_msb, swizzle_y(r0036));
 297    body.emit(assign(r003A, add(r003C, body.constant(int(32))), 0x01));
 298
 299    /* IF CONDITION */
 300    ir_expression *const r003E = equal(swizzle_y(r0036), body.constant(0u));
 301    ir_expression *const r003F = gequal(swizzle_y(r0035), swizzle_x(r0036));
 302    ir_expression *const r0040 = logic_and(r003E, r003F);
 303    ir_if *f003D = new(mem_ctx) ir_if(operand(r0040).val);
 304    exec_list *const f003D_parent_instructions = body.instructions;
 305
 306       /* THEN INSTRUCTIONS */
 307       body.instructions = &f003D->then_instructions;
 308
 309       ir_variable *const r0041 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 310       body.emit(r0041);
 311       ir_variable *const r0042 = body.make_temp(glsl_type::int_type, "findMSB_retval");
 312       body.emit(assign(r0042, expr(ir_unop_find_msb, swizzle_x(r0036)), 0x01));
 313
 314       body.emit(assign(r003A, r0042, 0x01));
 315
 316       body.emit(assign(r0041, body.constant(int(31)), 0x01));
 317
 318       /* LOOP BEGIN */
 319       ir_loop *f0043 = new(mem_ctx) ir_loop();
 320       exec_list *const f0043_parent_instructions = body.instructions;
 321
 322          body.instructions = &f0043->body_instructions;
 323
 324          /* IF CONDITION */
 325          ir_expression *const r0045 = less(r0041, body.constant(int(1)));
 326          ir_if *f0044 = new(mem_ctx) ir_if(operand(r0045).val);
 327          exec_list *const f0044_parent_instructions = body.instructions;
 328
 329             /* THEN INSTRUCTIONS */
 330             body.instructions = &f0044->then_instructions;
 331
 332             body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 333
 334
 335          body.instructions = f0044_parent_instructions;
 336          body.emit(f0044);
 337
 338          /* END IF */
 339
 340          /* IF CONDITION */
 341          ir_expression *const r0047 = sub(body.constant(int(31)), r0041);
 342          ir_expression *const r0048 = lequal(r0042, r0047);
 343          ir_expression *const r0049 = lshift(swizzle_x(r0036), r0041);
 344          ir_expression *const r004A = lequal(r0049, swizzle_y(r0037));
 345          ir_expression *const r004B = logic_and(r0048, r004A);
 346          ir_if *f0046 = new(mem_ctx) ir_if(operand(r004B).val);
 347          exec_list *const f0046_parent_instructions = body.instructions;
 348
 349             /* THEN INSTRUCTIONS */
 350             body.instructions = &f0046->then_instructions;
 351
 352             ir_expression *const r004C = lshift(swizzle_x(r0036), r0041);
 353             body.emit(assign(r0037, sub(swizzle_y(r0037), r004C), 0x02));
 354
 355             ir_expression *const r004D = lshift(body.constant(1u), r0041);
 356             body.emit(assign(r003B, bit_or(swizzle_y(r003B), r004D), 0x02));
 357
 358
 359          body.instructions = f0046_parent_instructions;
 360          body.emit(f0046);
 361
 362          /* END IF */
 363
 364          body.emit(assign(r0041, add(r0041, body.constant(int(-1))), 0x01));
 365
 366       /* LOOP END */
 367
 368       body.instructions = f0043_parent_instructions;
 369       body.emit(f0043);
 370
 371       /* IF CONDITION */
 372       ir_expression *const r004F = lequal(swizzle_x(r0036), swizzle_y(r0037));
 373       ir_if *f004E = new(mem_ctx) ir_if(operand(r004F).val);
 374       exec_list *const f004E_parent_instructions = body.instructions;
 375
 376          /* THEN INSTRUCTIONS */
 377          body.instructions = &f004E->then_instructions;
 378
 379          body.emit(assign(r0037, sub(swizzle_y(r0037), swizzle_x(r0036)), 0x02));
 380
 381          body.emit(assign(r003B, bit_or(swizzle_y(r003B), body.constant(1u)), 0x02));
 382
 383
 384       body.instructions = f004E_parent_instructions;
 385       body.emit(f004E);
 386
 387       /* END IF */
 388
 389
 390    body.instructions = f003D_parent_instructions;
 391    body.emit(f003D);
 392
 393    /* END IF */
 394
 395    ir_variable *const r0050 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
 396    body.emit(assign(r0050, expr(ir_unop_pack_uint_2x32, r0036), 0x01));
 397
 398    body.emit(assign(r0039, expr(ir_unop_pack_uint_2x32, r0037), 0x01));
 399
 400    body.emit(assign(r0038, body.constant(int(31)), 0x01));
 401
 402    /* LOOP BEGIN */
 403    ir_loop *f0051 = new(mem_ctx) ir_loop();
 404    exec_list *const f0051_parent_instructions = body.instructions;
 405
 406       body.instructions = &f0051->body_instructions;
 407
 408       /* IF CONDITION */
 409       ir_expression *const r0053 = less(r0038, body.constant(int(1)));
 410       ir_if *f0052 = new(mem_ctx) ir_if(operand(r0053).val);
 411       exec_list *const f0052_parent_instructions = body.instructions;
 412
 413          /* THEN INSTRUCTIONS */
 414          body.instructions = &f0052->then_instructions;
 415
 416          body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 417
 418
 419       body.instructions = f0052_parent_instructions;
 420       body.emit(f0052);
 421
 422       /* END IF */
 423
 424       /* IF CONDITION */
 425       ir_expression *const r0055 = sub(body.constant(int(63)), r0038);
 426       ir_expression *const r0056 = lequal(r003A, r0055);
 427       ir_expression *const r0057 = lshift(r0050, r0038);
 428       ir_expression *const r0058 = lequal(r0057, r0039);
 429       ir_expression *const r0059 = logic_and(r0056, r0058);
 430       ir_if *f0054 = new(mem_ctx) ir_if(operand(r0059).val);
 431       exec_list *const f0054_parent_instructions = body.instructions;
 432
 433          /* THEN INSTRUCTIONS */
 434          body.instructions = &f0054->then_instructions;
 435
 436          ir_expression *const r005A = lshift(r0050, r0038);
 437          body.emit(assign(r0039, sub(r0039, r005A), 0x01));
 438
 439          ir_expression *const r005B = lshift(body.constant(1u), r0038);
 440          body.emit(assign(r003B, bit_or(swizzle_x(r003B), r005B), 0x01));
 441
 442
 443       body.instructions = f0054_parent_instructions;
 444       body.emit(f0054);
 445
 446       /* END IF */
 447
 448       body.emit(assign(r0038, add(r0038, body.constant(int(-1))), 0x01));
 449
 450    /* LOOP END */
 451
 452    body.instructions = f0051_parent_instructions;
 453    body.emit(f0051);
 454
 455    /* IF CONDITION */
 456    ir_expression *const r005D = lequal(r0050, r0039);
 457    ir_if *f005C = new(mem_ctx) ir_if(operand(r005D).val);
 458    exec_list *const f005C_parent_instructions = body.instructions;
 459
 460       /* THEN INSTRUCTIONS */
 461       body.instructions = &f005C->then_instructions;
 462
 463       body.emit(assign(r0039, sub(r0039, r0050), 0x01));
 464
 465       body.emit(assign(r003B, bit_or(swizzle_x(r003B), body.constant(1u)), 0x01));
 466
 467
 468    body.instructions = f005C_parent_instructions;
 469    body.emit(f005C);
 470
 471    /* END IF */
 472
 473    body.emit(ret(r003B));
 474
 475    sig->replace_parameters(&sig_parameters);
 476    return sig;
 477 }
 478 ir_function_signature *
 479 idiv64(void *mem_ctx, builtin_available_predicate avail)
 480 {
 481    ir_function_signature *const sig =
 482       new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
 483    ir_factory body(&sig->body, mem_ctx);
 484    sig->is_defined = true;
 485
 486    exec_list sig_parameters;
 487
 488    ir_variable *const r005E = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_n", ir_var_function_in);
 489    sig_parameters.push_tail(r005E);
 490    ir_variable *const r005F = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_d", ir_var_function_in);
 491    sig_parameters.push_tail(r005F);
 492    ir_variable *const r0060 = new(mem_ctx) ir_variable(glsl_type::bool_type, "negate", ir_var_auto);
 493    body.emit(r0060);
 494    ir_expression *const r0061 = less(swizzle_y(r005E), body.constant(int(0)));
 495    ir_expression *const r0062 = less(swizzle_y(r005F), body.constant(int(0)));
 496    body.emit(assign(r0060, nequal(r0061, r0062), 0x01));
 497
 498    ir_variable *const r0063 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_auto);
 499    body.emit(r0063);
 500    ir_expression *const r0064 = expr(ir_unop_pack_int_2x32, r005E);
 501    ir_expression *const r0065 = expr(ir_unop_abs, r0064);
 502    ir_expression *const r0066 = expr(ir_unop_i642u64, r0065);
 503    body.emit(assign(r0063, expr(ir_unop_unpack_uint_2x32, r0066), 0x03));
 504
 505    ir_variable *const r0067 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_auto);
 506    body.emit(r0067);
 507    ir_expression *const r0068 = expr(ir_unop_pack_int_2x32, r005F);
 508    ir_expression *const r0069 = expr(ir_unop_abs, r0068);
 509    ir_expression *const r006A = expr(ir_unop_i642u64, r0069);
 510    body.emit(assign(r0067, expr(ir_unop_unpack_uint_2x32, r006A), 0x03));
 511
 512    ir_variable *const r006B = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 513    body.emit(r006B);
 514    ir_variable *const r006C = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
 515    body.emit(r006C);
 516    ir_variable *const r006D = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
 517    body.emit(r006D);
 518    ir_variable *const r006E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
 519    body.emit(r006E);
 520    body.emit(assign(r006E, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
 521
 522    ir_expression *const r006F = expr(ir_unop_find_msb, swizzle_y(r0067));
 523    body.emit(assign(r006D, add(r006F, body.constant(int(32))), 0x01));
 524
 525    /* IF CONDITION */
 526    ir_expression *const r0071 = equal(swizzle_y(r0067), body.constant(0u));
 527    ir_expression *const r0072 = gequal(swizzle_y(r0063), swizzle_x(r0067));
 528    ir_expression *const r0073 = logic_and(r0071, r0072);
 529    ir_if *f0070 = new(mem_ctx) ir_if(operand(r0073).val);
 530    exec_list *const f0070_parent_instructions = body.instructions;
 531
 532       /* THEN INSTRUCTIONS */
 533       body.instructions = &f0070->then_instructions;
 534
 535       ir_variable *const r0074 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 536       body.emit(r0074);
 537       ir_variable *const r0075 = body.make_temp(glsl_type::int_type, "findMSB_retval");
 538       body.emit(assign(r0075, expr(ir_unop_find_msb, swizzle_x(r0067)), 0x01));
 539
 540       body.emit(assign(r006D, r0075, 0x01));
 541
 542       body.emit(assign(r0074, body.constant(int(31)), 0x01));
 543
 544       /* LOOP BEGIN */
 545       ir_loop *f0076 = new(mem_ctx) ir_loop();
 546       exec_list *const f0076_parent_instructions = body.instructions;
 547
 548          body.instructions = &f0076->body_instructions;
 549
 550          /* IF CONDITION */
 551          ir_expression *const r0078 = less(r0074, body.constant(int(1)));
 552          ir_if *f0077 = new(mem_ctx) ir_if(operand(r0078).val);
 553          exec_list *const f0077_parent_instructions = body.instructions;
 554
 555             /* THEN INSTRUCTIONS */
 556             body.instructions = &f0077->then_instructions;
 557
 558             body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 559
 560
 561          body.instructions = f0077_parent_instructions;
 562          body.emit(f0077);
 563
 564          /* END IF */
 565
 566          /* IF CONDITION */
 567          ir_expression *const r007A = sub(body.constant(int(31)), r0074);
 568          ir_expression *const r007B = lequal(r0075, r007A);
 569          ir_expression *const r007C = lshift(swizzle_x(r0067), r0074);
 570          ir_expression *const r007D = lequal(r007C, swizzle_y(r0063));
 571          ir_expression *const r007E = logic_and(r007B, r007D);
 572          ir_if *f0079 = new(mem_ctx) ir_if(operand(r007E).val);
 573          exec_list *const f0079_parent_instructions = body.instructions;
 574
 575             /* THEN INSTRUCTIONS */
 576             body.instructions = &f0079->then_instructions;
 577
 578             ir_expression *const r007F = lshift(swizzle_x(r0067), r0074);
 579             body.emit(assign(r0063, sub(swizzle_y(r0063), r007F), 0x02));
 580
 581             ir_expression *const r0080 = lshift(body.constant(1u), r0074);
 582             body.emit(assign(r006E, bit_or(swizzle_y(r006E), r0080), 0x02));
 583
 584
 585          body.instructions = f0079_parent_instructions;
 586          body.emit(f0079);
 587
 588          /* END IF */
 589
 590          body.emit(assign(r0074, add(r0074, body.constant(int(-1))), 0x01));
 591
 592       /* LOOP END */
 593
 594       body.instructions = f0076_parent_instructions;
 595       body.emit(f0076);
 596
 597       /* IF CONDITION */
 598       ir_expression *const r0082 = lequal(swizzle_x(r0067), swizzle_y(r0063));
 599       ir_if *f0081 = new(mem_ctx) ir_if(operand(r0082).val);
 600       exec_list *const f0081_parent_instructions = body.instructions;
 601
 602          /* THEN INSTRUCTIONS */
 603          body.instructions = &f0081->then_instructions;
 604
 605          body.emit(assign(r0063, sub(swizzle_y(r0063), swizzle_x(r0067)), 0x02));
 606
 607          body.emit(assign(r006E, bit_or(swizzle_y(r006E), body.constant(1u)), 0x02));
 608
 609
 610       body.instructions = f0081_parent_instructions;
 611       body.emit(f0081);
 612
 613       /* END IF */
 614
 615
 616    body.instructions = f0070_parent_instructions;
 617    body.emit(f0070);
 618
 619    /* END IF */
 620
 621    ir_variable *const r0083 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
 622    body.emit(assign(r0083, expr(ir_unop_pack_uint_2x32, r0067), 0x01));
 623
 624    body.emit(assign(r006C, expr(ir_unop_pack_uint_2x32, r0063), 0x01));
 625
 626    body.emit(assign(r006B, body.constant(int(31)), 0x01));
 627
 628    /* LOOP BEGIN */
 629    ir_loop *f0084 = new(mem_ctx) ir_loop();
 630    exec_list *const f0084_parent_instructions = body.instructions;
 631
 632       body.instructions = &f0084->body_instructions;
 633
 634       /* IF CONDITION */
 635       ir_expression *const r0086 = less(r006B, body.constant(int(1)));
 636       ir_if *f0085 = new(mem_ctx) ir_if(operand(r0086).val);
 637       exec_list *const f0085_parent_instructions = body.instructions;
 638
 639          /* THEN INSTRUCTIONS */
 640          body.instructions = &f0085->then_instructions;
 641
 642          body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 643
 644
 645       body.instructions = f0085_parent_instructions;
 646       body.emit(f0085);
 647
 648       /* END IF */
 649
 650       /* IF CONDITION */
 651       ir_expression *const r0088 = sub(body.constant(int(63)), r006B);
 652       ir_expression *const r0089 = lequal(r006D, r0088);
 653       ir_expression *const r008A = lshift(r0083, r006B);
 654       ir_expression *const r008B = lequal(r008A, r006C);
 655       ir_expression *const r008C = logic_and(r0089, r008B);
 656       ir_if *f0087 = new(mem_ctx) ir_if(operand(r008C).val);
 657       exec_list *const f0087_parent_instructions = body.instructions;
 658
 659          /* THEN INSTRUCTIONS */
 660          body.instructions = &f0087->then_instructions;
 661
 662          ir_expression *const r008D = lshift(r0083, r006B);
 663          body.emit(assign(r006C, sub(r006C, r008D), 0x01));
 664
 665          ir_expression *const r008E = lshift(body.constant(1u), r006B);
 666          body.emit(assign(r006E, bit_or(swizzle_x(r006E), r008E), 0x01));
 667
 668
 669       body.instructions = f0087_parent_instructions;
 670       body.emit(f0087);
 671
 672       /* END IF */
 673
 674       body.emit(assign(r006B, add(r006B, body.constant(int(-1))), 0x01));
 675
 676    /* LOOP END */
 677
 678    body.instructions = f0084_parent_instructions;
 679    body.emit(f0084);
 680
 681    /* IF CONDITION */
 682    ir_expression *const r0090 = lequal(r0083, r006C);
 683    ir_if *f008F = new(mem_ctx) ir_if(operand(r0090).val);
 684    exec_list *const f008F_parent_instructions = body.instructions;
 685
 686       /* THEN INSTRUCTIONS */
 687       body.instructions = &f008F->then_instructions;
 688
 689       body.emit(assign(r006C, sub(r006C, r0083), 0x01));
 690
 691       body.emit(assign(r006E, bit_or(swizzle_x(r006E), body.constant(1u)), 0x01));
 692
 693
 694    body.instructions = f008F_parent_instructions;
 695    body.emit(f008F);
 696
 697    /* END IF */
 698
 699    ir_variable *const r0091 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp");
 700    /* IF CONDITION */
 701    ir_if *f0092 = new(mem_ctx) ir_if(operand(r0060).val);
 702    exec_list *const f0092_parent_instructions = body.instructions;
 703
 704       /* THEN INSTRUCTIONS */
 705       body.instructions = &f0092->then_instructions;
 706
 707       ir_expression *const r0093 = expr(ir_unop_pack_uint_2x32, r006E);
 708       ir_expression *const r0094 = expr(ir_unop_u642i64, r0093);
 709       ir_expression *const r0095 = neg(r0094);
 710       body.emit(assign(r0091, expr(ir_unop_unpack_int_2x32, r0095), 0x03));
 711
 712
 713       /* ELSE INSTRUCTIONS */
 714       body.instructions = &f0092->else_instructions;
 715
 716       body.emit(assign(r0091, expr(ir_unop_u2i, r006E), 0x03));
 717
 718
 719    body.instructions = f0092_parent_instructions;
 720    body.emit(f0092);
 721
 722    /* END IF */
 723
 724    body.emit(ret(r0091));
 725
 726    sig->replace_parameters(&sig_parameters);
 727    return sig;
 728 }
 729 ir_function_signature *
 730 umod64(void *mem_ctx, builtin_available_predicate avail)
 731 {
 732    ir_function_signature *const sig =
 733       new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
 734    ir_factory body(&sig->body, mem_ctx);
 735    sig->is_defined = true;
 736
 737    exec_list sig_parameters;
 738
 739    ir_variable *const r0096 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_function_in);
 740    sig_parameters.push_tail(r0096);
 741    ir_variable *const r0097 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_function_in);
 742    sig_parameters.push_tail(r0097);
 743    ir_variable *const r0098 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_auto);
 744    body.emit(r0098);
 745    body.emit(assign(r0098, r0096, 0x03));
 746
 747    ir_variable *const r0099 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 748    body.emit(r0099);
 749    ir_variable *const r009A = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
 750    body.emit(r009A);
 751    ir_variable *const r009B = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
 752    body.emit(r009B);
 753    ir_variable *const r009C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
 754    body.emit(r009C);
 755    body.emit(assign(r009C, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
 756
 757    ir_expression *const r009D = expr(ir_unop_find_msb, swizzle_y(r0097));
 758    body.emit(assign(r009B, add(r009D, body.constant(int(32))), 0x01));
 759
 760    /* IF CONDITION */
 761    ir_expression *const r009F = equal(swizzle_y(r0097), body.constant(0u));
 762    ir_expression *const r00A0 = gequal(swizzle_y(r0096), swizzle_x(r0097));
 763    ir_expression *const r00A1 = logic_and(r009F, r00A0);
 764    ir_if *f009E = new(mem_ctx) ir_if(operand(r00A1).val);
 765    exec_list *const f009E_parent_instructions = body.instructions;
 766
 767       /* THEN INSTRUCTIONS */
 768       body.instructions = &f009E->then_instructions;
 769
 770       ir_variable *const r00A2 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 771       body.emit(r00A2);
 772       ir_variable *const r00A3 = body.make_temp(glsl_type::int_type, "findMSB_retval");
 773       body.emit(assign(r00A3, expr(ir_unop_find_msb, swizzle_x(r0097)), 0x01));
 774
 775       body.emit(assign(r009B, r00A3, 0x01));
 776
 777       body.emit(assign(r00A2, body.constant(int(31)), 0x01));
 778
 779       /* LOOP BEGIN */
 780       ir_loop *f00A4 = new(mem_ctx) ir_loop();
 781       exec_list *const f00A4_parent_instructions = body.instructions;
 782
 783          body.instructions = &f00A4->body_instructions;
 784
 785          /* IF CONDITION */
 786          ir_expression *const r00A6 = less(r00A2, body.constant(int(1)));
 787          ir_if *f00A5 = new(mem_ctx) ir_if(operand(r00A6).val);
 788          exec_list *const f00A5_parent_instructions = body.instructions;
 789
 790             /* THEN INSTRUCTIONS */
 791             body.instructions = &f00A5->then_instructions;
 792
 793             body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 794
 795
 796          body.instructions = f00A5_parent_instructions;
 797          body.emit(f00A5);
 798
 799          /* END IF */
 800
 801          /* IF CONDITION */
 802          ir_expression *const r00A8 = sub(body.constant(int(31)), r00A2);
 803          ir_expression *const r00A9 = lequal(r00A3, r00A8);
 804          ir_expression *const r00AA = lshift(swizzle_x(r0097), r00A2);
 805          ir_expression *const r00AB = lequal(r00AA, swizzle_y(r0098));
 806          ir_expression *const r00AC = logic_and(r00A9, r00AB);
 807          ir_if *f00A7 = new(mem_ctx) ir_if(operand(r00AC).val);
 808          exec_list *const f00A7_parent_instructions = body.instructions;
 809
 810             /* THEN INSTRUCTIONS */
 811             body.instructions = &f00A7->then_instructions;
 812
 813             ir_expression *const r00AD = lshift(swizzle_x(r0097), r00A2);
 814             body.emit(assign(r0098, sub(swizzle_y(r0098), r00AD), 0x02));
 815
 816             ir_expression *const r00AE = lshift(body.constant(1u), r00A2);
 817             body.emit(assign(r009C, bit_or(swizzle_y(r009C), r00AE), 0x02));
 818
 819
 820          body.instructions = f00A7_parent_instructions;
 821          body.emit(f00A7);
 822
 823          /* END IF */
 824
 825          body.emit(assign(r00A2, add(r00A2, body.constant(int(-1))), 0x01));
 826
 827       /* LOOP END */
 828
 829       body.instructions = f00A4_parent_instructions;
 830       body.emit(f00A4);
 831
 832       /* IF CONDITION */
 833       ir_expression *const r00B0 = lequal(swizzle_x(r0097), swizzle_y(r0098));
 834       ir_if *f00AF = new(mem_ctx) ir_if(operand(r00B0).val);
 835       exec_list *const f00AF_parent_instructions = body.instructions;
 836
 837          /* THEN INSTRUCTIONS */
 838          body.instructions = &f00AF->then_instructions;
 839
 840          body.emit(assign(r0098, sub(swizzle_y(r0098), swizzle_x(r0097)), 0x02));
 841
 842          body.emit(assign(r009C, bit_or(swizzle_y(r009C), body.constant(1u)), 0x02));
 843
 844
 845       body.instructions = f00AF_parent_instructions;
 846       body.emit(f00AF);
 847
 848       /* END IF */
 849
 850
 851    body.instructions = f009E_parent_instructions;
 852    body.emit(f009E);
 853
 854    /* END IF */
 855
 856    ir_variable *const r00B1 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
 857    body.emit(assign(r00B1, expr(ir_unop_pack_uint_2x32, r0097), 0x01));
 858
 859    body.emit(assign(r009A, expr(ir_unop_pack_uint_2x32, r0098), 0x01));
 860
 861    body.emit(assign(r0099, body.constant(int(31)), 0x01));
 862
 863    /* LOOP BEGIN */
 864    ir_loop *f00B2 = new(mem_ctx) ir_loop();
 865    exec_list *const f00B2_parent_instructions = body.instructions;
 866
 867       body.instructions = &f00B2->body_instructions;
 868
 869       /* IF CONDITION */
 870       ir_expression *const r00B4 = less(r0099, body.constant(int(1)));
 871       ir_if *f00B3 = new(mem_ctx) ir_if(operand(r00B4).val);
 872       exec_list *const f00B3_parent_instructions = body.instructions;
 873
 874          /* THEN INSTRUCTIONS */
 875          body.instructions = &f00B3->then_instructions;
 876
 877          body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
 878
 879
 880       body.instructions = f00B3_parent_instructions;
 881       body.emit(f00B3);
 882
 883       /* END IF */
 884
 885       /* IF CONDITION */
 886       ir_expression *const r00B6 = sub(body.constant(int(63)), r0099);
 887       ir_expression *const r00B7 = lequal(r009B, r00B6);
 888       ir_expression *const r00B8 = lshift(r00B1, r0099);
 889       ir_expression *const r00B9 = lequal(r00B8, r009A);
 890       ir_expression *const r00BA = logic_and(r00B7, r00B9);
 891       ir_if *f00B5 = new(mem_ctx) ir_if(operand(r00BA).val);
 892       exec_list *const f00B5_parent_instructions = body.instructions;
 893
 894          /* THEN INSTRUCTIONS */
 895          body.instructions = &f00B5->then_instructions;
 896
 897          ir_expression *const r00BB = lshift(r00B1, r0099);
 898          body.emit(assign(r009A, sub(r009A, r00BB), 0x01));
 899
 900          ir_expression *const r00BC = lshift(body.constant(1u), r0099);
 901          body.emit(assign(r009C, bit_or(swizzle_x(r009C), r00BC), 0x01));
 902
 903
 904       body.instructions = f00B5_parent_instructions;
 905       body.emit(f00B5);
 906
 907       /* END IF */
 908
 909       body.emit(assign(r0099, add(r0099, body.constant(int(-1))), 0x01));
 910
 911    /* LOOP END */
 912
 913    body.instructions = f00B2_parent_instructions;
 914    body.emit(f00B2);
 915
 916    /* IF CONDITION */
 917    ir_expression *const r00BE = lequal(r00B1, r009A);
 918    ir_if *f00BD = new(mem_ctx) ir_if(operand(r00BE).val);
 919    exec_list *const f00BD_parent_instructions = body.instructions;
 920
 921       /* THEN INSTRUCTIONS */
 922       body.instructions = &f00BD->then_instructions;
 923
 924       body.emit(assign(r009A, sub(r009A, r00B1), 0x01));
 925
 926       body.emit(assign(r009C, bit_or(swizzle_x(r009C), body.constant(1u)), 0x01));
 927
 928
 929    body.instructions = f00BD_parent_instructions;
 930    body.emit(f00BD);
 931
 932    /* END IF */
 933
 934    ir_variable *const r00BF = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
 935    body.emit(assign(r00BF, r009C, 0x03));
 936
 937    body.emit(assign(r00BF, expr(ir_unop_unpack_uint_2x32, r009A), 0x0c));
 938
 939    ir_swizzle *const r00C0 = swizzle(r00BF, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_X, SWIZZLE_X), 2);
 940    body.emit(ret(r00C0));
 941
 942    sig->replace_parameters(&sig_parameters);
 943    return sig;
 944 }
 945 ir_function_signature *
 946 imod64(void *mem_ctx, builtin_available_predicate avail)
 947 {
 948    ir_function_signature *const sig =
 949       new(mem_ctx) ir_function_signature(glsl_type::ivec2_type, avail);
 950    ir_factory body(&sig->body, mem_ctx);
 951    sig->is_defined = true;
 952
 953    exec_list sig_parameters;
 954
 955    ir_variable *const r00C1 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_n", ir_var_function_in);
 956    sig_parameters.push_tail(r00C1);
 957    ir_variable *const r00C2 = new(mem_ctx) ir_variable(glsl_type::ivec2_type, "_d", ir_var_function_in);
 958    sig_parameters.push_tail(r00C2);
 959    ir_variable *const r00C3 = new(mem_ctx) ir_variable(glsl_type::bool_type, "negate", ir_var_auto);
 960    body.emit(r00C3);
 961    ir_expression *const r00C4 = less(swizzle_y(r00C1), body.constant(int(0)));
 962    ir_expression *const r00C5 = less(swizzle_y(r00C2), body.constant(int(0)));
 963    body.emit(assign(r00C3, nequal(r00C4, r00C5), 0x01));
 964
 965    ir_variable *const r00C6 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "n", ir_var_auto);
 966    body.emit(r00C6);
 967    ir_expression *const r00C7 = expr(ir_unop_pack_int_2x32, r00C1);
 968    ir_expression *const r00C8 = expr(ir_unop_abs, r00C7);
 969    ir_expression *const r00C9 = expr(ir_unop_i642u64, r00C8);
 970    body.emit(assign(r00C6, expr(ir_unop_unpack_uint_2x32, r00C9), 0x03));
 971
 972    ir_variable *const r00CA = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "d", ir_var_auto);
 973    body.emit(r00CA);
 974    ir_expression *const r00CB = expr(ir_unop_pack_int_2x32, r00C2);
 975    ir_expression *const r00CC = expr(ir_unop_abs, r00CB);
 976    ir_expression *const r00CD = expr(ir_unop_i642u64, r00CC);
 977    body.emit(assign(r00CA, expr(ir_unop_unpack_uint_2x32, r00CD), 0x03));
 978
 979    ir_variable *const r00CE = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
 980    body.emit(r00CE);
 981    ir_variable *const r00CF = new(mem_ctx) ir_variable(glsl_type::uint64_t_type, "n64", ir_var_auto);
 982    body.emit(r00CF);
 983    ir_variable *const r00D0 = new(mem_ctx) ir_variable(glsl_type::int_type, "log2_denom", ir_var_auto);
 984    body.emit(r00D0);
 985    ir_variable *const r00D1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "quot", ir_var_auto);
 986    body.emit(r00D1);
 987    body.emit(assign(r00D1, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03));
 988
 989    ir_expression *const r00D2 = expr(ir_unop_find_msb, swizzle_y(r00CA));
 990    body.emit(assign(r00D0, add(r00D2, body.constant(int(32))), 0x01));
 991
 992    /* IF CONDITION */
 993    ir_expression *const r00D4 = equal(swizzle_y(r00CA), body.constant(0u));
 994    ir_expression *const r00D5 = gequal(swizzle_y(r00C6), swizzle_x(r00CA));
 995    ir_expression *const r00D6 = logic_and(r00D4, r00D5);
 996    ir_if *f00D3 = new(mem_ctx) ir_if(operand(r00D6).val);
 997    exec_list *const f00D3_parent_instructions = body.instructions;
 998
 999       /* THEN INSTRUCTIONS */
1000       body.instructions = &f00D3->then_instructions;
1001
1002       ir_variable *const r00D7 = new(mem_ctx) ir_variable(glsl_type::int_type, "i", ir_var_auto);
1003       body.emit(r00D7);
1004       ir_variable *const r00D8 = body.make_temp(glsl_type::int_type, "findMSB_retval");
1005       body.emit(assign(r00D8, expr(ir_unop_find_msb, swizzle_x(r00CA)), 0x01));
1006
1007       body.emit(assign(r00D0, r00D8, 0x01));
1008
1009       body.emit(assign(r00D7, body.constant(int(31)), 0x01));
1010
1011       /* LOOP BEGIN */
1012       ir_loop *f00D9 = new(mem_ctx) ir_loop();
1013       exec_list *const f00D9_parent_instructions = body.instructions;
1014
1015          body.instructions = &f00D9->body_instructions;
1016
1017          /* IF CONDITION */
1018          ir_expression *const r00DB = less(r00D7, body.constant(int(1)));
1019          ir_if *f00DA = new(mem_ctx) ir_if(operand(r00DB).val);
1020          exec_list *const f00DA_parent_instructions = body.instructions;
1021
1022             /* THEN INSTRUCTIONS */
1023             body.instructions = &f00DA->then_instructions;
1024
1025             body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
1026
1027
1028          body.instructions = f00DA_parent_instructions;
1029          body.emit(f00DA);
1030
1031          /* END IF */
1032
1033          /* IF CONDITION */
1034          ir_expression *const r00DD = sub(body.constant(int(31)), r00D7);
1035          ir_expression *const r00DE = lequal(r00D8, r00DD);
1036          ir_expression *const r00DF = lshift(swizzle_x(r00CA), r00D7);
1037          ir_expression *const r00E0 = lequal(r00DF, swizzle_y(r00C6));
1038          ir_expression *const r00E1 = logic_and(r00DE, r00E0);
1039          ir_if *f00DC = new(mem_ctx) ir_if(operand(r00E1).val);
1040          exec_list *const f00DC_parent_instructions = body.instructions;
1041
1042             /* THEN INSTRUCTIONS */
1043             body.instructions = &f00DC->then_instructions;
1044
1045             ir_expression *const r00E2 = lshift(swizzle_x(r00CA), r00D7);
1046             body.emit(assign(r00C6, sub(swizzle_y(r00C6), r00E2), 0x02));
1047
1048             ir_expression *const r00E3 = lshift(body.constant(1u), r00D7);
1049             body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), r00E3), 0x02));
1050
1051
1052          body.instructions = f00DC_parent_instructions;
1053          body.emit(f00DC);
1054
1055          /* END IF */
1056
1057          body.emit(assign(r00D7, add(r00D7, body.constant(int(-1))), 0x01));
1058
1059       /* LOOP END */
1060
1061       body.instructions = f00D9_parent_instructions;
1062       body.emit(f00D9);
1063
1064       /* IF CONDITION */
1065       ir_expression *const r00E5 = lequal(swizzle_x(r00CA), swizzle_y(r00C6));
1066       ir_if *f00E4 = new(mem_ctx) ir_if(operand(r00E5).val);
1067       exec_list *const f00E4_parent_instructions = body.instructions;
1068
1069          /* THEN INSTRUCTIONS */
1070          body.instructions = &f00E4->then_instructions;
1071
1072          body.emit(assign(r00C6, sub(swizzle_y(r00C6), swizzle_x(r00CA)), 0x02));
1073
1074          body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), body.constant(1u)), 0x02));
1075
1076
1077       body.instructions = f00E4_parent_instructions;
1078       body.emit(f00E4);
1079
1080       /* END IF */
1081
1082
1083    body.instructions = f00D3_parent_instructions;
1084    body.emit(f00D3);
1085
1086    /* END IF */
1087
1088    ir_variable *const r00E6 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval");
1089    body.emit(assign(r00E6, expr(ir_unop_pack_uint_2x32, r00CA), 0x01));
1090
1091    body.emit(assign(r00CF, expr(ir_unop_pack_uint_2x32, r00C6), 0x01));
1092
1093    body.emit(assign(r00CE, body.constant(int(31)), 0x01));
1094
1095    /* LOOP BEGIN */
1096    ir_loop *f00E7 = new(mem_ctx) ir_loop();
1097    exec_list *const f00E7_parent_instructions = body.instructions;
1098
1099       body.instructions = &f00E7->body_instructions;
1100
1101       /* IF CONDITION */
1102       ir_expression *const r00E9 = less(r00CE, body.constant(int(1)));
1103       ir_if *f00E8 = new(mem_ctx) ir_if(operand(r00E9).val);
1104       exec_list *const f00E8_parent_instructions = body.instructions;
1105
1106          /* THEN INSTRUCTIONS */
1107          body.instructions = &f00E8->then_instructions;
1108
1109          body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break));
1110
1111
1112       body.instructions = f00E8_parent_instructions;
1113       body.emit(f00E8);
1114
1115       /* END IF */
1116
1117       /* IF CONDITION */
1118       ir_expression *const r00EB = sub(body.constant(int(63)), r00CE);
1119       ir_expression *const r00EC = lequal(r00D0, r00EB);
1120       ir_expression *const r00ED = lshift(r00E6, r00CE);
1121       ir_expression *const r00EE = lequal(r00ED, r00CF);
1122       ir_expression *const r00EF = logic_and(r00EC, r00EE);
1123       ir_if *f00EA = new(mem_ctx) ir_if(operand(r00EF).val);
1124       exec_list *const f00EA_parent_instructions = body.instructions;
1125
1126          /* THEN INSTRUCTIONS */
1127          body.instructions = &f00EA->then_instructions;
1128
1129          ir_expression *const r00F0 = lshift(r00E6, r00CE);
1130          body.emit(assign(r00CF, sub(r00CF, r00F0), 0x01));
1131
1132          ir_expression *const r00F1 = lshift(body.constant(1u), r00CE);
1133          body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), r00F1), 0x01));
1134
1135
1136       body.instructions = f00EA_parent_instructions;
1137       body.emit(f00EA);
1138
1139       /* END IF */
1140
1141       body.emit(assign(r00CE, add(r00CE, body.constant(int(-1))), 0x01));
1142
1143    /* LOOP END */
1144
1145    body.instructions = f00E7_parent_instructions;
1146    body.emit(f00E7);
1147
1148    /* IF CONDITION */
1149    ir_expression *const r00F3 = lequal(r00E6, r00CF);
1150    ir_if *f00F2 = new(mem_ctx) ir_if(operand(r00F3).val);
1151    exec_list *const f00F2_parent_instructions = body.instructions;
1152
1153       /* THEN INSTRUCTIONS */
1154       body.instructions = &f00F2->then_instructions;
1155
1156       body.emit(assign(r00CF, sub(r00CF, r00E6), 0x01));
1157
1158       body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), body.constant(1u)), 0x01));
1159
1160
1161    body.instructions = f00F2_parent_instructions;
1162    body.emit(f00F2);
1163
1164    /* END IF */
1165
1166    ir_variable *const r00F4 = body.make_temp(glsl_type::uvec4_type, "vec_ctor");
1167    body.emit(assign(r00F4, r00D1, 0x03));
1168
1169    body.emit(assign(r00F4, expr(ir_unop_unpack_uint_2x32, r00CF), 0x0c));
1170
1171    ir_variable *const r00F5 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp");
1172    /* IF CONDITION */
1173    ir_if *f00F6 = new(mem_ctx) ir_if(operand(r00C3).val);
1174    exec_list *const f00F6_parent_instructions = body.instructions;
1175
1176       /* THEN INSTRUCTIONS */
1177       body.instructions = &f00F6->then_instructions;
1178
1179       ir_swizzle *const r00F7 = swizzle(r00F4, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_X), 2);
1180       ir_expression *const r00F8 = expr(ir_unop_pack_uint_2x32, r00F7);
1181       ir_expression *const r00F9 = expr(ir_unop_u642i64, r00F8);
1182       ir_expression *const r00FA = neg(r00F9);
1183       body.emit(assign(r00F5, expr(ir_unop_unpack_int_2x32, r00FA), 0x03));
1184
1185
1186       /* ELSE INSTRUCTIONS */
1187       body.instructions = &f00F6->else_instructions;
1188
1189       ir_swizzle *const r00FB = swizzle(r00F4, MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_X), 2);
1190       body.emit(assign(r00F5, expr(ir_unop_u2i, r00FB), 0x03));
1191
1192
1193    body.instructions = f00F6_parent_instructions;
1194    body.emit(f00F6);
1195
1196    /* END IF */
1197
1198    body.emit(ret(r00F5));
1199
1200    sig->replace_parameters(&sig_parameters);
1201    return sig;
1202 }