2 * The implementations contained in this file are heavily based on the
3 * implementations found in the Berkeley SoftFloat library. As such, they are
4 * licensed under the same 3-clause BSD license:
6 * License for Berkeley SoftFloat Release 3e
11 * The following applies to the whole of SoftFloat Release 3e as well as to
12 * each source file individually.
14 * Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
15 * University of California. All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are met:
20 * 1. Redistributions of source code must retain the above copyright notice,
21 * this list of conditions, and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions, and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
27 * 3. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
32 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
34 * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
40 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 #extension GL_ARB_gpu_shader_int64 : enable
45 #extension GL_ARB_shader_bit_encoding : enable
46 #extension GL_EXT_shader_integer_mix : enable
47 #extension GL_MESA_shader_integer_functions : enable
51 /* Software IEEE floating-point rounding mode.
52 * GLSL spec section "4.7.1 Range and Precision":
53 * The rounding mode cannot be set and is undefined.
54 * But here, we are able to define the rounding mode at the compilation time.
56 #define FLOAT_ROUND_NEAREST_EVEN 0
57 #define FLOAT_ROUND_TO_ZERO 1
58 #define FLOAT_ROUND_DOWN 2
59 #define FLOAT_ROUND_UP 3
60 #define FLOAT_ROUNDING_MODE FLOAT_ROUND_NEAREST_EVEN
62 /* Absolute value of a Float64 :
66 __fabs64(uint64_t __a)
68 uvec2 a = unpackUint2x32(__a);
70 return packUint2x32(a);
73 /* Returns 1 if the double-precision floating-point value `a' is a NaN;
74 * otherwise returns 0.
77 __is_nan(uint64_t __a)
79 uvec2 a = unpackUint2x32(__a);
80 return (0xFFE00000u <= (a.y<<1)) &&
81 ((a.x != 0u) || ((a.y & 0x000FFFFFu) != 0u));
84 /* Negate value of a Float64 :
88 __fneg64(uint64_t __a)
90 uvec2 a = unpackUint2x32(__a);
94 a.y = mix(t, a.y, __is_nan(__a));
95 return packUint2x32(a);
99 __fsign64(uint64_t __a)
101 uvec2 a = unpackUint2x32(__a);
104 retval.y = mix((a.y & 0x80000000u) | 0x3FF00000u, 0u, (a.y << 1 | a.x) == 0u);
105 return packUint2x32(retval);
108 /* Returns the fraction bits of the double-precision floating-point value `a'.*/
110 __extractFloat64FracLo(uint64_t a)
112 return unpackUint2x32(a).x;
116 __extractFloat64FracHi(uint64_t a)
118 return unpackUint2x32(a).y & 0x000FFFFFu;
121 /* Returns the exponent bits of the double-precision floating-point value `a'.*/
123 __extractFloat64Exp(uint64_t __a)
125 uvec2 a = unpackUint2x32(__a);
126 return int((a.y>>20) & 0x7FFu);
130 __feq64_nonnan(uint64_t __a, uint64_t __b)
132 uvec2 a = unpackUint2x32(__a);
133 uvec2 b = unpackUint2x32(__b);
134 return (a.x == b.x) &&
135 ((a.y == b.y) || ((a.x == 0u) && (((a.y | b.y)<<1) == 0u)));
138 /* Returns true if the double-precision floating-point value `a' is equal to the
139 * corresponding value `b', and false otherwise. The comparison is performed
140 * according to the IEEE Standard for Floating-Point Arithmetic.
143 __feq64(uint64_t a, uint64_t b)
145 if (__is_nan(a) || __is_nan(b))
148 return __feq64_nonnan(a, b);
151 /* Returns true if the double-precision floating-point value `a' is not equal
152 * to the corresponding value `b', and false otherwise. The comparison is
153 * performed according to the IEEE Standard for Floating-Point Arithmetic.
156 __fne64(uint64_t a, uint64_t b)
158 if (__is_nan(a) || __is_nan(b))
161 return !__feq64_nonnan(a, b);
164 /* Returns the sign bit of the double-precision floating-point value `a'.*/
166 __extractFloat64Sign(uint64_t a)
168 return unpackUint2x32(a).y >> 31;
171 /* Returns true if the 64-bit value formed by concatenating `a0' and `a1' is less
172 * than the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
176 lt64(uint a0, uint a1, uint b0, uint b1)
178 return (a0 < b0) || ((a0 == b0) && (a1 < b1));
182 __flt64_nonnan(uint64_t __a, uint64_t __b)
184 uvec2 a = unpackUint2x32(__a);
185 uvec2 b = unpackUint2x32(__b);
186 uint aSign = __extractFloat64Sign(__a);
187 uint bSign = __extractFloat64Sign(__b);
189 return (aSign != 0u) && ((((a.y | b.y)<<1) | a.x | b.x) != 0u);
191 return mix(lt64(a.y, a.x, b.y, b.x), lt64(b.y, b.x, a.y, a.x), aSign != 0u);
194 /* Returns true if the double-precision floating-point value `a' is less than
195 * the corresponding value `b', and false otherwise. The comparison is performed
196 * according to the IEEE Standard for Floating-Point Arithmetic.
199 __flt64(uint64_t a, uint64_t b)
201 if (__is_nan(a) || __is_nan(b))
204 return __flt64_nonnan(a, b);
207 /* Returns true if the double-precision floating-point value `a' is greater
208 * than or equal to * the corresponding value `b', and false otherwise. The
209 * comparison is performed * according to the IEEE Standard for Floating-Point
213 __fge64(uint64_t a, uint64_t b)
215 if (__is_nan(a) || __is_nan(b))
218 return !__flt64_nonnan(a, b);
222 __fsat64(uint64_t __a)
224 if (__flt64(__a, 0ul))
227 if (__fge64(__a, 0x3FF0000000000000ul /* 1.0 */))
228 return 0x3FF0000000000000ul;
233 /* Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit
234 * value formed by concatenating `b0' and `b1'. Addition is modulo 2^64, so
235 * any carry out is lost. The result is broken into two 32-bit pieces which
236 * are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
239 __add64(uint a0, uint a1, uint b0, uint b1,
245 z0Ptr = a0 + b0 + uint(z1 < a1);
249 /* Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
250 * 64-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
251 * 2^64, so any borrow out (carry out) is lost. The result is broken into two
252 * 32-bit pieces which are stored at the locations pointed to by `z0Ptr' and
256 __sub64(uint a0, uint a1, uint b0, uint b1,
261 z0Ptr = a0 - b0 - uint(a1 < b1);
264 /* Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the
265 * number of bits given in `count'. If any nonzero bits are shifted off, they
266 * are "jammed" into the least significant bit of the result by setting the
267 * least significant bit to 1. The value of `count' can be arbitrarily large;
268 * in particular, if `count' is greater than 64, the result will be either 0
269 * or 1, depending on whether the concatenation of `a0' and `a1' is zero or
270 * nonzero. The result is broken into two 32-bit pieces which are stored at
271 * the locations pointed to by `z0Ptr' and `z1Ptr'.
274 __shift64RightJamming(uint a0,
282 int negCount = (-count) & 31;
284 z0 = mix(0u, a0, count == 0);
285 z0 = mix(z0, (a0 >> count), count < 32);
287 z1 = uint((a0 | a1) != 0u); /* count >= 64 */
288 uint z1_lt64 = (a0>>(count & 31)) | uint(((a0<<negCount) | a1) != 0u);
289 z1 = mix(z1, z1_lt64, count < 64);
290 z1 = mix(z1, (a0 | uint(a1 != 0u)), count == 32);
291 uint z1_lt32 = (a0<<negCount) | (a1>>count) | uint ((a1<<negCount) != 0u);
292 z1 = mix(z1, z1_lt32, count < 32);
293 z1 = mix(z1, a1, count == 0);
298 /* Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' right
299 * by 32 _plus_ the number of bits given in `count'. The shifted result is
300 * at most 64 nonzero bits; these are broken into two 32-bit pieces which are
301 * stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
302 * off form a third 32-bit result as follows: The _last_ bit shifted off is
303 * the most-significant bit of the extra result, and the other 31 bits of the
304 * extra result are all zero if and only if _all_but_the_last_ bits shifted off
305 * were all zero. This extra result is stored in the location pointed to by
306 * `z2Ptr'. The value of `count' can be arbitrarily large.
307 * (This routine makes more sense if `a0', `a1', and `a2' are considered
308 * to form a fixed-point value with binary point between `a1' and `a2'. This
309 * fixed-point value is shifted right by the number of bits given in `count',
310 * and the integer part of the result is returned at the locations pointed to
311 * by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
312 * corrupted as described above, and is returned at the location pointed to by
316 __shift64ExtraRightJamming(uint a0, uint a1, uint a2,
325 int negCount = (-count) & 31;
327 z2 = mix(uint(a0 != 0u), a0, count == 64);
328 z2 = mix(z2, a0 << negCount, count < 64);
329 z2 = mix(z2, a1 << negCount, count < 32);
331 z1 = mix(0u, (a0 >> (count & 31)), count < 64);
332 z1 = mix(z1, (a0<<negCount) | (a1>>count), count < 32);
334 a2 = mix(a2 | a1, a2, count < 32);
335 z0 = mix(z0, a0 >> count, count < 32);
336 z2 |= uint(a2 != 0u);
338 z0 = mix(z0, 0u, (count == 32));
339 z1 = mix(z1, a0, (count == 32));
340 z2 = mix(z2, a1, (count == 32));
341 z0 = mix(z0, a0, (count == 0));
342 z1 = mix(z1, a1, (count == 0));
343 z2 = mix(z2, a2, (count == 0));
349 /* Shifts the 64-bit value formed by concatenating `a0' and `a1' left by the
350 * number of bits given in `count'. Any bits shifted off are lost. The value
351 * of `count' must be less than 32. The result is broken into two 32-bit
352 * pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
355 __shortShift64Left(uint a0, uint a1,
361 z0Ptr = mix((a0 << count | (a1 >> ((-count) & 31))), a0, count == 0);
364 /* Packs the sign `zSign', the exponent `zExp', and the significand formed by
365 * the concatenation of `zFrac0' and `zFrac1' into a double-precision floating-
366 * point value, returning the result. After being shifted into the proper
367 * positions, the three fields `zSign', `zExp', and `zFrac0' are simply added
368 * together to form the most significant 32 bits of the result. This means
369 * that any integer portion of `zFrac0' will be added into the exponent. Since
370 * a properly normalized significand will have an integer portion equal to 1,
371 * the `zExp' input should be 1 less than the desired result exponent whenever
372 * `zFrac0' and `zFrac1' concatenated form a complete, normalized significand.
375 __packFloat64(uint zSign, int zExp, uint zFrac0, uint zFrac1)
379 z.y = (zSign << 31) + (uint(zExp) << 20) + zFrac0;
381 return packUint2x32(z);
384 /* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
385 * and extended significand formed by the concatenation of `zFrac0', `zFrac1',
386 * and `zFrac2', and returns the proper double-precision floating-point value
387 * corresponding to the abstract input. Ordinarily, the abstract value is
388 * simply rounded and packed into the double-precision format, with the inexact
389 * exception raised if the abstract input cannot be represented exactly.
390 * However, if the abstract value is too large, the overflow and inexact
391 * exceptions are raised and an infinity or maximal finite value is returned.
392 * If the abstract value is too small, the input value is rounded to a
393 * subnormal number, and the underflow and inexact exceptions are raised if the
394 * abstract input cannot be represented exactly as a subnormal double-precision
395 * floating-point number.
396 * The input significand must be normalized or smaller. If the input
397 * significand is not normalized, `zExp' must be 0; in that case, the result
398 * returned is a subnormal number, and it must not require rounding. In the
399 * usual case that the input significand is normalized, `zExp' must be 1 less
400 * than the "true" floating-point exponent. The handling of underflow and
401 * overflow follows the IEEE Standard for Floating-Point Arithmetic.
404 __roundAndPackFloat64(uint zSign,
410 bool roundNearestEven;
413 roundNearestEven = FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN;
414 increment = int(zFrac2) < 0;
415 if (!roundNearestEven) {
416 if (FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO) {
420 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) &&
423 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
429 if ((0x7FD < zExp) ||
431 (0x001FFFFFu == zFrac0 && 0xFFFFFFFFu == zFrac1) &&
433 if ((FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO) ||
434 ((zSign != 0u) && (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP)) ||
435 ((zSign == 0u) && (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN))) {
436 return __packFloat64(zSign, 0x7FE, 0x000FFFFFu, 0xFFFFFFFFu);
438 return __packFloat64(zSign, 0x7FF, 0u, 0u);
441 __shift64ExtraRightJamming(
442 zFrac0, zFrac1, zFrac2, -zExp, zFrac0, zFrac1, zFrac2);
444 if (roundNearestEven) {
445 increment = zFrac2 < 0u;
448 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) &&
451 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
458 __add64(zFrac0, zFrac1, 0u, 1u, zFrac0, zFrac1);
459 zFrac1 &= ~((zFrac2 + uint(zFrac2 == 0u)) & uint(roundNearestEven));
461 zExp = mix(zExp, 0, (zFrac0 | zFrac1) == 0u);
463 return __packFloat64(zSign, zExp, zFrac0, zFrac1);
467 __roundAndPackUInt64(uint zSign, uint zFrac0, uint zFrac1, uint zFrac2)
469 bool roundNearestEven;
471 uint64_t default_nan = 0xFFFFFFFFFFFFFFFFUL;
473 roundNearestEven = FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN;
475 if (zFrac2 >= 0x80000000u)
478 if (!roundNearestEven) {
480 if ((FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) && (zFrac2 != 0u)) {
484 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
490 __add64(zFrac0, zFrac1, 0u, 1u, zFrac0, zFrac1);
491 if ((zFrac0 | zFrac1) != 0u)
492 zFrac1 &= ~(1u) + uint(zFrac2 == 0u) & uint(roundNearestEven);
494 return mix(packUint2x32(uvec2(zFrac1, zFrac0)), default_nan,
495 (zSign !=0u && (zFrac0 | zFrac1) != 0u));
499 __roundAndPackInt64(uint zSign, uint zFrac0, uint zFrac1, uint zFrac2)
501 bool roundNearestEven;
503 int64_t default_NegNaN = -0x7FFFFFFFFFFFFFFEL;
504 int64_t default_PosNaN = 0xFFFFFFFFFFFFFFFFL;
506 roundNearestEven = FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN;
508 if (zFrac2 >= 0x80000000u)
511 if (!roundNearestEven) {
513 increment = ((FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) &&
516 increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
522 __add64(zFrac0, zFrac1, 0u, 1u, zFrac0, zFrac1);
523 if ((zFrac0 | zFrac1) != 0u)
524 zFrac1 &= ~(1u) + uint(zFrac2 == 0u) & uint(roundNearestEven);
527 int64_t absZ = mix(int64_t(packUint2x32(uvec2(zFrac1, zFrac0))),
528 -int64_t(packUint2x32(uvec2(zFrac1, zFrac0))),
530 int64_t nan = mix(default_PosNaN, default_NegNaN, bool(zSign));
531 return mix(absZ, nan, bool(zSign ^ uint(absZ < 0)) && bool(absZ));
534 /* Returns the number of leading 0 bits before the most-significant 1 bit of
535 * `a'. If `a' is zero, 32 is returned.
538 __countLeadingZeros32(uint a)
541 shiftCount = mix(31 - findMSB(a), 32, a == 0u);
545 /* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
546 * and significand formed by the concatenation of `zSig0' and `zSig1', and
547 * returns the proper double-precision floating-point value corresponding
548 * to the abstract input. This routine is just like `__roundAndPackFloat64'
549 * except that the input significand has fewer bits and does not have to be
550 * normalized. In all cases, `zExp' must be 1 less than the "true" floating-
554 __normalizeRoundAndPackFloat64(uint zSign,
568 shiftCount = __countLeadingZeros32(zFrac0) - 11;
569 if (0 <= shiftCount) {
571 __shortShift64Left(zFrac0, zFrac1, shiftCount, zFrac0, zFrac1);
573 __shift64ExtraRightJamming(
574 zFrac0, zFrac1, 0u, -shiftCount, zFrac0, zFrac1, zFrac2);
577 return __roundAndPackFloat64(zSign, zExp, zFrac0, zFrac1, zFrac2);
580 /* Takes two double-precision floating-point values `a' and `b', one of which
581 * is a NaN, and returns the appropriate NaN result.
584 __propagateFloat64NaN(uint64_t __a, uint64_t __b)
586 bool aIsNaN = __is_nan(__a);
587 bool bIsNaN = __is_nan(__b);
588 uvec2 a = unpackUint2x32(__a);
589 uvec2 b = unpackUint2x32(__b);
593 return packUint2x32(mix(b, mix(a, b, bvec2(bIsNaN, bIsNaN)), bvec2(aIsNaN, aIsNaN)));
596 /* Returns the result of adding the double-precision floating-point values
597 * `a' and `b'. The operation is performed according to the IEEE Standard for
598 * Floating-Point Arithmetic.
601 __fadd64(uint64_t a, uint64_t b)
603 uint aSign = __extractFloat64Sign(a);
604 uint bSign = __extractFloat64Sign(b);
605 uint aFracLo = __extractFloat64FracLo(a);
606 uint aFracHi = __extractFloat64FracHi(a);
607 uint bFracLo = __extractFloat64FracLo(b);
608 uint bFracHi = __extractFloat64FracHi(b);
609 int aExp = __extractFloat64Exp(a);
610 int bExp = __extractFloat64Exp(b);
613 int expDiff = aExp - bExp;
614 if (aSign == bSign) {
617 bool orig_exp_diff_is_zero = (expDiff == 0);
619 if (orig_exp_diff_is_zero) {
621 bool propagate = (aFracHi | aFracLo | bFracHi | bFracLo) != 0u;
622 return mix(a, __propagateFloat64NaN(a, b), propagate);
624 __add64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
626 return __packFloat64(aSign, 0, zFrac0, zFrac1);
628 zFrac0 |= 0x00200000u;
630 __shift64ExtraRightJamming(
631 zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2);
632 } else if (0 < expDiff) {
634 bool propagate = (aFracHi | aFracLo) != 0u;
635 return mix(a, __propagateFloat64NaN(a, b), propagate);
638 expDiff = mix(expDiff, expDiff - 1, bExp == 0);
639 bFracHi = mix(bFracHi | 0x00100000u, bFracHi, bExp == 0);
640 __shift64ExtraRightJamming(
641 bFracHi, bFracLo, 0u, expDiff, bFracHi, bFracLo, zFrac2);
643 } else if (expDiff < 0) {
645 bool propagate = (bFracHi | bFracLo) != 0u;
646 return mix(__packFloat64(aSign, 0x7ff, 0u, 0u), __propagateFloat64NaN(a, b), propagate);
648 expDiff = mix(expDiff, expDiff + 1, aExp == 0);
649 aFracHi = mix(aFracHi | 0x00100000u, aFracHi, aExp == 0);
650 __shift64ExtraRightJamming(
651 aFracHi, aFracLo, 0u, - expDiff, aFracHi, aFracLo, zFrac2);
654 if (!orig_exp_diff_is_zero) {
655 aFracHi |= 0x00100000u;
656 __add64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
658 if (!(zFrac0 < 0x00200000u)) {
659 __shift64ExtraRightJamming(zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2);
663 return __roundAndPackFloat64(aSign, zExp, zFrac0, zFrac1, zFrac2);
668 __shortShift64Left(aFracHi, aFracLo, 10, aFracHi, aFracLo);
669 __shortShift64Left(bFracHi, bFracLo, 10, bFracHi, bFracLo);
672 bool propagate = (aFracHi | aFracLo) != 0u;
673 return mix(a, __propagateFloat64NaN(a, b), propagate);
675 expDiff = mix(expDiff, expDiff - 1, bExp == 0);
676 bFracHi = mix(bFracHi | 0x40000000u, bFracHi, bExp == 0);
677 __shift64RightJamming(bFracHi, bFracLo, expDiff, bFracHi, bFracLo);
678 aFracHi |= 0x40000000u;
679 __sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
682 return __normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
686 bool propagate = (bFracHi | bFracLo) != 0u;
687 return mix(__packFloat64(aSign ^ 1u, 0x7ff, 0u, 0u), __propagateFloat64NaN(a, b), propagate);
689 expDiff = mix(expDiff, expDiff + 1, aExp == 0);
690 aFracHi = mix(aFracHi | 0x40000000u, aFracHi, aExp == 0);
691 __shift64RightJamming(aFracHi, aFracLo, - expDiff, aFracHi, aFracLo);
692 bFracHi |= 0x40000000u;
693 __sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
697 return __normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
700 bool propagate = (aFracHi | aFracLo | bFracHi | bFracLo) != 0u;
701 return mix(0xFFFFFFFFFFFFFFFFUL, __propagateFloat64NaN(a, b), propagate);
703 bExp = mix(bExp, 1, aExp == 0);
704 aExp = mix(aExp, 1, aExp == 0);
705 bool zexp_normal = false;
707 if (bFracHi < aFracHi) {
708 __sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
711 else if (aFracHi < bFracHi) {
712 __sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
716 else if (bFracLo < aFracLo) {
717 __sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
720 else if (aFracLo < bFracLo) {
721 __sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
725 zExp = mix(bExp, aExp, blta);
726 aSign = mix(aSign ^ 1u, aSign, blta);
727 uint64_t retval_0 = __packFloat64(uint(FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN), 0, 0u, 0u);
728 uint64_t retval_1 = __normalizeRoundAndPackFloat64(aSign, zExp - 11, zFrac0, zFrac1);
729 return mix(retval_0, retval_1, zexp_normal);
733 /* Multiplies `a' by `b' to obtain a 64-bit product. The product is broken
734 * into two 32-bit pieces which are stored at the locations pointed to by
735 * `z0Ptr' and `z1Ptr'.
738 __mul32To64(uint a, uint b, out uint z0Ptr, out uint z1Ptr)
740 uint aLow = a & 0x0000FFFFu;
742 uint bLow = b & 0x0000FFFFu;
744 uint z1 = aLow * bLow;
745 uint zMiddleA = aLow * bHigh;
746 uint zMiddleB = aHigh * bLow;
747 uint z0 = aHigh * bHigh;
748 zMiddleA += zMiddleB;
749 z0 += ((uint(zMiddleA < zMiddleB)) << 16) + (zMiddleA >> 16);
752 z0 += uint(z1 < zMiddleA);
757 /* Multiplies the 64-bit value formed by concatenating `a0' and `a1' to the
758 * 64-bit value formed by concatenating `b0' and `b1' to obtain a 128-bit
759 * product. The product is broken into four 32-bit pieces which are stored at
760 * the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
763 __mul64To128(uint a0, uint a1, uint b0, uint b1,
776 __mul32To64(a1, b1, z2, z3);
777 __mul32To64(a1, b0, z1, more2);
778 __add64(z1, more2, 0u, z2, z1, z2);
779 __mul32To64(a0, b0, z0, more1);
780 __add64(z0, more1, 0u, z1, z0, z1);
781 __mul32To64(a0, b1, more1, more2);
782 __add64(more1, more2, 0u, z2, more1, z2);
783 __add64(z0, z1, 0u, more1, z0, z1);
790 /* Normalizes the subnormal double-precision floating-point value represented
791 * by the denormalized significand formed by the concatenation of `aFrac0' and
792 * `aFrac1'. The normalized exponent is stored at the location pointed to by
793 * `zExpPtr'. The most significant 21 bits of the normalized significand are
794 * stored at the location pointed to by `zFrac0Ptr', and the least significant
795 * 32 bits of the normalized significand are stored at the location pointed to
799 __normalizeFloat64Subnormal(uint aFrac0, uint aFrac1,
805 uint temp_zfrac0, temp_zfrac1;
806 shiftCount = __countLeadingZeros32(mix(aFrac0, aFrac1, aFrac0 == 0u)) - 11;
807 zExpPtr = mix(1 - shiftCount, -shiftCount - 31, aFrac0 == 0u);
809 temp_zfrac0 = mix(aFrac1<<shiftCount, aFrac1>>(-shiftCount), shiftCount < 0);
810 temp_zfrac1 = mix(0u, aFrac1<<(shiftCount & 31), shiftCount < 0);
812 __shortShift64Left(aFrac0, aFrac1, shiftCount, zFrac0Ptr, zFrac1Ptr);
814 zFrac0Ptr = mix(zFrac0Ptr, temp_zfrac0, aFrac0 == 0);
815 zFrac1Ptr = mix(zFrac1Ptr, temp_zfrac1, aFrac0 == 0);
818 /* Returns the result of multiplying the double-precision floating-point values
819 * `a' and `b'. The operation is performed according to the IEEE Standard for
820 * Floating-Point Arithmetic.
823 __fmul64(uint64_t a, uint64_t b)
831 uint aFracLo = __extractFloat64FracLo(a);
832 uint aFracHi = __extractFloat64FracHi(a);
833 uint bFracLo = __extractFloat64FracLo(b);
834 uint bFracHi = __extractFloat64FracHi(b);
835 int aExp = __extractFloat64Exp(a);
836 uint aSign = __extractFloat64Sign(a);
837 int bExp = __extractFloat64Exp(b);
838 uint bSign = __extractFloat64Sign(b);
839 uint zSign = aSign ^ bSign;
841 if (((aFracHi | aFracLo) != 0u) ||
842 ((bExp == 0x7FF) && ((bFracHi | bFracLo) != 0u))) {
843 return __propagateFloat64NaN(a, b);
845 if ((uint(bExp) | bFracHi | bFracLo) == 0u)
846 return 0xFFFFFFFFFFFFFFFFUL;
847 return __packFloat64(zSign, 0x7FF, 0u, 0u);
850 if ((bFracHi | bFracLo) != 0u)
851 return __propagateFloat64NaN(a, b);
852 if ((uint(aExp) | aFracHi | aFracLo) == 0u)
853 return 0xFFFFFFFFFFFFFFFFUL;
854 return __packFloat64(zSign, 0x7FF, 0u, 0u);
857 if ((aFracHi | aFracLo) == 0u)
858 return __packFloat64(zSign, 0, 0u, 0u);
859 __normalizeFloat64Subnormal(aFracHi, aFracLo, aExp, aFracHi, aFracLo);
862 if ((bFracHi | bFracLo) == 0u)
863 return __packFloat64(zSign, 0, 0u, 0u);
864 __normalizeFloat64Subnormal(bFracHi, bFracLo, bExp, bFracHi, bFracLo);
866 zExp = aExp + bExp - 0x400;
867 aFracHi |= 0x00100000u;
868 __shortShift64Left(bFracHi, bFracLo, 12, bFracHi, bFracLo);
870 aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1, zFrac2, zFrac3);
871 __add64(zFrac0, zFrac1, aFracHi, aFracLo, zFrac0, zFrac1);
872 zFrac2 |= uint(zFrac3 != 0u);
873 if (0x00200000u <= zFrac0) {
874 __shift64ExtraRightJamming(
875 zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2);
878 return __roundAndPackFloat64(zSign, zExp, zFrac0, zFrac1, zFrac2);
882 __ffma64(uint64_t a, uint64_t b, uint64_t c)
884 return __fadd64(__fmul64(a, b), c);
887 /* Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the
888 * number of bits given in `count'. Any bits shifted off are lost. The value
889 * of `count' can be arbitrarily large; in particular, if `count' is greater
890 * than 64, the result will be 0. The result is broken into two 32-bit pieces
891 * which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
894 __shift64Right(uint a0, uint a1,
901 int negCount = (-count) & 31;
904 z0 = mix(z0, (a0 >> count), count < 32);
905 z0 = mix(z0, a0, count == 0);
907 z1 = mix(0u, (a0 >> (count & 31)), count < 64);
908 z1 = mix(z1, (a0<<negCount) | (a1>>count), count < 32);
909 z1 = mix(z1, a0, count == 0);
915 /* Returns the result of converting the double-precision floating-point value
916 * `a' to the unsigned integer format. The conversion is performed according
917 * to the IEEE Standard for Floating-Point Arithmetic.
920 __fp64_to_uint(uint64_t a)
922 uint aFracLo = __extractFloat64FracLo(a);
923 uint aFracHi = __extractFloat64FracHi(a);
924 int aExp = __extractFloat64Exp(a);
925 uint aSign = __extractFloat64Sign(a);
927 if ((aExp == 0x7FF) && ((aFracHi | aFracLo) != 0u))
930 aFracHi |= mix(0u, 0x00100000u, aExp != 0);
932 int shiftDist = 0x427 - aExp;
934 __shift64RightJamming(aFracHi, aFracLo, shiftDist, aFracHi, aFracLo);
936 if ((aFracHi & 0xFFFFF000u) != 0u)
937 return mix(~0u, 0u, (aSign != 0u));
941 __shift64Right(aFracHi, aFracLo, 12, zero, z);
943 uint expt = mix(~0u, 0u, (aSign != 0u));
945 return mix(z, expt, (aSign != 0u) && (z != 0u));
949 __uint_to_fp64(uint a)
954 int shiftDist = __countLeadingZeros32(a) + 21;
958 int negCount = (- shiftDist) & 31;
960 aHigh = mix(0u, a<< shiftDist - 32, shiftDist < 64);
962 aHigh = mix(aHigh, 0u, shiftDist == 0);
963 aLow = mix(aLow, a, shiftDist ==0);
964 aHigh = mix(aHigh, a >> negCount, shiftDist < 32);
965 aLow = mix(aLow, a << shiftDist, shiftDist < 32);
967 return __packFloat64(0u, 0x432 - shiftDist, aHigh, aLow);
971 __uint64_to_fp64(uint64_t a)
976 uvec2 aFrac = unpackUint2x32(a);
977 uint aFracLo = __extractFloat64FracLo(a);
978 uint aFracHi = __extractFloat64FracHi(a);
980 if ((aFracHi & 0x80000000u) != 0u) {
981 __shift64RightJamming(aFracHi, aFracLo, 1, aFracHi, aFracLo);
982 return __roundAndPackFloat64(0, 0x433, aFracHi, aFracLo, 0u);
984 return __normalizeRoundAndPackFloat64(0, 0x432, aFrac.y, aFrac.x);
989 __fp64_to_uint64(uint64_t a)
991 uint aFracLo = __extractFloat64FracLo(a);
992 uint aFracHi = __extractFloat64FracHi(a);
993 int aExp = __extractFloat64Exp(a);
994 uint aSign = __extractFloat64Sign(a);
996 uint64_t default_nan = 0xFFFFFFFFFFFFFFFFUL;
998 aFracHi = mix(aFracHi, aFracHi | 0x00100000u, aExp != 0);
999 int shiftCount = 0x433 - aExp;
1001 if ( shiftCount <= 0 ) {
1002 if (shiftCount < -11 && aExp == 0x7FF) {
1003 if ((aFracHi | aFracLo) != 0u)
1004 return __propagateFloat64NaN(a, a);
1005 return mix(default_nan, a, aSign == 0u);
1007 __shortShift64Left(aFracHi, aFracLo, -shiftCount, aFracHi, aFracLo);
1009 __shift64ExtraRightJamming(aFracHi, aFracLo, zFrac2, shiftCount,
1010 aFracHi, aFracLo, zFrac2);
1012 return __roundAndPackUInt64(aSign, aFracHi, aFracLo, zFrac2);
1016 __fp64_to_int64(uint64_t a)
1019 uint aFracLo = __extractFloat64FracLo(a);
1020 uint aFracHi = __extractFloat64FracHi(a);
1021 int aExp = __extractFloat64Exp(a);
1022 uint aSign = __extractFloat64Sign(a);
1023 int64_t default_NegNaN = -0x7FFFFFFFFFFFFFFEL;
1024 int64_t default_PosNaN = 0xFFFFFFFFFFFFFFFFL;
1026 aFracHi = mix(aFracHi, aFracHi | 0x00100000u, aExp != 0);
1027 int shiftCount = 0x433 - aExp;
1029 if (shiftCount <= 0) {
1030 if (shiftCount < -11 && aExp == 0x7FF) {
1031 if ((aFracHi | aFracLo) != 0u)
1032 return default_NegNaN;
1033 return mix(default_NegNaN, default_PosNaN, aSign == 0u);
1035 __shortShift64Left(aFracHi, aFracLo, -shiftCount, aFracHi, aFracLo);
1037 __shift64ExtraRightJamming(aFracHi, aFracLo, zFrac2, shiftCount,
1038 aFracHi, aFracLo, zFrac2);
1041 return __roundAndPackInt64(aSign, aFracHi, aFracLo, zFrac2);
1045 __fp32_to_uint64(float f)
1047 uint a = floatBitsToUint(f);
1048 uint aFrac = a & 0x007FFFFFu;
1049 int aExp = int((a>>23) & 0xFFu);
1054 uint64_t default_nan = 0xFFFFFFFFFFFFFFFFUL;
1055 int shiftCount = 0xBE - aExp;
1057 if (shiftCount <0) {
1062 aFrac = mix(aFrac, aFrac | 0x00800000u, aExp != 0);
1063 __shortShift64Left(aFrac, 0, 40, zFrac0, zFrac1);
1065 if (shiftCount != 0) {
1066 __shift64ExtraRightJamming(zFrac0, zFrac1, zFrac2, shiftCount,
1067 zFrac0, zFrac1, zFrac2);
1070 return __roundAndPackUInt64(aSign, zFrac0, zFrac1, zFrac2);
1074 __fp32_to_int64(float f)
1076 uint a = floatBitsToUint(f);
1077 uint aFrac = a & 0x007FFFFFu;
1078 int aExp = int((a>>23) & 0xFFu);
1083 int64_t default_NegNaN = -0x7FFFFFFFFFFFFFFEL;
1084 int64_t default_PosNaN = 0xFFFFFFFFFFFFFFFFL;
1085 int shiftCount = 0xBE - aExp;
1087 if (shiftCount <0) {
1088 if (aExp == 0xFF && aFrac != 0u)
1089 return default_NegNaN;
1090 return mix(default_NegNaN, default_PosNaN, aSign == 0u);
1093 aFrac = mix(aFrac, aFrac | 0x00800000u, aExp != 0);
1094 __shortShift64Left(aFrac, 0, 40, zFrac0, zFrac1);
1096 if (shiftCount != 0) {
1097 __shift64ExtraRightJamming(zFrac0, zFrac1, zFrac2, shiftCount,
1098 zFrac0, zFrac1, zFrac2);
1101 return __roundAndPackInt64(aSign, zFrac0, zFrac1, zFrac2);
1105 __int64_to_fp64(int64_t a)
1110 uint64_t absA = mix(uint64_t(a), uint64_t(-a), a < 0);
1111 uint aFracHi = __extractFloat64FracHi(absA);
1112 uvec2 aFrac = unpackUint2x32(absA);
1113 uint zSign = uint(a < 0);
1115 if ((aFracHi & 0x80000000u) != 0u) {
1116 return mix(0ul, __packFloat64(1, 0x434, 0u, 0u), a < 0);
1119 return __normalizeRoundAndPackFloat64(zSign, 0x432, aFrac.y, aFrac.x);
1122 /* Returns the result of converting the double-precision floating-point value
1123 * `a' to the 32-bit two's complement integer format. The conversion is
1124 * performed according to the IEEE Standard for Floating-Point Arithmetic---
1125 * which means in particular that the conversion is rounded according to the
1126 * current rounding mode. If `a' is a NaN, the largest positive integer is
1127 * returned. Otherwise, if the conversion overflows, the largest integer with
1128 * the same sign as `a' is returned.
1131 __fp64_to_int(uint64_t a)
1133 uint aFracLo = __extractFloat64FracLo(a);
1134 uint aFracHi = __extractFloat64FracHi(a);
1135 int aExp = __extractFloat64Exp(a);
1136 uint aSign = __extractFloat64Sign(a);
1139 uint aFracExtra = 0u;
1140 int shiftCount = aExp - 0x413;
1142 if (0 <= shiftCount) {
1144 if ((aExp == 0x7FF) && bool(aFracHi | aFracLo))
1146 return mix(0x7FFFFFFF, 0x80000000, bool(aSign));
1148 __shortShift64Left(aFracHi | 0x00100000u, aFracLo, shiftCount, absZ, aFracExtra);
1153 aFracHi |= 0x00100000u;
1154 aFracExtra = ( aFracHi << (shiftCount & 31)) | aFracLo;
1155 absZ = aFracHi >> (- shiftCount);
1158 int z = mix(int(absZ), -int(absZ), (aSign != 0u));
1159 int nan = mix(0x7FFFFFFF, 0x80000000, bool(aSign));
1160 return mix(z, nan, bool(aSign ^ uint(z < 0)) && bool(z));
1163 /* Returns the result of converting the 32-bit two's complement integer `a'
1164 * to the double-precision floating-point format. The conversion is performed
1165 * according to the IEEE Standard for Floating-Point Arithmetic.
1168 __int_to_fp64(int a)
1173 return __packFloat64(0u, 0, 0u, 0u);
1174 uint zSign = uint(a < 0);
1175 uint absA = mix(uint(a), uint(-a), a < 0);
1176 int shiftCount = __countLeadingZeros32(absA) - 11;
1177 if (0 <= shiftCount) {
1178 zFrac0 = absA << shiftCount;
1181 __shift64Right(absA, 0u, -shiftCount, zFrac0, zFrac1);
1183 return __packFloat64(zSign, 0x412 - shiftCount, zFrac0, zFrac1);
1187 __fp64_to_bool(uint64_t a)
1189 return !__feq64_nonnan(__fabs64(a), 0ul);
1193 __bool_to_fp64(bool a)
1195 return __int_to_fp64(int(a));
1198 /* Packs the sign `zSign', exponent `zExp', and significand `zFrac' into a
1199 * single-precision floating-point value, returning the result. After being
1200 * shifted into the proper positions, the three fields are simply added
1201 * together to form the result. This means that any integer portion of `zSig'
1202 * will be added into the exponent. Since a properly normalized significand
1203 * will have an integer portion equal to 1, the `zExp' input should be 1 less
1204 * than the desired result exponent whenever `zFrac' is a complete, normalized
1208 __packFloat32(uint zSign, int zExp, uint zFrac)
1210 return uintBitsToFloat((zSign<<31) + (uint(zExp)<<23) + zFrac);
1213 /* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
1214 * and significand `zFrac', and returns the proper single-precision floating-
1215 * point value corresponding to the abstract input. Ordinarily, the abstract
1216 * value is simply rounded and packed into the single-precision format, with
1217 * the inexact exception raised if the abstract input cannot be represented
1218 * exactly. However, if the abstract value is too large, the overflow and
1219 * inexact exceptions are raised and an infinity or maximal finite value is
1220 * returned. If the abstract value is too small, the input value is rounded to
1221 * a subnormal number, and the underflow and inexact exceptions are raised if
1222 * the abstract input cannot be represented exactly as a subnormal single-
1223 * precision floating-point number.
1224 * The input significand `zFrac' has its binary point between bits 30
1225 * and 29, which is 7 bits to the left of the usual location. This shifted
1226 * significand must be normalized or smaller. If `zFrac' is not normalized,
1227 * `zExp' must be 0; in that case, the result returned is a subnormal number,
1228 * and it must not require rounding. In the usual case that `zFrac' is
1229 * normalized, `zExp' must be 1 less than the "true" floating-point exponent.
1230 * The handling of underflow and overflow follows the IEEE Standard for
1231 * Floating-Point Arithmetic.
1234 __roundAndPackFloat32(uint zSign, int zExp, uint zFrac)
1236 bool roundNearestEven;
1240 roundNearestEven = FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN;
1241 roundIncrement = 0x40;
1242 if (!roundNearestEven) {
1243 if (FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO) {
1246 roundIncrement = 0x7F;
1248 if (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP)
1251 if (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN)
1256 roundBits = int(zFrac & 0x7Fu);
1257 if (0xFDu <= uint(zExp)) {
1258 if ((0xFD < zExp) || ((zExp == 0xFD) && (int(zFrac) + roundIncrement) < 0))
1259 return __packFloat32(zSign, 0xFF, 0u) - float(roundIncrement == 0);
1261 bool zexp_lt0 = zExp < 0;
1262 uint zFrac_lt0 = mix(uint(zFrac != 0u), (zFrac>>count) | uint((zFrac<<((-count) & 31)) != 0u), (-zExp) < 32);
1263 zFrac = mix(zFrac, zFrac_lt0, zexp_lt0);
1264 roundBits = mix(roundBits, int(zFrac) & 0x7f, zexp_lt0);
1265 zExp = mix(zExp, 0, zexp_lt0);
1267 zFrac = (zFrac + uint(roundIncrement))>>7;
1268 zFrac &= ~uint(((roundBits ^ 0x40) == 0) && roundNearestEven);
1270 return __packFloat32(zSign, mix(zExp, 0, zFrac == 0u), zFrac);
1273 /* Returns the result of converting the double-precision floating-point value
1274 * `a' to the single-precision floating-point format. The conversion is
1275 * performed according to the IEEE Standard for Floating-Point Arithmetic.
1278 __fp64_to_fp32(uint64_t __a)
1280 uvec2 a = unpackUint2x32(__a);
1284 uint aFracLo = __extractFloat64FracLo(__a);
1285 uint aFracHi = __extractFloat64FracHi(__a);
1286 int aExp = __extractFloat64Exp(__a);
1287 uint aSign = __extractFloat64Sign(__a);
1288 if (aExp == 0x7FF) {
1289 __shortShift64Left(a.y, a.x, 12, a.y, a.x);
1290 float rval = uintBitsToFloat((aSign<<31) | 0x7FC00000u | (a.y>>9));
1291 rval = mix(__packFloat32(aSign, 0xFF, 0u), rval, (aFracHi | aFracLo) != 0u);
1294 __shift64RightJamming(aFracHi, aFracLo, 22, allZero, zFrac);
1295 zFrac = mix(zFrac, zFrac | 0x40000000u, aExp != 0);
1296 return __roundAndPackFloat32(aSign, aExp - 0x381, zFrac);
1300 __uint64_to_fp32(uint64_t __a)
1303 uvec2 aFrac = unpackUint2x32(__a);
1304 int shiftCount = __countLeadingZeros32(mix(aFrac.y, aFrac.x, aFrac.y == 0u));
1305 shiftCount -= mix(40, 8, aFrac.y == 0u);
1307 if (0 <= shiftCount) {
1308 __shortShift64Left(aFrac.y, aFrac.x, shiftCount, aFrac.y, aFrac.x);
1309 bool is_zero = (aFrac.y | aFrac.x) == 0u;
1310 return mix(__packFloat32(0u, 0x95 - shiftCount, aFrac.x), 0, is_zero);
1314 __shift64RightJamming(aFrac.y, aFrac.x, -shiftCount, aFrac.y, aFrac.x);
1315 zFrac = mix(aFrac.x<<shiftCount, aFrac.x, shiftCount < 0);
1316 return __roundAndPackFloat32(0u, 0x9C - shiftCount, zFrac);
1320 __int64_to_fp32(int64_t __a)
1323 uint aSign = uint(__a < 0);
1324 uint64_t absA = mix(uint64_t(__a), uint64_t(-__a), __a < 0);
1325 uvec2 aFrac = unpackUint2x32(absA);
1326 int shiftCount = __countLeadingZeros32(mix(aFrac.y, aFrac.x, aFrac.y == 0u));
1327 shiftCount -= mix(40, 8, aFrac.y == 0u);
1329 if (0 <= shiftCount) {
1330 __shortShift64Left(aFrac.y, aFrac.x, shiftCount, aFrac.y, aFrac.x);
1331 bool is_zero = (aFrac.y | aFrac.x) == 0u;
1332 return mix(__packFloat32(aSign, 0x95 - shiftCount, aFrac.x), 0, absA == 0u);
1336 __shift64RightJamming(aFrac.y, aFrac.x, -shiftCount, aFrac.y, aFrac.x);
1337 zFrac = mix(aFrac.x<<shiftCount, aFrac.x, shiftCount < 0);
1338 return __roundAndPackFloat32(aSign, 0x9C - shiftCount, zFrac);
1341 /* Returns the result of converting the single-precision floating-point value
1342 * `a' to the double-precision floating-point format.
1345 __fp32_to_fp64(float f)
1347 uint a = floatBitsToUint(f);
1348 uint aFrac = a & 0x007FFFFFu;
1349 int aExp = int((a>>23) & 0xFFu);
1358 __shift64Right(nanHi, nanLo, 12, nanHi, nanLo);
1359 nanHi |= ((aSign<<31) | 0x7FF80000u);
1360 return packUint2x32(uvec2(nanLo, nanHi));
1362 return __packFloat64(aSign, 0x7FF, 0u, 0u);
1367 return __packFloat64(aSign, 0, 0u, 0u);
1368 /* Normalize subnormal */
1369 int shiftCount = __countLeadingZeros32(aFrac) - 8;
1370 aFrac <<= shiftCount;
1371 aExp = 1 - shiftCount;
1375 __shift64Right(aFrac, 0u, 3, zFrac0, zFrac1);
1376 return __packFloat64(aSign, aExp + 0x380, zFrac0, zFrac1);
1379 /* Adds the 96-bit value formed by concatenating `a0', `a1', and `a2' to the
1380 * 96-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
1381 * modulo 2^96, so any carry out is lost. The result is broken into three
1382 * 32-bit pieces which are stored at the locations pointed to by `z0Ptr',
1383 * `z1Ptr', and `z2Ptr'.
1386 __add96(uint a0, uint a1, uint a2,
1387 uint b0, uint b1, uint b2,
1393 uint carry1 = uint(z2 < a2);
1395 uint carry0 = uint(z1 < a1);
1398 z0 += uint(z1 < carry1);
1405 /* Subtracts the 96-bit value formed by concatenating `b0', `b1', and `b2' from
1406 * the 96-bit value formed by concatenating `a0', `a1', and `a2'. Subtraction
1407 * is modulo 2^96, so any borrow out (carry out) is lost. The result is broken
1408 * into three 32-bit pieces which are stored at the locations pointed to by
1409 * `z0Ptr', `z1Ptr', and `z2Ptr'.
1412 __sub96(uint a0, uint a1, uint a2,
1413 uint b0, uint b1, uint b2,
1419 uint borrow1 = uint(a2 < b2);
1421 uint borrow0 = uint(a1 < b1);
1423 z0 -= uint(z1 < borrow1);
1431 /* Returns an approximation to the 32-bit integer quotient obtained by dividing
1432 * `b' into the 64-bit value formed by concatenating `a0' and `a1'. The
1433 * divisor `b' must be at least 2^31. If q is the exact quotient truncated
1434 * toward zero, the approximation returned lies between q and q + 2 inclusive.
1435 * If the exact quotient q is larger than 32 bits, the maximum positive 32-bit
1436 * unsigned integer is returned.
1439 __estimateDiv64To32(uint a0, uint a1, uint b)
1452 z = (b0<<16 <= a0) ? 0xFFFF0000u : (a0 / b0)<<16;
1453 __mul32To64(b, z, term0, term1);
1454 __sub64(a0, a1, term0, term1, rem0, rem1);
1455 while (int(rem0) < 0) {
1458 __add64(rem0, rem1, b0, b1, rem0, rem1);
1460 rem0 = (rem0<<16) | (rem1>>16);
1461 z |= (b0<<16 <= rem0) ? 0xFFFFu : rem0 / b0;
1466 __sqrtOddAdjustments(int index)
1506 __sqrtEvenAdjustments(int index)
1545 /* Returns an approximation to the square root of the 32-bit significand given
1546 * by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
1547 * `aExp' (the least significant bit) is 1, the integer returned approximates
1548 * 2^31*sqrt(`a'/2^31), where `a' is considered an integer. If bit 0 of `aExp'
1549 * is 0, the integer returned approximates 2^31*sqrt(`a'/2^30). In either
1550 * case, the approximation returned lies strictly within +/-2 of the exact
1554 __estimateSqrt32(int aExp, uint a)
1558 int index = int(a>>27 & 15u);
1559 if ((aExp & 1) != 0) {
1560 z = 0x4000u + (a>>17) - __sqrtOddAdjustments(index);
1561 z = ((a / z)<<14) + (z<<15);
1564 z = 0x8000u + (a>>17) - __sqrtEvenAdjustments(index);
1566 z = (0x20000u <= z) ? 0xFFFF8000u : (z<<15);
1568 return uint(int(a)>>1);
1570 return ((__estimateDiv64To32(a, 0u, z))>>1) + (z>>1);
1573 /* Returns the square root of the double-precision floating-point value `a'.
1574 * The operation is performed according to the IEEE Standard for Floating-Point
1578 __fsqrt64(uint64_t a)
1583 uint doubleZFrac0 = 0u;
1592 uint64_t default_nan = 0xFFFFFFFFFFFFFFFFUL;
1594 uint aFracLo = __extractFloat64FracLo(a);
1595 uint aFracHi = __extractFloat64FracHi(a);
1596 int aExp = __extractFloat64Exp(a);
1597 uint aSign = __extractFloat64Sign(a);
1598 if (aExp == 0x7FF) {
1599 if ((aFracHi | aFracLo) != 0u)
1600 return __propagateFloat64NaN(a, a);
1606 if ((uint(aExp) | aFracHi | aFracLo) == 0u)
1611 if ((aFracHi | aFracLo) == 0u)
1612 return __packFloat64(0u, 0, 0u, 0u);
1613 __normalizeFloat64Subnormal(aFracHi, aFracLo, aExp, aFracHi, aFracLo);
1615 int zExp = ((aExp - 0x3FF)>>1) + 0x3FE;
1616 aFracHi |= 0x00100000u;
1617 __shortShift64Left(aFracHi, aFracLo, 11, term0, term1);
1618 zFrac0 = (__estimateSqrt32(aExp, term0)>>1) + 1u;
1620 zFrac0 = 0x7FFFFFFFu;
1621 doubleZFrac0 = zFrac0 + zFrac0;
1622 __shortShift64Left(aFracHi, aFracLo, 9 - (aExp & 1), aFracHi, aFracLo);
1623 __mul32To64(zFrac0, zFrac0, term0, term1);
1624 __sub64(aFracHi, aFracLo, term0, term1, rem0, rem1);
1625 while (int(rem0) < 0) {
1628 __add64(rem0, rem1, 0u, doubleZFrac0 | 1u, rem0, rem1);
1630 zFrac1 = __estimateDiv64To32(rem1, 0u, doubleZFrac0);
1631 if ((zFrac1 & 0x1FFu) <= 5u) {
1634 __mul32To64(doubleZFrac0, zFrac1, term1, term2);
1635 __sub64(rem1, 0u, term1, term2, rem1, rem2);
1636 __mul32To64(zFrac1, zFrac1, term2, term3);
1637 __sub96(rem1, rem2, 0u, 0u, term2, term3, rem1, rem2, rem3);
1638 while (int(rem1) < 0) {
1640 __shortShift64Left(0u, zFrac1, 1, term2, term3);
1642 term2 |= doubleZFrac0;
1643 __add96(rem1, rem2, rem3, 0u, term2, term3, rem1, rem2, rem3);
1645 zFrac1 |= uint((rem1 | rem2 | rem3) != 0u);
1647 __shift64ExtraRightJamming(zFrac0, zFrac1, 0u, 10, zFrac0, zFrac1, zFrac2);
1648 return __roundAndPackFloat64(0u, zExp, zFrac0, zFrac1, zFrac2);
1652 __ftrunc64(uint64_t __a)
1654 uvec2 a = unpackUint2x32(__a);
1655 int aExp = __extractFloat64Exp(__a);
1659 int unbiasedExp = aExp - 1023;
1660 int fracBits = 52 - unbiasedExp;
1661 uint maskLo = mix(~0u << fracBits, 0u, fracBits >= 32);
1662 uint maskHi = mix(~0u << (fracBits - 32), ~0u, fracBits < 33);
1666 zLo = mix(zLo, 0u, unbiasedExp < 0);
1667 zHi = mix(zHi, 0u, unbiasedExp < 0);
1668 zLo = mix(zLo, a.x, unbiasedExp > 52);
1669 zHi = mix(zHi, a.y, unbiasedExp > 52);
1670 return packUint2x32(uvec2(zLo, zHi));
1674 __ffloor64(uint64_t a)
1676 bool is_positive = __fge64(a, 0ul);
1677 uint64_t tr = __ftrunc64(a);
1679 if (is_positive || __feq64(tr, a)) {
1682 return __fadd64(tr, 0xbff0000000000000ul /* -1.0 */);
1687 __fround64(uint64_t __a)
1689 uvec2 a = unpackUint2x32(__a);
1690 int unbiasedExp = __extractFloat64Exp(__a) - 1023;
1694 if (unbiasedExp < 20) {
1695 if (unbiasedExp < 0) {
1696 if ((aHi & 0x80000000u) != 0u && aLo == 0u) {
1700 if ((a.y & 0x000FFFFFu) == 0u && a.x == 0u) {
1702 return packUint2x32(uvec2(aLo, aHi));
1704 aHi = mix(aHi, (aHi | 0x3FF00000u), unbiasedExp == -1);
1707 uint maskExp = 0x000FFFFFu >> unbiasedExp;
1708 uint lastBit = maskExp + 1;
1709 aHi += 0x00080000u >> unbiasedExp;
1710 if ((aHi & maskExp) == 0u)
1715 } else if (unbiasedExp > 51 || unbiasedExp == 1024) {
1718 uint maskExp = 0xFFFFFFFFu >> (unbiasedExp - 20);
1719 if ((aLo & maskExp) == 0u)
1721 uint tmp = aLo + (1u << (51 - unbiasedExp));
1728 return packUint2x32(uvec2(aLo, aHi));
1732 __fmin64(uint64_t a, uint64_t b)
1734 if (__is_nan(a)) return b;
1735 if (__is_nan(b)) return a;
1737 if (__flt64_nonnan(a, b)) return a;
1742 __fmax64(uint64_t a, uint64_t b)
1744 if (__is_nan(a)) return b;
1745 if (__is_nan(b)) return a;
1747 if (__flt64_nonnan(a, b)) return b;
1752 __ffract64(uint64_t a)
1754 return __fadd64(a, __fneg64(__ffloor64(a)));