nir/drawpixels: handle load_color0, load_input, load_interpolated_input
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_deref.h"
38 #include "main/errors.h"
39 #include "main/imports.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43
44 /*
45 * pass to lower GLSL IR to NIR
46 *
47 * This will lower variable dereferences to loads/stores of corresponding
48 * variables in NIR - the variables will be converted to registers in a later
49 * pass.
50 */
51
52 namespace {
53
54 class nir_visitor : public ir_visitor
55 {
56 public:
57 nir_visitor(gl_context *ctx, nir_shader *shader);
58 ~nir_visitor();
59
60 virtual void visit(ir_variable *);
61 virtual void visit(ir_function *);
62 virtual void visit(ir_function_signature *);
63 virtual void visit(ir_loop *);
64 virtual void visit(ir_if *);
65 virtual void visit(ir_discard *);
66 virtual void visit(ir_demote *);
67 virtual void visit(ir_loop_jump *);
68 virtual void visit(ir_return *);
69 virtual void visit(ir_call *);
70 virtual void visit(ir_assignment *);
71 virtual void visit(ir_emit_vertex *);
72 virtual void visit(ir_end_primitive *);
73 virtual void visit(ir_expression *);
74 virtual void visit(ir_swizzle *);
75 virtual void visit(ir_texture *);
76 virtual void visit(ir_constant *);
77 virtual void visit(ir_dereference_variable *);
78 virtual void visit(ir_dereference_record *);
79 virtual void visit(ir_dereference_array *);
80 virtual void visit(ir_barrier *);
81
82 void create_function(ir_function_signature *ir);
83
84 private:
85 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
86 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
87
88 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
91 nir_ssa_def *src2);
92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
93 nir_ssa_def *src2, nir_ssa_def *src3);
94
95 bool supports_std430;
96
97 nir_shader *shader;
98 nir_function_impl *impl;
99 nir_builder b;
100 nir_ssa_def *result; /* result of the expression tree last visited */
101
102 nir_deref_instr *evaluate_deref(ir_instruction *ir);
103
104 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
105
106 /* most recent deref instruction created */
107 nir_deref_instr *deref;
108
109 /* whether the IR we're operating on is per-function or global */
110 bool is_global;
111
112 ir_function_signature *sig;
113
114 /* map of ir_variable -> nir_variable */
115 struct hash_table *var_table;
116
117 /* map of ir_function_signature -> nir_function_overload */
118 struct hash_table *overload_table;
119 };
120
121 /*
122 * This visitor runs before the main visitor, calling create_function() for
123 * each function so that the main visitor can resolve forward references in
124 * calls.
125 */
126
127 class nir_function_visitor : public ir_hierarchical_visitor
128 {
129 public:
130 nir_function_visitor(nir_visitor *v) : visitor(v)
131 {
132 }
133 virtual ir_visitor_status visit_enter(ir_function *);
134
135 private:
136 nir_visitor *visitor;
137 };
138
139 /* glsl_to_nir can only handle converting certain function paramaters
140 * to NIR. This visitor checks for parameters it can't currently handle.
141 */
142 class ir_function_param_visitor : public ir_hierarchical_visitor
143 {
144 public:
145 ir_function_param_visitor()
146 : unsupported(false)
147 {
148 }
149
150 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
151 {
152
153 if (ir->is_intrinsic())
154 return visit_continue;
155
156 foreach_in_list(ir_variable, param, &ir->parameters) {
157 if (!param->type->is_vector() || !param->type->is_scalar()) {
158 unsupported = true;
159 return visit_stop;
160 }
161
162 if (param->data.mode == ir_var_function_inout) {
163 unsupported = true;
164 return visit_stop;
165 }
166 }
167
168 return visit_continue;
169 }
170
171 bool unsupported;
172 };
173
174 } /* end of anonymous namespace */
175
176
177 static bool
178 has_unsupported_function_param(exec_list *ir)
179 {
180 ir_function_param_visitor visitor;
181 visit_list_elements(&visitor, ir);
182 return visitor.unsupported;
183 }
184
185 nir_shader *
186 glsl_to_nir(struct gl_context *ctx,
187 const struct gl_shader_program *shader_prog,
188 gl_shader_stage stage,
189 const nir_shader_compiler_options *options)
190 {
191 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
192
193 const struct gl_shader_compiler_options *gl_options =
194 &ctx->Const.ShaderCompilerOptions[stage];
195
196 /* glsl_to_nir can only handle converting certain function paramaters
197 * to NIR. If we find something we can't handle then we get the GLSL IR
198 * opts to remove it before we continue on.
199 *
200 * TODO: add missing glsl ir to nir support and remove this loop.
201 */
202 while (has_unsupported_function_param(sh->ir)) {
203 do_common_optimization(sh->ir, true, true, gl_options,
204 ctx->Const.NativeIntegers);
205 }
206
207 nir_shader *shader = nir_shader_create(NULL, stage, options,
208 &sh->Program->info);
209
210 nir_visitor v1(ctx, shader);
211 nir_function_visitor v2(&v1);
212 v2.run(sh->ir);
213 visit_exec_list(sh->ir, &v1);
214
215 nir_validate_shader(shader, "after glsl to nir, before function inline");
216
217 /* We have to lower away local constant initializers right before we
218 * inline functions. That way they get properly initialized at the top
219 * of the function and not at the top of its caller.
220 */
221 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
222 nir_lower_returns(shader);
223 nir_inline_functions(shader);
224 nir_opt_deref(shader);
225
226 nir_validate_shader(shader, "after function inlining and return lowering");
227
228 /* Now that we have inlined everything remove all of the functions except
229 * main().
230 */
231 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
232 if (strcmp("main", function->name) != 0) {
233 exec_node_remove(&function->node);
234 }
235 }
236
237 /* Remap the locations to slots so those requiring two slots will occupy
238 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
239 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
240 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
241 if (shader->info.stage == MESA_SHADER_VERTEX)
242 nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
243
244 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
245 if (shader_prog->Label)
246 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
247
248 /* Check for transform feedback varyings specified via the API */
249 shader->info.has_transform_feedback_varyings =
250 shader_prog->TransformFeedback.NumVarying > 0;
251
252 /* Check for transform feedback varyings specified in the Shader */
253 if (shader_prog->last_vert_prog)
254 shader->info.has_transform_feedback_varyings |=
255 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
256
257 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
258 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
259 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
260 }
261
262 return shader;
263 }
264
265 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
266 {
267 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
268 this->shader = shader;
269 this->is_global = true;
270 this->var_table = _mesa_pointer_hash_table_create(NULL);
271 this->overload_table = _mesa_pointer_hash_table_create(NULL);
272 this->result = NULL;
273 this->impl = NULL;
274 this->deref = NULL;
275 this->sig = NULL;
276 memset(&this->b, 0, sizeof(this->b));
277 }
278
279 nir_visitor::~nir_visitor()
280 {
281 _mesa_hash_table_destroy(this->var_table, NULL);
282 _mesa_hash_table_destroy(this->overload_table, NULL);
283 }
284
285 nir_deref_instr *
286 nir_visitor::evaluate_deref(ir_instruction *ir)
287 {
288 ir->accept(this);
289 return this->deref;
290 }
291
292 nir_constant *
293 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
294 {
295 if (ir == NULL)
296 return NULL;
297
298 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
299
300 const unsigned rows = ir->type->vector_elements;
301 const unsigned cols = ir->type->matrix_columns;
302 unsigned i;
303
304 ret->num_elements = 0;
305 switch (ir->type->base_type) {
306 case GLSL_TYPE_UINT:
307 /* Only float base types can be matrices. */
308 assert(cols == 1);
309
310 for (unsigned r = 0; r < rows; r++)
311 ret->values[r].u32 = ir->value.u[r];
312
313 break;
314
315 case GLSL_TYPE_INT:
316 /* Only float base types can be matrices. */
317 assert(cols == 1);
318
319 for (unsigned r = 0; r < rows; r++)
320 ret->values[r].i32 = ir->value.i[r];
321
322 break;
323
324 case GLSL_TYPE_FLOAT:
325 case GLSL_TYPE_DOUBLE:
326 if (cols > 1) {
327 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
328 ret->num_elements = cols;
329 for (unsigned c = 0; c < cols; c++) {
330 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
331 col_const->num_elements = 0;
332 switch (ir->type->base_type) {
333 case GLSL_TYPE_FLOAT:
334 for (unsigned r = 0; r < rows; r++)
335 col_const->values[r].f32 = ir->value.f[c * rows + r];
336 break;
337
338 case GLSL_TYPE_DOUBLE:
339 for (unsigned r = 0; r < rows; r++)
340 col_const->values[r].f64 = ir->value.d[c * rows + r];
341 break;
342
343 default:
344 unreachable("Cannot get here from the first level switch");
345 }
346 ret->elements[c] = col_const;
347 }
348 } else {
349 switch (ir->type->base_type) {
350 case GLSL_TYPE_FLOAT:
351 for (unsigned r = 0; r < rows; r++)
352 ret->values[r].f32 = ir->value.f[r];
353 break;
354
355 case GLSL_TYPE_DOUBLE:
356 for (unsigned r = 0; r < rows; r++)
357 ret->values[r].f64 = ir->value.d[r];
358 break;
359
360 default:
361 unreachable("Cannot get here from the first level switch");
362 }
363 }
364 break;
365
366 case GLSL_TYPE_UINT64:
367 /* Only float base types can be matrices. */
368 assert(cols == 1);
369
370 for (unsigned r = 0; r < rows; r++)
371 ret->values[r].u64 = ir->value.u64[r];
372 break;
373
374 case GLSL_TYPE_INT64:
375 /* Only float base types can be matrices. */
376 assert(cols == 1);
377
378 for (unsigned r = 0; r < rows; r++)
379 ret->values[r].i64 = ir->value.i64[r];
380 break;
381
382 case GLSL_TYPE_BOOL:
383 /* Only float base types can be matrices. */
384 assert(cols == 1);
385
386 for (unsigned r = 0; r < rows; r++)
387 ret->values[r].b = ir->value.b[r];
388
389 break;
390
391 case GLSL_TYPE_STRUCT:
392 case GLSL_TYPE_ARRAY:
393 ret->elements = ralloc_array(mem_ctx, nir_constant *,
394 ir->type->length);
395 ret->num_elements = ir->type->length;
396
397 for (i = 0; i < ir->type->length; i++)
398 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 return ret;
406 }
407
408 static const glsl_type *
409 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
410 {
411 if (!array_type->is_array())
412 return elem_type;
413
414 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
415
416 return glsl_type::get_array_instance(elem_type, array_type->length);
417 }
418
419 void
420 nir_visitor::visit(ir_variable *ir)
421 {
422 /* TODO: In future we should switch to using the NIR lowering pass but for
423 * now just ignore these variables as GLSL IR should have lowered them.
424 * Anything remaining are just dead vars that weren't cleaned up.
425 */
426 if (ir->data.mode == ir_var_shader_shared)
427 return;
428
429 /* FINISHME: inout parameters */
430 assert(ir->data.mode != ir_var_function_inout);
431
432 if (ir->data.mode == ir_var_function_out)
433 return;
434
435 nir_variable *var = rzalloc(shader, nir_variable);
436 var->type = ir->type;
437 var->name = ralloc_strdup(var, ir->name);
438
439 var->data.always_active_io = ir->data.always_active_io;
440 var->data.read_only = ir->data.read_only;
441 var->data.centroid = ir->data.centroid;
442 var->data.sample = ir->data.sample;
443 var->data.patch = ir->data.patch;
444 var->data.invariant = ir->data.invariant;
445 var->data.location = ir->data.location;
446 var->data.stream = ir->data.stream;
447 var->data.compact = false;
448
449 switch(ir->data.mode) {
450 case ir_var_auto:
451 case ir_var_temporary:
452 if (is_global)
453 var->data.mode = nir_var_shader_temp;
454 else
455 var->data.mode = nir_var_function_temp;
456 break;
457
458 case ir_var_function_in:
459 case ir_var_const_in:
460 var->data.mode = nir_var_function_temp;
461 break;
462
463 case ir_var_shader_in:
464 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
465 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
466 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
467 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
468 var->data.mode = nir_var_system_value;
469 } else {
470 var->data.mode = nir_var_shader_in;
471
472 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
473 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
474 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
475 var->data.compact = ir->type->without_array()->is_scalar();
476 }
477
478 if (shader->info.stage > MESA_SHADER_VERTEX &&
479 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
480 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
481 var->data.compact = ir->type->without_array()->is_scalar();
482 }
483 }
484 break;
485
486 case ir_var_shader_out:
487 var->data.mode = nir_var_shader_out;
488 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
489 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
490 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
491 var->data.compact = ir->type->without_array()->is_scalar();
492 }
493
494 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
495 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
496 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
497 var->data.compact = ir->type->without_array()->is_scalar();
498 }
499 break;
500
501 case ir_var_uniform:
502 if (ir->get_interface_type())
503 var->data.mode = nir_var_mem_ubo;
504 else
505 var->data.mode = nir_var_uniform;
506 break;
507
508 case ir_var_shader_storage:
509 var->data.mode = nir_var_mem_ssbo;
510 break;
511
512 case ir_var_system_value:
513 var->data.mode = nir_var_system_value;
514 break;
515
516 default:
517 unreachable("not reached");
518 }
519
520 unsigned image_access = 0;
521 if (ir->data.memory_read_only)
522 image_access |= ACCESS_NON_WRITEABLE;
523 if (ir->data.memory_write_only)
524 image_access |= ACCESS_NON_READABLE;
525 if (ir->data.memory_coherent)
526 image_access |= ACCESS_COHERENT;
527 if (ir->data.memory_volatile)
528 image_access |= ACCESS_VOLATILE;
529 if (ir->data.memory_restrict)
530 image_access |= ACCESS_RESTRICT;
531
532 /* For UBO and SSBO variables, we need explicit types */
533 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
534 const glsl_type *explicit_ifc_type =
535 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
536
537 if (ir->type->without_array()->is_interface()) {
538 /* If the type contains the interface, wrap the explicit type in the
539 * right number of arrays.
540 */
541 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
542 } else {
543 /* Otherwise, this variable is one entry in the interface */
544 UNUSED bool found = false;
545 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
546 const glsl_struct_field *field =
547 &explicit_ifc_type->fields.structure[i];
548 if (strcmp(ir->name, field->name) != 0)
549 continue;
550
551 var->type = field->type;
552 if (field->memory_read_only)
553 image_access |= ACCESS_NON_WRITEABLE;
554 if (field->memory_write_only)
555 image_access |= ACCESS_NON_READABLE;
556 if (field->memory_coherent)
557 image_access |= ACCESS_COHERENT;
558 if (field->memory_volatile)
559 image_access |= ACCESS_VOLATILE;
560 if (field->memory_restrict)
561 image_access |= ACCESS_RESTRICT;
562
563 found = true;
564 break;
565 }
566 assert(found);
567 }
568 }
569
570 var->data.interpolation = ir->data.interpolation;
571 var->data.location_frac = ir->data.location_frac;
572
573 switch (ir->data.depth_layout) {
574 case ir_depth_layout_none:
575 var->data.depth_layout = nir_depth_layout_none;
576 break;
577 case ir_depth_layout_any:
578 var->data.depth_layout = nir_depth_layout_any;
579 break;
580 case ir_depth_layout_greater:
581 var->data.depth_layout = nir_depth_layout_greater;
582 break;
583 case ir_depth_layout_less:
584 var->data.depth_layout = nir_depth_layout_less;
585 break;
586 case ir_depth_layout_unchanged:
587 var->data.depth_layout = nir_depth_layout_unchanged;
588 break;
589 default:
590 unreachable("not reached");
591 }
592
593 var->data.index = ir->data.index;
594 var->data.descriptor_set = 0;
595 var->data.binding = ir->data.binding;
596 var->data.explicit_binding = ir->data.explicit_binding;
597 var->data.bindless = ir->data.bindless;
598 var->data.offset = ir->data.offset;
599
600 var->data.image.access = (gl_access_qualifier)image_access;
601 var->data.image.format = ir->data.image_format;
602
603 var->data.fb_fetch_output = ir->data.fb_fetch_output;
604 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
605 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
606 var->data.xfb_buffer = ir->data.xfb_buffer;
607 var->data.xfb_stride = ir->data.xfb_stride;
608
609 var->num_state_slots = ir->get_num_state_slots();
610 if (var->num_state_slots > 0) {
611 var->state_slots = rzalloc_array(var, nir_state_slot,
612 var->num_state_slots);
613
614 ir_state_slot *state_slots = ir->get_state_slots();
615 for (unsigned i = 0; i < var->num_state_slots; i++) {
616 for (unsigned j = 0; j < 5; j++)
617 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
618 var->state_slots[i].swizzle = state_slots[i].swizzle;
619 }
620 } else {
621 var->state_slots = NULL;
622 }
623
624 var->constant_initializer = constant_copy(ir->constant_initializer, var);
625
626 var->interface_type = ir->get_interface_type();
627
628 if (var->data.mode == nir_var_function_temp)
629 nir_function_impl_add_variable(impl, var);
630 else
631 nir_shader_add_variable(shader, var);
632
633 _mesa_hash_table_insert(var_table, ir, var);
634 }
635
636 ir_visitor_status
637 nir_function_visitor::visit_enter(ir_function *ir)
638 {
639 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
640 visitor->create_function(sig);
641 }
642 return visit_continue_with_parent;
643 }
644
645 void
646 nir_visitor::create_function(ir_function_signature *ir)
647 {
648 if (ir->is_intrinsic())
649 return;
650
651 nir_function *func = nir_function_create(shader, ir->function_name());
652 if (strcmp(ir->function_name(), "main") == 0)
653 func->is_entrypoint = true;
654
655 func->num_params = ir->parameters.length() +
656 (ir->return_type != glsl_type::void_type);
657 func->params = ralloc_array(shader, nir_parameter, func->num_params);
658
659 unsigned np = 0;
660
661 if (ir->return_type != glsl_type::void_type) {
662 /* The return value is a variable deref (basically an out parameter) */
663 func->params[np].num_components = 1;
664 func->params[np].bit_size = 32;
665 np++;
666 }
667
668 foreach_in_list(ir_variable, param, &ir->parameters) {
669 /* FINISHME: pass arrays, structs, etc by reference? */
670 assert(param->type->is_vector() || param->type->is_scalar());
671
672 if (param->data.mode == ir_var_function_in) {
673 func->params[np].num_components = param->type->vector_elements;
674 func->params[np].bit_size = glsl_get_bit_size(param->type);
675 } else {
676 func->params[np].num_components = 1;
677 func->params[np].bit_size = 32;
678 }
679 np++;
680 }
681 assert(np == func->num_params);
682
683 _mesa_hash_table_insert(this->overload_table, ir, func);
684 }
685
686 void
687 nir_visitor::visit(ir_function *ir)
688 {
689 foreach_in_list(ir_function_signature, sig, &ir->signatures)
690 sig->accept(this);
691 }
692
693 void
694 nir_visitor::visit(ir_function_signature *ir)
695 {
696 if (ir->is_intrinsic())
697 return;
698
699 this->sig = ir;
700
701 struct hash_entry *entry =
702 _mesa_hash_table_search(this->overload_table, ir);
703
704 assert(entry);
705 nir_function *func = (nir_function *) entry->data;
706
707 if (ir->is_defined) {
708 nir_function_impl *impl = nir_function_impl_create(func);
709 this->impl = impl;
710
711 this->is_global = false;
712
713 nir_builder_init(&b, impl);
714 b.cursor = nir_after_cf_list(&impl->body);
715
716 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
717
718 foreach_in_list(ir_variable, param, &ir->parameters) {
719 nir_variable *var =
720 nir_local_variable_create(impl, param->type, param->name);
721
722 if (param->data.mode == ir_var_function_in) {
723 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
724 }
725
726 _mesa_hash_table_insert(var_table, param, var);
727 i++;
728 }
729
730 visit_exec_list(&ir->body, this);
731
732 this->is_global = true;
733 } else {
734 func->impl = NULL;
735 }
736 }
737
738 void
739 nir_visitor::visit(ir_loop *ir)
740 {
741 nir_push_loop(&b);
742 visit_exec_list(&ir->body_instructions, this);
743 nir_pop_loop(&b, NULL);
744 }
745
746 void
747 nir_visitor::visit(ir_if *ir)
748 {
749 nir_push_if(&b, evaluate_rvalue(ir->condition));
750 visit_exec_list(&ir->then_instructions, this);
751 nir_push_else(&b, NULL);
752 visit_exec_list(&ir->else_instructions, this);
753 nir_pop_if(&b, NULL);
754 }
755
756 void
757 nir_visitor::visit(ir_discard *ir)
758 {
759 /*
760 * discards aren't treated as control flow, because before we lower them
761 * they can appear anywhere in the shader and the stuff after them may still
762 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
763 * discards will be immediately followed by a return.
764 */
765
766 nir_intrinsic_instr *discard;
767 if (ir->condition) {
768 discard = nir_intrinsic_instr_create(this->shader,
769 nir_intrinsic_discard_if);
770 discard->src[0] =
771 nir_src_for_ssa(evaluate_rvalue(ir->condition));
772 } else {
773 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
774 }
775
776 nir_builder_instr_insert(&b, &discard->instr);
777 }
778
779 void
780 nir_visitor::visit(ir_demote *ir)
781 {
782 nir_intrinsic_instr *demote =
783 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
784
785 nir_builder_instr_insert(&b, &demote->instr);
786 }
787
788 void
789 nir_visitor::visit(ir_emit_vertex *ir)
790 {
791 nir_intrinsic_instr *instr =
792 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
793 nir_intrinsic_set_stream_id(instr, ir->stream_id());
794 nir_builder_instr_insert(&b, &instr->instr);
795 }
796
797 void
798 nir_visitor::visit(ir_end_primitive *ir)
799 {
800 nir_intrinsic_instr *instr =
801 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
802 nir_intrinsic_set_stream_id(instr, ir->stream_id());
803 nir_builder_instr_insert(&b, &instr->instr);
804 }
805
806 void
807 nir_visitor::visit(ir_loop_jump *ir)
808 {
809 nir_jump_type type;
810 switch (ir->mode) {
811 case ir_loop_jump::jump_break:
812 type = nir_jump_break;
813 break;
814 case ir_loop_jump::jump_continue:
815 type = nir_jump_continue;
816 break;
817 default:
818 unreachable("not reached");
819 }
820
821 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
822 nir_builder_instr_insert(&b, &instr->instr);
823 }
824
825 void
826 nir_visitor::visit(ir_return *ir)
827 {
828 if (ir->value != NULL) {
829 nir_deref_instr *ret_deref =
830 nir_build_deref_cast(&b, nir_load_param(&b, 0),
831 nir_var_function_temp, ir->value->type, 0);
832
833 nir_ssa_def *val = evaluate_rvalue(ir->value);
834 nir_store_deref(&b, ret_deref, val, ~0);
835 }
836
837 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
838 nir_builder_instr_insert(&b, &instr->instr);
839 }
840
841 static void
842 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
843 {
844 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
845 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
846 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
847 }
848
849 /* Accumulate any qualifiers along the deref chain to get the actual
850 * load/store qualifier.
851 */
852
853 static enum gl_access_qualifier
854 deref_get_qualifier(nir_deref_instr *deref)
855 {
856 nir_deref_path path;
857 nir_deref_path_init(&path, deref, NULL);
858
859 unsigned qualifiers = path.path[0]->var->data.image.access;
860
861 const glsl_type *parent_type = path.path[0]->type;
862 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
863 nir_deref_instr *cur = *cur_ptr;
864
865 if (parent_type->is_interface()) {
866 const struct glsl_struct_field *field =
867 &parent_type->fields.structure[cur->strct.index];
868 if (field->memory_read_only)
869 qualifiers |= ACCESS_NON_WRITEABLE;
870 if (field->memory_write_only)
871 qualifiers |= ACCESS_NON_READABLE;
872 if (field->memory_coherent)
873 qualifiers |= ACCESS_COHERENT;
874 if (field->memory_volatile)
875 qualifiers |= ACCESS_VOLATILE;
876 if (field->memory_restrict)
877 qualifiers |= ACCESS_RESTRICT;
878 }
879
880 parent_type = cur->type;
881 }
882
883 nir_deref_path_finish(&path);
884
885 return (gl_access_qualifier) qualifiers;
886 }
887
888 void
889 nir_visitor::visit(ir_call *ir)
890 {
891 if (ir->callee->is_intrinsic()) {
892 nir_intrinsic_op op;
893
894 switch (ir->callee->intrinsic_id) {
895 case ir_intrinsic_generic_atomic_add:
896 op = ir->return_deref->type->is_integer_32_64()
897 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
898 break;
899 case ir_intrinsic_generic_atomic_and:
900 op = nir_intrinsic_deref_atomic_and;
901 break;
902 case ir_intrinsic_generic_atomic_or:
903 op = nir_intrinsic_deref_atomic_or;
904 break;
905 case ir_intrinsic_generic_atomic_xor:
906 op = nir_intrinsic_deref_atomic_xor;
907 break;
908 case ir_intrinsic_generic_atomic_min:
909 assert(ir->return_deref);
910 if (ir->return_deref->type == glsl_type::int_type)
911 op = nir_intrinsic_deref_atomic_imin;
912 else if (ir->return_deref->type == glsl_type::uint_type)
913 op = nir_intrinsic_deref_atomic_umin;
914 else if (ir->return_deref->type == glsl_type::float_type)
915 op = nir_intrinsic_deref_atomic_fmin;
916 else
917 unreachable("Invalid type");
918 break;
919 case ir_intrinsic_generic_atomic_max:
920 assert(ir->return_deref);
921 if (ir->return_deref->type == glsl_type::int_type)
922 op = nir_intrinsic_deref_atomic_imax;
923 else if (ir->return_deref->type == glsl_type::uint_type)
924 op = nir_intrinsic_deref_atomic_umax;
925 else if (ir->return_deref->type == glsl_type::float_type)
926 op = nir_intrinsic_deref_atomic_fmax;
927 else
928 unreachable("Invalid type");
929 break;
930 case ir_intrinsic_generic_atomic_exchange:
931 op = nir_intrinsic_deref_atomic_exchange;
932 break;
933 case ir_intrinsic_generic_atomic_comp_swap:
934 op = ir->return_deref->type->is_integer_32_64()
935 ? nir_intrinsic_deref_atomic_comp_swap
936 : nir_intrinsic_deref_atomic_fcomp_swap;
937 break;
938 case ir_intrinsic_atomic_counter_read:
939 op = nir_intrinsic_atomic_counter_read_deref;
940 break;
941 case ir_intrinsic_atomic_counter_increment:
942 op = nir_intrinsic_atomic_counter_inc_deref;
943 break;
944 case ir_intrinsic_atomic_counter_predecrement:
945 op = nir_intrinsic_atomic_counter_pre_dec_deref;
946 break;
947 case ir_intrinsic_atomic_counter_add:
948 op = nir_intrinsic_atomic_counter_add_deref;
949 break;
950 case ir_intrinsic_atomic_counter_and:
951 op = nir_intrinsic_atomic_counter_and_deref;
952 break;
953 case ir_intrinsic_atomic_counter_or:
954 op = nir_intrinsic_atomic_counter_or_deref;
955 break;
956 case ir_intrinsic_atomic_counter_xor:
957 op = nir_intrinsic_atomic_counter_xor_deref;
958 break;
959 case ir_intrinsic_atomic_counter_min:
960 op = nir_intrinsic_atomic_counter_min_deref;
961 break;
962 case ir_intrinsic_atomic_counter_max:
963 op = nir_intrinsic_atomic_counter_max_deref;
964 break;
965 case ir_intrinsic_atomic_counter_exchange:
966 op = nir_intrinsic_atomic_counter_exchange_deref;
967 break;
968 case ir_intrinsic_atomic_counter_comp_swap:
969 op = nir_intrinsic_atomic_counter_comp_swap_deref;
970 break;
971 case ir_intrinsic_image_load:
972 op = nir_intrinsic_image_deref_load;
973 break;
974 case ir_intrinsic_image_store:
975 op = nir_intrinsic_image_deref_store;
976 break;
977 case ir_intrinsic_image_atomic_add:
978 op = ir->return_deref->type->is_integer_32_64()
979 ? nir_intrinsic_image_deref_atomic_add
980 : nir_intrinsic_image_deref_atomic_fadd;
981 break;
982 case ir_intrinsic_image_atomic_min:
983 if (ir->return_deref->type == glsl_type::int_type)
984 op = nir_intrinsic_image_deref_atomic_imin;
985 else if (ir->return_deref->type == glsl_type::uint_type)
986 op = nir_intrinsic_image_deref_atomic_umin;
987 else
988 unreachable("Invalid type");
989 break;
990 case ir_intrinsic_image_atomic_max:
991 if (ir->return_deref->type == glsl_type::int_type)
992 op = nir_intrinsic_image_deref_atomic_imax;
993 else if (ir->return_deref->type == glsl_type::uint_type)
994 op = nir_intrinsic_image_deref_atomic_umax;
995 else
996 unreachable("Invalid type");
997 break;
998 case ir_intrinsic_image_atomic_and:
999 op = nir_intrinsic_image_deref_atomic_and;
1000 break;
1001 case ir_intrinsic_image_atomic_or:
1002 op = nir_intrinsic_image_deref_atomic_or;
1003 break;
1004 case ir_intrinsic_image_atomic_xor:
1005 op = nir_intrinsic_image_deref_atomic_xor;
1006 break;
1007 case ir_intrinsic_image_atomic_exchange:
1008 op = nir_intrinsic_image_deref_atomic_exchange;
1009 break;
1010 case ir_intrinsic_image_atomic_comp_swap:
1011 op = nir_intrinsic_image_deref_atomic_comp_swap;
1012 break;
1013 case ir_intrinsic_image_atomic_inc_wrap:
1014 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1015 break;
1016 case ir_intrinsic_image_atomic_dec_wrap:
1017 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1018 break;
1019 case ir_intrinsic_memory_barrier:
1020 op = nir_intrinsic_memory_barrier;
1021 break;
1022 case ir_intrinsic_image_size:
1023 op = nir_intrinsic_image_deref_size;
1024 break;
1025 case ir_intrinsic_image_samples:
1026 op = nir_intrinsic_image_deref_samples;
1027 break;
1028 case ir_intrinsic_ssbo_store:
1029 op = nir_intrinsic_store_ssbo;
1030 break;
1031 case ir_intrinsic_ssbo_load:
1032 op = nir_intrinsic_load_ssbo;
1033 break;
1034 case ir_intrinsic_ssbo_atomic_add:
1035 op = ir->return_deref->type->is_integer_32_64()
1036 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
1037 break;
1038 case ir_intrinsic_ssbo_atomic_and:
1039 op = nir_intrinsic_ssbo_atomic_and;
1040 break;
1041 case ir_intrinsic_ssbo_atomic_or:
1042 op = nir_intrinsic_ssbo_atomic_or;
1043 break;
1044 case ir_intrinsic_ssbo_atomic_xor:
1045 op = nir_intrinsic_ssbo_atomic_xor;
1046 break;
1047 case ir_intrinsic_ssbo_atomic_min:
1048 assert(ir->return_deref);
1049 if (ir->return_deref->type == glsl_type::int_type)
1050 op = nir_intrinsic_ssbo_atomic_imin;
1051 else if (ir->return_deref->type == glsl_type::uint_type)
1052 op = nir_intrinsic_ssbo_atomic_umin;
1053 else if (ir->return_deref->type == glsl_type::float_type)
1054 op = nir_intrinsic_ssbo_atomic_fmin;
1055 else
1056 unreachable("Invalid type");
1057 break;
1058 case ir_intrinsic_ssbo_atomic_max:
1059 assert(ir->return_deref);
1060 if (ir->return_deref->type == glsl_type::int_type)
1061 op = nir_intrinsic_ssbo_atomic_imax;
1062 else if (ir->return_deref->type == glsl_type::uint_type)
1063 op = nir_intrinsic_ssbo_atomic_umax;
1064 else if (ir->return_deref->type == glsl_type::float_type)
1065 op = nir_intrinsic_ssbo_atomic_fmax;
1066 else
1067 unreachable("Invalid type");
1068 break;
1069 case ir_intrinsic_ssbo_atomic_exchange:
1070 op = nir_intrinsic_ssbo_atomic_exchange;
1071 break;
1072 case ir_intrinsic_ssbo_atomic_comp_swap:
1073 op = ir->return_deref->type->is_integer_32_64()
1074 ? nir_intrinsic_ssbo_atomic_comp_swap
1075 : nir_intrinsic_ssbo_atomic_fcomp_swap;
1076 break;
1077 case ir_intrinsic_shader_clock:
1078 op = nir_intrinsic_shader_clock;
1079 break;
1080 case ir_intrinsic_begin_invocation_interlock:
1081 op = nir_intrinsic_begin_invocation_interlock;
1082 break;
1083 case ir_intrinsic_end_invocation_interlock:
1084 op = nir_intrinsic_end_invocation_interlock;
1085 break;
1086 case ir_intrinsic_group_memory_barrier:
1087 op = nir_intrinsic_group_memory_barrier;
1088 break;
1089 case ir_intrinsic_memory_barrier_atomic_counter:
1090 op = nir_intrinsic_memory_barrier_atomic_counter;
1091 break;
1092 case ir_intrinsic_memory_barrier_buffer:
1093 op = nir_intrinsic_memory_barrier_buffer;
1094 break;
1095 case ir_intrinsic_memory_barrier_image:
1096 op = nir_intrinsic_memory_barrier_image;
1097 break;
1098 case ir_intrinsic_memory_barrier_shared:
1099 op = nir_intrinsic_memory_barrier_shared;
1100 break;
1101 case ir_intrinsic_shared_load:
1102 op = nir_intrinsic_load_shared;
1103 break;
1104 case ir_intrinsic_shared_store:
1105 op = nir_intrinsic_store_shared;
1106 break;
1107 case ir_intrinsic_shared_atomic_add:
1108 op = ir->return_deref->type->is_integer_32_64()
1109 ? nir_intrinsic_shared_atomic_add
1110 : nir_intrinsic_shared_atomic_fadd;
1111 break;
1112 case ir_intrinsic_shared_atomic_and:
1113 op = nir_intrinsic_shared_atomic_and;
1114 break;
1115 case ir_intrinsic_shared_atomic_or:
1116 op = nir_intrinsic_shared_atomic_or;
1117 break;
1118 case ir_intrinsic_shared_atomic_xor:
1119 op = nir_intrinsic_shared_atomic_xor;
1120 break;
1121 case ir_intrinsic_shared_atomic_min:
1122 assert(ir->return_deref);
1123 if (ir->return_deref->type == glsl_type::int_type)
1124 op = nir_intrinsic_shared_atomic_imin;
1125 else if (ir->return_deref->type == glsl_type::uint_type)
1126 op = nir_intrinsic_shared_atomic_umin;
1127 else if (ir->return_deref->type == glsl_type::float_type)
1128 op = nir_intrinsic_shared_atomic_fmin;
1129 else
1130 unreachable("Invalid type");
1131 break;
1132 case ir_intrinsic_shared_atomic_max:
1133 assert(ir->return_deref);
1134 if (ir->return_deref->type == glsl_type::int_type)
1135 op = nir_intrinsic_shared_atomic_imax;
1136 else if (ir->return_deref->type == glsl_type::uint_type)
1137 op = nir_intrinsic_shared_atomic_umax;
1138 else if (ir->return_deref->type == glsl_type::float_type)
1139 op = nir_intrinsic_shared_atomic_fmax;
1140 else
1141 unreachable("Invalid type");
1142 break;
1143 case ir_intrinsic_shared_atomic_exchange:
1144 op = nir_intrinsic_shared_atomic_exchange;
1145 break;
1146 case ir_intrinsic_shared_atomic_comp_swap:
1147 op = ir->return_deref->type->is_integer_32_64()
1148 ? nir_intrinsic_shared_atomic_comp_swap
1149 : nir_intrinsic_shared_atomic_fcomp_swap;
1150 break;
1151 case ir_intrinsic_vote_any:
1152 op = nir_intrinsic_vote_any;
1153 break;
1154 case ir_intrinsic_vote_all:
1155 op = nir_intrinsic_vote_all;
1156 break;
1157 case ir_intrinsic_vote_eq:
1158 op = nir_intrinsic_vote_ieq;
1159 break;
1160 case ir_intrinsic_ballot:
1161 op = nir_intrinsic_ballot;
1162 break;
1163 case ir_intrinsic_read_invocation:
1164 op = nir_intrinsic_read_invocation;
1165 break;
1166 case ir_intrinsic_read_first_invocation:
1167 op = nir_intrinsic_read_first_invocation;
1168 break;
1169 case ir_intrinsic_helper_invocation:
1170 op = nir_intrinsic_is_helper_invocation;
1171 break;
1172 default:
1173 unreachable("not reached");
1174 }
1175
1176 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1177 nir_ssa_def *ret = &instr->dest.ssa;
1178
1179 switch (op) {
1180 case nir_intrinsic_deref_atomic_add:
1181 case nir_intrinsic_deref_atomic_imin:
1182 case nir_intrinsic_deref_atomic_umin:
1183 case nir_intrinsic_deref_atomic_imax:
1184 case nir_intrinsic_deref_atomic_umax:
1185 case nir_intrinsic_deref_atomic_and:
1186 case nir_intrinsic_deref_atomic_or:
1187 case nir_intrinsic_deref_atomic_xor:
1188 case nir_intrinsic_deref_atomic_exchange:
1189 case nir_intrinsic_deref_atomic_comp_swap:
1190 case nir_intrinsic_deref_atomic_fadd:
1191 case nir_intrinsic_deref_atomic_fmin:
1192 case nir_intrinsic_deref_atomic_fmax:
1193 case nir_intrinsic_deref_atomic_fcomp_swap: {
1194 int param_count = ir->actual_parameters.length();
1195 assert(param_count == 2 || param_count == 3);
1196
1197 /* Deref */
1198 exec_node *param = ir->actual_parameters.get_head();
1199 ir_rvalue *rvalue = (ir_rvalue *) param;
1200 ir_dereference *deref = rvalue->as_dereference();
1201 ir_swizzle *swizzle = NULL;
1202 if (!deref) {
1203 /* We may have a swizzle to pick off a single vec4 component */
1204 swizzle = rvalue->as_swizzle();
1205 assert(swizzle && swizzle->type->vector_elements == 1);
1206 deref = swizzle->val->as_dereference();
1207 assert(deref);
1208 }
1209 nir_deref_instr *nir_deref = evaluate_deref(deref);
1210 if (swizzle) {
1211 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1212 swizzle->mask.x);
1213 }
1214 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1215
1216 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1217
1218 /* data1 parameter (this is always present) */
1219 param = param->get_next();
1220 ir_instruction *inst = (ir_instruction *) param;
1221 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1222
1223 /* data2 parameter (only with atomic_comp_swap) */
1224 if (param_count == 3) {
1225 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1226 op == nir_intrinsic_deref_atomic_fcomp_swap);
1227 param = param->get_next();
1228 inst = (ir_instruction *) param;
1229 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1230 }
1231
1232 /* Atomic result */
1233 assert(ir->return_deref);
1234 nir_ssa_dest_init(&instr->instr, &instr->dest,
1235 ir->return_deref->type->vector_elements, 32, NULL);
1236 nir_builder_instr_insert(&b, &instr->instr);
1237 break;
1238 }
1239 case nir_intrinsic_atomic_counter_read_deref:
1240 case nir_intrinsic_atomic_counter_inc_deref:
1241 case nir_intrinsic_atomic_counter_pre_dec_deref:
1242 case nir_intrinsic_atomic_counter_add_deref:
1243 case nir_intrinsic_atomic_counter_min_deref:
1244 case nir_intrinsic_atomic_counter_max_deref:
1245 case nir_intrinsic_atomic_counter_and_deref:
1246 case nir_intrinsic_atomic_counter_or_deref:
1247 case nir_intrinsic_atomic_counter_xor_deref:
1248 case nir_intrinsic_atomic_counter_exchange_deref:
1249 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1250 /* Set the counter variable dereference. */
1251 exec_node *param = ir->actual_parameters.get_head();
1252 ir_dereference *counter = (ir_dereference *)param;
1253
1254 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1255 param = param->get_next();
1256
1257 /* Set the intrinsic destination. */
1258 if (ir->return_deref) {
1259 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1260 }
1261
1262 /* Set the intrinsic parameters. */
1263 if (!param->is_tail_sentinel()) {
1264 instr->src[1] =
1265 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1266 param = param->get_next();
1267 }
1268
1269 if (!param->is_tail_sentinel()) {
1270 instr->src[2] =
1271 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1272 param = param->get_next();
1273 }
1274
1275 nir_builder_instr_insert(&b, &instr->instr);
1276 break;
1277 }
1278 case nir_intrinsic_image_deref_load:
1279 case nir_intrinsic_image_deref_store:
1280 case nir_intrinsic_image_deref_atomic_add:
1281 case nir_intrinsic_image_deref_atomic_imin:
1282 case nir_intrinsic_image_deref_atomic_umin:
1283 case nir_intrinsic_image_deref_atomic_imax:
1284 case nir_intrinsic_image_deref_atomic_umax:
1285 case nir_intrinsic_image_deref_atomic_and:
1286 case nir_intrinsic_image_deref_atomic_or:
1287 case nir_intrinsic_image_deref_atomic_xor:
1288 case nir_intrinsic_image_deref_atomic_exchange:
1289 case nir_intrinsic_image_deref_atomic_comp_swap:
1290 case nir_intrinsic_image_deref_atomic_fadd:
1291 case nir_intrinsic_image_deref_samples:
1292 case nir_intrinsic_image_deref_size:
1293 case nir_intrinsic_image_deref_atomic_inc_wrap:
1294 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1295 nir_ssa_undef_instr *instr_undef =
1296 nir_ssa_undef_instr_create(shader, 1, 32);
1297 nir_builder_instr_insert(&b, &instr_undef->instr);
1298
1299 /* Set the image variable dereference. */
1300 exec_node *param = ir->actual_parameters.get_head();
1301 ir_dereference *image = (ir_dereference *)param;
1302 nir_deref_instr *deref = evaluate_deref(image);
1303 const glsl_type *type = deref->type;
1304
1305 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1306
1307 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1308 param = param->get_next();
1309
1310 /* Set the intrinsic destination. */
1311 if (ir->return_deref) {
1312 unsigned num_components = ir->return_deref->type->vector_elements;
1313 nir_ssa_dest_init(&instr->instr, &instr->dest,
1314 num_components, 32, NULL);
1315 }
1316
1317 if (op == nir_intrinsic_image_deref_size) {
1318 instr->num_components = instr->dest.ssa.num_components;
1319 } else if (op == nir_intrinsic_image_deref_load ||
1320 op == nir_intrinsic_image_deref_store) {
1321 instr->num_components = 4;
1322 }
1323
1324 if (op == nir_intrinsic_image_deref_size ||
1325 op == nir_intrinsic_image_deref_samples) {
1326 nir_builder_instr_insert(&b, &instr->instr);
1327 break;
1328 }
1329
1330 /* Set the address argument, extending the coordinate vector to four
1331 * components.
1332 */
1333 nir_ssa_def *src_addr =
1334 evaluate_rvalue((ir_dereference *)param);
1335 nir_ssa_def *srcs[4];
1336
1337 for (int i = 0; i < 4; i++) {
1338 if (i < type->coordinate_components())
1339 srcs[i] = nir_channel(&b, src_addr, i);
1340 else
1341 srcs[i] = &instr_undef->def;
1342 }
1343
1344 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1345 param = param->get_next();
1346
1347 /* Set the sample argument, which is undefined for single-sample
1348 * images.
1349 */
1350 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1351 instr->src[2] =
1352 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1353 param = param->get_next();
1354 } else {
1355 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1356 }
1357
1358 /* Set the intrinsic parameters. */
1359 if (!param->is_tail_sentinel()) {
1360 instr->src[3] =
1361 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1362 param = param->get_next();
1363 }
1364
1365 if (!param->is_tail_sentinel()) {
1366 instr->src[4] =
1367 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1368 param = param->get_next();
1369 }
1370 nir_builder_instr_insert(&b, &instr->instr);
1371 break;
1372 }
1373 case nir_intrinsic_memory_barrier:
1374 case nir_intrinsic_group_memory_barrier:
1375 case nir_intrinsic_memory_barrier_atomic_counter:
1376 case nir_intrinsic_memory_barrier_buffer:
1377 case nir_intrinsic_memory_barrier_image:
1378 case nir_intrinsic_memory_barrier_shared:
1379 nir_builder_instr_insert(&b, &instr->instr);
1380 break;
1381 case nir_intrinsic_shader_clock:
1382 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1383 instr->num_components = 2;
1384 nir_builder_instr_insert(&b, &instr->instr);
1385 break;
1386 case nir_intrinsic_begin_invocation_interlock:
1387 nir_builder_instr_insert(&b, &instr->instr);
1388 break;
1389 case nir_intrinsic_end_invocation_interlock:
1390 nir_builder_instr_insert(&b, &instr->instr);
1391 break;
1392 case nir_intrinsic_store_ssbo: {
1393 exec_node *param = ir->actual_parameters.get_head();
1394 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1395
1396 param = param->get_next();
1397 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1398
1399 param = param->get_next();
1400 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1401
1402 param = param->get_next();
1403 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1404 assert(write_mask);
1405
1406 nir_ssa_def *nir_val = evaluate_rvalue(val);
1407 if (val->type->is_boolean())
1408 nir_val = nir_b2i32(&b, nir_val);
1409
1410 instr->src[0] = nir_src_for_ssa(nir_val);
1411 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1412 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1413 intrinsic_set_std430_align(instr, val->type);
1414 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1415 instr->num_components = val->type->vector_elements;
1416
1417 nir_builder_instr_insert(&b, &instr->instr);
1418 break;
1419 }
1420 case nir_intrinsic_load_ssbo: {
1421 exec_node *param = ir->actual_parameters.get_head();
1422 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1423
1424 param = param->get_next();
1425 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1426
1427 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1428 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1429
1430 const glsl_type *type = ir->return_deref->var->type;
1431 instr->num_components = type->vector_elements;
1432 intrinsic_set_std430_align(instr, type);
1433
1434 /* Setup destination register */
1435 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1436 nir_ssa_dest_init(&instr->instr, &instr->dest,
1437 type->vector_elements, bit_size, NULL);
1438
1439 /* Insert the created nir instruction now since in the case of boolean
1440 * result we will need to emit another instruction after it
1441 */
1442 nir_builder_instr_insert(&b, &instr->instr);
1443
1444 /*
1445 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1446 * consider a true boolean to be ~0. Fix this up with a != 0
1447 * comparison.
1448 */
1449 if (type->is_boolean())
1450 ret = nir_i2b(&b, &instr->dest.ssa);
1451 break;
1452 }
1453 case nir_intrinsic_ssbo_atomic_add:
1454 case nir_intrinsic_ssbo_atomic_imin:
1455 case nir_intrinsic_ssbo_atomic_umin:
1456 case nir_intrinsic_ssbo_atomic_imax:
1457 case nir_intrinsic_ssbo_atomic_umax:
1458 case nir_intrinsic_ssbo_atomic_and:
1459 case nir_intrinsic_ssbo_atomic_or:
1460 case nir_intrinsic_ssbo_atomic_xor:
1461 case nir_intrinsic_ssbo_atomic_exchange:
1462 case nir_intrinsic_ssbo_atomic_comp_swap:
1463 case nir_intrinsic_ssbo_atomic_fadd:
1464 case nir_intrinsic_ssbo_atomic_fmin:
1465 case nir_intrinsic_ssbo_atomic_fmax:
1466 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1467 int param_count = ir->actual_parameters.length();
1468 assert(param_count == 3 || param_count == 4);
1469
1470 /* Block index */
1471 exec_node *param = ir->actual_parameters.get_head();
1472 ir_instruction *inst = (ir_instruction *) param;
1473 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1474
1475 /* Offset */
1476 param = param->get_next();
1477 inst = (ir_instruction *) param;
1478 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1479
1480 /* data1 parameter (this is always present) */
1481 param = param->get_next();
1482 inst = (ir_instruction *) param;
1483 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1484
1485 /* data2 parameter (only with atomic_comp_swap) */
1486 if (param_count == 4) {
1487 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1488 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1489 param = param->get_next();
1490 inst = (ir_instruction *) param;
1491 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1492 }
1493
1494 /* Atomic result */
1495 assert(ir->return_deref);
1496 nir_ssa_dest_init(&instr->instr, &instr->dest,
1497 ir->return_deref->type->vector_elements, 32, NULL);
1498 nir_builder_instr_insert(&b, &instr->instr);
1499 break;
1500 }
1501 case nir_intrinsic_load_shared: {
1502 exec_node *param = ir->actual_parameters.get_head();
1503 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1504
1505 nir_intrinsic_set_base(instr, 0);
1506 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1507
1508 const glsl_type *type = ir->return_deref->var->type;
1509 instr->num_components = type->vector_elements;
1510 intrinsic_set_std430_align(instr, type);
1511
1512 /* Setup destination register */
1513 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1514 nir_ssa_dest_init(&instr->instr, &instr->dest,
1515 type->vector_elements, bit_size, NULL);
1516
1517 nir_builder_instr_insert(&b, &instr->instr);
1518
1519 /* The value in shared memory is a 32-bit value */
1520 if (type->is_boolean())
1521 ret = nir_i2b(&b, &instr->dest.ssa);
1522 break;
1523 }
1524 case nir_intrinsic_store_shared: {
1525 exec_node *param = ir->actual_parameters.get_head();
1526 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1527
1528 param = param->get_next();
1529 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1530
1531 param = param->get_next();
1532 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1533 assert(write_mask);
1534
1535 nir_intrinsic_set_base(instr, 0);
1536 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1537
1538 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1539
1540 nir_ssa_def *nir_val = evaluate_rvalue(val);
1541 /* The value in shared memory is a 32-bit value */
1542 if (val->type->is_boolean())
1543 nir_val = nir_b2i32(&b, nir_val);
1544
1545 instr->src[0] = nir_src_for_ssa(nir_val);
1546 instr->num_components = val->type->vector_elements;
1547 intrinsic_set_std430_align(instr, val->type);
1548
1549 nir_builder_instr_insert(&b, &instr->instr);
1550 break;
1551 }
1552 case nir_intrinsic_shared_atomic_add:
1553 case nir_intrinsic_shared_atomic_imin:
1554 case nir_intrinsic_shared_atomic_umin:
1555 case nir_intrinsic_shared_atomic_imax:
1556 case nir_intrinsic_shared_atomic_umax:
1557 case nir_intrinsic_shared_atomic_and:
1558 case nir_intrinsic_shared_atomic_or:
1559 case nir_intrinsic_shared_atomic_xor:
1560 case nir_intrinsic_shared_atomic_exchange:
1561 case nir_intrinsic_shared_atomic_comp_swap:
1562 case nir_intrinsic_shared_atomic_fadd:
1563 case nir_intrinsic_shared_atomic_fmin:
1564 case nir_intrinsic_shared_atomic_fmax:
1565 case nir_intrinsic_shared_atomic_fcomp_swap: {
1566 int param_count = ir->actual_parameters.length();
1567 assert(param_count == 2 || param_count == 3);
1568
1569 /* Offset */
1570 exec_node *param = ir->actual_parameters.get_head();
1571 ir_instruction *inst = (ir_instruction *) param;
1572 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1573
1574 /* data1 parameter (this is always present) */
1575 param = param->get_next();
1576 inst = (ir_instruction *) param;
1577 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1578
1579 /* data2 parameter (only with atomic_comp_swap) */
1580 if (param_count == 3) {
1581 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1582 op == nir_intrinsic_shared_atomic_fcomp_swap);
1583 param = param->get_next();
1584 inst = (ir_instruction *) param;
1585 instr->src[2] =
1586 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1587 }
1588
1589 /* Atomic result */
1590 assert(ir->return_deref);
1591 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1592 nir_ssa_dest_init(&instr->instr, &instr->dest,
1593 ir->return_deref->type->vector_elements,
1594 bit_size, NULL);
1595 nir_builder_instr_insert(&b, &instr->instr);
1596 break;
1597 }
1598 case nir_intrinsic_vote_any:
1599 case nir_intrinsic_vote_all:
1600 case nir_intrinsic_vote_ieq: {
1601 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1602 instr->num_components = 1;
1603
1604 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1605 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1606
1607 nir_builder_instr_insert(&b, &instr->instr);
1608 break;
1609 }
1610
1611 case nir_intrinsic_ballot: {
1612 nir_ssa_dest_init(&instr->instr, &instr->dest,
1613 ir->return_deref->type->vector_elements, 64, NULL);
1614 instr->num_components = ir->return_deref->type->vector_elements;
1615
1616 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1617 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1618
1619 nir_builder_instr_insert(&b, &instr->instr);
1620 break;
1621 }
1622 case nir_intrinsic_read_invocation: {
1623 nir_ssa_dest_init(&instr->instr, &instr->dest,
1624 ir->return_deref->type->vector_elements, 32, NULL);
1625 instr->num_components = ir->return_deref->type->vector_elements;
1626
1627 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1628 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1629
1630 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1631 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1632
1633 nir_builder_instr_insert(&b, &instr->instr);
1634 break;
1635 }
1636 case nir_intrinsic_read_first_invocation: {
1637 nir_ssa_dest_init(&instr->instr, &instr->dest,
1638 ir->return_deref->type->vector_elements, 32, NULL);
1639 instr->num_components = ir->return_deref->type->vector_elements;
1640
1641 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1642 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1643
1644 nir_builder_instr_insert(&b, &instr->instr);
1645 break;
1646 }
1647 case nir_intrinsic_is_helper_invocation: {
1648 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1649 instr->num_components = 1;
1650 nir_builder_instr_insert(&b, &instr->instr);
1651 break;
1652 }
1653 default:
1654 unreachable("not reached");
1655 }
1656
1657 if (ir->return_deref)
1658 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1659
1660 return;
1661 }
1662
1663 struct hash_entry *entry =
1664 _mesa_hash_table_search(this->overload_table, ir->callee);
1665 assert(entry);
1666 nir_function *callee = (nir_function *) entry->data;
1667
1668 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1669
1670 unsigned i = 0;
1671 nir_deref_instr *ret_deref = NULL;
1672 if (ir->return_deref) {
1673 nir_variable *ret_tmp =
1674 nir_local_variable_create(this->impl, ir->return_deref->type,
1675 "return_tmp");
1676 ret_deref = nir_build_deref_var(&b, ret_tmp);
1677 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1678 }
1679
1680 foreach_two_lists(formal_node, &ir->callee->parameters,
1681 actual_node, &ir->actual_parameters) {
1682 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1683 ir_variable *sig_param = (ir_variable *) formal_node;
1684
1685 if (sig_param->data.mode == ir_var_function_out) {
1686 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1687 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1688 } else if (sig_param->data.mode == ir_var_function_in) {
1689 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1690 nir_src src = nir_src_for_ssa(val);
1691
1692 nir_src_copy(&call->params[i], &src, call);
1693 } else if (sig_param->data.mode == ir_var_function_inout) {
1694 unreachable("unimplemented: inout parameters");
1695 }
1696
1697 i++;
1698 }
1699
1700 nir_builder_instr_insert(&b, &call->instr);
1701
1702 if (ir->return_deref)
1703 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1704 }
1705
1706 void
1707 nir_visitor::visit(ir_assignment *ir)
1708 {
1709 unsigned num_components = ir->lhs->type->vector_elements;
1710
1711 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1712 ir->lhs->variable_referenced()->data.precise;
1713
1714 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1715 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1716 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1717 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1718 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1719 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1720 if (ir->condition) {
1721 nir_push_if(&b, evaluate_rvalue(ir->condition));
1722 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1723 rhs_qualifiers);
1724 nir_pop_if(&b, NULL);
1725 } else {
1726 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1727 rhs_qualifiers);
1728 }
1729 return;
1730 }
1731
1732 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1733
1734 ir->lhs->accept(this);
1735 nir_deref_instr *lhs_deref = this->deref;
1736 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1737
1738 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1739 /* GLSL IR will give us the input to the write-masked assignment in a
1740 * single packed vector. So, for example, if the writemask is xzw, then
1741 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1742 * from the load.
1743 */
1744 unsigned swiz[4];
1745 unsigned component = 0;
1746 for (unsigned i = 0; i < 4; i++) {
1747 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1748 }
1749 src = nir_swizzle(&b, src, swiz, num_components);
1750 }
1751
1752 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1753 if (ir->condition) {
1754 nir_push_if(&b, evaluate_rvalue(ir->condition));
1755 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1756 qualifiers);
1757 nir_pop_if(&b, NULL);
1758 } else {
1759 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1760 qualifiers);
1761 }
1762 }
1763
1764 /*
1765 * Given an instruction, returns a pointer to its destination or NULL if there
1766 * is no destination.
1767 *
1768 * Note that this only handles instructions we generate at this level.
1769 */
1770 static nir_dest *
1771 get_instr_dest(nir_instr *instr)
1772 {
1773 nir_alu_instr *alu_instr;
1774 nir_intrinsic_instr *intrinsic_instr;
1775 nir_tex_instr *tex_instr;
1776
1777 switch (instr->type) {
1778 case nir_instr_type_alu:
1779 alu_instr = nir_instr_as_alu(instr);
1780 return &alu_instr->dest.dest;
1781
1782 case nir_instr_type_intrinsic:
1783 intrinsic_instr = nir_instr_as_intrinsic(instr);
1784 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1785 return &intrinsic_instr->dest;
1786 else
1787 return NULL;
1788
1789 case nir_instr_type_tex:
1790 tex_instr = nir_instr_as_tex(instr);
1791 return &tex_instr->dest;
1792
1793 default:
1794 unreachable("not reached");
1795 }
1796
1797 return NULL;
1798 }
1799
1800 void
1801 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1802 unsigned bit_size)
1803 {
1804 nir_dest *dest = get_instr_dest(instr);
1805
1806 if (dest)
1807 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1808
1809 nir_builder_instr_insert(&b, instr);
1810
1811 if (dest) {
1812 assert(dest->is_ssa);
1813 this->result = &dest->ssa;
1814 }
1815 }
1816
1817 nir_ssa_def *
1818 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1819 {
1820 ir->accept(this);
1821 if (ir->as_dereference() || ir->as_constant()) {
1822 /*
1823 * A dereference is being used on the right hand side, which means we
1824 * must emit a variable load.
1825 */
1826
1827 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1828 this->result = nir_load_deref_with_access(&b, this->deref, access);
1829 }
1830
1831 return this->result;
1832 }
1833
1834 static bool
1835 type_is_float(glsl_base_type type)
1836 {
1837 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1838 type == GLSL_TYPE_FLOAT16;
1839 }
1840
1841 static bool
1842 type_is_signed(glsl_base_type type)
1843 {
1844 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1845 type == GLSL_TYPE_INT16;
1846 }
1847
1848 void
1849 nir_visitor::visit(ir_expression *ir)
1850 {
1851 /* Some special cases */
1852 switch (ir->operation) {
1853 case ir_binop_ubo_load: {
1854 nir_intrinsic_instr *load =
1855 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1856 unsigned bit_size = ir->type->is_boolean() ? 32 :
1857 glsl_get_bit_size(ir->type);
1858 load->num_components = ir->type->vector_elements;
1859 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1860 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1861 intrinsic_set_std430_align(load, ir->type);
1862 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1863
1864 /*
1865 * In UBO's, a true boolean value is any non-zero value, but we consider
1866 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1867 */
1868
1869 if (ir->type->is_boolean())
1870 this->result = nir_i2b(&b, &load->dest.ssa);
1871
1872 return;
1873 }
1874
1875 case ir_unop_interpolate_at_centroid:
1876 case ir_binop_interpolate_at_offset:
1877 case ir_binop_interpolate_at_sample: {
1878 ir_dereference *deref = ir->operands[0]->as_dereference();
1879 ir_swizzle *swizzle = NULL;
1880 if (!deref) {
1881 /* the api does not allow a swizzle here, but the varying packing code
1882 * may have pushed one into here.
1883 */
1884 swizzle = ir->operands[0]->as_swizzle();
1885 assert(swizzle);
1886 deref = swizzle->val->as_dereference();
1887 assert(deref);
1888 }
1889
1890 deref->accept(this);
1891
1892 nir_intrinsic_op op;
1893 if (this->deref->mode == nir_var_shader_in) {
1894 switch (ir->operation) {
1895 case ir_unop_interpolate_at_centroid:
1896 op = nir_intrinsic_interp_deref_at_centroid;
1897 break;
1898 case ir_binop_interpolate_at_offset:
1899 op = nir_intrinsic_interp_deref_at_offset;
1900 break;
1901 case ir_binop_interpolate_at_sample:
1902 op = nir_intrinsic_interp_deref_at_sample;
1903 break;
1904 default:
1905 unreachable("Invalid interpolation intrinsic");
1906 }
1907 } else {
1908 /* This case can happen if the vertex shader does not write the
1909 * given varying. In this case, the linker will lower it to a
1910 * global variable. Since interpolating a variable makes no
1911 * sense, we'll just turn it into a load which will probably
1912 * eventually end up as an SSA definition.
1913 */
1914 assert(this->deref->mode == nir_var_shader_temp);
1915 op = nir_intrinsic_load_deref;
1916 }
1917
1918 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1919 intrin->num_components = deref->type->vector_elements;
1920 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1921
1922 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1923 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1924 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1925
1926 unsigned bit_size = glsl_get_bit_size(deref->type);
1927 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1928
1929 if (swizzle) {
1930 unsigned swiz[4] = {
1931 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1932 };
1933
1934 result = nir_swizzle(&b, result, swiz,
1935 swizzle->type->vector_elements);
1936 }
1937
1938 return;
1939 }
1940
1941 case ir_unop_ssbo_unsized_array_length: {
1942 nir_intrinsic_instr *intrin =
1943 nir_intrinsic_instr_create(b.shader,
1944 nir_intrinsic_deref_buffer_array_length);
1945
1946 ir_dereference *deref = ir->operands[0]->as_dereference();
1947 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1948
1949 add_instr(&intrin->instr, 1, 32);
1950 return;
1951 }
1952
1953 default:
1954 break;
1955 }
1956
1957 nir_ssa_def *srcs[4];
1958 for (unsigned i = 0; i < ir->num_operands; i++)
1959 srcs[i] = evaluate_rvalue(ir->operands[i]);
1960
1961 glsl_base_type types[4];
1962 for (unsigned i = 0; i < ir->num_operands; i++)
1963 types[i] = ir->operands[i]->type->base_type;
1964
1965 glsl_base_type out_type = ir->type->base_type;
1966
1967 switch (ir->operation) {
1968 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1969 case ir_unop_logic_not:
1970 result = nir_inot(&b, srcs[0]);
1971 break;
1972 case ir_unop_neg:
1973 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1974 : nir_ineg(&b, srcs[0]);
1975 break;
1976 case ir_unop_abs:
1977 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1978 : nir_iabs(&b, srcs[0]);
1979 break;
1980 case ir_unop_saturate:
1981 assert(type_is_float(types[0]));
1982 result = nir_fsat(&b, srcs[0]);
1983 break;
1984 case ir_unop_sign:
1985 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1986 : nir_isign(&b, srcs[0]);
1987 break;
1988 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1989 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1990 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1991 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1992 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1993 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1994 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1995 case ir_unop_i2f:
1996 case ir_unop_u2f:
1997 case ir_unop_b2f:
1998 case ir_unop_f2i:
1999 case ir_unop_f2u:
2000 case ir_unop_f2b:
2001 case ir_unop_i2b:
2002 case ir_unop_b2i:
2003 case ir_unop_b2i64:
2004 case ir_unop_d2f:
2005 case ir_unop_f2d:
2006 case ir_unop_d2i:
2007 case ir_unop_d2u:
2008 case ir_unop_d2b:
2009 case ir_unop_i2d:
2010 case ir_unop_u2d:
2011 case ir_unop_i642i:
2012 case ir_unop_i642u:
2013 case ir_unop_i642f:
2014 case ir_unop_i642b:
2015 case ir_unop_i642d:
2016 case ir_unop_u642i:
2017 case ir_unop_u642u:
2018 case ir_unop_u642f:
2019 case ir_unop_u642d:
2020 case ir_unop_i2i64:
2021 case ir_unop_u2i64:
2022 case ir_unop_f2i64:
2023 case ir_unop_d2i64:
2024 case ir_unop_i2u64:
2025 case ir_unop_u2u64:
2026 case ir_unop_f2u64:
2027 case ir_unop_d2u64:
2028 case ir_unop_i2u:
2029 case ir_unop_u2i:
2030 case ir_unop_i642u64:
2031 case ir_unop_u642i64: {
2032 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2033 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2034 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
2035 nir_rounding_mode_undef),
2036 srcs[0], NULL, NULL, NULL);
2037 /* b2i and b2f don't have fixed bit-size versions so the builder will
2038 * just assume 32 and we have to fix it up here.
2039 */
2040 result->bit_size = nir_alu_type_get_type_size(dst_type);
2041 break;
2042 }
2043
2044 case ir_unop_bitcast_i2f:
2045 case ir_unop_bitcast_f2i:
2046 case ir_unop_bitcast_u2f:
2047 case ir_unop_bitcast_f2u:
2048 case ir_unop_bitcast_i642d:
2049 case ir_unop_bitcast_d2i64:
2050 case ir_unop_bitcast_u642d:
2051 case ir_unop_bitcast_d2u64:
2052 case ir_unop_subroutine_to_int:
2053 /* no-op */
2054 result = nir_mov(&b, srcs[0]);
2055 break;
2056 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2057 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2058 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2059 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2060 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2061 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2062 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2063 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2064 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2065 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2066 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2067 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2068 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2069 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2070 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2071 case ir_unop_pack_snorm_2x16:
2072 result = nir_pack_snorm_2x16(&b, srcs[0]);
2073 break;
2074 case ir_unop_pack_snorm_4x8:
2075 result = nir_pack_snorm_4x8(&b, srcs[0]);
2076 break;
2077 case ir_unop_pack_unorm_2x16:
2078 result = nir_pack_unorm_2x16(&b, srcs[0]);
2079 break;
2080 case ir_unop_pack_unorm_4x8:
2081 result = nir_pack_unorm_4x8(&b, srcs[0]);
2082 break;
2083 case ir_unop_pack_half_2x16:
2084 result = nir_pack_half_2x16(&b, srcs[0]);
2085 break;
2086 case ir_unop_unpack_snorm_2x16:
2087 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2088 break;
2089 case ir_unop_unpack_snorm_4x8:
2090 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2091 break;
2092 case ir_unop_unpack_unorm_2x16:
2093 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2094 break;
2095 case ir_unop_unpack_unorm_4x8:
2096 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2097 break;
2098 case ir_unop_unpack_half_2x16:
2099 result = nir_unpack_half_2x16(&b, srcs[0]);
2100 break;
2101 case ir_unop_pack_sampler_2x32:
2102 case ir_unop_pack_image_2x32:
2103 case ir_unop_pack_double_2x32:
2104 case ir_unop_pack_int_2x32:
2105 case ir_unop_pack_uint_2x32:
2106 result = nir_pack_64_2x32(&b, srcs[0]);
2107 break;
2108 case ir_unop_unpack_sampler_2x32:
2109 case ir_unop_unpack_image_2x32:
2110 case ir_unop_unpack_double_2x32:
2111 case ir_unop_unpack_int_2x32:
2112 case ir_unop_unpack_uint_2x32:
2113 result = nir_unpack_64_2x32(&b, srcs[0]);
2114 break;
2115 case ir_unop_bitfield_reverse:
2116 result = nir_bitfield_reverse(&b, srcs[0]);
2117 break;
2118 case ir_unop_bit_count:
2119 result = nir_bit_count(&b, srcs[0]);
2120 break;
2121 case ir_unop_find_msb:
2122 switch (types[0]) {
2123 case GLSL_TYPE_UINT:
2124 result = nir_ufind_msb(&b, srcs[0]);
2125 break;
2126 case GLSL_TYPE_INT:
2127 result = nir_ifind_msb(&b, srcs[0]);
2128 break;
2129 default:
2130 unreachable("Invalid type for findMSB()");
2131 }
2132 break;
2133 case ir_unop_find_lsb:
2134 result = nir_find_lsb(&b, srcs[0]);
2135 break;
2136
2137 case ir_unop_noise:
2138 switch (ir->type->vector_elements) {
2139 case 1:
2140 switch (ir->operands[0]->type->vector_elements) {
2141 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
2142 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
2143 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
2144 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
2145 default: unreachable("not reached");
2146 }
2147 break;
2148 case 2:
2149 switch (ir->operands[0]->type->vector_elements) {
2150 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
2151 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
2152 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
2153 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
2154 default: unreachable("not reached");
2155 }
2156 break;
2157 case 3:
2158 switch (ir->operands[0]->type->vector_elements) {
2159 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
2160 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
2161 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
2162 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
2163 default: unreachable("not reached");
2164 }
2165 break;
2166 case 4:
2167 switch (ir->operands[0]->type->vector_elements) {
2168 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
2169 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
2170 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
2171 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
2172 default: unreachable("not reached");
2173 }
2174 break;
2175 default:
2176 unreachable("not reached");
2177 }
2178 break;
2179 case ir_unop_get_buffer_size: {
2180 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2181 this->shader,
2182 nir_intrinsic_get_buffer_size);
2183 load->num_components = ir->type->vector_elements;
2184 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2185 unsigned bit_size = glsl_get_bit_size(ir->type);
2186 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2187 return;
2188 }
2189
2190 case ir_binop_add:
2191 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2192 : nir_iadd(&b, srcs[0], srcs[1]);
2193 break;
2194 case ir_binop_sub:
2195 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2196 : nir_isub(&b, srcs[0], srcs[1]);
2197 break;
2198 case ir_binop_mul:
2199 if (type_is_float(out_type))
2200 result = nir_fmul(&b, srcs[0], srcs[1]);
2201 else if (out_type == GLSL_TYPE_INT64 &&
2202 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2203 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2204 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2205 else if (out_type == GLSL_TYPE_UINT64 &&
2206 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2207 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2208 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2209 else
2210 result = nir_imul(&b, srcs[0], srcs[1]);
2211 break;
2212 case ir_binop_div:
2213 if (type_is_float(out_type))
2214 result = nir_fdiv(&b, srcs[0], srcs[1]);
2215 else if (type_is_signed(out_type))
2216 result = nir_idiv(&b, srcs[0], srcs[1]);
2217 else
2218 result = nir_udiv(&b, srcs[0], srcs[1]);
2219 break;
2220 case ir_binop_mod:
2221 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2222 : nir_umod(&b, srcs[0], srcs[1]);
2223 break;
2224 case ir_binop_min:
2225 if (type_is_float(out_type))
2226 result = nir_fmin(&b, srcs[0], srcs[1]);
2227 else if (type_is_signed(out_type))
2228 result = nir_imin(&b, srcs[0], srcs[1]);
2229 else
2230 result = nir_umin(&b, srcs[0], srcs[1]);
2231 break;
2232 case ir_binop_max:
2233 if (type_is_float(out_type))
2234 result = nir_fmax(&b, srcs[0], srcs[1]);
2235 else if (type_is_signed(out_type))
2236 result = nir_imax(&b, srcs[0], srcs[1]);
2237 else
2238 result = nir_umax(&b, srcs[0], srcs[1]);
2239 break;
2240 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2241 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2242 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2243 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2244 case ir_binop_logic_and:
2245 result = nir_iand(&b, srcs[0], srcs[1]);
2246 break;
2247 case ir_binop_logic_or:
2248 result = nir_ior(&b, srcs[0], srcs[1]);
2249 break;
2250 case ir_binop_logic_xor:
2251 result = nir_ixor(&b, srcs[0], srcs[1]);
2252 break;
2253 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2254 case ir_binop_rshift:
2255 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2256 : nir_ushr(&b, srcs[0], srcs[1]);
2257 break;
2258 case ir_binop_imul_high:
2259 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2260 : nir_umul_high(&b, srcs[0], srcs[1]);
2261 break;
2262 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2263 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2264 case ir_binop_less:
2265 if (type_is_float(types[0]))
2266 result = nir_flt(&b, srcs[0], srcs[1]);
2267 else if (type_is_signed(types[0]))
2268 result = nir_ilt(&b, srcs[0], srcs[1]);
2269 else
2270 result = nir_ult(&b, srcs[0], srcs[1]);
2271 break;
2272 case ir_binop_gequal:
2273 if (type_is_float(types[0]))
2274 result = nir_fge(&b, srcs[0], srcs[1]);
2275 else if (type_is_signed(types[0]))
2276 result = nir_ige(&b, srcs[0], srcs[1]);
2277 else
2278 result = nir_uge(&b, srcs[0], srcs[1]);
2279 break;
2280 case ir_binop_equal:
2281 if (type_is_float(types[0]))
2282 result = nir_feq(&b, srcs[0], srcs[1]);
2283 else
2284 result = nir_ieq(&b, srcs[0], srcs[1]);
2285 break;
2286 case ir_binop_nequal:
2287 if (type_is_float(types[0]))
2288 result = nir_fne(&b, srcs[0], srcs[1]);
2289 else
2290 result = nir_ine(&b, srcs[0], srcs[1]);
2291 break;
2292 case ir_binop_all_equal:
2293 if (type_is_float(types[0])) {
2294 switch (ir->operands[0]->type->vector_elements) {
2295 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2296 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2297 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2298 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2299 default:
2300 unreachable("not reached");
2301 }
2302 } else {
2303 switch (ir->operands[0]->type->vector_elements) {
2304 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2305 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2306 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2307 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2308 default:
2309 unreachable("not reached");
2310 }
2311 }
2312 break;
2313 case ir_binop_any_nequal:
2314 if (type_is_float(types[0])) {
2315 switch (ir->operands[0]->type->vector_elements) {
2316 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2317 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2318 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2319 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2320 default:
2321 unreachable("not reached");
2322 }
2323 } else {
2324 switch (ir->operands[0]->type->vector_elements) {
2325 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2326 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2327 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2328 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2329 default:
2330 unreachable("not reached");
2331 }
2332 }
2333 break;
2334 case ir_binop_dot:
2335 switch (ir->operands[0]->type->vector_elements) {
2336 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2337 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2338 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2339 default:
2340 unreachable("not reached");
2341 }
2342 break;
2343 case ir_binop_vector_extract: {
2344 result = nir_channel(&b, srcs[0], 0);
2345 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2346 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2347 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2348 swizzled, result);
2349 }
2350 break;
2351 }
2352
2353 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2354 case ir_triop_fma:
2355 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2356 break;
2357 case ir_triop_lrp:
2358 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2359 break;
2360 case ir_triop_csel:
2361 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2362 break;
2363 case ir_triop_bitfield_extract:
2364 result = (out_type == GLSL_TYPE_INT) ?
2365 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2366 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2367 break;
2368 case ir_quadop_bitfield_insert:
2369 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2370 break;
2371 case ir_quadop_vector:
2372 result = nir_vec(&b, srcs, ir->type->vector_elements);
2373 break;
2374
2375 default:
2376 unreachable("not reached");
2377 }
2378 }
2379
2380 void
2381 nir_visitor::visit(ir_swizzle *ir)
2382 {
2383 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2384 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2385 ir->type->vector_elements);
2386 }
2387
2388 void
2389 nir_visitor::visit(ir_texture *ir)
2390 {
2391 unsigned num_srcs;
2392 nir_texop op;
2393 switch (ir->op) {
2394 case ir_tex:
2395 op = nir_texop_tex;
2396 num_srcs = 1; /* coordinate */
2397 break;
2398
2399 case ir_txb:
2400 case ir_txl:
2401 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2402 num_srcs = 2; /* coordinate, bias/lod */
2403 break;
2404
2405 case ir_txd:
2406 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2407 num_srcs = 3;
2408 break;
2409
2410 case ir_txf:
2411 op = nir_texop_txf;
2412 if (ir->lod_info.lod != NULL)
2413 num_srcs = 2; /* coordinate, lod */
2414 else
2415 num_srcs = 1; /* coordinate */
2416 break;
2417
2418 case ir_txf_ms:
2419 op = nir_texop_txf_ms;
2420 num_srcs = 2; /* coordinate, sample_index */
2421 break;
2422
2423 case ir_txs:
2424 op = nir_texop_txs;
2425 if (ir->lod_info.lod != NULL)
2426 num_srcs = 1; /* lod */
2427 else
2428 num_srcs = 0;
2429 break;
2430
2431 case ir_lod:
2432 op = nir_texop_lod;
2433 num_srcs = 1; /* coordinate */
2434 break;
2435
2436 case ir_tg4:
2437 op = nir_texop_tg4;
2438 num_srcs = 1; /* coordinate */
2439 break;
2440
2441 case ir_query_levels:
2442 op = nir_texop_query_levels;
2443 num_srcs = 0;
2444 break;
2445
2446 case ir_texture_samples:
2447 op = nir_texop_texture_samples;
2448 num_srcs = 0;
2449 break;
2450
2451 case ir_samples_identical:
2452 op = nir_texop_samples_identical;
2453 num_srcs = 1; /* coordinate */
2454 break;
2455
2456 default:
2457 unreachable("not reached");
2458 }
2459
2460 if (ir->projector != NULL)
2461 num_srcs++;
2462 if (ir->shadow_comparator != NULL)
2463 num_srcs++;
2464 /* offsets are constants we store inside nir_tex_intrs.offsets */
2465 if (ir->offset != NULL && !ir->offset->type->is_array())
2466 num_srcs++;
2467
2468 /* Add one for the texture deref */
2469 num_srcs += 2;
2470
2471 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2472
2473 instr->op = op;
2474 instr->sampler_dim =
2475 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2476 instr->is_array = ir->sampler->type->sampler_array;
2477 instr->is_shadow = ir->sampler->type->sampler_shadow;
2478 if (instr->is_shadow)
2479 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2480 switch (ir->type->base_type) {
2481 case GLSL_TYPE_FLOAT:
2482 instr->dest_type = nir_type_float;
2483 break;
2484 case GLSL_TYPE_INT:
2485 instr->dest_type = nir_type_int;
2486 break;
2487 case GLSL_TYPE_BOOL:
2488 case GLSL_TYPE_UINT:
2489 instr->dest_type = nir_type_uint;
2490 break;
2491 default:
2492 unreachable("not reached");
2493 }
2494
2495 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2496
2497 /* check for bindless handles */
2498 if (sampler_deref->mode != nir_var_uniform ||
2499 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2500 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2501 instr->src[0].src = nir_src_for_ssa(load);
2502 instr->src[0].src_type = nir_tex_src_texture_handle;
2503 instr->src[1].src = nir_src_for_ssa(load);
2504 instr->src[1].src_type = nir_tex_src_sampler_handle;
2505 } else {
2506 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2507 instr->src[0].src_type = nir_tex_src_texture_deref;
2508 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2509 instr->src[1].src_type = nir_tex_src_sampler_deref;
2510 }
2511
2512 unsigned src_number = 2;
2513
2514 if (ir->coordinate != NULL) {
2515 instr->coord_components = ir->coordinate->type->vector_elements;
2516 instr->src[src_number].src =
2517 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2518 instr->src[src_number].src_type = nir_tex_src_coord;
2519 src_number++;
2520 }
2521
2522 if (ir->projector != NULL) {
2523 instr->src[src_number].src =
2524 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2525 instr->src[src_number].src_type = nir_tex_src_projector;
2526 src_number++;
2527 }
2528
2529 if (ir->shadow_comparator != NULL) {
2530 instr->src[src_number].src =
2531 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2532 instr->src[src_number].src_type = nir_tex_src_comparator;
2533 src_number++;
2534 }
2535
2536 if (ir->offset != NULL) {
2537 if (ir->offset->type->is_array()) {
2538 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2539 const ir_constant *c =
2540 ir->offset->as_constant()->get_array_element(i);
2541
2542 for (unsigned j = 0; j < 2; ++j) {
2543 int val = c->get_int_component(j);
2544 assert(val <= 31 && val >= -32);
2545 instr->tg4_offsets[i][j] = val;
2546 }
2547 }
2548 } else {
2549 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2550
2551 instr->src[src_number].src =
2552 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2553 instr->src[src_number].src_type = nir_tex_src_offset;
2554 src_number++;
2555 }
2556 }
2557
2558 switch (ir->op) {
2559 case ir_txb:
2560 instr->src[src_number].src =
2561 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2562 instr->src[src_number].src_type = nir_tex_src_bias;
2563 src_number++;
2564 break;
2565
2566 case ir_txl:
2567 case ir_txf:
2568 case ir_txs:
2569 if (ir->lod_info.lod != NULL) {
2570 instr->src[src_number].src =
2571 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2572 instr->src[src_number].src_type = nir_tex_src_lod;
2573 src_number++;
2574 }
2575 break;
2576
2577 case ir_txd:
2578 instr->src[src_number].src =
2579 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2580 instr->src[src_number].src_type = nir_tex_src_ddx;
2581 src_number++;
2582 instr->src[src_number].src =
2583 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2584 instr->src[src_number].src_type = nir_tex_src_ddy;
2585 src_number++;
2586 break;
2587
2588 case ir_txf_ms:
2589 instr->src[src_number].src =
2590 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2591 instr->src[src_number].src_type = nir_tex_src_ms_index;
2592 src_number++;
2593 break;
2594
2595 case ir_tg4:
2596 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2597 break;
2598
2599 default:
2600 break;
2601 }
2602
2603 assert(src_number == num_srcs);
2604
2605 unsigned bit_size = glsl_get_bit_size(ir->type);
2606 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2607 }
2608
2609 void
2610 nir_visitor::visit(ir_constant *ir)
2611 {
2612 /*
2613 * We don't know if this variable is an array or struct that gets
2614 * dereferenced, so do the safe thing an make it a variable with a
2615 * constant initializer and return a dereference.
2616 */
2617
2618 nir_variable *var =
2619 nir_local_variable_create(this->impl, ir->type, "const_temp");
2620 var->data.read_only = true;
2621 var->constant_initializer = constant_copy(ir, var);
2622
2623 this->deref = nir_build_deref_var(&b, var);
2624 }
2625
2626 void
2627 nir_visitor::visit(ir_dereference_variable *ir)
2628 {
2629 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2630 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2631
2632 foreach_in_list(ir_variable, param, &sig->parameters) {
2633 if (param == ir->variable_referenced()) {
2634 break;
2635 }
2636 i++;
2637 }
2638
2639 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2640 nir_var_function_temp, ir->type, 0);
2641 return;
2642 }
2643
2644 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2645
2646 struct hash_entry *entry =
2647 _mesa_hash_table_search(this->var_table, ir->var);
2648 assert(entry);
2649 nir_variable *var = (nir_variable *) entry->data;
2650
2651 this->deref = nir_build_deref_var(&b, var);
2652 }
2653
2654 void
2655 nir_visitor::visit(ir_dereference_record *ir)
2656 {
2657 ir->record->accept(this);
2658
2659 int field_index = ir->field_idx;
2660 assert(field_index >= 0);
2661
2662 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2663 }
2664
2665 void
2666 nir_visitor::visit(ir_dereference_array *ir)
2667 {
2668 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2669
2670 ir->array->accept(this);
2671
2672 this->deref = nir_build_deref_array(&b, this->deref, index);
2673 }
2674
2675 void
2676 nir_visitor::visit(ir_barrier *)
2677 {
2678 nir_intrinsic_instr *instr =
2679 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2680 nir_builder_instr_insert(&b, &instr->instr);
2681 }
2682
2683 nir_shader *
2684 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2685 const nir_shader_compiler_options *options)
2686 {
2687 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2688 * matter because we're not optimizing anything here.
2689 */
2690 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2691 sh->Source = float64_source;
2692 sh->CompileStatus = COMPILE_FAILURE;
2693 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2694
2695 if (!sh->CompileStatus) {
2696 if (sh->InfoLog) {
2697 _mesa_problem(ctx,
2698 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2699 sh->InfoLog, float64_source);
2700 }
2701 return NULL;
2702 }
2703
2704 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2705
2706 nir_visitor v1(ctx, nir);
2707 nir_function_visitor v2(&v1);
2708 v2.run(sh->ir);
2709 visit_exec_list(sh->ir, &v1);
2710
2711 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2712 sh->Source = NULL;
2713 _mesa_delete_shader(ctx, sh);
2714
2715 nir_validate_shader(nir, "float64_funcs_to_nir");
2716
2717 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
2718 NIR_PASS_V(nir, nir_lower_returns);
2719 NIR_PASS_V(nir, nir_inline_functions);
2720 NIR_PASS_V(nir, nir_opt_deref);
2721
2722 /* Do some optimizations to clean up the shader now. By optimizing the
2723 * functions in the library, we avoid having to re-do that work every
2724 * time we inline a copy of a function. Reducing basic blocks also helps
2725 * with compile times.
2726 */
2727 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2728 NIR_PASS_V(nir, nir_copy_prop);
2729 NIR_PASS_V(nir, nir_opt_dce);
2730 NIR_PASS_V(nir, nir_opt_cse);
2731 NIR_PASS_V(nir, nir_opt_gcm, true);
2732 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2733 NIR_PASS_V(nir, nir_opt_dce);
2734
2735 return nir;
2736 }