nir: add frexp_exp and frexp_sig opcodes
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35
36 /*
37 * pass to lower GLSL IR to NIR
38 *
39 * This will lower variable dereferences to loads/stores of corresponding
40 * variables in NIR - the variables will be converted to registers in a later
41 * pass.
42 */
43
44 namespace {
45
46 class nir_visitor : public ir_visitor
47 {
48 public:
49 nir_visitor(nir_shader *shader);
50 ~nir_visitor();
51
52 virtual void visit(ir_variable *);
53 virtual void visit(ir_function *);
54 virtual void visit(ir_function_signature *);
55 virtual void visit(ir_loop *);
56 virtual void visit(ir_if *);
57 virtual void visit(ir_discard *);
58 virtual void visit(ir_loop_jump *);
59 virtual void visit(ir_return *);
60 virtual void visit(ir_call *);
61 virtual void visit(ir_assignment *);
62 virtual void visit(ir_emit_vertex *);
63 virtual void visit(ir_end_primitive *);
64 virtual void visit(ir_expression *);
65 virtual void visit(ir_swizzle *);
66 virtual void visit(ir_texture *);
67 virtual void visit(ir_constant *);
68 virtual void visit(ir_dereference_variable *);
69 virtual void visit(ir_dereference_record *);
70 virtual void visit(ir_dereference_array *);
71 virtual void visit(ir_barrier *);
72
73 void create_function(ir_function_signature *ir);
74
75 private:
76 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
77 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
78
79 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
82 nir_ssa_def *src2);
83 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
84 nir_ssa_def *src2, nir_ssa_def *src3);
85
86 bool supports_ints;
87
88 nir_shader *shader;
89 nir_function_impl *impl;
90 nir_builder b;
91 nir_ssa_def *result; /* result of the expression tree last visited */
92
93 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
94
95 /* the head of the dereference chain we're creating */
96 nir_deref_var *deref_head;
97 /* the tail of the dereference chain we're creating */
98 nir_deref *deref_tail;
99
100 nir_variable *var; /* variable created by ir_variable visitor */
101
102 /* whether the IR we're operating on is per-function or global */
103 bool is_global;
104
105 /* map of ir_variable -> nir_variable */
106 struct hash_table *var_table;
107
108 /* map of ir_function_signature -> nir_function_overload */
109 struct hash_table *overload_table;
110 };
111
112 /*
113 * This visitor runs before the main visitor, calling create_function() for
114 * each function so that the main visitor can resolve forward references in
115 * calls.
116 */
117
118 class nir_function_visitor : public ir_hierarchical_visitor
119 {
120 public:
121 nir_function_visitor(nir_visitor *v) : visitor(v)
122 {
123 }
124 virtual ir_visitor_status visit_enter(ir_function *);
125
126 private:
127 nir_visitor *visitor;
128 };
129
130 } /* end of anonymous namespace */
131
132 static void
133 nir_remap_attributes(nir_shader *shader,
134 const nir_shader_compiler_options *options)
135 {
136 if (options->vs_inputs_dual_locations) {
137 nir_foreach_variable(var, &shader->inputs) {
138 var->data.location +=
139 _mesa_bitcount_64(shader->info.vs.double_inputs &
140 BITFIELD64_MASK(var->data.location));
141 }
142 }
143
144 /* Once the remap is done, reset double_inputs_read, so later it will have
145 * which location/slots are doubles */
146 shader->info.vs.double_inputs = 0;
147 }
148
149 nir_shader *
150 glsl_to_nir(const struct gl_shader_program *shader_prog,
151 gl_shader_stage stage,
152 const nir_shader_compiler_options *options)
153 {
154 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
155
156 nir_shader *shader = nir_shader_create(NULL, stage, options,
157 &sh->Program->info);
158
159 nir_visitor v1(shader);
160 nir_function_visitor v2(&v1);
161 v2.run(sh->ir);
162 visit_exec_list(sh->ir, &v1);
163
164 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
165
166 /* Remap the locations to slots so those requiring two slots will occupy
167 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
168 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
169 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
170 if (shader->info.stage == MESA_SHADER_VERTEX)
171 nir_remap_attributes(shader, options);
172
173 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
174 if (shader_prog->Label)
175 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
176
177 /* Check for transform feedback varyings specified via the API */
178 shader->info.has_transform_feedback_varyings =
179 shader_prog->TransformFeedback.NumVarying > 0;
180
181 /* Check for transform feedback varyings specified in the Shader */
182 if (shader_prog->last_vert_prog)
183 shader->info.has_transform_feedback_varyings |=
184 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
185
186 return shader;
187 }
188
189 nir_visitor::nir_visitor(nir_shader *shader)
190 {
191 this->supports_ints = shader->options->native_integers;
192 this->shader = shader;
193 this->is_global = true;
194 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
195 _mesa_key_pointer_equal);
196 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
197 _mesa_key_pointer_equal);
198 this->result = NULL;
199 this->impl = NULL;
200 this->var = NULL;
201 this->deref_head = NULL;
202 this->deref_tail = NULL;
203 memset(&this->b, 0, sizeof(this->b));
204 }
205
206 nir_visitor::~nir_visitor()
207 {
208 _mesa_hash_table_destroy(this->var_table, NULL);
209 _mesa_hash_table_destroy(this->overload_table, NULL);
210 }
211
212 nir_deref_var *
213 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
214 {
215 ir->accept(this);
216 ralloc_steal(mem_ctx, this->deref_head);
217 return this->deref_head;
218 }
219
220 static nir_constant *
221 constant_copy(ir_constant *ir, void *mem_ctx)
222 {
223 if (ir == NULL)
224 return NULL;
225
226 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
227
228 const unsigned rows = ir->type->vector_elements;
229 const unsigned cols = ir->type->matrix_columns;
230 unsigned i;
231
232 ret->num_elements = 0;
233 switch (ir->type->base_type) {
234 case GLSL_TYPE_UINT:
235 /* Only float base types can be matrices. */
236 assert(cols == 1);
237
238 for (unsigned r = 0; r < rows; r++)
239 ret->values[0].u32[r] = ir->value.u[r];
240
241 break;
242
243 case GLSL_TYPE_INT:
244 /* Only float base types can be matrices. */
245 assert(cols == 1);
246
247 for (unsigned r = 0; r < rows; r++)
248 ret->values[0].i32[r] = ir->value.i[r];
249
250 break;
251
252 case GLSL_TYPE_FLOAT:
253 for (unsigned c = 0; c < cols; c++) {
254 for (unsigned r = 0; r < rows; r++)
255 ret->values[c].f32[r] = ir->value.f[c * rows + r];
256 }
257 break;
258
259 case GLSL_TYPE_DOUBLE:
260 for (unsigned c = 0; c < cols; c++) {
261 for (unsigned r = 0; r < rows; r++)
262 ret->values[c].f64[r] = ir->value.d[c * rows + r];
263 }
264 break;
265
266 case GLSL_TYPE_UINT64:
267 /* Only float base types can be matrices. */
268 assert(cols == 1);
269
270 for (unsigned r = 0; r < rows; r++)
271 ret->values[0].u64[r] = ir->value.u64[r];
272 break;
273
274 case GLSL_TYPE_INT64:
275 /* Only float base types can be matrices. */
276 assert(cols == 1);
277
278 for (unsigned r = 0; r < rows; r++)
279 ret->values[0].i64[r] = ir->value.i64[r];
280 break;
281
282 case GLSL_TYPE_BOOL:
283 /* Only float base types can be matrices. */
284 assert(cols == 1);
285
286 for (unsigned r = 0; r < rows; r++)
287 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
288
289 break;
290
291 case GLSL_TYPE_STRUCT:
292 case GLSL_TYPE_ARRAY:
293 ret->elements = ralloc_array(mem_ctx, nir_constant *,
294 ir->type->length);
295 ret->num_elements = ir->type->length;
296
297 for (i = 0; i < ir->type->length; i++)
298 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
299 break;
300
301 default:
302 unreachable("not reached");
303 }
304
305 return ret;
306 }
307
308 void
309 nir_visitor::visit(ir_variable *ir)
310 {
311 /* TODO: In future we should switch to using the NIR lowering pass but for
312 * now just ignore these variables as GLSL IR should have lowered them.
313 * Anything remaining are just dead vars that weren't cleaned up.
314 */
315 if (ir->data.mode == ir_var_shader_shared)
316 return;
317
318 nir_variable *var = rzalloc(shader, nir_variable);
319 var->type = ir->type;
320 var->name = ralloc_strdup(var, ir->name);
321
322 var->data.always_active_io = ir->data.always_active_io;
323 var->data.read_only = ir->data.read_only;
324 var->data.centroid = ir->data.centroid;
325 var->data.sample = ir->data.sample;
326 var->data.patch = ir->data.patch;
327 var->data.invariant = ir->data.invariant;
328 var->data.location = ir->data.location;
329 var->data.stream = ir->data.stream;
330 var->data.compact = false;
331
332 switch(ir->data.mode) {
333 case ir_var_auto:
334 case ir_var_temporary:
335 if (is_global)
336 var->data.mode = nir_var_global;
337 else
338 var->data.mode = nir_var_local;
339 break;
340
341 case ir_var_function_in:
342 case ir_var_function_out:
343 case ir_var_function_inout:
344 case ir_var_const_in:
345 var->data.mode = nir_var_local;
346 break;
347
348 case ir_var_shader_in:
349 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
350 ir->data.location == VARYING_SLOT_FACE) {
351 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
352 var->data.location = SYSTEM_VALUE_FRONT_FACE;
353 var->data.mode = nir_var_system_value;
354 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
355 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
356 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
357 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
358 var->data.mode = nir_var_system_value;
359 } else {
360 var->data.mode = nir_var_shader_in;
361
362 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
363 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
364 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
365 var->data.compact = ir->type->without_array()->is_scalar();
366 }
367 }
368
369 /* Mark all the locations that require two slots */
370 if (shader->info.stage == MESA_SHADER_VERTEX &&
371 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
372 for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
373 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
374 shader->info.vs.double_inputs |= bitfield;
375 }
376 }
377 break;
378
379 case ir_var_shader_out:
380 var->data.mode = nir_var_shader_out;
381 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
382 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
383 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
384 var->data.compact = ir->type->without_array()->is_scalar();
385 }
386 break;
387
388 case ir_var_uniform:
389 var->data.mode = nir_var_uniform;
390 break;
391
392 case ir_var_shader_storage:
393 var->data.mode = nir_var_shader_storage;
394 break;
395
396 case ir_var_system_value:
397 var->data.mode = nir_var_system_value;
398 break;
399
400 default:
401 unreachable("not reached");
402 }
403
404 var->data.interpolation = ir->data.interpolation;
405 var->data.origin_upper_left = ir->data.origin_upper_left;
406 var->data.pixel_center_integer = ir->data.pixel_center_integer;
407 var->data.location_frac = ir->data.location_frac;
408
409 if (var->data.pixel_center_integer) {
410 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
411 shader->info.fs.pixel_center_integer = true;
412 }
413
414 switch (ir->data.depth_layout) {
415 case ir_depth_layout_none:
416 var->data.depth_layout = nir_depth_layout_none;
417 break;
418 case ir_depth_layout_any:
419 var->data.depth_layout = nir_depth_layout_any;
420 break;
421 case ir_depth_layout_greater:
422 var->data.depth_layout = nir_depth_layout_greater;
423 break;
424 case ir_depth_layout_less:
425 var->data.depth_layout = nir_depth_layout_less;
426 break;
427 case ir_depth_layout_unchanged:
428 var->data.depth_layout = nir_depth_layout_unchanged;
429 break;
430 default:
431 unreachable("not reached");
432 }
433
434 var->data.index = ir->data.index;
435 var->data.descriptor_set = 0;
436 var->data.binding = ir->data.binding;
437 var->data.offset = ir->data.offset;
438 var->data.image.read_only = ir->data.memory_read_only;
439 var->data.image.write_only = ir->data.memory_write_only;
440 var->data.image.coherent = ir->data.memory_coherent;
441 var->data.image._volatile = ir->data.memory_volatile;
442 var->data.image.restrict_flag = ir->data.memory_restrict;
443 var->data.image.format = ir->data.image_format;
444 var->data.fb_fetch_output = ir->data.fb_fetch_output;
445
446 var->num_state_slots = ir->get_num_state_slots();
447 if (var->num_state_slots > 0) {
448 var->state_slots = ralloc_array(var, nir_state_slot,
449 var->num_state_slots);
450
451 ir_state_slot *state_slots = ir->get_state_slots();
452 for (unsigned i = 0; i < var->num_state_slots; i++) {
453 for (unsigned j = 0; j < 5; j++)
454 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
455 var->state_slots[i].swizzle = state_slots[i].swizzle;
456 }
457 } else {
458 var->state_slots = NULL;
459 }
460
461 var->constant_initializer = constant_copy(ir->constant_initializer, var);
462
463 var->interface_type = ir->get_interface_type();
464
465 if (var->data.mode == nir_var_local)
466 nir_function_impl_add_variable(impl, var);
467 else
468 nir_shader_add_variable(shader, var);
469
470 _mesa_hash_table_insert(var_table, ir, var);
471 this->var = var;
472 }
473
474 ir_visitor_status
475 nir_function_visitor::visit_enter(ir_function *ir)
476 {
477 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
478 visitor->create_function(sig);
479 }
480 return visit_continue_with_parent;
481 }
482
483 void
484 nir_visitor::create_function(ir_function_signature *ir)
485 {
486 if (ir->is_intrinsic())
487 return;
488
489 nir_function *func = nir_function_create(shader, ir->function_name());
490
491 assert(ir->parameters.is_empty());
492 assert(ir->return_type == glsl_type::void_type);
493
494 _mesa_hash_table_insert(this->overload_table, ir, func);
495 }
496
497 void
498 nir_visitor::visit(ir_function *ir)
499 {
500 foreach_in_list(ir_function_signature, sig, &ir->signatures)
501 sig->accept(this);
502 }
503
504 void
505 nir_visitor::visit(ir_function_signature *ir)
506 {
507 if (ir->is_intrinsic())
508 return;
509
510 struct hash_entry *entry =
511 _mesa_hash_table_search(this->overload_table, ir);
512
513 assert(entry);
514 nir_function *func = (nir_function *) entry->data;
515
516 if (ir->is_defined) {
517 nir_function_impl *impl = nir_function_impl_create(func);
518 this->impl = impl;
519
520 assert(strcmp(func->name, "main") == 0);
521 assert(ir->parameters.is_empty());
522 assert(func->return_type == glsl_type::void_type);
523
524 this->is_global = false;
525
526 nir_builder_init(&b, impl);
527 b.cursor = nir_after_cf_list(&impl->body);
528 visit_exec_list(&ir->body, this);
529
530 this->is_global = true;
531 } else {
532 func->impl = NULL;
533 }
534 }
535
536 void
537 nir_visitor::visit(ir_loop *ir)
538 {
539 nir_push_loop(&b);
540 visit_exec_list(&ir->body_instructions, this);
541 nir_pop_loop(&b, NULL);
542 }
543
544 void
545 nir_visitor::visit(ir_if *ir)
546 {
547 nir_push_if(&b, evaluate_rvalue(ir->condition));
548 visit_exec_list(&ir->then_instructions, this);
549 nir_push_else(&b, NULL);
550 visit_exec_list(&ir->else_instructions, this);
551 nir_pop_if(&b, NULL);
552 }
553
554 void
555 nir_visitor::visit(ir_discard *ir)
556 {
557 /*
558 * discards aren't treated as control flow, because before we lower them
559 * they can appear anywhere in the shader and the stuff after them may still
560 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
561 * discards will be immediately followed by a return.
562 */
563
564 nir_intrinsic_instr *discard;
565 if (ir->condition) {
566 discard = nir_intrinsic_instr_create(this->shader,
567 nir_intrinsic_discard_if);
568 discard->src[0] =
569 nir_src_for_ssa(evaluate_rvalue(ir->condition));
570 } else {
571 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
572 }
573
574 nir_builder_instr_insert(&b, &discard->instr);
575 }
576
577 void
578 nir_visitor::visit(ir_emit_vertex *ir)
579 {
580 nir_intrinsic_instr *instr =
581 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
582 nir_intrinsic_set_stream_id(instr, ir->stream_id());
583 nir_builder_instr_insert(&b, &instr->instr);
584 }
585
586 void
587 nir_visitor::visit(ir_end_primitive *ir)
588 {
589 nir_intrinsic_instr *instr =
590 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
591 nir_intrinsic_set_stream_id(instr, ir->stream_id());
592 nir_builder_instr_insert(&b, &instr->instr);
593 }
594
595 void
596 nir_visitor::visit(ir_loop_jump *ir)
597 {
598 nir_jump_type type;
599 switch (ir->mode) {
600 case ir_loop_jump::jump_break:
601 type = nir_jump_break;
602 break;
603 case ir_loop_jump::jump_continue:
604 type = nir_jump_continue;
605 break;
606 default:
607 unreachable("not reached");
608 }
609
610 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
611 nir_builder_instr_insert(&b, &instr->instr);
612 }
613
614 void
615 nir_visitor::visit(ir_return *ir)
616 {
617 if (ir->value != NULL) {
618 nir_intrinsic_instr *copy =
619 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
620
621 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
622 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
623 }
624
625 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
626 nir_builder_instr_insert(&b, &instr->instr);
627 }
628
629 void
630 nir_visitor::visit(ir_call *ir)
631 {
632 if (ir->callee->is_intrinsic()) {
633 nir_intrinsic_op op;
634
635 switch (ir->callee->intrinsic_id) {
636 case ir_intrinsic_atomic_counter_read:
637 op = nir_intrinsic_atomic_counter_read_var;
638 break;
639 case ir_intrinsic_atomic_counter_increment:
640 op = nir_intrinsic_atomic_counter_inc_var;
641 break;
642 case ir_intrinsic_atomic_counter_predecrement:
643 op = nir_intrinsic_atomic_counter_dec_var;
644 break;
645 case ir_intrinsic_atomic_counter_add:
646 op = nir_intrinsic_atomic_counter_add_var;
647 break;
648 case ir_intrinsic_atomic_counter_and:
649 op = nir_intrinsic_atomic_counter_and_var;
650 break;
651 case ir_intrinsic_atomic_counter_or:
652 op = nir_intrinsic_atomic_counter_or_var;
653 break;
654 case ir_intrinsic_atomic_counter_xor:
655 op = nir_intrinsic_atomic_counter_xor_var;
656 break;
657 case ir_intrinsic_atomic_counter_min:
658 op = nir_intrinsic_atomic_counter_min_var;
659 break;
660 case ir_intrinsic_atomic_counter_max:
661 op = nir_intrinsic_atomic_counter_max_var;
662 break;
663 case ir_intrinsic_atomic_counter_exchange:
664 op = nir_intrinsic_atomic_counter_exchange_var;
665 break;
666 case ir_intrinsic_atomic_counter_comp_swap:
667 op = nir_intrinsic_atomic_counter_comp_swap_var;
668 break;
669 case ir_intrinsic_image_load:
670 op = nir_intrinsic_image_load;
671 break;
672 case ir_intrinsic_image_store:
673 op = nir_intrinsic_image_store;
674 break;
675 case ir_intrinsic_image_atomic_add:
676 op = nir_intrinsic_image_atomic_add;
677 break;
678 case ir_intrinsic_image_atomic_min:
679 op = nir_intrinsic_image_atomic_min;
680 break;
681 case ir_intrinsic_image_atomic_max:
682 op = nir_intrinsic_image_atomic_max;
683 break;
684 case ir_intrinsic_image_atomic_and:
685 op = nir_intrinsic_image_atomic_and;
686 break;
687 case ir_intrinsic_image_atomic_or:
688 op = nir_intrinsic_image_atomic_or;
689 break;
690 case ir_intrinsic_image_atomic_xor:
691 op = nir_intrinsic_image_atomic_xor;
692 break;
693 case ir_intrinsic_image_atomic_exchange:
694 op = nir_intrinsic_image_atomic_exchange;
695 break;
696 case ir_intrinsic_image_atomic_comp_swap:
697 op = nir_intrinsic_image_atomic_comp_swap;
698 break;
699 case ir_intrinsic_memory_barrier:
700 op = nir_intrinsic_memory_barrier;
701 break;
702 case ir_intrinsic_image_size:
703 op = nir_intrinsic_image_size;
704 break;
705 case ir_intrinsic_image_samples:
706 op = nir_intrinsic_image_samples;
707 break;
708 case ir_intrinsic_ssbo_store:
709 op = nir_intrinsic_store_ssbo;
710 break;
711 case ir_intrinsic_ssbo_load:
712 op = nir_intrinsic_load_ssbo;
713 break;
714 case ir_intrinsic_ssbo_atomic_add:
715 op = nir_intrinsic_ssbo_atomic_add;
716 break;
717 case ir_intrinsic_ssbo_atomic_and:
718 op = nir_intrinsic_ssbo_atomic_and;
719 break;
720 case ir_intrinsic_ssbo_atomic_or:
721 op = nir_intrinsic_ssbo_atomic_or;
722 break;
723 case ir_intrinsic_ssbo_atomic_xor:
724 op = nir_intrinsic_ssbo_atomic_xor;
725 break;
726 case ir_intrinsic_ssbo_atomic_min:
727 assert(ir->return_deref);
728 if (ir->return_deref->type == glsl_type::int_type)
729 op = nir_intrinsic_ssbo_atomic_imin;
730 else if (ir->return_deref->type == glsl_type::uint_type)
731 op = nir_intrinsic_ssbo_atomic_umin;
732 else
733 unreachable("Invalid type");
734 break;
735 case ir_intrinsic_ssbo_atomic_max:
736 assert(ir->return_deref);
737 if (ir->return_deref->type == glsl_type::int_type)
738 op = nir_intrinsic_ssbo_atomic_imax;
739 else if (ir->return_deref->type == glsl_type::uint_type)
740 op = nir_intrinsic_ssbo_atomic_umax;
741 else
742 unreachable("Invalid type");
743 break;
744 case ir_intrinsic_ssbo_atomic_exchange:
745 op = nir_intrinsic_ssbo_atomic_exchange;
746 break;
747 case ir_intrinsic_ssbo_atomic_comp_swap:
748 op = nir_intrinsic_ssbo_atomic_comp_swap;
749 break;
750 case ir_intrinsic_shader_clock:
751 op = nir_intrinsic_shader_clock;
752 break;
753 case ir_intrinsic_group_memory_barrier:
754 op = nir_intrinsic_group_memory_barrier;
755 break;
756 case ir_intrinsic_memory_barrier_atomic_counter:
757 op = nir_intrinsic_memory_barrier_atomic_counter;
758 break;
759 case ir_intrinsic_memory_barrier_buffer:
760 op = nir_intrinsic_memory_barrier_buffer;
761 break;
762 case ir_intrinsic_memory_barrier_image:
763 op = nir_intrinsic_memory_barrier_image;
764 break;
765 case ir_intrinsic_memory_barrier_shared:
766 op = nir_intrinsic_memory_barrier_shared;
767 break;
768 case ir_intrinsic_shared_load:
769 op = nir_intrinsic_load_shared;
770 break;
771 case ir_intrinsic_shared_store:
772 op = nir_intrinsic_store_shared;
773 break;
774 case ir_intrinsic_shared_atomic_add:
775 op = nir_intrinsic_shared_atomic_add;
776 break;
777 case ir_intrinsic_shared_atomic_and:
778 op = nir_intrinsic_shared_atomic_and;
779 break;
780 case ir_intrinsic_shared_atomic_or:
781 op = nir_intrinsic_shared_atomic_or;
782 break;
783 case ir_intrinsic_shared_atomic_xor:
784 op = nir_intrinsic_shared_atomic_xor;
785 break;
786 case ir_intrinsic_shared_atomic_min:
787 assert(ir->return_deref);
788 if (ir->return_deref->type == glsl_type::int_type)
789 op = nir_intrinsic_shared_atomic_imin;
790 else if (ir->return_deref->type == glsl_type::uint_type)
791 op = nir_intrinsic_shared_atomic_umin;
792 else
793 unreachable("Invalid type");
794 break;
795 case ir_intrinsic_shared_atomic_max:
796 assert(ir->return_deref);
797 if (ir->return_deref->type == glsl_type::int_type)
798 op = nir_intrinsic_shared_atomic_imax;
799 else if (ir->return_deref->type == glsl_type::uint_type)
800 op = nir_intrinsic_shared_atomic_umax;
801 else
802 unreachable("Invalid type");
803 break;
804 case ir_intrinsic_shared_atomic_exchange:
805 op = nir_intrinsic_shared_atomic_exchange;
806 break;
807 case ir_intrinsic_shared_atomic_comp_swap:
808 op = nir_intrinsic_shared_atomic_comp_swap;
809 break;
810 case ir_intrinsic_vote_any:
811 op = nir_intrinsic_vote_any;
812 break;
813 case ir_intrinsic_vote_all:
814 op = nir_intrinsic_vote_all;
815 break;
816 case ir_intrinsic_vote_eq:
817 op = nir_intrinsic_vote_ieq;
818 break;
819 case ir_intrinsic_ballot:
820 op = nir_intrinsic_ballot;
821 break;
822 case ir_intrinsic_read_invocation:
823 op = nir_intrinsic_read_invocation;
824 break;
825 case ir_intrinsic_read_first_invocation:
826 op = nir_intrinsic_read_first_invocation;
827 break;
828 default:
829 unreachable("not reached");
830 }
831
832 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
833 nir_dest *dest = &instr->dest;
834
835 switch (op) {
836 case nir_intrinsic_atomic_counter_read_var:
837 case nir_intrinsic_atomic_counter_inc_var:
838 case nir_intrinsic_atomic_counter_dec_var:
839 case nir_intrinsic_atomic_counter_add_var:
840 case nir_intrinsic_atomic_counter_min_var:
841 case nir_intrinsic_atomic_counter_max_var:
842 case nir_intrinsic_atomic_counter_and_var:
843 case nir_intrinsic_atomic_counter_or_var:
844 case nir_intrinsic_atomic_counter_xor_var:
845 case nir_intrinsic_atomic_counter_exchange_var:
846 case nir_intrinsic_atomic_counter_comp_swap_var: {
847 /* Set the counter variable dereference. */
848 exec_node *param = ir->actual_parameters.get_head();
849 ir_dereference *counter = (ir_dereference *)param;
850
851 instr->variables[0] = evaluate_deref(&instr->instr, counter);
852 param = param->get_next();
853
854 /* Set the intrinsic destination. */
855 if (ir->return_deref) {
856 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
857 }
858
859 /* Set the intrinsic parameters. */
860 if (!param->is_tail_sentinel()) {
861 instr->src[0] =
862 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
863 param = param->get_next();
864 }
865
866 if (!param->is_tail_sentinel()) {
867 instr->src[1] =
868 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
869 param = param->get_next();
870 }
871
872 nir_builder_instr_insert(&b, &instr->instr);
873 break;
874 }
875 case nir_intrinsic_image_load:
876 case nir_intrinsic_image_store:
877 case nir_intrinsic_image_atomic_add:
878 case nir_intrinsic_image_atomic_min:
879 case nir_intrinsic_image_atomic_max:
880 case nir_intrinsic_image_atomic_and:
881 case nir_intrinsic_image_atomic_or:
882 case nir_intrinsic_image_atomic_xor:
883 case nir_intrinsic_image_atomic_exchange:
884 case nir_intrinsic_image_atomic_comp_swap:
885 case nir_intrinsic_image_samples:
886 case nir_intrinsic_image_size: {
887 nir_ssa_undef_instr *instr_undef =
888 nir_ssa_undef_instr_create(shader, 1, 32);
889 nir_builder_instr_insert(&b, &instr_undef->instr);
890
891 /* Set the image variable dereference. */
892 exec_node *param = ir->actual_parameters.get_head();
893 ir_dereference *image = (ir_dereference *)param;
894 const glsl_type *type =
895 image->variable_referenced()->type->without_array();
896
897 instr->variables[0] = evaluate_deref(&instr->instr, image);
898 param = param->get_next();
899
900 /* Set the intrinsic destination. */
901 if (ir->return_deref) {
902 unsigned num_components = ir->return_deref->type->vector_elements;
903 if (instr->intrinsic == nir_intrinsic_image_size)
904 instr->num_components = num_components;
905 nir_ssa_dest_init(&instr->instr, &instr->dest,
906 num_components, 32, NULL);
907 }
908
909 if (op == nir_intrinsic_image_size ||
910 op == nir_intrinsic_image_samples) {
911 nir_builder_instr_insert(&b, &instr->instr);
912 break;
913 }
914
915 /* Set the address argument, extending the coordinate vector to four
916 * components.
917 */
918 nir_ssa_def *src_addr =
919 evaluate_rvalue((ir_dereference *)param);
920 nir_ssa_def *srcs[4];
921
922 for (int i = 0; i < 4; i++) {
923 if (i < type->coordinate_components())
924 srcs[i] = nir_channel(&b, src_addr, i);
925 else
926 srcs[i] = &instr_undef->def;
927 }
928
929 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
930 param = param->get_next();
931
932 /* Set the sample argument, which is undefined for single-sample
933 * images.
934 */
935 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
936 instr->src[1] =
937 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
938 param = param->get_next();
939 } else {
940 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
941 }
942
943 /* Set the intrinsic parameters. */
944 if (!param->is_tail_sentinel()) {
945 instr->src[2] =
946 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
947 param = param->get_next();
948 }
949
950 if (!param->is_tail_sentinel()) {
951 instr->src[3] =
952 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
953 param = param->get_next();
954 }
955 nir_builder_instr_insert(&b, &instr->instr);
956 break;
957 }
958 case nir_intrinsic_memory_barrier:
959 case nir_intrinsic_group_memory_barrier:
960 case nir_intrinsic_memory_barrier_atomic_counter:
961 case nir_intrinsic_memory_barrier_buffer:
962 case nir_intrinsic_memory_barrier_image:
963 case nir_intrinsic_memory_barrier_shared:
964 nir_builder_instr_insert(&b, &instr->instr);
965 break;
966 case nir_intrinsic_shader_clock:
967 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
968 instr->num_components = 2;
969 nir_builder_instr_insert(&b, &instr->instr);
970 break;
971 case nir_intrinsic_store_ssbo: {
972 exec_node *param = ir->actual_parameters.get_head();
973 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
974
975 param = param->get_next();
976 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
977
978 param = param->get_next();
979 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
980
981 param = param->get_next();
982 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
983 assert(write_mask);
984
985 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
986 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
987 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
988 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
989 instr->num_components = val->type->vector_elements;
990
991 nir_builder_instr_insert(&b, &instr->instr);
992 break;
993 }
994 case nir_intrinsic_load_ssbo: {
995 exec_node *param = ir->actual_parameters.get_head();
996 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
997
998 param = param->get_next();
999 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1000
1001 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1002 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1003
1004 const glsl_type *type = ir->return_deref->var->type;
1005 instr->num_components = type->vector_elements;
1006
1007 /* Setup destination register */
1008 unsigned bit_size = glsl_get_bit_size(type);
1009 nir_ssa_dest_init(&instr->instr, &instr->dest,
1010 type->vector_elements, bit_size, NULL);
1011
1012 /* Insert the created nir instruction now since in the case of boolean
1013 * result we will need to emit another instruction after it
1014 */
1015 nir_builder_instr_insert(&b, &instr->instr);
1016
1017 /*
1018 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1019 * consider a true boolean to be ~0. Fix this up with a != 0
1020 * comparison.
1021 */
1022 if (type->is_boolean()) {
1023 nir_alu_instr *load_ssbo_compare =
1024 nir_alu_instr_create(shader, nir_op_ine);
1025 load_ssbo_compare->src[0].src.is_ssa = true;
1026 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1027 load_ssbo_compare->src[1].src =
1028 nir_src_for_ssa(nir_imm_int(&b, 0));
1029 for (unsigned i = 0; i < type->vector_elements; i++)
1030 load_ssbo_compare->src[1].swizzle[i] = 0;
1031 nir_ssa_dest_init(&load_ssbo_compare->instr,
1032 &load_ssbo_compare->dest.dest,
1033 type->vector_elements, bit_size, NULL);
1034 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1035 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1036 dest = &load_ssbo_compare->dest.dest;
1037 }
1038 break;
1039 }
1040 case nir_intrinsic_ssbo_atomic_add:
1041 case nir_intrinsic_ssbo_atomic_imin:
1042 case nir_intrinsic_ssbo_atomic_umin:
1043 case nir_intrinsic_ssbo_atomic_imax:
1044 case nir_intrinsic_ssbo_atomic_umax:
1045 case nir_intrinsic_ssbo_atomic_and:
1046 case nir_intrinsic_ssbo_atomic_or:
1047 case nir_intrinsic_ssbo_atomic_xor:
1048 case nir_intrinsic_ssbo_atomic_exchange:
1049 case nir_intrinsic_ssbo_atomic_comp_swap: {
1050 int param_count = ir->actual_parameters.length();
1051 assert(param_count == 3 || param_count == 4);
1052
1053 /* Block index */
1054 exec_node *param = ir->actual_parameters.get_head();
1055 ir_instruction *inst = (ir_instruction *) param;
1056 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1057
1058 /* Offset */
1059 param = param->get_next();
1060 inst = (ir_instruction *) param;
1061 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1062
1063 /* data1 parameter (this is always present) */
1064 param = param->get_next();
1065 inst = (ir_instruction *) param;
1066 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1067
1068 /* data2 parameter (only with atomic_comp_swap) */
1069 if (param_count == 4) {
1070 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1071 param = param->get_next();
1072 inst = (ir_instruction *) param;
1073 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1074 }
1075
1076 /* Atomic result */
1077 assert(ir->return_deref);
1078 nir_ssa_dest_init(&instr->instr, &instr->dest,
1079 ir->return_deref->type->vector_elements, 32, NULL);
1080 nir_builder_instr_insert(&b, &instr->instr);
1081 break;
1082 }
1083 case nir_intrinsic_load_shared: {
1084 exec_node *param = ir->actual_parameters.get_head();
1085 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1086
1087 nir_intrinsic_set_base(instr, 0);
1088 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1089
1090 const glsl_type *type = ir->return_deref->var->type;
1091 instr->num_components = type->vector_elements;
1092
1093 /* Setup destination register */
1094 unsigned bit_size = glsl_get_bit_size(type);
1095 nir_ssa_dest_init(&instr->instr, &instr->dest,
1096 type->vector_elements, bit_size, NULL);
1097
1098 nir_builder_instr_insert(&b, &instr->instr);
1099 break;
1100 }
1101 case nir_intrinsic_store_shared: {
1102 exec_node *param = ir->actual_parameters.get_head();
1103 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1104
1105 param = param->get_next();
1106 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1107
1108 param = param->get_next();
1109 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1110 assert(write_mask);
1111
1112 nir_intrinsic_set_base(instr, 0);
1113 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1114
1115 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1116
1117 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1118 instr->num_components = val->type->vector_elements;
1119
1120 nir_builder_instr_insert(&b, &instr->instr);
1121 break;
1122 }
1123 case nir_intrinsic_shared_atomic_add:
1124 case nir_intrinsic_shared_atomic_imin:
1125 case nir_intrinsic_shared_atomic_umin:
1126 case nir_intrinsic_shared_atomic_imax:
1127 case nir_intrinsic_shared_atomic_umax:
1128 case nir_intrinsic_shared_atomic_and:
1129 case nir_intrinsic_shared_atomic_or:
1130 case nir_intrinsic_shared_atomic_xor:
1131 case nir_intrinsic_shared_atomic_exchange:
1132 case nir_intrinsic_shared_atomic_comp_swap: {
1133 int param_count = ir->actual_parameters.length();
1134 assert(param_count == 2 || param_count == 3);
1135
1136 /* Offset */
1137 exec_node *param = ir->actual_parameters.get_head();
1138 ir_instruction *inst = (ir_instruction *) param;
1139 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1140
1141 /* data1 parameter (this is always present) */
1142 param = param->get_next();
1143 inst = (ir_instruction *) param;
1144 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1145
1146 /* data2 parameter (only with atomic_comp_swap) */
1147 if (param_count == 3) {
1148 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1149 param = param->get_next();
1150 inst = (ir_instruction *) param;
1151 instr->src[2] =
1152 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1153 }
1154
1155 /* Atomic result */
1156 assert(ir->return_deref);
1157 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1158 nir_ssa_dest_init(&instr->instr, &instr->dest,
1159 ir->return_deref->type->vector_elements,
1160 bit_size, NULL);
1161 nir_builder_instr_insert(&b, &instr->instr);
1162 break;
1163 }
1164 case nir_intrinsic_vote_any:
1165 case nir_intrinsic_vote_all:
1166 case nir_intrinsic_vote_ieq: {
1167 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1168 instr->num_components = 1;
1169
1170 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1171 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1172
1173 nir_builder_instr_insert(&b, &instr->instr);
1174 break;
1175 }
1176
1177 case nir_intrinsic_ballot: {
1178 nir_ssa_dest_init(&instr->instr, &instr->dest,
1179 ir->return_deref->type->vector_elements, 64, NULL);
1180 instr->num_components = ir->return_deref->type->vector_elements;
1181
1182 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1183 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1184
1185 nir_builder_instr_insert(&b, &instr->instr);
1186 break;
1187 }
1188 case nir_intrinsic_read_invocation: {
1189 nir_ssa_dest_init(&instr->instr, &instr->dest,
1190 ir->return_deref->type->vector_elements, 32, NULL);
1191 instr->num_components = ir->return_deref->type->vector_elements;
1192
1193 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1194 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1195
1196 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1197 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1198
1199 nir_builder_instr_insert(&b, &instr->instr);
1200 break;
1201 }
1202 case nir_intrinsic_read_first_invocation: {
1203 nir_ssa_dest_init(&instr->instr, &instr->dest,
1204 ir->return_deref->type->vector_elements, 32, NULL);
1205 instr->num_components = ir->return_deref->type->vector_elements;
1206
1207 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1208 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1209
1210 nir_builder_instr_insert(&b, &instr->instr);
1211 break;
1212 }
1213 default:
1214 unreachable("not reached");
1215 }
1216
1217 if (ir->return_deref) {
1218 nir_intrinsic_instr *store_instr =
1219 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1220 store_instr->num_components = ir->return_deref->type->vector_elements;
1221 nir_intrinsic_set_write_mask(store_instr,
1222 (1 << store_instr->num_components) - 1);
1223
1224 store_instr->variables[0] =
1225 evaluate_deref(&store_instr->instr, ir->return_deref);
1226 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1227
1228 nir_builder_instr_insert(&b, &store_instr->instr);
1229 }
1230
1231 return;
1232 }
1233
1234 struct hash_entry *entry =
1235 _mesa_hash_table_search(this->overload_table, ir->callee);
1236 assert(entry);
1237 nir_function *callee = (nir_function *) entry->data;
1238
1239 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1240
1241 unsigned i = 0;
1242 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1243 instr->params[i] = evaluate_deref(&instr->instr, param);
1244 i++;
1245 }
1246
1247 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1248 nir_builder_instr_insert(&b, &instr->instr);
1249 }
1250
1251 void
1252 nir_visitor::visit(ir_assignment *ir)
1253 {
1254 unsigned num_components = ir->lhs->type->vector_elements;
1255
1256 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1257 ir->lhs->variable_referenced()->data.precise;
1258
1259 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1260 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1261 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1262 nir_intrinsic_instr *copy =
1263 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1264
1265 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1266 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1267
1268 if (ir->condition) {
1269 nir_push_if(&b, evaluate_rvalue(ir->condition));
1270 nir_builder_instr_insert(&b, &copy->instr);
1271 nir_pop_if(&b, NULL);
1272 } else {
1273 nir_builder_instr_insert(&b, &copy->instr);
1274 }
1275 return;
1276 }
1277
1278 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1279
1280 ir->lhs->accept(this);
1281 nir_deref_var *lhs_deref = this->deref_head;
1282 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1283
1284 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1285 /* GLSL IR will give us the input to the write-masked assignment in a
1286 * single packed vector. So, for example, if the writemask is xzw, then
1287 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1288 * from the load.
1289 */
1290 unsigned swiz[4];
1291 unsigned component = 0;
1292 for (unsigned i = 0; i < 4; i++) {
1293 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1294 }
1295 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1296 }
1297
1298 nir_intrinsic_instr *store =
1299 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1300 store->num_components = ir->lhs->type->vector_elements;
1301 nir_intrinsic_set_write_mask(store, ir->write_mask);
1302 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1303 store->src[0] = nir_src_for_ssa(src);
1304
1305 if (ir->condition) {
1306 nir_push_if(&b, evaluate_rvalue(ir->condition));
1307 nir_builder_instr_insert(&b, &store->instr);
1308 nir_pop_if(&b, NULL);
1309 } else {
1310 nir_builder_instr_insert(&b, &store->instr);
1311 }
1312 }
1313
1314 /*
1315 * Given an instruction, returns a pointer to its destination or NULL if there
1316 * is no destination.
1317 *
1318 * Note that this only handles instructions we generate at this level.
1319 */
1320 static nir_dest *
1321 get_instr_dest(nir_instr *instr)
1322 {
1323 nir_alu_instr *alu_instr;
1324 nir_intrinsic_instr *intrinsic_instr;
1325 nir_tex_instr *tex_instr;
1326
1327 switch (instr->type) {
1328 case nir_instr_type_alu:
1329 alu_instr = nir_instr_as_alu(instr);
1330 return &alu_instr->dest.dest;
1331
1332 case nir_instr_type_intrinsic:
1333 intrinsic_instr = nir_instr_as_intrinsic(instr);
1334 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1335 return &intrinsic_instr->dest;
1336 else
1337 return NULL;
1338
1339 case nir_instr_type_tex:
1340 tex_instr = nir_instr_as_tex(instr);
1341 return &tex_instr->dest;
1342
1343 default:
1344 unreachable("not reached");
1345 }
1346
1347 return NULL;
1348 }
1349
1350 void
1351 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1352 unsigned bit_size)
1353 {
1354 nir_dest *dest = get_instr_dest(instr);
1355
1356 if (dest)
1357 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1358
1359 nir_builder_instr_insert(&b, instr);
1360
1361 if (dest) {
1362 assert(dest->is_ssa);
1363 this->result = &dest->ssa;
1364 }
1365 }
1366
1367 nir_ssa_def *
1368 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1369 {
1370 ir->accept(this);
1371 if (ir->as_dereference() || ir->as_constant()) {
1372 /*
1373 * A dereference is being used on the right hand side, which means we
1374 * must emit a variable load.
1375 */
1376
1377 nir_intrinsic_instr *load_instr =
1378 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1379 load_instr->num_components = ir->type->vector_elements;
1380 load_instr->variables[0] = this->deref_head;
1381 ralloc_steal(load_instr, load_instr->variables[0]);
1382 unsigned bit_size = glsl_get_bit_size(ir->type);
1383 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1384 }
1385
1386 return this->result;
1387 }
1388
1389 static bool
1390 type_is_float(glsl_base_type type)
1391 {
1392 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1393 type == GLSL_TYPE_FLOAT16;
1394 }
1395
1396 static bool
1397 type_is_signed(glsl_base_type type)
1398 {
1399 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1400 type == GLSL_TYPE_INT16;
1401 }
1402
1403 void
1404 nir_visitor::visit(ir_expression *ir)
1405 {
1406 /* Some special cases */
1407 switch (ir->operation) {
1408 case ir_binop_ubo_load: {
1409 nir_intrinsic_instr *load =
1410 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1411 unsigned bit_size = glsl_get_bit_size(ir->type);
1412 load->num_components = ir->type->vector_elements;
1413 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1414 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1415 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1416
1417 /*
1418 * In UBO's, a true boolean value is any non-zero value, but we consider
1419 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1420 */
1421
1422 if (ir->type->is_boolean())
1423 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1424
1425 return;
1426 }
1427
1428 case ir_unop_interpolate_at_centroid:
1429 case ir_binop_interpolate_at_offset:
1430 case ir_binop_interpolate_at_sample: {
1431 ir_dereference *deref = ir->operands[0]->as_dereference();
1432 ir_swizzle *swizzle = NULL;
1433 if (!deref) {
1434 /* the api does not allow a swizzle here, but the varying packing code
1435 * may have pushed one into here.
1436 */
1437 swizzle = ir->operands[0]->as_swizzle();
1438 assert(swizzle);
1439 deref = swizzle->val->as_dereference();
1440 assert(deref);
1441 }
1442
1443 deref->accept(this);
1444
1445 nir_intrinsic_op op;
1446 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1447 switch (ir->operation) {
1448 case ir_unop_interpolate_at_centroid:
1449 op = nir_intrinsic_interp_var_at_centroid;
1450 break;
1451 case ir_binop_interpolate_at_offset:
1452 op = nir_intrinsic_interp_var_at_offset;
1453 break;
1454 case ir_binop_interpolate_at_sample:
1455 op = nir_intrinsic_interp_var_at_sample;
1456 break;
1457 default:
1458 unreachable("Invalid interpolation intrinsic");
1459 }
1460 } else {
1461 /* This case can happen if the vertex shader does not write the
1462 * given varying. In this case, the linker will lower it to a
1463 * global variable. Since interpolating a variable makes no
1464 * sense, we'll just turn it into a load which will probably
1465 * eventually end up as an SSA definition.
1466 */
1467 assert(this->deref_head->var->data.mode == nir_var_global);
1468 op = nir_intrinsic_load_var;
1469 }
1470
1471 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1472 intrin->num_components = deref->type->vector_elements;
1473 intrin->variables[0] = this->deref_head;
1474 ralloc_steal(intrin, intrin->variables[0]);
1475
1476 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1477 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1478 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1479
1480 unsigned bit_size = glsl_get_bit_size(deref->type);
1481 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1482
1483 if (swizzle) {
1484 unsigned swiz[4] = {
1485 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1486 };
1487
1488 result = nir_swizzle(&b, result, swiz,
1489 swizzle->type->vector_elements, false);
1490 }
1491
1492 return;
1493 }
1494
1495 default:
1496 break;
1497 }
1498
1499 nir_ssa_def *srcs[4];
1500 for (unsigned i = 0; i < ir->num_operands; i++)
1501 srcs[i] = evaluate_rvalue(ir->operands[i]);
1502
1503 glsl_base_type types[4];
1504 for (unsigned i = 0; i < ir->num_operands; i++)
1505 if (supports_ints)
1506 types[i] = ir->operands[i]->type->base_type;
1507 else
1508 types[i] = GLSL_TYPE_FLOAT;
1509
1510 glsl_base_type out_type;
1511 if (supports_ints)
1512 out_type = ir->type->base_type;
1513 else
1514 out_type = GLSL_TYPE_FLOAT;
1515
1516 switch (ir->operation) {
1517 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1518 case ir_unop_logic_not:
1519 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1520 break;
1521 case ir_unop_neg:
1522 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1523 : nir_ineg(&b, srcs[0]);
1524 break;
1525 case ir_unop_abs:
1526 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1527 : nir_iabs(&b, srcs[0]);
1528 break;
1529 case ir_unop_saturate:
1530 assert(type_is_float(types[0]));
1531 result = nir_fsat(&b, srcs[0]);
1532 break;
1533 case ir_unop_sign:
1534 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1535 : nir_isign(&b, srcs[0]);
1536 break;
1537 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1538 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1539 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1540 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1541 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1542 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1543 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1544 case ir_unop_i2f:
1545 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1546 break;
1547 case ir_unop_u2f:
1548 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1549 break;
1550 case ir_unop_b2f:
1551 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1552 break;
1553 case ir_unop_f2i:
1554 case ir_unop_f2u:
1555 case ir_unop_f2b:
1556 case ir_unop_i2b:
1557 case ir_unop_b2i:
1558 case ir_unop_b2i64:
1559 case ir_unop_d2f:
1560 case ir_unop_f2d:
1561 case ir_unop_d2i:
1562 case ir_unop_d2u:
1563 case ir_unop_d2b:
1564 case ir_unop_i2d:
1565 case ir_unop_u2d:
1566 case ir_unop_i642i:
1567 case ir_unop_i642u:
1568 case ir_unop_i642f:
1569 case ir_unop_i642b:
1570 case ir_unop_i642d:
1571 case ir_unop_u642i:
1572 case ir_unop_u642u:
1573 case ir_unop_u642f:
1574 case ir_unop_u642d:
1575 case ir_unop_i2i64:
1576 case ir_unop_u2i64:
1577 case ir_unop_f2i64:
1578 case ir_unop_d2i64:
1579 case ir_unop_i2u64:
1580 case ir_unop_u2u64:
1581 case ir_unop_f2u64:
1582 case ir_unop_d2u64:
1583 case ir_unop_i2u:
1584 case ir_unop_u2i:
1585 case ir_unop_i642u64:
1586 case ir_unop_u642i64: {
1587 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1588 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1589 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1590 nir_rounding_mode_undef),
1591 srcs[0], NULL, NULL, NULL);
1592 /* b2i and b2f don't have fixed bit-size versions so the builder will
1593 * just assume 32 and we have to fix it up here.
1594 */
1595 result->bit_size = nir_alu_type_get_type_size(dst_type);
1596 break;
1597 }
1598
1599 case ir_unop_bitcast_i2f:
1600 case ir_unop_bitcast_f2i:
1601 case ir_unop_bitcast_u2f:
1602 case ir_unop_bitcast_f2u:
1603 case ir_unop_bitcast_i642d:
1604 case ir_unop_bitcast_d2i64:
1605 case ir_unop_bitcast_u642d:
1606 case ir_unop_bitcast_d2u64:
1607 case ir_unop_subroutine_to_int:
1608 /* no-op */
1609 result = nir_imov(&b, srcs[0]);
1610 break;
1611 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1612 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1613 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1614 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1615 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1616 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1617 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1618 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1619 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1620 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1621 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1622 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1623 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1624 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1625 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1626 case ir_unop_pack_snorm_2x16:
1627 result = nir_pack_snorm_2x16(&b, srcs[0]);
1628 break;
1629 case ir_unop_pack_snorm_4x8:
1630 result = nir_pack_snorm_4x8(&b, srcs[0]);
1631 break;
1632 case ir_unop_pack_unorm_2x16:
1633 result = nir_pack_unorm_2x16(&b, srcs[0]);
1634 break;
1635 case ir_unop_pack_unorm_4x8:
1636 result = nir_pack_unorm_4x8(&b, srcs[0]);
1637 break;
1638 case ir_unop_pack_half_2x16:
1639 result = nir_pack_half_2x16(&b, srcs[0]);
1640 break;
1641 case ir_unop_unpack_snorm_2x16:
1642 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1643 break;
1644 case ir_unop_unpack_snorm_4x8:
1645 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1646 break;
1647 case ir_unop_unpack_unorm_2x16:
1648 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1649 break;
1650 case ir_unop_unpack_unorm_4x8:
1651 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1652 break;
1653 case ir_unop_unpack_half_2x16:
1654 result = nir_unpack_half_2x16(&b, srcs[0]);
1655 break;
1656 case ir_unop_pack_sampler_2x32:
1657 case ir_unop_pack_image_2x32:
1658 case ir_unop_pack_double_2x32:
1659 case ir_unop_pack_int_2x32:
1660 case ir_unop_pack_uint_2x32:
1661 result = nir_pack_64_2x32(&b, srcs[0]);
1662 break;
1663 case ir_unop_unpack_sampler_2x32:
1664 case ir_unop_unpack_image_2x32:
1665 case ir_unop_unpack_double_2x32:
1666 case ir_unop_unpack_int_2x32:
1667 case ir_unop_unpack_uint_2x32:
1668 result = nir_unpack_64_2x32(&b, srcs[0]);
1669 break;
1670 case ir_unop_bitfield_reverse:
1671 result = nir_bitfield_reverse(&b, srcs[0]);
1672 break;
1673 case ir_unop_bit_count:
1674 result = nir_bit_count(&b, srcs[0]);
1675 break;
1676 case ir_unop_find_msb:
1677 switch (types[0]) {
1678 case GLSL_TYPE_UINT:
1679 result = nir_ufind_msb(&b, srcs[0]);
1680 break;
1681 case GLSL_TYPE_INT:
1682 result = nir_ifind_msb(&b, srcs[0]);
1683 break;
1684 default:
1685 unreachable("Invalid type for findMSB()");
1686 }
1687 break;
1688 case ir_unop_find_lsb:
1689 result = nir_find_lsb(&b, srcs[0]);
1690 break;
1691
1692 case ir_unop_noise:
1693 switch (ir->type->vector_elements) {
1694 case 1:
1695 switch (ir->operands[0]->type->vector_elements) {
1696 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1697 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1698 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1699 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1700 default: unreachable("not reached");
1701 }
1702 break;
1703 case 2:
1704 switch (ir->operands[0]->type->vector_elements) {
1705 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1706 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1707 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1708 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1709 default: unreachable("not reached");
1710 }
1711 break;
1712 case 3:
1713 switch (ir->operands[0]->type->vector_elements) {
1714 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1715 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1716 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1717 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1718 default: unreachable("not reached");
1719 }
1720 break;
1721 case 4:
1722 switch (ir->operands[0]->type->vector_elements) {
1723 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1724 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1725 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1726 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1727 default: unreachable("not reached");
1728 }
1729 break;
1730 default:
1731 unreachable("not reached");
1732 }
1733 break;
1734 case ir_unop_get_buffer_size: {
1735 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1736 this->shader,
1737 nir_intrinsic_get_buffer_size);
1738 load->num_components = ir->type->vector_elements;
1739 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1740 unsigned bit_size = glsl_get_bit_size(ir->type);
1741 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1742 return;
1743 }
1744
1745 case ir_binop_add:
1746 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1747 : nir_iadd(&b, srcs[0], srcs[1]);
1748 break;
1749 case ir_binop_sub:
1750 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1751 : nir_isub(&b, srcs[0], srcs[1]);
1752 break;
1753 case ir_binop_mul:
1754 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1755 : nir_imul(&b, srcs[0], srcs[1]);
1756 break;
1757 case ir_binop_div:
1758 if (type_is_float(out_type))
1759 result = nir_fdiv(&b, srcs[0], srcs[1]);
1760 else if (type_is_signed(out_type))
1761 result = nir_idiv(&b, srcs[0], srcs[1]);
1762 else
1763 result = nir_udiv(&b, srcs[0], srcs[1]);
1764 break;
1765 case ir_binop_mod:
1766 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1767 : nir_umod(&b, srcs[0], srcs[1]);
1768 break;
1769 case ir_binop_min:
1770 if (type_is_float(out_type))
1771 result = nir_fmin(&b, srcs[0], srcs[1]);
1772 else if (type_is_signed(out_type))
1773 result = nir_imin(&b, srcs[0], srcs[1]);
1774 else
1775 result = nir_umin(&b, srcs[0], srcs[1]);
1776 break;
1777 case ir_binop_max:
1778 if (type_is_float(out_type))
1779 result = nir_fmax(&b, srcs[0], srcs[1]);
1780 else if (type_is_signed(out_type))
1781 result = nir_imax(&b, srcs[0], srcs[1]);
1782 else
1783 result = nir_umax(&b, srcs[0], srcs[1]);
1784 break;
1785 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1786 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1787 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1788 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1789 case ir_binop_logic_and:
1790 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1791 : nir_fand(&b, srcs[0], srcs[1]);
1792 break;
1793 case ir_binop_logic_or:
1794 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1795 : nir_for(&b, srcs[0], srcs[1]);
1796 break;
1797 case ir_binop_logic_xor:
1798 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1799 : nir_fxor(&b, srcs[0], srcs[1]);
1800 break;
1801 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1802 case ir_binop_rshift:
1803 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1804 : nir_ushr(&b, srcs[0], srcs[1]);
1805 break;
1806 case ir_binop_imul_high:
1807 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1808 : nir_umul_high(&b, srcs[0], srcs[1]);
1809 break;
1810 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1811 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1812 case ir_binop_less:
1813 if (supports_ints) {
1814 if (type_is_float(types[0]))
1815 result = nir_flt(&b, srcs[0], srcs[1]);
1816 else if (type_is_signed(types[0]))
1817 result = nir_ilt(&b, srcs[0], srcs[1]);
1818 else
1819 result = nir_ult(&b, srcs[0], srcs[1]);
1820 } else {
1821 result = nir_slt(&b, srcs[0], srcs[1]);
1822 }
1823 break;
1824 case ir_binop_gequal:
1825 if (supports_ints) {
1826 if (type_is_float(types[0]))
1827 result = nir_fge(&b, srcs[0], srcs[1]);
1828 else if (type_is_signed(types[0]))
1829 result = nir_ige(&b, srcs[0], srcs[1]);
1830 else
1831 result = nir_uge(&b, srcs[0], srcs[1]);
1832 } else {
1833 result = nir_slt(&b, srcs[0], srcs[1]);
1834 }
1835 break;
1836 case ir_binop_equal:
1837 if (supports_ints) {
1838 if (type_is_float(types[0]))
1839 result = nir_feq(&b, srcs[0], srcs[1]);
1840 else
1841 result = nir_ieq(&b, srcs[0], srcs[1]);
1842 } else {
1843 result = nir_seq(&b, srcs[0], srcs[1]);
1844 }
1845 break;
1846 case ir_binop_nequal:
1847 if (supports_ints) {
1848 if (type_is_float(types[0]))
1849 result = nir_fne(&b, srcs[0], srcs[1]);
1850 else
1851 result = nir_ine(&b, srcs[0], srcs[1]);
1852 } else {
1853 result = nir_sne(&b, srcs[0], srcs[1]);
1854 }
1855 break;
1856 case ir_binop_all_equal:
1857 if (supports_ints) {
1858 if (type_is_float(types[0])) {
1859 switch (ir->operands[0]->type->vector_elements) {
1860 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1861 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1862 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1863 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1864 default:
1865 unreachable("not reached");
1866 }
1867 } else {
1868 switch (ir->operands[0]->type->vector_elements) {
1869 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1870 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1871 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1872 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1873 default:
1874 unreachable("not reached");
1875 }
1876 }
1877 } else {
1878 switch (ir->operands[0]->type->vector_elements) {
1879 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1880 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1881 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1882 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1883 default:
1884 unreachable("not reached");
1885 }
1886 }
1887 break;
1888 case ir_binop_any_nequal:
1889 if (supports_ints) {
1890 if (type_is_float(types[0])) {
1891 switch (ir->operands[0]->type->vector_elements) {
1892 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1893 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1894 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1895 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1896 default:
1897 unreachable("not reached");
1898 }
1899 } else {
1900 switch (ir->operands[0]->type->vector_elements) {
1901 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1902 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1903 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1904 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1905 default:
1906 unreachable("not reached");
1907 }
1908 }
1909 } else {
1910 switch (ir->operands[0]->type->vector_elements) {
1911 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1912 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1913 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1914 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1915 default:
1916 unreachable("not reached");
1917 }
1918 }
1919 break;
1920 case ir_binop_dot:
1921 switch (ir->operands[0]->type->vector_elements) {
1922 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1923 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1924 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1925 default:
1926 unreachable("not reached");
1927 }
1928 break;
1929
1930 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1931 case ir_triop_fma:
1932 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1933 break;
1934 case ir_triop_lrp:
1935 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1936 break;
1937 case ir_triop_csel:
1938 if (supports_ints)
1939 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1940 else
1941 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1942 break;
1943 case ir_triop_bitfield_extract:
1944 result = (out_type == GLSL_TYPE_INT) ?
1945 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1946 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1947 break;
1948 case ir_quadop_bitfield_insert:
1949 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1950 break;
1951 case ir_quadop_vector:
1952 result = nir_vec(&b, srcs, ir->type->vector_elements);
1953 break;
1954
1955 default:
1956 unreachable("not reached");
1957 }
1958 }
1959
1960 void
1961 nir_visitor::visit(ir_swizzle *ir)
1962 {
1963 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1964 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1965 ir->type->vector_elements, !supports_ints);
1966 }
1967
1968 void
1969 nir_visitor::visit(ir_texture *ir)
1970 {
1971 unsigned num_srcs;
1972 nir_texop op;
1973 switch (ir->op) {
1974 case ir_tex:
1975 op = nir_texop_tex;
1976 num_srcs = 1; /* coordinate */
1977 break;
1978
1979 case ir_txb:
1980 case ir_txl:
1981 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1982 num_srcs = 2; /* coordinate, bias/lod */
1983 break;
1984
1985 case ir_txd:
1986 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1987 num_srcs = 3;
1988 break;
1989
1990 case ir_txf:
1991 op = nir_texop_txf;
1992 if (ir->lod_info.lod != NULL)
1993 num_srcs = 2; /* coordinate, lod */
1994 else
1995 num_srcs = 1; /* coordinate */
1996 break;
1997
1998 case ir_txf_ms:
1999 op = nir_texop_txf_ms;
2000 num_srcs = 2; /* coordinate, sample_index */
2001 break;
2002
2003 case ir_txs:
2004 op = nir_texop_txs;
2005 if (ir->lod_info.lod != NULL)
2006 num_srcs = 1; /* lod */
2007 else
2008 num_srcs = 0;
2009 break;
2010
2011 case ir_lod:
2012 op = nir_texop_lod;
2013 num_srcs = 1; /* coordinate */
2014 break;
2015
2016 case ir_tg4:
2017 op = nir_texop_tg4;
2018 num_srcs = 1; /* coordinate */
2019 break;
2020
2021 case ir_query_levels:
2022 op = nir_texop_query_levels;
2023 num_srcs = 0;
2024 break;
2025
2026 case ir_texture_samples:
2027 op = nir_texop_texture_samples;
2028 num_srcs = 0;
2029 break;
2030
2031 case ir_samples_identical:
2032 op = nir_texop_samples_identical;
2033 num_srcs = 1; /* coordinate */
2034 break;
2035
2036 default:
2037 unreachable("not reached");
2038 }
2039
2040 if (ir->projector != NULL)
2041 num_srcs++;
2042 if (ir->shadow_comparator != NULL)
2043 num_srcs++;
2044 if (ir->offset != NULL)
2045 num_srcs++;
2046
2047 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2048
2049 instr->op = op;
2050 instr->sampler_dim =
2051 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2052 instr->is_array = ir->sampler->type->sampler_array;
2053 instr->is_shadow = ir->sampler->type->sampler_shadow;
2054 if (instr->is_shadow)
2055 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2056 switch (ir->type->base_type) {
2057 case GLSL_TYPE_FLOAT:
2058 instr->dest_type = nir_type_float;
2059 break;
2060 case GLSL_TYPE_INT:
2061 instr->dest_type = nir_type_int;
2062 break;
2063 case GLSL_TYPE_BOOL:
2064 case GLSL_TYPE_UINT:
2065 instr->dest_type = nir_type_uint;
2066 break;
2067 default:
2068 unreachable("not reached");
2069 }
2070
2071 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2072
2073 unsigned src_number = 0;
2074
2075 if (ir->coordinate != NULL) {
2076 instr->coord_components = ir->coordinate->type->vector_elements;
2077 instr->src[src_number].src =
2078 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2079 instr->src[src_number].src_type = nir_tex_src_coord;
2080 src_number++;
2081 }
2082
2083 if (ir->projector != NULL) {
2084 instr->src[src_number].src =
2085 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2086 instr->src[src_number].src_type = nir_tex_src_projector;
2087 src_number++;
2088 }
2089
2090 if (ir->shadow_comparator != NULL) {
2091 instr->src[src_number].src =
2092 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2093 instr->src[src_number].src_type = nir_tex_src_comparator;
2094 src_number++;
2095 }
2096
2097 if (ir->offset != NULL) {
2098 /* we don't support multiple offsets yet */
2099 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2100
2101 instr->src[src_number].src =
2102 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2103 instr->src[src_number].src_type = nir_tex_src_offset;
2104 src_number++;
2105 }
2106
2107 switch (ir->op) {
2108 case ir_txb:
2109 instr->src[src_number].src =
2110 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2111 instr->src[src_number].src_type = nir_tex_src_bias;
2112 src_number++;
2113 break;
2114
2115 case ir_txl:
2116 case ir_txf:
2117 case ir_txs:
2118 if (ir->lod_info.lod != NULL) {
2119 instr->src[src_number].src =
2120 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2121 instr->src[src_number].src_type = nir_tex_src_lod;
2122 src_number++;
2123 }
2124 break;
2125
2126 case ir_txd:
2127 instr->src[src_number].src =
2128 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2129 instr->src[src_number].src_type = nir_tex_src_ddx;
2130 src_number++;
2131 instr->src[src_number].src =
2132 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2133 instr->src[src_number].src_type = nir_tex_src_ddy;
2134 src_number++;
2135 break;
2136
2137 case ir_txf_ms:
2138 instr->src[src_number].src =
2139 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2140 instr->src[src_number].src_type = nir_tex_src_ms_index;
2141 src_number++;
2142 break;
2143
2144 case ir_tg4:
2145 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2146 break;
2147
2148 default:
2149 break;
2150 }
2151
2152 assert(src_number == num_srcs);
2153
2154 unsigned bit_size = glsl_get_bit_size(ir->type);
2155 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2156 }
2157
2158 void
2159 nir_visitor::visit(ir_constant *ir)
2160 {
2161 /*
2162 * We don't know if this variable is an array or struct that gets
2163 * dereferenced, so do the safe thing an make it a variable with a
2164 * constant initializer and return a dereference.
2165 */
2166
2167 nir_variable *var =
2168 nir_local_variable_create(this->impl, ir->type, "const_temp");
2169 var->data.read_only = true;
2170 var->constant_initializer = constant_copy(ir, var);
2171
2172 this->deref_head = nir_deref_var_create(this->shader, var);
2173 this->deref_tail = &this->deref_head->deref;
2174 }
2175
2176 void
2177 nir_visitor::visit(ir_dereference_variable *ir)
2178 {
2179 struct hash_entry *entry =
2180 _mesa_hash_table_search(this->var_table, ir->var);
2181 assert(entry);
2182 nir_variable *var = (nir_variable *) entry->data;
2183
2184 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2185 this->deref_head = deref;
2186 this->deref_tail = &deref->deref;
2187 }
2188
2189 void
2190 nir_visitor::visit(ir_dereference_record *ir)
2191 {
2192 ir->record->accept(this);
2193
2194 int field_index = ir->field_idx;
2195 assert(field_index >= 0);
2196
2197 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2198 deref->deref.type = ir->type;
2199 this->deref_tail->child = &deref->deref;
2200 this->deref_tail = &deref->deref;
2201 }
2202
2203 void
2204 nir_visitor::visit(ir_dereference_array *ir)
2205 {
2206 nir_deref_array *deref = nir_deref_array_create(this->shader);
2207 deref->deref.type = ir->type;
2208
2209 ir_constant *const_index = ir->array_index->as_constant();
2210 if (const_index != NULL) {
2211 deref->deref_array_type = nir_deref_array_type_direct;
2212 deref->base_offset = const_index->value.u[0];
2213 } else {
2214 deref->deref_array_type = nir_deref_array_type_indirect;
2215 deref->indirect =
2216 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2217 }
2218
2219 ir->array->accept(this);
2220
2221 this->deref_tail->child = &deref->deref;
2222 ralloc_steal(this->deref_tail, deref);
2223 this->deref_tail = &deref->deref;
2224 }
2225
2226 void
2227 nir_visitor::visit(ir_barrier *)
2228 {
2229 nir_intrinsic_instr *instr =
2230 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2231 nir_builder_instr_insert(&b, &instr->instr);
2232 }