glsl: Add opcodes for atan and atan2
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/shaderobj.h"
43 #include "util/u_math.h"
44
45 /*
46 * pass to lower GLSL IR to NIR
47 *
48 * This will lower variable dereferences to loads/stores of corresponding
49 * variables in NIR - the variables will be converted to registers in a later
50 * pass.
51 */
52
53 namespace {
54
55 class nir_visitor : public ir_visitor
56 {
57 public:
58 nir_visitor(gl_context *ctx, nir_shader *shader);
59 ~nir_visitor();
60
61 virtual void visit(ir_variable *);
62 virtual void visit(ir_function *);
63 virtual void visit(ir_function_signature *);
64 virtual void visit(ir_loop *);
65 virtual void visit(ir_if *);
66 virtual void visit(ir_discard *);
67 virtual void visit(ir_demote *);
68 virtual void visit(ir_loop_jump *);
69 virtual void visit(ir_return *);
70 virtual void visit(ir_call *);
71 virtual void visit(ir_assignment *);
72 virtual void visit(ir_emit_vertex *);
73 virtual void visit(ir_end_primitive *);
74 virtual void visit(ir_expression *);
75 virtual void visit(ir_swizzle *);
76 virtual void visit(ir_texture *);
77 virtual void visit(ir_constant *);
78 virtual void visit(ir_dereference_variable *);
79 virtual void visit(ir_dereference_record *);
80 virtual void visit(ir_dereference_array *);
81 virtual void visit(ir_barrier *);
82
83 void create_function(ir_function_signature *ir);
84
85 private:
86 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
87 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
88
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
91 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
92 nir_ssa_def *src2);
93 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
94 nir_ssa_def *src2, nir_ssa_def *src3);
95
96 bool supports_std430;
97
98 nir_shader *shader;
99 nir_function_impl *impl;
100 nir_builder b;
101 nir_ssa_def *result; /* result of the expression tree last visited */
102
103 nir_deref_instr *evaluate_deref(ir_instruction *ir);
104
105 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
106
107 /* most recent deref instruction created */
108 nir_deref_instr *deref;
109
110 /* whether the IR we're operating on is per-function or global */
111 bool is_global;
112
113 ir_function_signature *sig;
114
115 /* map of ir_variable -> nir_variable */
116 struct hash_table *var_table;
117
118 /* map of ir_function_signature -> nir_function_overload */
119 struct hash_table *overload_table;
120 };
121
122 /*
123 * This visitor runs before the main visitor, calling create_function() for
124 * each function so that the main visitor can resolve forward references in
125 * calls.
126 */
127
128 class nir_function_visitor : public ir_hierarchical_visitor
129 {
130 public:
131 nir_function_visitor(nir_visitor *v) : visitor(v)
132 {
133 }
134 virtual ir_visitor_status visit_enter(ir_function *);
135
136 private:
137 nir_visitor *visitor;
138 };
139
140 /* glsl_to_nir can only handle converting certain function paramaters
141 * to NIR. This visitor checks for parameters it can't currently handle.
142 */
143 class ir_function_param_visitor : public ir_hierarchical_visitor
144 {
145 public:
146 ir_function_param_visitor()
147 : unsupported(false)
148 {
149 }
150
151 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
152 {
153
154 if (ir->is_intrinsic())
155 return visit_continue;
156
157 foreach_in_list(ir_variable, param, &ir->parameters) {
158 if (!param->type->is_vector() || !param->type->is_scalar()) {
159 unsupported = true;
160 return visit_stop;
161 }
162
163 if (param->data.mode == ir_var_function_inout) {
164 unsupported = true;
165 return visit_stop;
166 }
167 }
168
169 return visit_continue;
170 }
171
172 bool unsupported;
173 };
174
175 } /* end of anonymous namespace */
176
177
178 static bool
179 has_unsupported_function_param(exec_list *ir)
180 {
181 ir_function_param_visitor visitor;
182 visit_list_elements(&visitor, ir);
183 return visitor.unsupported;
184 }
185
186 nir_shader *
187 glsl_to_nir(struct gl_context *ctx,
188 const struct gl_shader_program *shader_prog,
189 gl_shader_stage stage,
190 const nir_shader_compiler_options *options)
191 {
192 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
193
194 const struct gl_shader_compiler_options *gl_options =
195 &ctx->Const.ShaderCompilerOptions[stage];
196
197 /* glsl_to_nir can only handle converting certain function paramaters
198 * to NIR. If we find something we can't handle then we get the GLSL IR
199 * opts to remove it before we continue on.
200 *
201 * TODO: add missing glsl ir to nir support and remove this loop.
202 */
203 while (has_unsupported_function_param(sh->ir)) {
204 do_common_optimization(sh->ir, true, true, gl_options,
205 ctx->Const.NativeIntegers);
206 }
207
208 nir_shader *shader = nir_shader_create(NULL, stage, options,
209 &sh->Program->info);
210
211 nir_visitor v1(ctx, shader);
212 nir_function_visitor v2(&v1);
213 v2.run(sh->ir);
214 visit_exec_list(sh->ir, &v1);
215
216 nir_validate_shader(shader, "after glsl to nir, before function inline");
217
218 /* We have to lower away local constant initializers right before we
219 * inline functions. That way they get properly initialized at the top
220 * of the function and not at the top of its caller.
221 */
222 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
223 nir_lower_returns(shader);
224 nir_inline_functions(shader);
225 nir_opt_deref(shader);
226
227 nir_validate_shader(shader, "after function inlining and return lowering");
228
229 /* Now that we have inlined everything remove all of the functions except
230 * main().
231 */
232 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
233 if (strcmp("main", function->name) != 0) {
234 exec_node_remove(&function->node);
235 }
236 }
237
238 /* Remap the locations to slots so those requiring two slots will occupy
239 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
240 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
241 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
242 if (shader->info.stage == MESA_SHADER_VERTEX)
243 nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
244
245 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
246 if (shader_prog->Label)
247 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
248
249 /* Check for transform feedback varyings specified via the API */
250 shader->info.has_transform_feedback_varyings =
251 shader_prog->TransformFeedback.NumVarying > 0;
252
253 /* Check for transform feedback varyings specified in the Shader */
254 if (shader_prog->last_vert_prog)
255 shader->info.has_transform_feedback_varyings |=
256 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
257
258 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
259 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
260 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
261 }
262
263 return shader;
264 }
265
266 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
267 {
268 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
269 this->shader = shader;
270 this->is_global = true;
271 this->var_table = _mesa_pointer_hash_table_create(NULL);
272 this->overload_table = _mesa_pointer_hash_table_create(NULL);
273 this->result = NULL;
274 this->impl = NULL;
275 this->deref = NULL;
276 this->sig = NULL;
277 memset(&this->b, 0, sizeof(this->b));
278 }
279
280 nir_visitor::~nir_visitor()
281 {
282 _mesa_hash_table_destroy(this->var_table, NULL);
283 _mesa_hash_table_destroy(this->overload_table, NULL);
284 }
285
286 nir_deref_instr *
287 nir_visitor::evaluate_deref(ir_instruction *ir)
288 {
289 ir->accept(this);
290 return this->deref;
291 }
292
293 nir_constant *
294 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
295 {
296 if (ir == NULL)
297 return NULL;
298
299 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
300
301 const unsigned rows = ir->type->vector_elements;
302 const unsigned cols = ir->type->matrix_columns;
303 unsigned i;
304
305 ret->num_elements = 0;
306 switch (ir->type->base_type) {
307 case GLSL_TYPE_UINT:
308 /* Only float base types can be matrices. */
309 assert(cols == 1);
310
311 for (unsigned r = 0; r < rows; r++)
312 ret->values[r].u32 = ir->value.u[r];
313
314 break;
315
316 case GLSL_TYPE_INT:
317 /* Only float base types can be matrices. */
318 assert(cols == 1);
319
320 for (unsigned r = 0; r < rows; r++)
321 ret->values[r].i32 = ir->value.i[r];
322
323 break;
324
325 case GLSL_TYPE_FLOAT:
326 case GLSL_TYPE_DOUBLE:
327 if (cols > 1) {
328 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
329 ret->num_elements = cols;
330 for (unsigned c = 0; c < cols; c++) {
331 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
332 col_const->num_elements = 0;
333 switch (ir->type->base_type) {
334 case GLSL_TYPE_FLOAT:
335 for (unsigned r = 0; r < rows; r++)
336 col_const->values[r].f32 = ir->value.f[c * rows + r];
337 break;
338
339 case GLSL_TYPE_DOUBLE:
340 for (unsigned r = 0; r < rows; r++)
341 col_const->values[r].f64 = ir->value.d[c * rows + r];
342 break;
343
344 default:
345 unreachable("Cannot get here from the first level switch");
346 }
347 ret->elements[c] = col_const;
348 }
349 } else {
350 switch (ir->type->base_type) {
351 case GLSL_TYPE_FLOAT:
352 for (unsigned r = 0; r < rows; r++)
353 ret->values[r].f32 = ir->value.f[r];
354 break;
355
356 case GLSL_TYPE_DOUBLE:
357 for (unsigned r = 0; r < rows; r++)
358 ret->values[r].f64 = ir->value.d[r];
359 break;
360
361 default:
362 unreachable("Cannot get here from the first level switch");
363 }
364 }
365 break;
366
367 case GLSL_TYPE_UINT64:
368 /* Only float base types can be matrices. */
369 assert(cols == 1);
370
371 for (unsigned r = 0; r < rows; r++)
372 ret->values[r].u64 = ir->value.u64[r];
373 break;
374
375 case GLSL_TYPE_INT64:
376 /* Only float base types can be matrices. */
377 assert(cols == 1);
378
379 for (unsigned r = 0; r < rows; r++)
380 ret->values[r].i64 = ir->value.i64[r];
381 break;
382
383 case GLSL_TYPE_BOOL:
384 /* Only float base types can be matrices. */
385 assert(cols == 1);
386
387 for (unsigned r = 0; r < rows; r++)
388 ret->values[r].b = ir->value.b[r];
389
390 break;
391
392 case GLSL_TYPE_STRUCT:
393 case GLSL_TYPE_ARRAY:
394 ret->elements = ralloc_array(mem_ctx, nir_constant *,
395 ir->type->length);
396 ret->num_elements = ir->type->length;
397
398 for (i = 0; i < ir->type->length; i++)
399 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
400 break;
401
402 default:
403 unreachable("not reached");
404 }
405
406 return ret;
407 }
408
409 static const glsl_type *
410 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
411 {
412 if (!array_type->is_array())
413 return elem_type;
414
415 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
416
417 return glsl_type::get_array_instance(elem_type, array_type->length);
418 }
419
420 void
421 nir_visitor::visit(ir_variable *ir)
422 {
423 /* TODO: In future we should switch to using the NIR lowering pass but for
424 * now just ignore these variables as GLSL IR should have lowered them.
425 * Anything remaining are just dead vars that weren't cleaned up.
426 */
427 if (ir->data.mode == ir_var_shader_shared)
428 return;
429
430 /* FINISHME: inout parameters */
431 assert(ir->data.mode != ir_var_function_inout);
432
433 if (ir->data.mode == ir_var_function_out)
434 return;
435
436 nir_variable *var = rzalloc(shader, nir_variable);
437 var->type = ir->type;
438 var->name = ralloc_strdup(var, ir->name);
439
440 var->data.always_active_io = ir->data.always_active_io;
441 var->data.read_only = ir->data.read_only;
442 var->data.centroid = ir->data.centroid;
443 var->data.sample = ir->data.sample;
444 var->data.patch = ir->data.patch;
445 var->data.invariant = ir->data.invariant;
446 var->data.location = ir->data.location;
447 var->data.stream = ir->data.stream;
448 var->data.compact = false;
449
450 switch(ir->data.mode) {
451 case ir_var_auto:
452 case ir_var_temporary:
453 if (is_global)
454 var->data.mode = nir_var_shader_temp;
455 else
456 var->data.mode = nir_var_function_temp;
457 break;
458
459 case ir_var_function_in:
460 case ir_var_const_in:
461 var->data.mode = nir_var_function_temp;
462 break;
463
464 case ir_var_shader_in:
465 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
466 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
467 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
468 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
469 var->data.mode = nir_var_system_value;
470 } else {
471 var->data.mode = nir_var_shader_in;
472
473 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
474 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
475 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
476 var->data.compact = ir->type->without_array()->is_scalar();
477 }
478
479 if (shader->info.stage > MESA_SHADER_VERTEX &&
480 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
481 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
482 var->data.compact = ir->type->without_array()->is_scalar();
483 }
484 }
485 break;
486
487 case ir_var_shader_out:
488 var->data.mode = nir_var_shader_out;
489 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
490 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
491 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
492 var->data.compact = ir->type->without_array()->is_scalar();
493 }
494
495 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
496 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
497 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
498 var->data.compact = ir->type->without_array()->is_scalar();
499 }
500 break;
501
502 case ir_var_uniform:
503 if (ir->get_interface_type())
504 var->data.mode = nir_var_mem_ubo;
505 else
506 var->data.mode = nir_var_uniform;
507 break;
508
509 case ir_var_shader_storage:
510 var->data.mode = nir_var_mem_ssbo;
511 break;
512
513 case ir_var_system_value:
514 var->data.mode = nir_var_system_value;
515 break;
516
517 default:
518 unreachable("not reached");
519 }
520
521 unsigned image_access = 0;
522 if (ir->data.memory_read_only)
523 image_access |= ACCESS_NON_WRITEABLE;
524 if (ir->data.memory_write_only)
525 image_access |= ACCESS_NON_READABLE;
526 if (ir->data.memory_coherent)
527 image_access |= ACCESS_COHERENT;
528 if (ir->data.memory_volatile)
529 image_access |= ACCESS_VOLATILE;
530 if (ir->data.memory_restrict)
531 image_access |= ACCESS_RESTRICT;
532
533 /* For UBO and SSBO variables, we need explicit types */
534 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
535 const glsl_type *explicit_ifc_type =
536 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
537
538 if (ir->type->without_array()->is_interface()) {
539 /* If the type contains the interface, wrap the explicit type in the
540 * right number of arrays.
541 */
542 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
543 } else {
544 /* Otherwise, this variable is one entry in the interface */
545 UNUSED bool found = false;
546 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
547 const glsl_struct_field *field =
548 &explicit_ifc_type->fields.structure[i];
549 if (strcmp(ir->name, field->name) != 0)
550 continue;
551
552 var->type = field->type;
553 if (field->memory_read_only)
554 image_access |= ACCESS_NON_WRITEABLE;
555 if (field->memory_write_only)
556 image_access |= ACCESS_NON_READABLE;
557 if (field->memory_coherent)
558 image_access |= ACCESS_COHERENT;
559 if (field->memory_volatile)
560 image_access |= ACCESS_VOLATILE;
561 if (field->memory_restrict)
562 image_access |= ACCESS_RESTRICT;
563
564 found = true;
565 break;
566 }
567 assert(found);
568 }
569 }
570
571 var->data.interpolation = ir->data.interpolation;
572 var->data.location_frac = ir->data.location_frac;
573
574 switch (ir->data.depth_layout) {
575 case ir_depth_layout_none:
576 var->data.depth_layout = nir_depth_layout_none;
577 break;
578 case ir_depth_layout_any:
579 var->data.depth_layout = nir_depth_layout_any;
580 break;
581 case ir_depth_layout_greater:
582 var->data.depth_layout = nir_depth_layout_greater;
583 break;
584 case ir_depth_layout_less:
585 var->data.depth_layout = nir_depth_layout_less;
586 break;
587 case ir_depth_layout_unchanged:
588 var->data.depth_layout = nir_depth_layout_unchanged;
589 break;
590 default:
591 unreachable("not reached");
592 }
593
594 var->data.index = ir->data.index;
595 var->data.descriptor_set = 0;
596 var->data.binding = ir->data.binding;
597 var->data.explicit_binding = ir->data.explicit_binding;
598 var->data.bindless = ir->data.bindless;
599 var->data.offset = ir->data.offset;
600
601 var->data.image.access = (gl_access_qualifier)image_access;
602 var->data.image.format = ir->data.image_format;
603
604 var->data.fb_fetch_output = ir->data.fb_fetch_output;
605 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
606 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
607 var->data.xfb_buffer = ir->data.xfb_buffer;
608 var->data.xfb_stride = ir->data.xfb_stride;
609
610 var->num_state_slots = ir->get_num_state_slots();
611 if (var->num_state_slots > 0) {
612 var->state_slots = rzalloc_array(var, nir_state_slot,
613 var->num_state_slots);
614
615 ir_state_slot *state_slots = ir->get_state_slots();
616 for (unsigned i = 0; i < var->num_state_slots; i++) {
617 for (unsigned j = 0; j < 5; j++)
618 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
619 var->state_slots[i].swizzle = state_slots[i].swizzle;
620 }
621 } else {
622 var->state_slots = NULL;
623 }
624
625 var->constant_initializer = constant_copy(ir->constant_initializer, var);
626
627 var->interface_type = ir->get_interface_type();
628
629 if (var->data.mode == nir_var_function_temp)
630 nir_function_impl_add_variable(impl, var);
631 else
632 nir_shader_add_variable(shader, var);
633
634 _mesa_hash_table_insert(var_table, ir, var);
635 }
636
637 ir_visitor_status
638 nir_function_visitor::visit_enter(ir_function *ir)
639 {
640 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
641 visitor->create_function(sig);
642 }
643 return visit_continue_with_parent;
644 }
645
646 void
647 nir_visitor::create_function(ir_function_signature *ir)
648 {
649 if (ir->is_intrinsic())
650 return;
651
652 nir_function *func = nir_function_create(shader, ir->function_name());
653 if (strcmp(ir->function_name(), "main") == 0)
654 func->is_entrypoint = true;
655
656 func->num_params = ir->parameters.length() +
657 (ir->return_type != glsl_type::void_type);
658 func->params = ralloc_array(shader, nir_parameter, func->num_params);
659
660 unsigned np = 0;
661
662 if (ir->return_type != glsl_type::void_type) {
663 /* The return value is a variable deref (basically an out parameter) */
664 func->params[np].num_components = 1;
665 func->params[np].bit_size = 32;
666 np++;
667 }
668
669 foreach_in_list(ir_variable, param, &ir->parameters) {
670 /* FINISHME: pass arrays, structs, etc by reference? */
671 assert(param->type->is_vector() || param->type->is_scalar());
672
673 if (param->data.mode == ir_var_function_in) {
674 func->params[np].num_components = param->type->vector_elements;
675 func->params[np].bit_size = glsl_get_bit_size(param->type);
676 } else {
677 func->params[np].num_components = 1;
678 func->params[np].bit_size = 32;
679 }
680 np++;
681 }
682 assert(np == func->num_params);
683
684 _mesa_hash_table_insert(this->overload_table, ir, func);
685 }
686
687 void
688 nir_visitor::visit(ir_function *ir)
689 {
690 foreach_in_list(ir_function_signature, sig, &ir->signatures)
691 sig->accept(this);
692 }
693
694 void
695 nir_visitor::visit(ir_function_signature *ir)
696 {
697 if (ir->is_intrinsic())
698 return;
699
700 this->sig = ir;
701
702 struct hash_entry *entry =
703 _mesa_hash_table_search(this->overload_table, ir);
704
705 assert(entry);
706 nir_function *func = (nir_function *) entry->data;
707
708 if (ir->is_defined) {
709 nir_function_impl *impl = nir_function_impl_create(func);
710 this->impl = impl;
711
712 this->is_global = false;
713
714 nir_builder_init(&b, impl);
715 b.cursor = nir_after_cf_list(&impl->body);
716
717 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
718
719 foreach_in_list(ir_variable, param, &ir->parameters) {
720 nir_variable *var =
721 nir_local_variable_create(impl, param->type, param->name);
722
723 if (param->data.mode == ir_var_function_in) {
724 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
725 }
726
727 _mesa_hash_table_insert(var_table, param, var);
728 i++;
729 }
730
731 visit_exec_list(&ir->body, this);
732
733 this->is_global = true;
734 } else {
735 func->impl = NULL;
736 }
737 }
738
739 void
740 nir_visitor::visit(ir_loop *ir)
741 {
742 nir_push_loop(&b);
743 visit_exec_list(&ir->body_instructions, this);
744 nir_pop_loop(&b, NULL);
745 }
746
747 void
748 nir_visitor::visit(ir_if *ir)
749 {
750 nir_push_if(&b, evaluate_rvalue(ir->condition));
751 visit_exec_list(&ir->then_instructions, this);
752 nir_push_else(&b, NULL);
753 visit_exec_list(&ir->else_instructions, this);
754 nir_pop_if(&b, NULL);
755 }
756
757 void
758 nir_visitor::visit(ir_discard *ir)
759 {
760 /*
761 * discards aren't treated as control flow, because before we lower them
762 * they can appear anywhere in the shader and the stuff after them may still
763 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
764 * discards will be immediately followed by a return.
765 */
766
767 nir_intrinsic_instr *discard;
768 if (ir->condition) {
769 discard = nir_intrinsic_instr_create(this->shader,
770 nir_intrinsic_discard_if);
771 discard->src[0] =
772 nir_src_for_ssa(evaluate_rvalue(ir->condition));
773 } else {
774 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
775 }
776
777 nir_builder_instr_insert(&b, &discard->instr);
778 }
779
780 void
781 nir_visitor::visit(ir_demote *ir)
782 {
783 nir_intrinsic_instr *demote =
784 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
785
786 nir_builder_instr_insert(&b, &demote->instr);
787 }
788
789 void
790 nir_visitor::visit(ir_emit_vertex *ir)
791 {
792 nir_intrinsic_instr *instr =
793 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
794 nir_intrinsic_set_stream_id(instr, ir->stream_id());
795 nir_builder_instr_insert(&b, &instr->instr);
796 }
797
798 void
799 nir_visitor::visit(ir_end_primitive *ir)
800 {
801 nir_intrinsic_instr *instr =
802 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
803 nir_intrinsic_set_stream_id(instr, ir->stream_id());
804 nir_builder_instr_insert(&b, &instr->instr);
805 }
806
807 void
808 nir_visitor::visit(ir_loop_jump *ir)
809 {
810 nir_jump_type type;
811 switch (ir->mode) {
812 case ir_loop_jump::jump_break:
813 type = nir_jump_break;
814 break;
815 case ir_loop_jump::jump_continue:
816 type = nir_jump_continue;
817 break;
818 default:
819 unreachable("not reached");
820 }
821
822 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
823 nir_builder_instr_insert(&b, &instr->instr);
824 }
825
826 void
827 nir_visitor::visit(ir_return *ir)
828 {
829 if (ir->value != NULL) {
830 nir_deref_instr *ret_deref =
831 nir_build_deref_cast(&b, nir_load_param(&b, 0),
832 nir_var_function_temp, ir->value->type, 0);
833
834 nir_ssa_def *val = evaluate_rvalue(ir->value);
835 nir_store_deref(&b, ret_deref, val, ~0);
836 }
837
838 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
839 nir_builder_instr_insert(&b, &instr->instr);
840 }
841
842 static void
843 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
844 {
845 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
846 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
847 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
848 }
849
850 /* Accumulate any qualifiers along the deref chain to get the actual
851 * load/store qualifier.
852 */
853
854 static enum gl_access_qualifier
855 deref_get_qualifier(nir_deref_instr *deref)
856 {
857 nir_deref_path path;
858 nir_deref_path_init(&path, deref, NULL);
859
860 unsigned qualifiers = path.path[0]->var->data.image.access;
861
862 const glsl_type *parent_type = path.path[0]->type;
863 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
864 nir_deref_instr *cur = *cur_ptr;
865
866 if (parent_type->is_interface()) {
867 const struct glsl_struct_field *field =
868 &parent_type->fields.structure[cur->strct.index];
869 if (field->memory_read_only)
870 qualifiers |= ACCESS_NON_WRITEABLE;
871 if (field->memory_write_only)
872 qualifiers |= ACCESS_NON_READABLE;
873 if (field->memory_coherent)
874 qualifiers |= ACCESS_COHERENT;
875 if (field->memory_volatile)
876 qualifiers |= ACCESS_VOLATILE;
877 if (field->memory_restrict)
878 qualifiers |= ACCESS_RESTRICT;
879 }
880
881 parent_type = cur->type;
882 }
883
884 nir_deref_path_finish(&path);
885
886 return (gl_access_qualifier) qualifiers;
887 }
888
889 void
890 nir_visitor::visit(ir_call *ir)
891 {
892 if (ir->callee->is_intrinsic()) {
893 nir_intrinsic_op op;
894
895 switch (ir->callee->intrinsic_id) {
896 case ir_intrinsic_generic_atomic_add:
897 op = ir->return_deref->type->is_integer_32_64()
898 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
899 break;
900 case ir_intrinsic_generic_atomic_and:
901 op = nir_intrinsic_deref_atomic_and;
902 break;
903 case ir_intrinsic_generic_atomic_or:
904 op = nir_intrinsic_deref_atomic_or;
905 break;
906 case ir_intrinsic_generic_atomic_xor:
907 op = nir_intrinsic_deref_atomic_xor;
908 break;
909 case ir_intrinsic_generic_atomic_min:
910 assert(ir->return_deref);
911 if (ir->return_deref->type == glsl_type::int_type)
912 op = nir_intrinsic_deref_atomic_imin;
913 else if (ir->return_deref->type == glsl_type::uint_type)
914 op = nir_intrinsic_deref_atomic_umin;
915 else if (ir->return_deref->type == glsl_type::float_type)
916 op = nir_intrinsic_deref_atomic_fmin;
917 else
918 unreachable("Invalid type");
919 break;
920 case ir_intrinsic_generic_atomic_max:
921 assert(ir->return_deref);
922 if (ir->return_deref->type == glsl_type::int_type)
923 op = nir_intrinsic_deref_atomic_imax;
924 else if (ir->return_deref->type == glsl_type::uint_type)
925 op = nir_intrinsic_deref_atomic_umax;
926 else if (ir->return_deref->type == glsl_type::float_type)
927 op = nir_intrinsic_deref_atomic_fmax;
928 else
929 unreachable("Invalid type");
930 break;
931 case ir_intrinsic_generic_atomic_exchange:
932 op = nir_intrinsic_deref_atomic_exchange;
933 break;
934 case ir_intrinsic_generic_atomic_comp_swap:
935 op = ir->return_deref->type->is_integer_32_64()
936 ? nir_intrinsic_deref_atomic_comp_swap
937 : nir_intrinsic_deref_atomic_fcomp_swap;
938 break;
939 case ir_intrinsic_atomic_counter_read:
940 op = nir_intrinsic_atomic_counter_read_deref;
941 break;
942 case ir_intrinsic_atomic_counter_increment:
943 op = nir_intrinsic_atomic_counter_inc_deref;
944 break;
945 case ir_intrinsic_atomic_counter_predecrement:
946 op = nir_intrinsic_atomic_counter_pre_dec_deref;
947 break;
948 case ir_intrinsic_atomic_counter_add:
949 op = nir_intrinsic_atomic_counter_add_deref;
950 break;
951 case ir_intrinsic_atomic_counter_and:
952 op = nir_intrinsic_atomic_counter_and_deref;
953 break;
954 case ir_intrinsic_atomic_counter_or:
955 op = nir_intrinsic_atomic_counter_or_deref;
956 break;
957 case ir_intrinsic_atomic_counter_xor:
958 op = nir_intrinsic_atomic_counter_xor_deref;
959 break;
960 case ir_intrinsic_atomic_counter_min:
961 op = nir_intrinsic_atomic_counter_min_deref;
962 break;
963 case ir_intrinsic_atomic_counter_max:
964 op = nir_intrinsic_atomic_counter_max_deref;
965 break;
966 case ir_intrinsic_atomic_counter_exchange:
967 op = nir_intrinsic_atomic_counter_exchange_deref;
968 break;
969 case ir_intrinsic_atomic_counter_comp_swap:
970 op = nir_intrinsic_atomic_counter_comp_swap_deref;
971 break;
972 case ir_intrinsic_image_load:
973 op = nir_intrinsic_image_deref_load;
974 break;
975 case ir_intrinsic_image_store:
976 op = nir_intrinsic_image_deref_store;
977 break;
978 case ir_intrinsic_image_atomic_add:
979 op = ir->return_deref->type->is_integer_32_64()
980 ? nir_intrinsic_image_deref_atomic_add
981 : nir_intrinsic_image_deref_atomic_fadd;
982 break;
983 case ir_intrinsic_image_atomic_min:
984 if (ir->return_deref->type == glsl_type::int_type)
985 op = nir_intrinsic_image_deref_atomic_imin;
986 else if (ir->return_deref->type == glsl_type::uint_type)
987 op = nir_intrinsic_image_deref_atomic_umin;
988 else
989 unreachable("Invalid type");
990 break;
991 case ir_intrinsic_image_atomic_max:
992 if (ir->return_deref->type == glsl_type::int_type)
993 op = nir_intrinsic_image_deref_atomic_imax;
994 else if (ir->return_deref->type == glsl_type::uint_type)
995 op = nir_intrinsic_image_deref_atomic_umax;
996 else
997 unreachable("Invalid type");
998 break;
999 case ir_intrinsic_image_atomic_and:
1000 op = nir_intrinsic_image_deref_atomic_and;
1001 break;
1002 case ir_intrinsic_image_atomic_or:
1003 op = nir_intrinsic_image_deref_atomic_or;
1004 break;
1005 case ir_intrinsic_image_atomic_xor:
1006 op = nir_intrinsic_image_deref_atomic_xor;
1007 break;
1008 case ir_intrinsic_image_atomic_exchange:
1009 op = nir_intrinsic_image_deref_atomic_exchange;
1010 break;
1011 case ir_intrinsic_image_atomic_comp_swap:
1012 op = nir_intrinsic_image_deref_atomic_comp_swap;
1013 break;
1014 case ir_intrinsic_image_atomic_inc_wrap:
1015 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1016 break;
1017 case ir_intrinsic_image_atomic_dec_wrap:
1018 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1019 break;
1020 case ir_intrinsic_memory_barrier:
1021 op = nir_intrinsic_memory_barrier;
1022 break;
1023 case ir_intrinsic_image_size:
1024 op = nir_intrinsic_image_deref_size;
1025 break;
1026 case ir_intrinsic_image_samples:
1027 op = nir_intrinsic_image_deref_samples;
1028 break;
1029 case ir_intrinsic_ssbo_store:
1030 op = nir_intrinsic_store_ssbo;
1031 break;
1032 case ir_intrinsic_ssbo_load:
1033 op = nir_intrinsic_load_ssbo;
1034 break;
1035 case ir_intrinsic_ssbo_atomic_add:
1036 op = ir->return_deref->type->is_integer_32_64()
1037 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
1038 break;
1039 case ir_intrinsic_ssbo_atomic_and:
1040 op = nir_intrinsic_ssbo_atomic_and;
1041 break;
1042 case ir_intrinsic_ssbo_atomic_or:
1043 op = nir_intrinsic_ssbo_atomic_or;
1044 break;
1045 case ir_intrinsic_ssbo_atomic_xor:
1046 op = nir_intrinsic_ssbo_atomic_xor;
1047 break;
1048 case ir_intrinsic_ssbo_atomic_min:
1049 assert(ir->return_deref);
1050 if (ir->return_deref->type == glsl_type::int_type)
1051 op = nir_intrinsic_ssbo_atomic_imin;
1052 else if (ir->return_deref->type == glsl_type::uint_type)
1053 op = nir_intrinsic_ssbo_atomic_umin;
1054 else if (ir->return_deref->type == glsl_type::float_type)
1055 op = nir_intrinsic_ssbo_atomic_fmin;
1056 else
1057 unreachable("Invalid type");
1058 break;
1059 case ir_intrinsic_ssbo_atomic_max:
1060 assert(ir->return_deref);
1061 if (ir->return_deref->type == glsl_type::int_type)
1062 op = nir_intrinsic_ssbo_atomic_imax;
1063 else if (ir->return_deref->type == glsl_type::uint_type)
1064 op = nir_intrinsic_ssbo_atomic_umax;
1065 else if (ir->return_deref->type == glsl_type::float_type)
1066 op = nir_intrinsic_ssbo_atomic_fmax;
1067 else
1068 unreachable("Invalid type");
1069 break;
1070 case ir_intrinsic_ssbo_atomic_exchange:
1071 op = nir_intrinsic_ssbo_atomic_exchange;
1072 break;
1073 case ir_intrinsic_ssbo_atomic_comp_swap:
1074 op = ir->return_deref->type->is_integer_32_64()
1075 ? nir_intrinsic_ssbo_atomic_comp_swap
1076 : nir_intrinsic_ssbo_atomic_fcomp_swap;
1077 break;
1078 case ir_intrinsic_shader_clock:
1079 op = nir_intrinsic_shader_clock;
1080 break;
1081 case ir_intrinsic_begin_invocation_interlock:
1082 op = nir_intrinsic_begin_invocation_interlock;
1083 break;
1084 case ir_intrinsic_end_invocation_interlock:
1085 op = nir_intrinsic_end_invocation_interlock;
1086 break;
1087 case ir_intrinsic_group_memory_barrier:
1088 op = nir_intrinsic_group_memory_barrier;
1089 break;
1090 case ir_intrinsic_memory_barrier_atomic_counter:
1091 op = nir_intrinsic_memory_barrier_atomic_counter;
1092 break;
1093 case ir_intrinsic_memory_barrier_buffer:
1094 op = nir_intrinsic_memory_barrier_buffer;
1095 break;
1096 case ir_intrinsic_memory_barrier_image:
1097 op = nir_intrinsic_memory_barrier_image;
1098 break;
1099 case ir_intrinsic_memory_barrier_shared:
1100 op = nir_intrinsic_memory_barrier_shared;
1101 break;
1102 case ir_intrinsic_shared_load:
1103 op = nir_intrinsic_load_shared;
1104 break;
1105 case ir_intrinsic_shared_store:
1106 op = nir_intrinsic_store_shared;
1107 break;
1108 case ir_intrinsic_shared_atomic_add:
1109 op = ir->return_deref->type->is_integer_32_64()
1110 ? nir_intrinsic_shared_atomic_add
1111 : nir_intrinsic_shared_atomic_fadd;
1112 break;
1113 case ir_intrinsic_shared_atomic_and:
1114 op = nir_intrinsic_shared_atomic_and;
1115 break;
1116 case ir_intrinsic_shared_atomic_or:
1117 op = nir_intrinsic_shared_atomic_or;
1118 break;
1119 case ir_intrinsic_shared_atomic_xor:
1120 op = nir_intrinsic_shared_atomic_xor;
1121 break;
1122 case ir_intrinsic_shared_atomic_min:
1123 assert(ir->return_deref);
1124 if (ir->return_deref->type == glsl_type::int_type)
1125 op = nir_intrinsic_shared_atomic_imin;
1126 else if (ir->return_deref->type == glsl_type::uint_type)
1127 op = nir_intrinsic_shared_atomic_umin;
1128 else if (ir->return_deref->type == glsl_type::float_type)
1129 op = nir_intrinsic_shared_atomic_fmin;
1130 else
1131 unreachable("Invalid type");
1132 break;
1133 case ir_intrinsic_shared_atomic_max:
1134 assert(ir->return_deref);
1135 if (ir->return_deref->type == glsl_type::int_type)
1136 op = nir_intrinsic_shared_atomic_imax;
1137 else if (ir->return_deref->type == glsl_type::uint_type)
1138 op = nir_intrinsic_shared_atomic_umax;
1139 else if (ir->return_deref->type == glsl_type::float_type)
1140 op = nir_intrinsic_shared_atomic_fmax;
1141 else
1142 unreachable("Invalid type");
1143 break;
1144 case ir_intrinsic_shared_atomic_exchange:
1145 op = nir_intrinsic_shared_atomic_exchange;
1146 break;
1147 case ir_intrinsic_shared_atomic_comp_swap:
1148 op = ir->return_deref->type->is_integer_32_64()
1149 ? nir_intrinsic_shared_atomic_comp_swap
1150 : nir_intrinsic_shared_atomic_fcomp_swap;
1151 break;
1152 case ir_intrinsic_vote_any:
1153 op = nir_intrinsic_vote_any;
1154 break;
1155 case ir_intrinsic_vote_all:
1156 op = nir_intrinsic_vote_all;
1157 break;
1158 case ir_intrinsic_vote_eq:
1159 op = nir_intrinsic_vote_ieq;
1160 break;
1161 case ir_intrinsic_ballot:
1162 op = nir_intrinsic_ballot;
1163 break;
1164 case ir_intrinsic_read_invocation:
1165 op = nir_intrinsic_read_invocation;
1166 break;
1167 case ir_intrinsic_read_first_invocation:
1168 op = nir_intrinsic_read_first_invocation;
1169 break;
1170 case ir_intrinsic_helper_invocation:
1171 op = nir_intrinsic_is_helper_invocation;
1172 break;
1173 default:
1174 unreachable("not reached");
1175 }
1176
1177 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1178 nir_ssa_def *ret = &instr->dest.ssa;
1179
1180 switch (op) {
1181 case nir_intrinsic_deref_atomic_add:
1182 case nir_intrinsic_deref_atomic_imin:
1183 case nir_intrinsic_deref_atomic_umin:
1184 case nir_intrinsic_deref_atomic_imax:
1185 case nir_intrinsic_deref_atomic_umax:
1186 case nir_intrinsic_deref_atomic_and:
1187 case nir_intrinsic_deref_atomic_or:
1188 case nir_intrinsic_deref_atomic_xor:
1189 case nir_intrinsic_deref_atomic_exchange:
1190 case nir_intrinsic_deref_atomic_comp_swap:
1191 case nir_intrinsic_deref_atomic_fadd:
1192 case nir_intrinsic_deref_atomic_fmin:
1193 case nir_intrinsic_deref_atomic_fmax:
1194 case nir_intrinsic_deref_atomic_fcomp_swap: {
1195 int param_count = ir->actual_parameters.length();
1196 assert(param_count == 2 || param_count == 3);
1197
1198 /* Deref */
1199 exec_node *param = ir->actual_parameters.get_head();
1200 ir_rvalue *rvalue = (ir_rvalue *) param;
1201 ir_dereference *deref = rvalue->as_dereference();
1202 ir_swizzle *swizzle = NULL;
1203 if (!deref) {
1204 /* We may have a swizzle to pick off a single vec4 component */
1205 swizzle = rvalue->as_swizzle();
1206 assert(swizzle && swizzle->type->vector_elements == 1);
1207 deref = swizzle->val->as_dereference();
1208 assert(deref);
1209 }
1210 nir_deref_instr *nir_deref = evaluate_deref(deref);
1211 if (swizzle) {
1212 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1213 swizzle->mask.x);
1214 }
1215 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1216
1217 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1218
1219 /* data1 parameter (this is always present) */
1220 param = param->get_next();
1221 ir_instruction *inst = (ir_instruction *) param;
1222 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1223
1224 /* data2 parameter (only with atomic_comp_swap) */
1225 if (param_count == 3) {
1226 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1227 op == nir_intrinsic_deref_atomic_fcomp_swap);
1228 param = param->get_next();
1229 inst = (ir_instruction *) param;
1230 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1231 }
1232
1233 /* Atomic result */
1234 assert(ir->return_deref);
1235 nir_ssa_dest_init(&instr->instr, &instr->dest,
1236 ir->return_deref->type->vector_elements, 32, NULL);
1237 nir_builder_instr_insert(&b, &instr->instr);
1238 break;
1239 }
1240 case nir_intrinsic_atomic_counter_read_deref:
1241 case nir_intrinsic_atomic_counter_inc_deref:
1242 case nir_intrinsic_atomic_counter_pre_dec_deref:
1243 case nir_intrinsic_atomic_counter_add_deref:
1244 case nir_intrinsic_atomic_counter_min_deref:
1245 case nir_intrinsic_atomic_counter_max_deref:
1246 case nir_intrinsic_atomic_counter_and_deref:
1247 case nir_intrinsic_atomic_counter_or_deref:
1248 case nir_intrinsic_atomic_counter_xor_deref:
1249 case nir_intrinsic_atomic_counter_exchange_deref:
1250 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1251 /* Set the counter variable dereference. */
1252 exec_node *param = ir->actual_parameters.get_head();
1253 ir_dereference *counter = (ir_dereference *)param;
1254
1255 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1256 param = param->get_next();
1257
1258 /* Set the intrinsic destination. */
1259 if (ir->return_deref) {
1260 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1261 }
1262
1263 /* Set the intrinsic parameters. */
1264 if (!param->is_tail_sentinel()) {
1265 instr->src[1] =
1266 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1267 param = param->get_next();
1268 }
1269
1270 if (!param->is_tail_sentinel()) {
1271 instr->src[2] =
1272 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1273 param = param->get_next();
1274 }
1275
1276 nir_builder_instr_insert(&b, &instr->instr);
1277 break;
1278 }
1279 case nir_intrinsic_image_deref_load:
1280 case nir_intrinsic_image_deref_store:
1281 case nir_intrinsic_image_deref_atomic_add:
1282 case nir_intrinsic_image_deref_atomic_imin:
1283 case nir_intrinsic_image_deref_atomic_umin:
1284 case nir_intrinsic_image_deref_atomic_imax:
1285 case nir_intrinsic_image_deref_atomic_umax:
1286 case nir_intrinsic_image_deref_atomic_and:
1287 case nir_intrinsic_image_deref_atomic_or:
1288 case nir_intrinsic_image_deref_atomic_xor:
1289 case nir_intrinsic_image_deref_atomic_exchange:
1290 case nir_intrinsic_image_deref_atomic_comp_swap:
1291 case nir_intrinsic_image_deref_atomic_fadd:
1292 case nir_intrinsic_image_deref_samples:
1293 case nir_intrinsic_image_deref_size:
1294 case nir_intrinsic_image_deref_atomic_inc_wrap:
1295 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1296 nir_ssa_undef_instr *instr_undef =
1297 nir_ssa_undef_instr_create(shader, 1, 32);
1298 nir_builder_instr_insert(&b, &instr_undef->instr);
1299
1300 /* Set the image variable dereference. */
1301 exec_node *param = ir->actual_parameters.get_head();
1302 ir_dereference *image = (ir_dereference *)param;
1303 nir_deref_instr *deref = evaluate_deref(image);
1304 const glsl_type *type = deref->type;
1305
1306 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1307
1308 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1309 param = param->get_next();
1310
1311 /* Set the intrinsic destination. */
1312 if (ir->return_deref) {
1313 unsigned num_components = ir->return_deref->type->vector_elements;
1314 nir_ssa_dest_init(&instr->instr, &instr->dest,
1315 num_components, 32, NULL);
1316 }
1317
1318 if (op == nir_intrinsic_image_deref_size) {
1319 instr->num_components = instr->dest.ssa.num_components;
1320 } else if (op == nir_intrinsic_image_deref_load ||
1321 op == nir_intrinsic_image_deref_store) {
1322 instr->num_components = 4;
1323 }
1324
1325 if (op == nir_intrinsic_image_deref_size ||
1326 op == nir_intrinsic_image_deref_samples) {
1327 nir_builder_instr_insert(&b, &instr->instr);
1328 break;
1329 }
1330
1331 /* Set the address argument, extending the coordinate vector to four
1332 * components.
1333 */
1334 nir_ssa_def *src_addr =
1335 evaluate_rvalue((ir_dereference *)param);
1336 nir_ssa_def *srcs[4];
1337
1338 for (int i = 0; i < 4; i++) {
1339 if (i < type->coordinate_components())
1340 srcs[i] = nir_channel(&b, src_addr, i);
1341 else
1342 srcs[i] = &instr_undef->def;
1343 }
1344
1345 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1346 param = param->get_next();
1347
1348 /* Set the sample argument, which is undefined for single-sample
1349 * images.
1350 */
1351 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1352 instr->src[2] =
1353 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1354 param = param->get_next();
1355 } else {
1356 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1357 }
1358
1359 /* Set the intrinsic parameters. */
1360 if (!param->is_tail_sentinel()) {
1361 instr->src[3] =
1362 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1363 param = param->get_next();
1364 }
1365
1366 if (!param->is_tail_sentinel()) {
1367 instr->src[4] =
1368 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1369 param = param->get_next();
1370 }
1371 nir_builder_instr_insert(&b, &instr->instr);
1372 break;
1373 }
1374 case nir_intrinsic_memory_barrier:
1375 case nir_intrinsic_group_memory_barrier:
1376 case nir_intrinsic_memory_barrier_atomic_counter:
1377 case nir_intrinsic_memory_barrier_buffer:
1378 case nir_intrinsic_memory_barrier_image:
1379 case nir_intrinsic_memory_barrier_shared:
1380 nir_builder_instr_insert(&b, &instr->instr);
1381 break;
1382 case nir_intrinsic_shader_clock:
1383 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1384 instr->num_components = 2;
1385 nir_builder_instr_insert(&b, &instr->instr);
1386 break;
1387 case nir_intrinsic_begin_invocation_interlock:
1388 nir_builder_instr_insert(&b, &instr->instr);
1389 break;
1390 case nir_intrinsic_end_invocation_interlock:
1391 nir_builder_instr_insert(&b, &instr->instr);
1392 break;
1393 case nir_intrinsic_store_ssbo: {
1394 exec_node *param = ir->actual_parameters.get_head();
1395 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1396
1397 param = param->get_next();
1398 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1399
1400 param = param->get_next();
1401 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1402
1403 param = param->get_next();
1404 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1405 assert(write_mask);
1406
1407 nir_ssa_def *nir_val = evaluate_rvalue(val);
1408 if (val->type->is_boolean())
1409 nir_val = nir_b2i32(&b, nir_val);
1410
1411 instr->src[0] = nir_src_for_ssa(nir_val);
1412 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1413 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1414 intrinsic_set_std430_align(instr, val->type);
1415 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1416 instr->num_components = val->type->vector_elements;
1417
1418 nir_builder_instr_insert(&b, &instr->instr);
1419 break;
1420 }
1421 case nir_intrinsic_load_ssbo: {
1422 exec_node *param = ir->actual_parameters.get_head();
1423 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1424
1425 param = param->get_next();
1426 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1427
1428 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1429 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1430
1431 const glsl_type *type = ir->return_deref->var->type;
1432 instr->num_components = type->vector_elements;
1433 intrinsic_set_std430_align(instr, type);
1434
1435 /* Setup destination register */
1436 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1437 nir_ssa_dest_init(&instr->instr, &instr->dest,
1438 type->vector_elements, bit_size, NULL);
1439
1440 /* Insert the created nir instruction now since in the case of boolean
1441 * result we will need to emit another instruction after it
1442 */
1443 nir_builder_instr_insert(&b, &instr->instr);
1444
1445 /*
1446 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1447 * consider a true boolean to be ~0. Fix this up with a != 0
1448 * comparison.
1449 */
1450 if (type->is_boolean())
1451 ret = nir_i2b(&b, &instr->dest.ssa);
1452 break;
1453 }
1454 case nir_intrinsic_ssbo_atomic_add:
1455 case nir_intrinsic_ssbo_atomic_imin:
1456 case nir_intrinsic_ssbo_atomic_umin:
1457 case nir_intrinsic_ssbo_atomic_imax:
1458 case nir_intrinsic_ssbo_atomic_umax:
1459 case nir_intrinsic_ssbo_atomic_and:
1460 case nir_intrinsic_ssbo_atomic_or:
1461 case nir_intrinsic_ssbo_atomic_xor:
1462 case nir_intrinsic_ssbo_atomic_exchange:
1463 case nir_intrinsic_ssbo_atomic_comp_swap:
1464 case nir_intrinsic_ssbo_atomic_fadd:
1465 case nir_intrinsic_ssbo_atomic_fmin:
1466 case nir_intrinsic_ssbo_atomic_fmax:
1467 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1468 int param_count = ir->actual_parameters.length();
1469 assert(param_count == 3 || param_count == 4);
1470
1471 /* Block index */
1472 exec_node *param = ir->actual_parameters.get_head();
1473 ir_instruction *inst = (ir_instruction *) param;
1474 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1475
1476 /* Offset */
1477 param = param->get_next();
1478 inst = (ir_instruction *) param;
1479 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1480
1481 /* data1 parameter (this is always present) */
1482 param = param->get_next();
1483 inst = (ir_instruction *) param;
1484 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1485
1486 /* data2 parameter (only with atomic_comp_swap) */
1487 if (param_count == 4) {
1488 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1489 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1490 param = param->get_next();
1491 inst = (ir_instruction *) param;
1492 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1493 }
1494
1495 /* Atomic result */
1496 assert(ir->return_deref);
1497 nir_ssa_dest_init(&instr->instr, &instr->dest,
1498 ir->return_deref->type->vector_elements, 32, NULL);
1499 nir_builder_instr_insert(&b, &instr->instr);
1500 break;
1501 }
1502 case nir_intrinsic_load_shared: {
1503 exec_node *param = ir->actual_parameters.get_head();
1504 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1505
1506 nir_intrinsic_set_base(instr, 0);
1507 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1508
1509 const glsl_type *type = ir->return_deref->var->type;
1510 instr->num_components = type->vector_elements;
1511 intrinsic_set_std430_align(instr, type);
1512
1513 /* Setup destination register */
1514 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1515 nir_ssa_dest_init(&instr->instr, &instr->dest,
1516 type->vector_elements, bit_size, NULL);
1517
1518 nir_builder_instr_insert(&b, &instr->instr);
1519
1520 /* The value in shared memory is a 32-bit value */
1521 if (type->is_boolean())
1522 ret = nir_i2b(&b, &instr->dest.ssa);
1523 break;
1524 }
1525 case nir_intrinsic_store_shared: {
1526 exec_node *param = ir->actual_parameters.get_head();
1527 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1528
1529 param = param->get_next();
1530 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1531
1532 param = param->get_next();
1533 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1534 assert(write_mask);
1535
1536 nir_intrinsic_set_base(instr, 0);
1537 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1538
1539 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1540
1541 nir_ssa_def *nir_val = evaluate_rvalue(val);
1542 /* The value in shared memory is a 32-bit value */
1543 if (val->type->is_boolean())
1544 nir_val = nir_b2i32(&b, nir_val);
1545
1546 instr->src[0] = nir_src_for_ssa(nir_val);
1547 instr->num_components = val->type->vector_elements;
1548 intrinsic_set_std430_align(instr, val->type);
1549
1550 nir_builder_instr_insert(&b, &instr->instr);
1551 break;
1552 }
1553 case nir_intrinsic_shared_atomic_add:
1554 case nir_intrinsic_shared_atomic_imin:
1555 case nir_intrinsic_shared_atomic_umin:
1556 case nir_intrinsic_shared_atomic_imax:
1557 case nir_intrinsic_shared_atomic_umax:
1558 case nir_intrinsic_shared_atomic_and:
1559 case nir_intrinsic_shared_atomic_or:
1560 case nir_intrinsic_shared_atomic_xor:
1561 case nir_intrinsic_shared_atomic_exchange:
1562 case nir_intrinsic_shared_atomic_comp_swap:
1563 case nir_intrinsic_shared_atomic_fadd:
1564 case nir_intrinsic_shared_atomic_fmin:
1565 case nir_intrinsic_shared_atomic_fmax:
1566 case nir_intrinsic_shared_atomic_fcomp_swap: {
1567 int param_count = ir->actual_parameters.length();
1568 assert(param_count == 2 || param_count == 3);
1569
1570 /* Offset */
1571 exec_node *param = ir->actual_parameters.get_head();
1572 ir_instruction *inst = (ir_instruction *) param;
1573 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1574
1575 /* data1 parameter (this is always present) */
1576 param = param->get_next();
1577 inst = (ir_instruction *) param;
1578 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1579
1580 /* data2 parameter (only with atomic_comp_swap) */
1581 if (param_count == 3) {
1582 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1583 op == nir_intrinsic_shared_atomic_fcomp_swap);
1584 param = param->get_next();
1585 inst = (ir_instruction *) param;
1586 instr->src[2] =
1587 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1588 }
1589
1590 /* Atomic result */
1591 assert(ir->return_deref);
1592 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1593 nir_ssa_dest_init(&instr->instr, &instr->dest,
1594 ir->return_deref->type->vector_elements,
1595 bit_size, NULL);
1596 nir_builder_instr_insert(&b, &instr->instr);
1597 break;
1598 }
1599 case nir_intrinsic_vote_any:
1600 case nir_intrinsic_vote_all:
1601 case nir_intrinsic_vote_ieq: {
1602 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1603 instr->num_components = 1;
1604
1605 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1606 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1607
1608 nir_builder_instr_insert(&b, &instr->instr);
1609 break;
1610 }
1611
1612 case nir_intrinsic_ballot: {
1613 nir_ssa_dest_init(&instr->instr, &instr->dest,
1614 ir->return_deref->type->vector_elements, 64, NULL);
1615 instr->num_components = ir->return_deref->type->vector_elements;
1616
1617 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1618 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1619
1620 nir_builder_instr_insert(&b, &instr->instr);
1621 break;
1622 }
1623 case nir_intrinsic_read_invocation: {
1624 nir_ssa_dest_init(&instr->instr, &instr->dest,
1625 ir->return_deref->type->vector_elements, 32, NULL);
1626 instr->num_components = ir->return_deref->type->vector_elements;
1627
1628 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1629 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1630
1631 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1632 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1633
1634 nir_builder_instr_insert(&b, &instr->instr);
1635 break;
1636 }
1637 case nir_intrinsic_read_first_invocation: {
1638 nir_ssa_dest_init(&instr->instr, &instr->dest,
1639 ir->return_deref->type->vector_elements, 32, NULL);
1640 instr->num_components = ir->return_deref->type->vector_elements;
1641
1642 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1643 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1644
1645 nir_builder_instr_insert(&b, &instr->instr);
1646 break;
1647 }
1648 case nir_intrinsic_is_helper_invocation: {
1649 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1650 instr->num_components = 1;
1651 nir_builder_instr_insert(&b, &instr->instr);
1652 break;
1653 }
1654 default:
1655 unreachable("not reached");
1656 }
1657
1658 if (ir->return_deref)
1659 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1660
1661 return;
1662 }
1663
1664 struct hash_entry *entry =
1665 _mesa_hash_table_search(this->overload_table, ir->callee);
1666 assert(entry);
1667 nir_function *callee = (nir_function *) entry->data;
1668
1669 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1670
1671 unsigned i = 0;
1672 nir_deref_instr *ret_deref = NULL;
1673 if (ir->return_deref) {
1674 nir_variable *ret_tmp =
1675 nir_local_variable_create(this->impl, ir->return_deref->type,
1676 "return_tmp");
1677 ret_deref = nir_build_deref_var(&b, ret_tmp);
1678 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1679 }
1680
1681 foreach_two_lists(formal_node, &ir->callee->parameters,
1682 actual_node, &ir->actual_parameters) {
1683 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1684 ir_variable *sig_param = (ir_variable *) formal_node;
1685
1686 if (sig_param->data.mode == ir_var_function_out) {
1687 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1688 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1689 } else if (sig_param->data.mode == ir_var_function_in) {
1690 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1691 nir_src src = nir_src_for_ssa(val);
1692
1693 nir_src_copy(&call->params[i], &src, call);
1694 } else if (sig_param->data.mode == ir_var_function_inout) {
1695 unreachable("unimplemented: inout parameters");
1696 }
1697
1698 i++;
1699 }
1700
1701 nir_builder_instr_insert(&b, &call->instr);
1702
1703 if (ir->return_deref)
1704 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1705 }
1706
1707 void
1708 nir_visitor::visit(ir_assignment *ir)
1709 {
1710 unsigned num_components = ir->lhs->type->vector_elements;
1711
1712 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1713 ir->lhs->variable_referenced()->data.precise;
1714
1715 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1716 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1717 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1718 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1719 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1720 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1721 if (ir->condition) {
1722 nir_push_if(&b, evaluate_rvalue(ir->condition));
1723 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1724 rhs_qualifiers);
1725 nir_pop_if(&b, NULL);
1726 } else {
1727 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1728 rhs_qualifiers);
1729 }
1730 return;
1731 }
1732
1733 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1734
1735 ir->lhs->accept(this);
1736 nir_deref_instr *lhs_deref = this->deref;
1737 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1738
1739 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1740 /* GLSL IR will give us the input to the write-masked assignment in a
1741 * single packed vector. So, for example, if the writemask is xzw, then
1742 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1743 * from the load.
1744 */
1745 unsigned swiz[4];
1746 unsigned component = 0;
1747 for (unsigned i = 0; i < 4; i++) {
1748 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1749 }
1750 src = nir_swizzle(&b, src, swiz, num_components);
1751 }
1752
1753 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1754 if (ir->condition) {
1755 nir_push_if(&b, evaluate_rvalue(ir->condition));
1756 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1757 qualifiers);
1758 nir_pop_if(&b, NULL);
1759 } else {
1760 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1761 qualifiers);
1762 }
1763 }
1764
1765 /*
1766 * Given an instruction, returns a pointer to its destination or NULL if there
1767 * is no destination.
1768 *
1769 * Note that this only handles instructions we generate at this level.
1770 */
1771 static nir_dest *
1772 get_instr_dest(nir_instr *instr)
1773 {
1774 nir_alu_instr *alu_instr;
1775 nir_intrinsic_instr *intrinsic_instr;
1776 nir_tex_instr *tex_instr;
1777
1778 switch (instr->type) {
1779 case nir_instr_type_alu:
1780 alu_instr = nir_instr_as_alu(instr);
1781 return &alu_instr->dest.dest;
1782
1783 case nir_instr_type_intrinsic:
1784 intrinsic_instr = nir_instr_as_intrinsic(instr);
1785 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1786 return &intrinsic_instr->dest;
1787 else
1788 return NULL;
1789
1790 case nir_instr_type_tex:
1791 tex_instr = nir_instr_as_tex(instr);
1792 return &tex_instr->dest;
1793
1794 default:
1795 unreachable("not reached");
1796 }
1797
1798 return NULL;
1799 }
1800
1801 void
1802 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1803 unsigned bit_size)
1804 {
1805 nir_dest *dest = get_instr_dest(instr);
1806
1807 if (dest)
1808 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1809
1810 nir_builder_instr_insert(&b, instr);
1811
1812 if (dest) {
1813 assert(dest->is_ssa);
1814 this->result = &dest->ssa;
1815 }
1816 }
1817
1818 nir_ssa_def *
1819 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1820 {
1821 ir->accept(this);
1822 if (ir->as_dereference() || ir->as_constant()) {
1823 /*
1824 * A dereference is being used on the right hand side, which means we
1825 * must emit a variable load.
1826 */
1827
1828 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1829 this->result = nir_load_deref_with_access(&b, this->deref, access);
1830 }
1831
1832 return this->result;
1833 }
1834
1835 static bool
1836 type_is_float(glsl_base_type type)
1837 {
1838 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1839 type == GLSL_TYPE_FLOAT16;
1840 }
1841
1842 static bool
1843 type_is_signed(glsl_base_type type)
1844 {
1845 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1846 type == GLSL_TYPE_INT16;
1847 }
1848
1849 void
1850 nir_visitor::visit(ir_expression *ir)
1851 {
1852 /* Some special cases */
1853 switch (ir->operation) {
1854 case ir_binop_ubo_load: {
1855 nir_intrinsic_instr *load =
1856 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1857 unsigned bit_size = ir->type->is_boolean() ? 32 :
1858 glsl_get_bit_size(ir->type);
1859 load->num_components = ir->type->vector_elements;
1860 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1861 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1862 intrinsic_set_std430_align(load, ir->type);
1863 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1864
1865 /*
1866 * In UBO's, a true boolean value is any non-zero value, but we consider
1867 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1868 */
1869
1870 if (ir->type->is_boolean())
1871 this->result = nir_i2b(&b, &load->dest.ssa);
1872
1873 return;
1874 }
1875
1876 case ir_unop_interpolate_at_centroid:
1877 case ir_binop_interpolate_at_offset:
1878 case ir_binop_interpolate_at_sample: {
1879 ir_dereference *deref = ir->operands[0]->as_dereference();
1880 ir_swizzle *swizzle = NULL;
1881 if (!deref) {
1882 /* the api does not allow a swizzle here, but the varying packing code
1883 * may have pushed one into here.
1884 */
1885 swizzle = ir->operands[0]->as_swizzle();
1886 assert(swizzle);
1887 deref = swizzle->val->as_dereference();
1888 assert(deref);
1889 }
1890
1891 deref->accept(this);
1892
1893 nir_intrinsic_op op;
1894 if (this->deref->mode == nir_var_shader_in) {
1895 switch (ir->operation) {
1896 case ir_unop_interpolate_at_centroid:
1897 op = nir_intrinsic_interp_deref_at_centroid;
1898 break;
1899 case ir_binop_interpolate_at_offset:
1900 op = nir_intrinsic_interp_deref_at_offset;
1901 break;
1902 case ir_binop_interpolate_at_sample:
1903 op = nir_intrinsic_interp_deref_at_sample;
1904 break;
1905 default:
1906 unreachable("Invalid interpolation intrinsic");
1907 }
1908 } else {
1909 /* This case can happen if the vertex shader does not write the
1910 * given varying. In this case, the linker will lower it to a
1911 * global variable. Since interpolating a variable makes no
1912 * sense, we'll just turn it into a load which will probably
1913 * eventually end up as an SSA definition.
1914 */
1915 assert(this->deref->mode == nir_var_shader_temp);
1916 op = nir_intrinsic_load_deref;
1917 }
1918
1919 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1920 intrin->num_components = deref->type->vector_elements;
1921 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1922
1923 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1924 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1925 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1926
1927 unsigned bit_size = glsl_get_bit_size(deref->type);
1928 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1929
1930 if (swizzle) {
1931 unsigned swiz[4] = {
1932 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1933 };
1934
1935 result = nir_swizzle(&b, result, swiz,
1936 swizzle->type->vector_elements);
1937 }
1938
1939 return;
1940 }
1941
1942 case ir_unop_ssbo_unsized_array_length: {
1943 nir_intrinsic_instr *intrin =
1944 nir_intrinsic_instr_create(b.shader,
1945 nir_intrinsic_deref_buffer_array_length);
1946
1947 ir_dereference *deref = ir->operands[0]->as_dereference();
1948 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1949
1950 add_instr(&intrin->instr, 1, 32);
1951 return;
1952 }
1953
1954 default:
1955 break;
1956 }
1957
1958 nir_ssa_def *srcs[4];
1959 for (unsigned i = 0; i < ir->num_operands; i++)
1960 srcs[i] = evaluate_rvalue(ir->operands[i]);
1961
1962 glsl_base_type types[4];
1963 for (unsigned i = 0; i < ir->num_operands; i++)
1964 types[i] = ir->operands[i]->type->base_type;
1965
1966 glsl_base_type out_type = ir->type->base_type;
1967
1968 switch (ir->operation) {
1969 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1970 case ir_unop_logic_not:
1971 result = nir_inot(&b, srcs[0]);
1972 break;
1973 case ir_unop_neg:
1974 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1975 : nir_ineg(&b, srcs[0]);
1976 break;
1977 case ir_unop_abs:
1978 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1979 : nir_iabs(&b, srcs[0]);
1980 break;
1981 case ir_unop_saturate:
1982 assert(type_is_float(types[0]));
1983 result = nir_fsat(&b, srcs[0]);
1984 break;
1985 case ir_unop_sign:
1986 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1987 : nir_isign(&b, srcs[0]);
1988 break;
1989 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1990 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1991 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1992 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1993 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1994 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1995 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1996 case ir_unop_i2f:
1997 case ir_unop_u2f:
1998 case ir_unop_b2f:
1999 case ir_unop_f2i:
2000 case ir_unop_f2u:
2001 case ir_unop_f2b:
2002 case ir_unop_i2b:
2003 case ir_unop_b2i:
2004 case ir_unop_b2i64:
2005 case ir_unop_d2f:
2006 case ir_unop_f2d:
2007 case ir_unop_d2i:
2008 case ir_unop_d2u:
2009 case ir_unop_d2b:
2010 case ir_unop_i2d:
2011 case ir_unop_u2d:
2012 case ir_unop_i642i:
2013 case ir_unop_i642u:
2014 case ir_unop_i642f:
2015 case ir_unop_i642b:
2016 case ir_unop_i642d:
2017 case ir_unop_u642i:
2018 case ir_unop_u642u:
2019 case ir_unop_u642f:
2020 case ir_unop_u642d:
2021 case ir_unop_i2i64:
2022 case ir_unop_u2i64:
2023 case ir_unop_f2i64:
2024 case ir_unop_d2i64:
2025 case ir_unop_i2u64:
2026 case ir_unop_u2u64:
2027 case ir_unop_f2u64:
2028 case ir_unop_d2u64:
2029 case ir_unop_i2u:
2030 case ir_unop_u2i:
2031 case ir_unop_i642u64:
2032 case ir_unop_u642i64: {
2033 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2034 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2035 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
2036 nir_rounding_mode_undef),
2037 srcs[0], NULL, NULL, NULL);
2038 /* b2i and b2f don't have fixed bit-size versions so the builder will
2039 * just assume 32 and we have to fix it up here.
2040 */
2041 result->bit_size = nir_alu_type_get_type_size(dst_type);
2042 break;
2043 }
2044
2045 case ir_unop_bitcast_i2f:
2046 case ir_unop_bitcast_f2i:
2047 case ir_unop_bitcast_u2f:
2048 case ir_unop_bitcast_f2u:
2049 case ir_unop_bitcast_i642d:
2050 case ir_unop_bitcast_d2i64:
2051 case ir_unop_bitcast_u642d:
2052 case ir_unop_bitcast_d2u64:
2053 case ir_unop_subroutine_to_int:
2054 /* no-op */
2055 result = nir_mov(&b, srcs[0]);
2056 break;
2057 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2058 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2059 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2060 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2061 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2062 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2063 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2064 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2065 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2066 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2067 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2068 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2069 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2070 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2071 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2072 case ir_unop_pack_snorm_2x16:
2073 result = nir_pack_snorm_2x16(&b, srcs[0]);
2074 break;
2075 case ir_unop_pack_snorm_4x8:
2076 result = nir_pack_snorm_4x8(&b, srcs[0]);
2077 break;
2078 case ir_unop_pack_unorm_2x16:
2079 result = nir_pack_unorm_2x16(&b, srcs[0]);
2080 break;
2081 case ir_unop_pack_unorm_4x8:
2082 result = nir_pack_unorm_4x8(&b, srcs[0]);
2083 break;
2084 case ir_unop_pack_half_2x16:
2085 result = nir_pack_half_2x16(&b, srcs[0]);
2086 break;
2087 case ir_unop_unpack_snorm_2x16:
2088 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2089 break;
2090 case ir_unop_unpack_snorm_4x8:
2091 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2092 break;
2093 case ir_unop_unpack_unorm_2x16:
2094 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2095 break;
2096 case ir_unop_unpack_unorm_4x8:
2097 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2098 break;
2099 case ir_unop_unpack_half_2x16:
2100 result = nir_unpack_half_2x16(&b, srcs[0]);
2101 break;
2102 case ir_unop_pack_sampler_2x32:
2103 case ir_unop_pack_image_2x32:
2104 case ir_unop_pack_double_2x32:
2105 case ir_unop_pack_int_2x32:
2106 case ir_unop_pack_uint_2x32:
2107 result = nir_pack_64_2x32(&b, srcs[0]);
2108 break;
2109 case ir_unop_unpack_sampler_2x32:
2110 case ir_unop_unpack_image_2x32:
2111 case ir_unop_unpack_double_2x32:
2112 case ir_unop_unpack_int_2x32:
2113 case ir_unop_unpack_uint_2x32:
2114 result = nir_unpack_64_2x32(&b, srcs[0]);
2115 break;
2116 case ir_unop_bitfield_reverse:
2117 result = nir_bitfield_reverse(&b, srcs[0]);
2118 break;
2119 case ir_unop_bit_count:
2120 result = nir_bit_count(&b, srcs[0]);
2121 break;
2122 case ir_unop_find_msb:
2123 switch (types[0]) {
2124 case GLSL_TYPE_UINT:
2125 result = nir_ufind_msb(&b, srcs[0]);
2126 break;
2127 case GLSL_TYPE_INT:
2128 result = nir_ifind_msb(&b, srcs[0]);
2129 break;
2130 default:
2131 unreachable("Invalid type for findMSB()");
2132 }
2133 break;
2134 case ir_unop_find_lsb:
2135 result = nir_find_lsb(&b, srcs[0]);
2136 break;
2137
2138 case ir_unop_noise:
2139 switch (ir->type->vector_elements) {
2140 case 1:
2141 switch (ir->operands[0]->type->vector_elements) {
2142 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
2143 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
2144 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
2145 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
2146 default: unreachable("not reached");
2147 }
2148 break;
2149 case 2:
2150 switch (ir->operands[0]->type->vector_elements) {
2151 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
2152 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
2153 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
2154 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
2155 default: unreachable("not reached");
2156 }
2157 break;
2158 case 3:
2159 switch (ir->operands[0]->type->vector_elements) {
2160 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
2161 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
2162 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
2163 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
2164 default: unreachable("not reached");
2165 }
2166 break;
2167 case 4:
2168 switch (ir->operands[0]->type->vector_elements) {
2169 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
2170 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
2171 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
2172 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
2173 default: unreachable("not reached");
2174 }
2175 break;
2176 default:
2177 unreachable("not reached");
2178 }
2179 break;
2180 case ir_unop_get_buffer_size: {
2181 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2182 this->shader,
2183 nir_intrinsic_get_buffer_size);
2184 load->num_components = ir->type->vector_elements;
2185 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2186 unsigned bit_size = glsl_get_bit_size(ir->type);
2187 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2188 return;
2189 }
2190
2191 case ir_unop_atan:
2192 result = nir_atan(&b, srcs[0]);
2193 break;
2194
2195 case ir_binop_add:
2196 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2197 : nir_iadd(&b, srcs[0], srcs[1]);
2198 break;
2199 case ir_binop_sub:
2200 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2201 : nir_isub(&b, srcs[0], srcs[1]);
2202 break;
2203 case ir_binop_mul:
2204 if (type_is_float(out_type))
2205 result = nir_fmul(&b, srcs[0], srcs[1]);
2206 else if (out_type == GLSL_TYPE_INT64 &&
2207 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2208 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2209 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2210 else if (out_type == GLSL_TYPE_UINT64 &&
2211 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2212 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2213 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2214 else
2215 result = nir_imul(&b, srcs[0], srcs[1]);
2216 break;
2217 case ir_binop_div:
2218 if (type_is_float(out_type))
2219 result = nir_fdiv(&b, srcs[0], srcs[1]);
2220 else if (type_is_signed(out_type))
2221 result = nir_idiv(&b, srcs[0], srcs[1]);
2222 else
2223 result = nir_udiv(&b, srcs[0], srcs[1]);
2224 break;
2225 case ir_binop_mod:
2226 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2227 : nir_umod(&b, srcs[0], srcs[1]);
2228 break;
2229 case ir_binop_min:
2230 if (type_is_float(out_type))
2231 result = nir_fmin(&b, srcs[0], srcs[1]);
2232 else if (type_is_signed(out_type))
2233 result = nir_imin(&b, srcs[0], srcs[1]);
2234 else
2235 result = nir_umin(&b, srcs[0], srcs[1]);
2236 break;
2237 case ir_binop_max:
2238 if (type_is_float(out_type))
2239 result = nir_fmax(&b, srcs[0], srcs[1]);
2240 else if (type_is_signed(out_type))
2241 result = nir_imax(&b, srcs[0], srcs[1]);
2242 else
2243 result = nir_umax(&b, srcs[0], srcs[1]);
2244 break;
2245 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2246 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2247 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2248 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2249 case ir_binop_logic_and:
2250 result = nir_iand(&b, srcs[0], srcs[1]);
2251 break;
2252 case ir_binop_logic_or:
2253 result = nir_ior(&b, srcs[0], srcs[1]);
2254 break;
2255 case ir_binop_logic_xor:
2256 result = nir_ixor(&b, srcs[0], srcs[1]);
2257 break;
2258 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2259 case ir_binop_rshift:
2260 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2261 : nir_ushr(&b, srcs[0], srcs[1]);
2262 break;
2263 case ir_binop_imul_high:
2264 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2265 : nir_umul_high(&b, srcs[0], srcs[1]);
2266 break;
2267 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2268 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2269 case ir_binop_less:
2270 if (type_is_float(types[0]))
2271 result = nir_flt(&b, srcs[0], srcs[1]);
2272 else if (type_is_signed(types[0]))
2273 result = nir_ilt(&b, srcs[0], srcs[1]);
2274 else
2275 result = nir_ult(&b, srcs[0], srcs[1]);
2276 break;
2277 case ir_binop_gequal:
2278 if (type_is_float(types[0]))
2279 result = nir_fge(&b, srcs[0], srcs[1]);
2280 else if (type_is_signed(types[0]))
2281 result = nir_ige(&b, srcs[0], srcs[1]);
2282 else
2283 result = nir_uge(&b, srcs[0], srcs[1]);
2284 break;
2285 case ir_binop_equal:
2286 if (type_is_float(types[0]))
2287 result = nir_feq(&b, srcs[0], srcs[1]);
2288 else
2289 result = nir_ieq(&b, srcs[0], srcs[1]);
2290 break;
2291 case ir_binop_nequal:
2292 if (type_is_float(types[0]))
2293 result = nir_fne(&b, srcs[0], srcs[1]);
2294 else
2295 result = nir_ine(&b, srcs[0], srcs[1]);
2296 break;
2297 case ir_binop_all_equal:
2298 if (type_is_float(types[0])) {
2299 switch (ir->operands[0]->type->vector_elements) {
2300 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2301 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2302 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2303 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2304 default:
2305 unreachable("not reached");
2306 }
2307 } else {
2308 switch (ir->operands[0]->type->vector_elements) {
2309 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2310 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2311 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2312 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2313 default:
2314 unreachable("not reached");
2315 }
2316 }
2317 break;
2318 case ir_binop_any_nequal:
2319 if (type_is_float(types[0])) {
2320 switch (ir->operands[0]->type->vector_elements) {
2321 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2322 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2323 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2324 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2325 default:
2326 unreachable("not reached");
2327 }
2328 } else {
2329 switch (ir->operands[0]->type->vector_elements) {
2330 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2331 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2332 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2333 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2334 default:
2335 unreachable("not reached");
2336 }
2337 }
2338 break;
2339 case ir_binop_dot:
2340 switch (ir->operands[0]->type->vector_elements) {
2341 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2342 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2343 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2344 default:
2345 unreachable("not reached");
2346 }
2347 break;
2348 case ir_binop_vector_extract: {
2349 result = nir_channel(&b, srcs[0], 0);
2350 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2351 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2352 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2353 swizzled, result);
2354 }
2355 break;
2356 }
2357
2358 case ir_binop_atan2:
2359 result = nir_atan2(&b, srcs[0], srcs[1]);
2360 break;
2361
2362 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2363 case ir_triop_fma:
2364 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2365 break;
2366 case ir_triop_lrp:
2367 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2368 break;
2369 case ir_triop_csel:
2370 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2371 break;
2372 case ir_triop_bitfield_extract:
2373 result = (out_type == GLSL_TYPE_INT) ?
2374 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2375 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2376 break;
2377 case ir_quadop_bitfield_insert:
2378 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2379 break;
2380 case ir_quadop_vector:
2381 result = nir_vec(&b, srcs, ir->type->vector_elements);
2382 break;
2383
2384 default:
2385 unreachable("not reached");
2386 }
2387 }
2388
2389 void
2390 nir_visitor::visit(ir_swizzle *ir)
2391 {
2392 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2393 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2394 ir->type->vector_elements);
2395 }
2396
2397 void
2398 nir_visitor::visit(ir_texture *ir)
2399 {
2400 unsigned num_srcs;
2401 nir_texop op;
2402 switch (ir->op) {
2403 case ir_tex:
2404 op = nir_texop_tex;
2405 num_srcs = 1; /* coordinate */
2406 break;
2407
2408 case ir_txb:
2409 case ir_txl:
2410 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2411 num_srcs = 2; /* coordinate, bias/lod */
2412 break;
2413
2414 case ir_txd:
2415 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2416 num_srcs = 3;
2417 break;
2418
2419 case ir_txf:
2420 op = nir_texop_txf;
2421 if (ir->lod_info.lod != NULL)
2422 num_srcs = 2; /* coordinate, lod */
2423 else
2424 num_srcs = 1; /* coordinate */
2425 break;
2426
2427 case ir_txf_ms:
2428 op = nir_texop_txf_ms;
2429 num_srcs = 2; /* coordinate, sample_index */
2430 break;
2431
2432 case ir_txs:
2433 op = nir_texop_txs;
2434 if (ir->lod_info.lod != NULL)
2435 num_srcs = 1; /* lod */
2436 else
2437 num_srcs = 0;
2438 break;
2439
2440 case ir_lod:
2441 op = nir_texop_lod;
2442 num_srcs = 1; /* coordinate */
2443 break;
2444
2445 case ir_tg4:
2446 op = nir_texop_tg4;
2447 num_srcs = 1; /* coordinate */
2448 break;
2449
2450 case ir_query_levels:
2451 op = nir_texop_query_levels;
2452 num_srcs = 0;
2453 break;
2454
2455 case ir_texture_samples:
2456 op = nir_texop_texture_samples;
2457 num_srcs = 0;
2458 break;
2459
2460 case ir_samples_identical:
2461 op = nir_texop_samples_identical;
2462 num_srcs = 1; /* coordinate */
2463 break;
2464
2465 default:
2466 unreachable("not reached");
2467 }
2468
2469 if (ir->projector != NULL)
2470 num_srcs++;
2471 if (ir->shadow_comparator != NULL)
2472 num_srcs++;
2473 /* offsets are constants we store inside nir_tex_intrs.offsets */
2474 if (ir->offset != NULL && !ir->offset->type->is_array())
2475 num_srcs++;
2476
2477 /* Add one for the texture deref */
2478 num_srcs += 2;
2479
2480 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2481
2482 instr->op = op;
2483 instr->sampler_dim =
2484 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2485 instr->is_array = ir->sampler->type->sampler_array;
2486 instr->is_shadow = ir->sampler->type->sampler_shadow;
2487 if (instr->is_shadow)
2488 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2489 switch (ir->type->base_type) {
2490 case GLSL_TYPE_FLOAT:
2491 instr->dest_type = nir_type_float;
2492 break;
2493 case GLSL_TYPE_INT:
2494 instr->dest_type = nir_type_int;
2495 break;
2496 case GLSL_TYPE_BOOL:
2497 case GLSL_TYPE_UINT:
2498 instr->dest_type = nir_type_uint;
2499 break;
2500 default:
2501 unreachable("not reached");
2502 }
2503
2504 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2505
2506 /* check for bindless handles */
2507 if (sampler_deref->mode != nir_var_uniform ||
2508 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2509 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2510 instr->src[0].src = nir_src_for_ssa(load);
2511 instr->src[0].src_type = nir_tex_src_texture_handle;
2512 instr->src[1].src = nir_src_for_ssa(load);
2513 instr->src[1].src_type = nir_tex_src_sampler_handle;
2514 } else {
2515 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2516 instr->src[0].src_type = nir_tex_src_texture_deref;
2517 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2518 instr->src[1].src_type = nir_tex_src_sampler_deref;
2519 }
2520
2521 unsigned src_number = 2;
2522
2523 if (ir->coordinate != NULL) {
2524 instr->coord_components = ir->coordinate->type->vector_elements;
2525 instr->src[src_number].src =
2526 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2527 instr->src[src_number].src_type = nir_tex_src_coord;
2528 src_number++;
2529 }
2530
2531 if (ir->projector != NULL) {
2532 instr->src[src_number].src =
2533 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2534 instr->src[src_number].src_type = nir_tex_src_projector;
2535 src_number++;
2536 }
2537
2538 if (ir->shadow_comparator != NULL) {
2539 instr->src[src_number].src =
2540 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2541 instr->src[src_number].src_type = nir_tex_src_comparator;
2542 src_number++;
2543 }
2544
2545 if (ir->offset != NULL) {
2546 if (ir->offset->type->is_array()) {
2547 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2548 const ir_constant *c =
2549 ir->offset->as_constant()->get_array_element(i);
2550
2551 for (unsigned j = 0; j < 2; ++j) {
2552 int val = c->get_int_component(j);
2553 assert(val <= 31 && val >= -32);
2554 instr->tg4_offsets[i][j] = val;
2555 }
2556 }
2557 } else {
2558 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2559
2560 instr->src[src_number].src =
2561 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2562 instr->src[src_number].src_type = nir_tex_src_offset;
2563 src_number++;
2564 }
2565 }
2566
2567 switch (ir->op) {
2568 case ir_txb:
2569 instr->src[src_number].src =
2570 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2571 instr->src[src_number].src_type = nir_tex_src_bias;
2572 src_number++;
2573 break;
2574
2575 case ir_txl:
2576 case ir_txf:
2577 case ir_txs:
2578 if (ir->lod_info.lod != NULL) {
2579 instr->src[src_number].src =
2580 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2581 instr->src[src_number].src_type = nir_tex_src_lod;
2582 src_number++;
2583 }
2584 break;
2585
2586 case ir_txd:
2587 instr->src[src_number].src =
2588 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2589 instr->src[src_number].src_type = nir_tex_src_ddx;
2590 src_number++;
2591 instr->src[src_number].src =
2592 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2593 instr->src[src_number].src_type = nir_tex_src_ddy;
2594 src_number++;
2595 break;
2596
2597 case ir_txf_ms:
2598 instr->src[src_number].src =
2599 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2600 instr->src[src_number].src_type = nir_tex_src_ms_index;
2601 src_number++;
2602 break;
2603
2604 case ir_tg4:
2605 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2606 break;
2607
2608 default:
2609 break;
2610 }
2611
2612 assert(src_number == num_srcs);
2613
2614 unsigned bit_size = glsl_get_bit_size(ir->type);
2615 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2616 }
2617
2618 void
2619 nir_visitor::visit(ir_constant *ir)
2620 {
2621 /*
2622 * We don't know if this variable is an array or struct that gets
2623 * dereferenced, so do the safe thing an make it a variable with a
2624 * constant initializer and return a dereference.
2625 */
2626
2627 nir_variable *var =
2628 nir_local_variable_create(this->impl, ir->type, "const_temp");
2629 var->data.read_only = true;
2630 var->constant_initializer = constant_copy(ir, var);
2631
2632 this->deref = nir_build_deref_var(&b, var);
2633 }
2634
2635 void
2636 nir_visitor::visit(ir_dereference_variable *ir)
2637 {
2638 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2639 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2640
2641 foreach_in_list(ir_variable, param, &sig->parameters) {
2642 if (param == ir->variable_referenced()) {
2643 break;
2644 }
2645 i++;
2646 }
2647
2648 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2649 nir_var_function_temp, ir->type, 0);
2650 return;
2651 }
2652
2653 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2654
2655 struct hash_entry *entry =
2656 _mesa_hash_table_search(this->var_table, ir->var);
2657 assert(entry);
2658 nir_variable *var = (nir_variable *) entry->data;
2659
2660 this->deref = nir_build_deref_var(&b, var);
2661 }
2662
2663 void
2664 nir_visitor::visit(ir_dereference_record *ir)
2665 {
2666 ir->record->accept(this);
2667
2668 int field_index = ir->field_idx;
2669 assert(field_index >= 0);
2670
2671 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2672 }
2673
2674 void
2675 nir_visitor::visit(ir_dereference_array *ir)
2676 {
2677 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2678
2679 ir->array->accept(this);
2680
2681 this->deref = nir_build_deref_array(&b, this->deref, index);
2682 }
2683
2684 void
2685 nir_visitor::visit(ir_barrier *)
2686 {
2687 nir_intrinsic_instr *instr =
2688 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2689 nir_builder_instr_insert(&b, &instr->instr);
2690 }
2691
2692 nir_shader *
2693 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2694 const nir_shader_compiler_options *options)
2695 {
2696 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2697 * matter because we're not optimizing anything here.
2698 */
2699 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2700 sh->Source = float64_source;
2701 sh->CompileStatus = COMPILE_FAILURE;
2702 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2703
2704 if (!sh->CompileStatus) {
2705 if (sh->InfoLog) {
2706 _mesa_problem(ctx,
2707 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2708 sh->InfoLog, float64_source);
2709 }
2710 return NULL;
2711 }
2712
2713 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2714
2715 nir_visitor v1(ctx, nir);
2716 nir_function_visitor v2(&v1);
2717 v2.run(sh->ir);
2718 visit_exec_list(sh->ir, &v1);
2719
2720 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2721 sh->Source = NULL;
2722 _mesa_delete_shader(ctx, sh);
2723
2724 nir_validate_shader(nir, "float64_funcs_to_nir");
2725
2726 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
2727 NIR_PASS_V(nir, nir_lower_returns);
2728 NIR_PASS_V(nir, nir_inline_functions);
2729 NIR_PASS_V(nir, nir_opt_deref);
2730
2731 /* Do some optimizations to clean up the shader now. By optimizing the
2732 * functions in the library, we avoid having to re-do that work every
2733 * time we inline a copy of a function. Reducing basic blocks also helps
2734 * with compile times.
2735 */
2736 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2737 NIR_PASS_V(nir, nir_copy_prop);
2738 NIR_PASS_V(nir, nir_opt_dce);
2739 NIR_PASS_V(nir, nir_opt_cse);
2740 NIR_PASS_V(nir, nir_opt_gcm, true);
2741 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2742 NIR_PASS_V(nir, nir_opt_dce);
2743
2744 return nir;
2745 }