nir: Rework conversion opcodes
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35
36 /*
37 * pass to lower GLSL IR to NIR
38 *
39 * This will lower variable dereferences to loads/stores of corresponding
40 * variables in NIR - the variables will be converted to registers in a later
41 * pass.
42 */
43
44 namespace {
45
46 class nir_visitor : public ir_visitor
47 {
48 public:
49 nir_visitor(nir_shader *shader);
50 ~nir_visitor();
51
52 virtual void visit(ir_variable *);
53 virtual void visit(ir_function *);
54 virtual void visit(ir_function_signature *);
55 virtual void visit(ir_loop *);
56 virtual void visit(ir_if *);
57 virtual void visit(ir_discard *);
58 virtual void visit(ir_loop_jump *);
59 virtual void visit(ir_return *);
60 virtual void visit(ir_call *);
61 virtual void visit(ir_assignment *);
62 virtual void visit(ir_emit_vertex *);
63 virtual void visit(ir_end_primitive *);
64 virtual void visit(ir_expression *);
65 virtual void visit(ir_swizzle *);
66 virtual void visit(ir_texture *);
67 virtual void visit(ir_constant *);
68 virtual void visit(ir_dereference_variable *);
69 virtual void visit(ir_dereference_record *);
70 virtual void visit(ir_dereference_array *);
71 virtual void visit(ir_barrier *);
72
73 void create_function(ir_function_signature *ir);
74
75 private:
76 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
77 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
78
79 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
82 nir_ssa_def *src2);
83 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
84 nir_ssa_def *src2, nir_ssa_def *src3);
85
86 bool supports_ints;
87
88 nir_shader *shader;
89 nir_function_impl *impl;
90 nir_builder b;
91 nir_ssa_def *result; /* result of the expression tree last visited */
92
93 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
94
95 /* the head of the dereference chain we're creating */
96 nir_deref_var *deref_head;
97 /* the tail of the dereference chain we're creating */
98 nir_deref *deref_tail;
99
100 nir_variable *var; /* variable created by ir_variable visitor */
101
102 /* whether the IR we're operating on is per-function or global */
103 bool is_global;
104
105 /* map of ir_variable -> nir_variable */
106 struct hash_table *var_table;
107
108 /* map of ir_function_signature -> nir_function_overload */
109 struct hash_table *overload_table;
110 };
111
112 /*
113 * This visitor runs before the main visitor, calling create_function() for
114 * each function so that the main visitor can resolve forward references in
115 * calls.
116 */
117
118 class nir_function_visitor : public ir_hierarchical_visitor
119 {
120 public:
121 nir_function_visitor(nir_visitor *v) : visitor(v)
122 {
123 }
124 virtual ir_visitor_status visit_enter(ir_function *);
125
126 private:
127 nir_visitor *visitor;
128 };
129
130 } /* end of anonymous namespace */
131
132 static void
133 nir_remap_attributes(nir_shader *shader)
134 {
135 nir_foreach_variable(var, &shader->inputs) {
136 var->data.location += _mesa_bitcount_64(shader->info->double_inputs_read &
137 BITFIELD64_MASK(var->data.location));
138 }
139
140 /* Once the remap is done, reset double_inputs_read, so later it will have
141 * which location/slots are doubles */
142 shader->info->double_inputs_read = 0;
143 }
144
145 nir_shader *
146 glsl_to_nir(const struct gl_shader_program *shader_prog,
147 gl_shader_stage stage,
148 const nir_shader_compiler_options *options)
149 {
150 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
151
152 nir_shader *shader = nir_shader_create(NULL, stage, options,
153 &sh->Program->info);
154
155 nir_visitor v1(shader);
156 nir_function_visitor v2(&v1);
157 v2.run(sh->ir);
158 visit_exec_list(sh->ir, &v1);
159
160 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
161
162 /* Remap the locations to slots so those requiring two slots will occupy
163 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
164 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
165 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
166 if (shader->stage == MESA_SHADER_VERTEX)
167 nir_remap_attributes(shader);
168
169 shader->info->name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
170 if (shader_prog->Label)
171 shader->info->label = ralloc_strdup(shader, shader_prog->Label);
172 shader->info->has_transform_feedback_varyings =
173 shader_prog->TransformFeedback.NumVarying > 0;
174
175 return shader;
176 }
177
178 nir_visitor::nir_visitor(nir_shader *shader)
179 {
180 this->supports_ints = shader->options->native_integers;
181 this->shader = shader;
182 this->is_global = true;
183 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
184 _mesa_key_pointer_equal);
185 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
186 _mesa_key_pointer_equal);
187 this->result = NULL;
188 this->impl = NULL;
189 this->var = NULL;
190 this->deref_head = NULL;
191 this->deref_tail = NULL;
192 memset(&this->b, 0, sizeof(this->b));
193 }
194
195 nir_visitor::~nir_visitor()
196 {
197 _mesa_hash_table_destroy(this->var_table, NULL);
198 _mesa_hash_table_destroy(this->overload_table, NULL);
199 }
200
201 nir_deref_var *
202 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
203 {
204 ir->accept(this);
205 ralloc_steal(mem_ctx, this->deref_head);
206 return this->deref_head;
207 }
208
209 static nir_constant *
210 constant_copy(ir_constant *ir, void *mem_ctx)
211 {
212 if (ir == NULL)
213 return NULL;
214
215 nir_constant *ret = ralloc(mem_ctx, nir_constant);
216
217 const unsigned rows = ir->type->vector_elements;
218 const unsigned cols = ir->type->matrix_columns;
219 unsigned i;
220
221 ret->num_elements = 0;
222 switch (ir->type->base_type) {
223 case GLSL_TYPE_UINT:
224 /* Only float base types can be matrices. */
225 assert(cols == 1);
226
227 for (unsigned r = 0; r < rows; r++)
228 ret->values[0].u32[r] = ir->value.u[r];
229
230 break;
231
232 case GLSL_TYPE_INT:
233 /* Only float base types can be matrices. */
234 assert(cols == 1);
235
236 for (unsigned r = 0; r < rows; r++)
237 ret->values[0].i32[r] = ir->value.i[r];
238
239 break;
240
241 case GLSL_TYPE_FLOAT:
242 for (unsigned c = 0; c < cols; c++) {
243 for (unsigned r = 0; r < rows; r++)
244 ret->values[c].f32[r] = ir->value.f[c * rows + r];
245 }
246 break;
247
248 case GLSL_TYPE_DOUBLE:
249 for (unsigned c = 0; c < cols; c++) {
250 for (unsigned r = 0; r < rows; r++)
251 ret->values[c].f64[r] = ir->value.d[c * rows + r];
252 }
253 break;
254
255 case GLSL_TYPE_UINT64:
256 /* Only float base types can be matrices. */
257 assert(cols == 1);
258
259 for (unsigned r = 0; r < rows; r++)
260 ret->values[0].u64[r] = ir->value.u64[r];
261 break;
262
263 case GLSL_TYPE_INT64:
264 /* Only float base types can be matrices. */
265 assert(cols == 1);
266
267 for (unsigned r = 0; r < rows; r++)
268 ret->values[0].i64[r] = ir->value.i64[r];
269 break;
270
271 case GLSL_TYPE_BOOL:
272 /* Only float base types can be matrices. */
273 assert(cols == 1);
274
275 for (unsigned r = 0; r < rows; r++)
276 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
277
278 break;
279
280 case GLSL_TYPE_STRUCT:
281 ret->elements = ralloc_array(mem_ctx, nir_constant *,
282 ir->type->length);
283 ret->num_elements = ir->type->length;
284
285 i = 0;
286 foreach_in_list(ir_constant, field, &ir->components) {
287 ret->elements[i] = constant_copy(field, mem_ctx);
288 i++;
289 }
290 break;
291
292 case GLSL_TYPE_ARRAY:
293 ret->elements = ralloc_array(mem_ctx, nir_constant *,
294 ir->type->length);
295 ret->num_elements = ir->type->length;
296
297 for (i = 0; i < ir->type->length; i++)
298 ret->elements[i] = constant_copy(ir->array_elements[i], mem_ctx);
299 break;
300
301 default:
302 unreachable("not reached");
303 }
304
305 return ret;
306 }
307
308 void
309 nir_visitor::visit(ir_variable *ir)
310 {
311 nir_variable *var = ralloc(shader, nir_variable);
312 var->type = ir->type;
313 var->name = ralloc_strdup(var, ir->name);
314
315 var->data.read_only = ir->data.read_only;
316 var->data.centroid = ir->data.centroid;
317 var->data.sample = ir->data.sample;
318 var->data.patch = ir->data.patch;
319 var->data.invariant = ir->data.invariant;
320 var->data.location = ir->data.location;
321 var->data.compact = false;
322
323 switch(ir->data.mode) {
324 case ir_var_auto:
325 case ir_var_temporary:
326 if (is_global)
327 var->data.mode = nir_var_global;
328 else
329 var->data.mode = nir_var_local;
330 break;
331
332 case ir_var_function_in:
333 case ir_var_function_out:
334 case ir_var_function_inout:
335 case ir_var_const_in:
336 var->data.mode = nir_var_local;
337 break;
338
339 case ir_var_shader_in:
340 if (shader->stage == MESA_SHADER_FRAGMENT &&
341 ir->data.location == VARYING_SLOT_FACE) {
342 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
343 var->data.location = SYSTEM_VALUE_FRONT_FACE;
344 var->data.mode = nir_var_system_value;
345 } else if (shader->stage == MESA_SHADER_GEOMETRY &&
346 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
347 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
348 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
349 var->data.mode = nir_var_system_value;
350 } else {
351 var->data.mode = nir_var_shader_in;
352
353 if (shader->stage == MESA_SHADER_TESS_EVAL &&
354 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
355 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
356 var->data.compact = ir->type->without_array()->is_scalar();
357 }
358 }
359
360 /* Mark all the locations that require two slots */
361 if (glsl_type_is_dual_slot(glsl_without_array(var->type))) {
362 for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
363 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
364 shader->info->double_inputs_read |= bitfield;
365 }
366 }
367 break;
368
369 case ir_var_shader_out:
370 var->data.mode = nir_var_shader_out;
371 if (shader->stage == MESA_SHADER_TESS_CTRL &&
372 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
373 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
374 var->data.compact = ir->type->without_array()->is_scalar();
375 }
376 break;
377
378 case ir_var_uniform:
379 var->data.mode = nir_var_uniform;
380 break;
381
382 case ir_var_shader_storage:
383 var->data.mode = nir_var_shader_storage;
384 break;
385
386 case ir_var_system_value:
387 var->data.mode = nir_var_system_value;
388 break;
389
390 default:
391 unreachable("not reached");
392 }
393
394 var->data.interpolation = ir->data.interpolation;
395 var->data.origin_upper_left = ir->data.origin_upper_left;
396 var->data.pixel_center_integer = ir->data.pixel_center_integer;
397 var->data.location_frac = ir->data.location_frac;
398
399 switch (ir->data.depth_layout) {
400 case ir_depth_layout_none:
401 var->data.depth_layout = nir_depth_layout_none;
402 break;
403 case ir_depth_layout_any:
404 var->data.depth_layout = nir_depth_layout_any;
405 break;
406 case ir_depth_layout_greater:
407 var->data.depth_layout = nir_depth_layout_greater;
408 break;
409 case ir_depth_layout_less:
410 var->data.depth_layout = nir_depth_layout_less;
411 break;
412 case ir_depth_layout_unchanged:
413 var->data.depth_layout = nir_depth_layout_unchanged;
414 break;
415 default:
416 unreachable("not reached");
417 }
418
419 var->data.index = ir->data.index;
420 var->data.binding = ir->data.binding;
421 var->data.offset = ir->data.offset;
422 var->data.image.read_only = ir->data.image_read_only;
423 var->data.image.write_only = ir->data.image_write_only;
424 var->data.image.coherent = ir->data.image_coherent;
425 var->data.image._volatile = ir->data.image_volatile;
426 var->data.image.restrict_flag = ir->data.image_restrict;
427 var->data.image.format = ir->data.image_format;
428 var->data.fb_fetch_output = ir->data.fb_fetch_output;
429
430 var->num_state_slots = ir->get_num_state_slots();
431 if (var->num_state_slots > 0) {
432 var->state_slots = ralloc_array(var, nir_state_slot,
433 var->num_state_slots);
434
435 ir_state_slot *state_slots = ir->get_state_slots();
436 for (unsigned i = 0; i < var->num_state_slots; i++) {
437 for (unsigned j = 0; j < 5; j++)
438 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
439 var->state_slots[i].swizzle = state_slots[i].swizzle;
440 }
441 } else {
442 var->state_slots = NULL;
443 }
444
445 var->constant_initializer = constant_copy(ir->constant_initializer, var);
446
447 var->interface_type = ir->get_interface_type();
448
449 if (var->data.mode == nir_var_local)
450 nir_function_impl_add_variable(impl, var);
451 else
452 nir_shader_add_variable(shader, var);
453
454 _mesa_hash_table_insert(var_table, ir, var);
455 this->var = var;
456 }
457
458 ir_visitor_status
459 nir_function_visitor::visit_enter(ir_function *ir)
460 {
461 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
462 visitor->create_function(sig);
463 }
464 return visit_continue_with_parent;
465 }
466
467 void
468 nir_visitor::create_function(ir_function_signature *ir)
469 {
470 if (ir->is_intrinsic())
471 return;
472
473 nir_function *func = nir_function_create(shader, ir->function_name());
474
475 assert(ir->parameters.is_empty());
476 assert(ir->return_type == glsl_type::void_type);
477
478 _mesa_hash_table_insert(this->overload_table, ir, func);
479 }
480
481 void
482 nir_visitor::visit(ir_function *ir)
483 {
484 foreach_in_list(ir_function_signature, sig, &ir->signatures)
485 sig->accept(this);
486 }
487
488 void
489 nir_visitor::visit(ir_function_signature *ir)
490 {
491 if (ir->is_intrinsic())
492 return;
493
494 struct hash_entry *entry =
495 _mesa_hash_table_search(this->overload_table, ir);
496
497 assert(entry);
498 nir_function *func = (nir_function *) entry->data;
499
500 if (ir->is_defined) {
501 nir_function_impl *impl = nir_function_impl_create(func);
502 this->impl = impl;
503
504 assert(strcmp(func->name, "main") == 0);
505 assert(ir->parameters.is_empty());
506 assert(func->return_type == glsl_type::void_type);
507
508 this->is_global = false;
509
510 nir_builder_init(&b, impl);
511 b.cursor = nir_after_cf_list(&impl->body);
512 visit_exec_list(&ir->body, this);
513
514 this->is_global = true;
515 } else {
516 func->impl = NULL;
517 }
518 }
519
520 void
521 nir_visitor::visit(ir_loop *ir)
522 {
523 nir_push_loop(&b);
524 visit_exec_list(&ir->body_instructions, this);
525 nir_pop_loop(&b, NULL);
526 }
527
528 void
529 nir_visitor::visit(ir_if *ir)
530 {
531 nir_push_if(&b, evaluate_rvalue(ir->condition));
532 visit_exec_list(&ir->then_instructions, this);
533 nir_push_else(&b, NULL);
534 visit_exec_list(&ir->else_instructions, this);
535 nir_pop_if(&b, NULL);
536 }
537
538 void
539 nir_visitor::visit(ir_discard *ir)
540 {
541 /*
542 * discards aren't treated as control flow, because before we lower them
543 * they can appear anywhere in the shader and the stuff after them may still
544 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
545 * discards will be immediately followed by a return.
546 */
547
548 nir_intrinsic_instr *discard;
549 if (ir->condition) {
550 discard = nir_intrinsic_instr_create(this->shader,
551 nir_intrinsic_discard_if);
552 discard->src[0] =
553 nir_src_for_ssa(evaluate_rvalue(ir->condition));
554 } else {
555 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
556 }
557
558 nir_builder_instr_insert(&b, &discard->instr);
559 }
560
561 void
562 nir_visitor::visit(ir_emit_vertex *ir)
563 {
564 nir_intrinsic_instr *instr =
565 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
566 nir_intrinsic_set_stream_id(instr, ir->stream_id());
567 nir_builder_instr_insert(&b, &instr->instr);
568 }
569
570 void
571 nir_visitor::visit(ir_end_primitive *ir)
572 {
573 nir_intrinsic_instr *instr =
574 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
575 nir_intrinsic_set_stream_id(instr, ir->stream_id());
576 nir_builder_instr_insert(&b, &instr->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_loop_jump *ir)
581 {
582 nir_jump_type type;
583 switch (ir->mode) {
584 case ir_loop_jump::jump_break:
585 type = nir_jump_break;
586 break;
587 case ir_loop_jump::jump_continue:
588 type = nir_jump_continue;
589 break;
590 default:
591 unreachable("not reached");
592 }
593
594 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_return *ir)
600 {
601 if (ir->value != NULL) {
602 nir_intrinsic_instr *copy =
603 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
604
605 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
606 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
607 }
608
609 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
610 nir_builder_instr_insert(&b, &instr->instr);
611 }
612
613 void
614 nir_visitor::visit(ir_call *ir)
615 {
616 if (ir->callee->is_intrinsic()) {
617 nir_intrinsic_op op;
618
619 switch (ir->callee->intrinsic_id) {
620 case ir_intrinsic_atomic_counter_read:
621 op = nir_intrinsic_atomic_counter_read_var;
622 break;
623 case ir_intrinsic_atomic_counter_increment:
624 op = nir_intrinsic_atomic_counter_inc_var;
625 break;
626 case ir_intrinsic_atomic_counter_predecrement:
627 op = nir_intrinsic_atomic_counter_dec_var;
628 break;
629 case ir_intrinsic_atomic_counter_add:
630 op = nir_intrinsic_atomic_counter_add_var;
631 break;
632 case ir_intrinsic_atomic_counter_and:
633 op = nir_intrinsic_atomic_counter_and_var;
634 break;
635 case ir_intrinsic_atomic_counter_or:
636 op = nir_intrinsic_atomic_counter_or_var;
637 break;
638 case ir_intrinsic_atomic_counter_xor:
639 op = nir_intrinsic_atomic_counter_xor_var;
640 break;
641 case ir_intrinsic_atomic_counter_min:
642 op = nir_intrinsic_atomic_counter_min_var;
643 break;
644 case ir_intrinsic_atomic_counter_max:
645 op = nir_intrinsic_atomic_counter_max_var;
646 break;
647 case ir_intrinsic_atomic_counter_exchange:
648 op = nir_intrinsic_atomic_counter_exchange_var;
649 break;
650 case ir_intrinsic_atomic_counter_comp_swap:
651 op = nir_intrinsic_atomic_counter_comp_swap_var;
652 break;
653 case ir_intrinsic_image_load:
654 op = nir_intrinsic_image_load;
655 break;
656 case ir_intrinsic_image_store:
657 op = nir_intrinsic_image_store;
658 break;
659 case ir_intrinsic_image_atomic_add:
660 op = nir_intrinsic_image_atomic_add;
661 break;
662 case ir_intrinsic_image_atomic_min:
663 op = nir_intrinsic_image_atomic_min;
664 break;
665 case ir_intrinsic_image_atomic_max:
666 op = nir_intrinsic_image_atomic_max;
667 break;
668 case ir_intrinsic_image_atomic_and:
669 op = nir_intrinsic_image_atomic_and;
670 break;
671 case ir_intrinsic_image_atomic_or:
672 op = nir_intrinsic_image_atomic_or;
673 break;
674 case ir_intrinsic_image_atomic_xor:
675 op = nir_intrinsic_image_atomic_xor;
676 break;
677 case ir_intrinsic_image_atomic_exchange:
678 op = nir_intrinsic_image_atomic_exchange;
679 break;
680 case ir_intrinsic_image_atomic_comp_swap:
681 op = nir_intrinsic_image_atomic_comp_swap;
682 break;
683 case ir_intrinsic_memory_barrier:
684 op = nir_intrinsic_memory_barrier;
685 break;
686 case ir_intrinsic_image_size:
687 op = nir_intrinsic_image_size;
688 break;
689 case ir_intrinsic_image_samples:
690 op = nir_intrinsic_image_samples;
691 break;
692 case ir_intrinsic_ssbo_store:
693 op = nir_intrinsic_store_ssbo;
694 break;
695 case ir_intrinsic_ssbo_load:
696 op = nir_intrinsic_load_ssbo;
697 break;
698 case ir_intrinsic_ssbo_atomic_add:
699 op = nir_intrinsic_ssbo_atomic_add;
700 break;
701 case ir_intrinsic_ssbo_atomic_and:
702 op = nir_intrinsic_ssbo_atomic_and;
703 break;
704 case ir_intrinsic_ssbo_atomic_or:
705 op = nir_intrinsic_ssbo_atomic_or;
706 break;
707 case ir_intrinsic_ssbo_atomic_xor:
708 op = nir_intrinsic_ssbo_atomic_xor;
709 break;
710 case ir_intrinsic_ssbo_atomic_min:
711 assert(ir->return_deref);
712 if (ir->return_deref->type == glsl_type::int_type)
713 op = nir_intrinsic_ssbo_atomic_imin;
714 else if (ir->return_deref->type == glsl_type::uint_type)
715 op = nir_intrinsic_ssbo_atomic_umin;
716 else
717 unreachable("Invalid type");
718 break;
719 case ir_intrinsic_ssbo_atomic_max:
720 assert(ir->return_deref);
721 if (ir->return_deref->type == glsl_type::int_type)
722 op = nir_intrinsic_ssbo_atomic_imax;
723 else if (ir->return_deref->type == glsl_type::uint_type)
724 op = nir_intrinsic_ssbo_atomic_umax;
725 else
726 unreachable("Invalid type");
727 break;
728 case ir_intrinsic_ssbo_atomic_exchange:
729 op = nir_intrinsic_ssbo_atomic_exchange;
730 break;
731 case ir_intrinsic_ssbo_atomic_comp_swap:
732 op = nir_intrinsic_ssbo_atomic_comp_swap;
733 break;
734 case ir_intrinsic_shader_clock:
735 op = nir_intrinsic_shader_clock;
736 break;
737 case ir_intrinsic_group_memory_barrier:
738 op = nir_intrinsic_group_memory_barrier;
739 break;
740 case ir_intrinsic_memory_barrier_atomic_counter:
741 op = nir_intrinsic_memory_barrier_atomic_counter;
742 break;
743 case ir_intrinsic_memory_barrier_buffer:
744 op = nir_intrinsic_memory_barrier_buffer;
745 break;
746 case ir_intrinsic_memory_barrier_image:
747 op = nir_intrinsic_memory_barrier_image;
748 break;
749 case ir_intrinsic_memory_barrier_shared:
750 op = nir_intrinsic_memory_barrier_shared;
751 break;
752 case ir_intrinsic_shared_load:
753 op = nir_intrinsic_load_shared;
754 break;
755 case ir_intrinsic_shared_store:
756 op = nir_intrinsic_store_shared;
757 break;
758 case ir_intrinsic_shared_atomic_add:
759 op = nir_intrinsic_shared_atomic_add;
760 break;
761 case ir_intrinsic_shared_atomic_and:
762 op = nir_intrinsic_shared_atomic_and;
763 break;
764 case ir_intrinsic_shared_atomic_or:
765 op = nir_intrinsic_shared_atomic_or;
766 break;
767 case ir_intrinsic_shared_atomic_xor:
768 op = nir_intrinsic_shared_atomic_xor;
769 break;
770 case ir_intrinsic_shared_atomic_min:
771 assert(ir->return_deref);
772 if (ir->return_deref->type == glsl_type::int_type)
773 op = nir_intrinsic_shared_atomic_imin;
774 else if (ir->return_deref->type == glsl_type::uint_type)
775 op = nir_intrinsic_shared_atomic_umin;
776 else
777 unreachable("Invalid type");
778 break;
779 case ir_intrinsic_shared_atomic_max:
780 assert(ir->return_deref);
781 if (ir->return_deref->type == glsl_type::int_type)
782 op = nir_intrinsic_shared_atomic_imax;
783 else if (ir->return_deref->type == glsl_type::uint_type)
784 op = nir_intrinsic_shared_atomic_umax;
785 else
786 unreachable("Invalid type");
787 break;
788 case ir_intrinsic_shared_atomic_exchange:
789 op = nir_intrinsic_shared_atomic_exchange;
790 break;
791 case ir_intrinsic_shared_atomic_comp_swap:
792 op = nir_intrinsic_shared_atomic_comp_swap;
793 break;
794 default:
795 unreachable("not reached");
796 }
797
798 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
799 nir_dest *dest = &instr->dest;
800
801 switch (op) {
802 case nir_intrinsic_atomic_counter_read_var:
803 case nir_intrinsic_atomic_counter_inc_var:
804 case nir_intrinsic_atomic_counter_dec_var:
805 case nir_intrinsic_atomic_counter_add_var:
806 case nir_intrinsic_atomic_counter_min_var:
807 case nir_intrinsic_atomic_counter_max_var:
808 case nir_intrinsic_atomic_counter_and_var:
809 case nir_intrinsic_atomic_counter_or_var:
810 case nir_intrinsic_atomic_counter_xor_var:
811 case nir_intrinsic_atomic_counter_exchange_var:
812 case nir_intrinsic_atomic_counter_comp_swap_var: {
813 /* Set the counter variable dereference. */
814 exec_node *param = ir->actual_parameters.get_head();
815 ir_dereference *counter = (ir_dereference *)param;
816
817 instr->variables[0] = evaluate_deref(&instr->instr, counter);
818 param = param->get_next();
819
820 /* Set the intrinsic destination. */
821 if (ir->return_deref) {
822 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
823 }
824
825 /* Set the intrinsic parameters. */
826 if (!param->is_tail_sentinel()) {
827 instr->src[0] =
828 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
829 param = param->get_next();
830 }
831
832 if (!param->is_tail_sentinel()) {
833 instr->src[1] =
834 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
835 param = param->get_next();
836 }
837
838 nir_builder_instr_insert(&b, &instr->instr);
839 break;
840 }
841 case nir_intrinsic_image_load:
842 case nir_intrinsic_image_store:
843 case nir_intrinsic_image_atomic_add:
844 case nir_intrinsic_image_atomic_min:
845 case nir_intrinsic_image_atomic_max:
846 case nir_intrinsic_image_atomic_and:
847 case nir_intrinsic_image_atomic_or:
848 case nir_intrinsic_image_atomic_xor:
849 case nir_intrinsic_image_atomic_exchange:
850 case nir_intrinsic_image_atomic_comp_swap:
851 case nir_intrinsic_image_samples:
852 case nir_intrinsic_image_size: {
853 nir_ssa_undef_instr *instr_undef =
854 nir_ssa_undef_instr_create(shader, 1, 32);
855 nir_builder_instr_insert(&b, &instr_undef->instr);
856
857 /* Set the image variable dereference. */
858 exec_node *param = ir->actual_parameters.get_head();
859 ir_dereference *image = (ir_dereference *)param;
860 const glsl_type *type =
861 image->variable_referenced()->type->without_array();
862
863 instr->variables[0] = evaluate_deref(&instr->instr, image);
864 param = param->get_next();
865
866 /* Set the intrinsic destination. */
867 if (ir->return_deref) {
868 unsigned num_components = ir->return_deref->type->vector_elements;
869 if (instr->intrinsic == nir_intrinsic_image_size)
870 instr->num_components = num_components;
871 nir_ssa_dest_init(&instr->instr, &instr->dest,
872 num_components, 32, NULL);
873 }
874
875 if (op == nir_intrinsic_image_size ||
876 op == nir_intrinsic_image_samples) {
877 nir_builder_instr_insert(&b, &instr->instr);
878 break;
879 }
880
881 /* Set the address argument, extending the coordinate vector to four
882 * components.
883 */
884 nir_ssa_def *src_addr =
885 evaluate_rvalue((ir_dereference *)param);
886 nir_ssa_def *srcs[4];
887
888 for (int i = 0; i < 4; i++) {
889 if (i < type->coordinate_components())
890 srcs[i] = nir_channel(&b, src_addr, i);
891 else
892 srcs[i] = &instr_undef->def;
893 }
894
895 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
896 param = param->get_next();
897
898 /* Set the sample argument, which is undefined for single-sample
899 * images.
900 */
901 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
902 instr->src[1] =
903 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
904 param = param->get_next();
905 } else {
906 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
907 }
908
909 /* Set the intrinsic parameters. */
910 if (!param->is_tail_sentinel()) {
911 instr->src[2] =
912 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
913 param = param->get_next();
914 }
915
916 if (!param->is_tail_sentinel()) {
917 instr->src[3] =
918 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
919 param = param->get_next();
920 }
921 nir_builder_instr_insert(&b, &instr->instr);
922 break;
923 }
924 case nir_intrinsic_memory_barrier:
925 case nir_intrinsic_group_memory_barrier:
926 case nir_intrinsic_memory_barrier_atomic_counter:
927 case nir_intrinsic_memory_barrier_buffer:
928 case nir_intrinsic_memory_barrier_image:
929 case nir_intrinsic_memory_barrier_shared:
930 nir_builder_instr_insert(&b, &instr->instr);
931 break;
932 case nir_intrinsic_shader_clock:
933 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
934 nir_builder_instr_insert(&b, &instr->instr);
935 break;
936 case nir_intrinsic_store_ssbo: {
937 exec_node *param = ir->actual_parameters.get_head();
938 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
939
940 param = param->get_next();
941 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
942
943 param = param->get_next();
944 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
945
946 param = param->get_next();
947 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
948 assert(write_mask);
949
950 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
951 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
952 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
953 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
954 instr->num_components = val->type->vector_elements;
955
956 nir_builder_instr_insert(&b, &instr->instr);
957 break;
958 }
959 case nir_intrinsic_load_ssbo: {
960 exec_node *param = ir->actual_parameters.get_head();
961 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
962
963 param = param->get_next();
964 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
965
966 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
967 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
968
969 const glsl_type *type = ir->return_deref->var->type;
970 instr->num_components = type->vector_elements;
971
972 /* Setup destination register */
973 unsigned bit_size = glsl_get_bit_size(type);
974 nir_ssa_dest_init(&instr->instr, &instr->dest,
975 type->vector_elements, bit_size, NULL);
976
977 /* Insert the created nir instruction now since in the case of boolean
978 * result we will need to emit another instruction after it
979 */
980 nir_builder_instr_insert(&b, &instr->instr);
981
982 /*
983 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
984 * consider a true boolean to be ~0. Fix this up with a != 0
985 * comparison.
986 */
987 if (type->base_type == GLSL_TYPE_BOOL) {
988 nir_alu_instr *load_ssbo_compare =
989 nir_alu_instr_create(shader, nir_op_ine);
990 load_ssbo_compare->src[0].src.is_ssa = true;
991 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
992 load_ssbo_compare->src[1].src =
993 nir_src_for_ssa(nir_imm_int(&b, 0));
994 for (unsigned i = 0; i < type->vector_elements; i++)
995 load_ssbo_compare->src[1].swizzle[i] = 0;
996 nir_ssa_dest_init(&load_ssbo_compare->instr,
997 &load_ssbo_compare->dest.dest,
998 type->vector_elements, bit_size, NULL);
999 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1000 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1001 dest = &load_ssbo_compare->dest.dest;
1002 }
1003 break;
1004 }
1005 case nir_intrinsic_ssbo_atomic_add:
1006 case nir_intrinsic_ssbo_atomic_imin:
1007 case nir_intrinsic_ssbo_atomic_umin:
1008 case nir_intrinsic_ssbo_atomic_imax:
1009 case nir_intrinsic_ssbo_atomic_umax:
1010 case nir_intrinsic_ssbo_atomic_and:
1011 case nir_intrinsic_ssbo_atomic_or:
1012 case nir_intrinsic_ssbo_atomic_xor:
1013 case nir_intrinsic_ssbo_atomic_exchange:
1014 case nir_intrinsic_ssbo_atomic_comp_swap: {
1015 int param_count = ir->actual_parameters.length();
1016 assert(param_count == 3 || param_count == 4);
1017
1018 /* Block index */
1019 exec_node *param = ir->actual_parameters.get_head();
1020 ir_instruction *inst = (ir_instruction *) param;
1021 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1022
1023 /* Offset */
1024 param = param->get_next();
1025 inst = (ir_instruction *) param;
1026 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1027
1028 /* data1 parameter (this is always present) */
1029 param = param->get_next();
1030 inst = (ir_instruction *) param;
1031 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1032
1033 /* data2 parameter (only with atomic_comp_swap) */
1034 if (param_count == 4) {
1035 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1036 param = param->get_next();
1037 inst = (ir_instruction *) param;
1038 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1039 }
1040
1041 /* Atomic result */
1042 assert(ir->return_deref);
1043 nir_ssa_dest_init(&instr->instr, &instr->dest,
1044 ir->return_deref->type->vector_elements, 32, NULL);
1045 nir_builder_instr_insert(&b, &instr->instr);
1046 break;
1047 }
1048 case nir_intrinsic_load_shared: {
1049 exec_node *param = ir->actual_parameters.get_head();
1050 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1051
1052 nir_intrinsic_set_base(instr, 0);
1053 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1054
1055 const glsl_type *type = ir->return_deref->var->type;
1056 instr->num_components = type->vector_elements;
1057
1058 /* Setup destination register */
1059 unsigned bit_size = glsl_get_bit_size(type);
1060 nir_ssa_dest_init(&instr->instr, &instr->dest,
1061 type->vector_elements, bit_size, NULL);
1062
1063 nir_builder_instr_insert(&b, &instr->instr);
1064 break;
1065 }
1066 case nir_intrinsic_store_shared: {
1067 exec_node *param = ir->actual_parameters.get_head();
1068 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1069
1070 param = param->get_next();
1071 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1072
1073 param = param->get_next();
1074 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1075 assert(write_mask);
1076
1077 nir_intrinsic_set_base(instr, 0);
1078 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1079
1080 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1081
1082 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1083 instr->num_components = val->type->vector_elements;
1084
1085 nir_builder_instr_insert(&b, &instr->instr);
1086 break;
1087 }
1088 case nir_intrinsic_shared_atomic_add:
1089 case nir_intrinsic_shared_atomic_imin:
1090 case nir_intrinsic_shared_atomic_umin:
1091 case nir_intrinsic_shared_atomic_imax:
1092 case nir_intrinsic_shared_atomic_umax:
1093 case nir_intrinsic_shared_atomic_and:
1094 case nir_intrinsic_shared_atomic_or:
1095 case nir_intrinsic_shared_atomic_xor:
1096 case nir_intrinsic_shared_atomic_exchange:
1097 case nir_intrinsic_shared_atomic_comp_swap: {
1098 int param_count = ir->actual_parameters.length();
1099 assert(param_count == 2 || param_count == 3);
1100
1101 /* Offset */
1102 exec_node *param = ir->actual_parameters.get_head();
1103 ir_instruction *inst = (ir_instruction *) param;
1104 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1105
1106 /* data1 parameter (this is always present) */
1107 param = param->get_next();
1108 inst = (ir_instruction *) param;
1109 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1110
1111 /* data2 parameter (only with atomic_comp_swap) */
1112 if (param_count == 3) {
1113 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1114 param = param->get_next();
1115 inst = (ir_instruction *) param;
1116 instr->src[2] =
1117 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1118 }
1119
1120 /* Atomic result */
1121 assert(ir->return_deref);
1122 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1123 nir_ssa_dest_init(&instr->instr, &instr->dest,
1124 ir->return_deref->type->vector_elements,
1125 bit_size, NULL);
1126 nir_builder_instr_insert(&b, &instr->instr);
1127 break;
1128 }
1129 default:
1130 unreachable("not reached");
1131 }
1132
1133 if (ir->return_deref) {
1134 nir_intrinsic_instr *store_instr =
1135 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1136 store_instr->num_components = ir->return_deref->type->vector_elements;
1137 nir_intrinsic_set_write_mask(store_instr,
1138 (1 << store_instr->num_components) - 1);
1139
1140 store_instr->variables[0] =
1141 evaluate_deref(&store_instr->instr, ir->return_deref);
1142 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1143
1144 nir_builder_instr_insert(&b, &store_instr->instr);
1145 }
1146
1147 return;
1148 }
1149
1150 struct hash_entry *entry =
1151 _mesa_hash_table_search(this->overload_table, ir->callee);
1152 assert(entry);
1153 nir_function *callee = (nir_function *) entry->data;
1154
1155 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1156
1157 unsigned i = 0;
1158 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1159 instr->params[i] = evaluate_deref(&instr->instr, param);
1160 i++;
1161 }
1162
1163 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1164 nir_builder_instr_insert(&b, &instr->instr);
1165 }
1166
1167 void
1168 nir_visitor::visit(ir_assignment *ir)
1169 {
1170 unsigned num_components = ir->lhs->type->vector_elements;
1171
1172 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1173 ir->lhs->variable_referenced()->data.precise;
1174
1175 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1176 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1177 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1178 nir_intrinsic_instr *copy =
1179 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1180
1181 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1182 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1183
1184 if (ir->condition) {
1185 nir_push_if(&b, evaluate_rvalue(ir->condition));
1186 nir_builder_instr_insert(&b, &copy->instr);
1187 nir_pop_if(&b, NULL);
1188 } else {
1189 nir_builder_instr_insert(&b, &copy->instr);
1190 }
1191 return;
1192 }
1193
1194 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1195
1196 ir->lhs->accept(this);
1197 nir_deref_var *lhs_deref = this->deref_head;
1198 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1199
1200 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1201 /* GLSL IR will give us the input to the write-masked assignment in a
1202 * single packed vector. So, for example, if the writemask is xzw, then
1203 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1204 * from the load.
1205 */
1206 unsigned swiz[4];
1207 unsigned component = 0;
1208 for (unsigned i = 0; i < 4; i++) {
1209 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1210 }
1211 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1212 }
1213
1214 nir_intrinsic_instr *store =
1215 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1216 store->num_components = ir->lhs->type->vector_elements;
1217 nir_intrinsic_set_write_mask(store, ir->write_mask);
1218 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1219 store->src[0] = nir_src_for_ssa(src);
1220
1221 if (ir->condition) {
1222 nir_push_if(&b, evaluate_rvalue(ir->condition));
1223 nir_builder_instr_insert(&b, &store->instr);
1224 nir_pop_if(&b, NULL);
1225 } else {
1226 nir_builder_instr_insert(&b, &store->instr);
1227 }
1228 }
1229
1230 /*
1231 * Given an instruction, returns a pointer to its destination or NULL if there
1232 * is no destination.
1233 *
1234 * Note that this only handles instructions we generate at this level.
1235 */
1236 static nir_dest *
1237 get_instr_dest(nir_instr *instr)
1238 {
1239 nir_alu_instr *alu_instr;
1240 nir_intrinsic_instr *intrinsic_instr;
1241 nir_tex_instr *tex_instr;
1242
1243 switch (instr->type) {
1244 case nir_instr_type_alu:
1245 alu_instr = nir_instr_as_alu(instr);
1246 return &alu_instr->dest.dest;
1247
1248 case nir_instr_type_intrinsic:
1249 intrinsic_instr = nir_instr_as_intrinsic(instr);
1250 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1251 return &intrinsic_instr->dest;
1252 else
1253 return NULL;
1254
1255 case nir_instr_type_tex:
1256 tex_instr = nir_instr_as_tex(instr);
1257 return &tex_instr->dest;
1258
1259 default:
1260 unreachable("not reached");
1261 }
1262
1263 return NULL;
1264 }
1265
1266 void
1267 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1268 unsigned bit_size)
1269 {
1270 nir_dest *dest = get_instr_dest(instr);
1271
1272 if (dest)
1273 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1274
1275 nir_builder_instr_insert(&b, instr);
1276
1277 if (dest) {
1278 assert(dest->is_ssa);
1279 this->result = &dest->ssa;
1280 }
1281 }
1282
1283 nir_ssa_def *
1284 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1285 {
1286 ir->accept(this);
1287 if (ir->as_dereference() || ir->as_constant()) {
1288 /*
1289 * A dereference is being used on the right hand side, which means we
1290 * must emit a variable load.
1291 */
1292
1293 nir_intrinsic_instr *load_instr =
1294 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1295 load_instr->num_components = ir->type->vector_elements;
1296 load_instr->variables[0] = this->deref_head;
1297 ralloc_steal(load_instr, load_instr->variables[0]);
1298 unsigned bit_size = glsl_get_bit_size(ir->type);
1299 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1300 }
1301
1302 return this->result;
1303 }
1304
1305 static bool
1306 type_is_float(glsl_base_type type)
1307 {
1308 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE;
1309 }
1310
1311 static bool
1312 type_is_signed(glsl_base_type type)
1313 {
1314 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64;
1315 }
1316
1317 void
1318 nir_visitor::visit(ir_expression *ir)
1319 {
1320 /* Some special cases */
1321 switch (ir->operation) {
1322 case ir_binop_ubo_load: {
1323 nir_intrinsic_instr *load =
1324 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1325 unsigned bit_size = glsl_get_bit_size(ir->type);
1326 load->num_components = ir->type->vector_elements;
1327 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1328 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1329 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1330
1331 /*
1332 * In UBO's, a true boolean value is any non-zero value, but we consider
1333 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1334 */
1335
1336 if (ir->type->base_type == GLSL_TYPE_BOOL)
1337 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1338
1339 return;
1340 }
1341
1342 case ir_unop_interpolate_at_centroid:
1343 case ir_binop_interpolate_at_offset:
1344 case ir_binop_interpolate_at_sample: {
1345 ir_dereference *deref = ir->operands[0]->as_dereference();
1346 ir_swizzle *swizzle = NULL;
1347 if (!deref) {
1348 /* the api does not allow a swizzle here, but the varying packing code
1349 * may have pushed one into here.
1350 */
1351 swizzle = ir->operands[0]->as_swizzle();
1352 assert(swizzle);
1353 deref = swizzle->val->as_dereference();
1354 assert(deref);
1355 }
1356
1357 deref->accept(this);
1358
1359 nir_intrinsic_op op;
1360 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1361 switch (ir->operation) {
1362 case ir_unop_interpolate_at_centroid:
1363 op = nir_intrinsic_interp_var_at_centroid;
1364 break;
1365 case ir_binop_interpolate_at_offset:
1366 op = nir_intrinsic_interp_var_at_offset;
1367 break;
1368 case ir_binop_interpolate_at_sample:
1369 op = nir_intrinsic_interp_var_at_sample;
1370 break;
1371 default:
1372 unreachable("Invalid interpolation intrinsic");
1373 }
1374 } else {
1375 /* This case can happen if the vertex shader does not write the
1376 * given varying. In this case, the linker will lower it to a
1377 * global variable. Since interpolating a variable makes no
1378 * sense, we'll just turn it into a load which will probably
1379 * eventually end up as an SSA definition.
1380 */
1381 assert(this->deref_head->var->data.mode == nir_var_global);
1382 op = nir_intrinsic_load_var;
1383 }
1384
1385 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1386 intrin->num_components = deref->type->vector_elements;
1387 intrin->variables[0] = this->deref_head;
1388 ralloc_steal(intrin, intrin->variables[0]);
1389
1390 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1391 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1392 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1393
1394 unsigned bit_size = glsl_get_bit_size(deref->type);
1395 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1396
1397 if (swizzle) {
1398 unsigned swiz[4] = {
1399 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1400 };
1401
1402 result = nir_swizzle(&b, result, swiz,
1403 swizzle->type->vector_elements, false);
1404 }
1405
1406 return;
1407 }
1408
1409 default:
1410 break;
1411 }
1412
1413 nir_ssa_def *srcs[4];
1414 for (unsigned i = 0; i < ir->get_num_operands(); i++)
1415 srcs[i] = evaluate_rvalue(ir->operands[i]);
1416
1417 glsl_base_type types[4];
1418 for (unsigned i = 0; i < ir->get_num_operands(); i++)
1419 if (supports_ints)
1420 types[i] = ir->operands[i]->type->base_type;
1421 else
1422 types[i] = GLSL_TYPE_FLOAT;
1423
1424 glsl_base_type out_type;
1425 if (supports_ints)
1426 out_type = ir->type->base_type;
1427 else
1428 out_type = GLSL_TYPE_FLOAT;
1429
1430 switch (ir->operation) {
1431 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1432 case ir_unop_logic_not:
1433 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1434 break;
1435 case ir_unop_neg:
1436 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1437 : nir_ineg(&b, srcs[0]);
1438 break;
1439 case ir_unop_abs:
1440 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1441 : nir_iabs(&b, srcs[0]);
1442 break;
1443 case ir_unop_saturate:
1444 assert(type_is_float(types[0]));
1445 result = nir_fsat(&b, srcs[0]);
1446 break;
1447 case ir_unop_sign:
1448 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1449 : nir_isign(&b, srcs[0]);
1450 break;
1451 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1452 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1453 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1454 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1455 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1456 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1457 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1458 case ir_unop_i2f:
1459 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1460 break;
1461 case ir_unop_u2f:
1462 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1463 break;
1464 case ir_unop_b2f:
1465 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1466 break;
1467 case ir_unop_f2i:
1468 case ir_unop_f2u:
1469 case ir_unop_f2b:
1470 case ir_unop_i2b:
1471 case ir_unop_b2i:
1472 case ir_unop_b2i64:
1473 case ir_unop_d2f:
1474 case ir_unop_f2d:
1475 case ir_unop_d2i:
1476 case ir_unop_d2u:
1477 case ir_unop_d2b:
1478 case ir_unop_i2d:
1479 case ir_unop_u2d:
1480 case ir_unop_i642i:
1481 case ir_unop_i642u:
1482 case ir_unop_i642f:
1483 case ir_unop_i642b:
1484 case ir_unop_i642d:
1485 case ir_unop_u642i:
1486 case ir_unop_u642u:
1487 case ir_unop_u642f:
1488 case ir_unop_u642d:
1489 case ir_unop_i2i64:
1490 case ir_unop_u2i64:
1491 case ir_unop_f2i64:
1492 case ir_unop_d2i64:
1493 case ir_unop_i2u64:
1494 case ir_unop_u2u64:
1495 case ir_unop_f2u64:
1496 case ir_unop_d2u64:
1497 case ir_unop_i2u:
1498 case ir_unop_u2i:
1499 case ir_unop_i642u64:
1500 case ir_unop_u642i64: {
1501 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1502 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1503 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type),
1504 srcs[0], NULL, NULL, NULL);
1505 /* b2i and b2f don't have fixed bit-size versions so the builder will
1506 * just assume 32 and we have to fix it up here.
1507 */
1508 result->bit_size = nir_alu_type_get_type_size(dst_type);
1509 break;
1510 }
1511
1512 case ir_unop_bitcast_i2f:
1513 case ir_unop_bitcast_f2i:
1514 case ir_unop_bitcast_u2f:
1515 case ir_unop_bitcast_f2u:
1516 case ir_unop_bitcast_i642d:
1517 case ir_unop_bitcast_d2i64:
1518 case ir_unop_bitcast_u642d:
1519 case ir_unop_bitcast_d2u64:
1520 case ir_unop_subroutine_to_int:
1521 /* no-op */
1522 result = nir_imov(&b, srcs[0]);
1523 break;
1524 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1525 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1526 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1527 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1528 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1529 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1530 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1531 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1532 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1533 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1534 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1535 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1536 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1537 case ir_unop_pack_snorm_2x16:
1538 result = nir_pack_snorm_2x16(&b, srcs[0]);
1539 break;
1540 case ir_unop_pack_snorm_4x8:
1541 result = nir_pack_snorm_4x8(&b, srcs[0]);
1542 break;
1543 case ir_unop_pack_unorm_2x16:
1544 result = nir_pack_unorm_2x16(&b, srcs[0]);
1545 break;
1546 case ir_unop_pack_unorm_4x8:
1547 result = nir_pack_unorm_4x8(&b, srcs[0]);
1548 break;
1549 case ir_unop_pack_half_2x16:
1550 result = nir_pack_half_2x16(&b, srcs[0]);
1551 break;
1552 case ir_unop_unpack_snorm_2x16:
1553 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1554 break;
1555 case ir_unop_unpack_snorm_4x8:
1556 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1557 break;
1558 case ir_unop_unpack_unorm_2x16:
1559 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1560 break;
1561 case ir_unop_unpack_unorm_4x8:
1562 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1563 break;
1564 case ir_unop_unpack_half_2x16:
1565 result = nir_unpack_half_2x16(&b, srcs[0]);
1566 break;
1567 case ir_unop_pack_double_2x32:
1568 case ir_unop_pack_int_2x32:
1569 case ir_unop_pack_uint_2x32:
1570 result = nir_pack_64_2x32(&b, srcs[0]);
1571 break;
1572 case ir_unop_unpack_double_2x32:
1573 case ir_unop_unpack_int_2x32:
1574 case ir_unop_unpack_uint_2x32:
1575 result = nir_unpack_64_2x32(&b, srcs[0]);
1576 break;
1577 case ir_unop_bitfield_reverse:
1578 result = nir_bitfield_reverse(&b, srcs[0]);
1579 break;
1580 case ir_unop_bit_count:
1581 result = nir_bit_count(&b, srcs[0]);
1582 break;
1583 case ir_unop_find_msb:
1584 switch (types[0]) {
1585 case GLSL_TYPE_UINT:
1586 result = nir_ufind_msb(&b, srcs[0]);
1587 break;
1588 case GLSL_TYPE_INT:
1589 result = nir_ifind_msb(&b, srcs[0]);
1590 break;
1591 default:
1592 unreachable("Invalid type for findMSB()");
1593 }
1594 break;
1595 case ir_unop_find_lsb:
1596 result = nir_find_lsb(&b, srcs[0]);
1597 break;
1598
1599 case ir_unop_noise:
1600 switch (ir->type->vector_elements) {
1601 case 1:
1602 switch (ir->operands[0]->type->vector_elements) {
1603 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1604 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1605 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1606 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1607 default: unreachable("not reached");
1608 }
1609 break;
1610 case 2:
1611 switch (ir->operands[0]->type->vector_elements) {
1612 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1613 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1614 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1615 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1616 default: unreachable("not reached");
1617 }
1618 break;
1619 case 3:
1620 switch (ir->operands[0]->type->vector_elements) {
1621 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1622 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1623 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1624 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1625 default: unreachable("not reached");
1626 }
1627 break;
1628 case 4:
1629 switch (ir->operands[0]->type->vector_elements) {
1630 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1631 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1632 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1633 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1634 default: unreachable("not reached");
1635 }
1636 break;
1637 default:
1638 unreachable("not reached");
1639 }
1640 break;
1641 case ir_unop_get_buffer_size: {
1642 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1643 this->shader,
1644 nir_intrinsic_get_buffer_size);
1645 load->num_components = ir->type->vector_elements;
1646 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1647 unsigned bit_size = glsl_get_bit_size(ir->type);
1648 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1649 return;
1650 }
1651
1652 case ir_binop_add:
1653 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1654 : nir_iadd(&b, srcs[0], srcs[1]);
1655 break;
1656 case ir_binop_sub:
1657 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1658 : nir_isub(&b, srcs[0], srcs[1]);
1659 break;
1660 case ir_binop_mul:
1661 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1662 : nir_imul(&b, srcs[0], srcs[1]);
1663 break;
1664 case ir_binop_div:
1665 if (type_is_float(out_type))
1666 result = nir_fdiv(&b, srcs[0], srcs[1]);
1667 else if (type_is_signed(out_type))
1668 result = nir_idiv(&b, srcs[0], srcs[1]);
1669 else
1670 result = nir_udiv(&b, srcs[0], srcs[1]);
1671 break;
1672 case ir_binop_mod:
1673 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1674 : nir_umod(&b, srcs[0], srcs[1]);
1675 break;
1676 case ir_binop_min:
1677 if (type_is_float(out_type))
1678 result = nir_fmin(&b, srcs[0], srcs[1]);
1679 else if (type_is_signed(out_type))
1680 result = nir_imin(&b, srcs[0], srcs[1]);
1681 else
1682 result = nir_umin(&b, srcs[0], srcs[1]);
1683 break;
1684 case ir_binop_max:
1685 if (type_is_float(out_type))
1686 result = nir_fmax(&b, srcs[0], srcs[1]);
1687 else if (type_is_signed(out_type))
1688 result = nir_imax(&b, srcs[0], srcs[1]);
1689 else
1690 result = nir_umax(&b, srcs[0], srcs[1]);
1691 break;
1692 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1693 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1694 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1695 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1696 case ir_binop_logic_and:
1697 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1698 : nir_fand(&b, srcs[0], srcs[1]);
1699 break;
1700 case ir_binop_logic_or:
1701 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1702 : nir_for(&b, srcs[0], srcs[1]);
1703 break;
1704 case ir_binop_logic_xor:
1705 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1706 : nir_fxor(&b, srcs[0], srcs[1]);
1707 break;
1708 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1709 case ir_binop_rshift:
1710 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1711 : nir_ushr(&b, srcs[0], srcs[1]);
1712 break;
1713 case ir_binop_imul_high:
1714 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1715 : nir_umul_high(&b, srcs[0], srcs[1]);
1716 break;
1717 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1718 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1719 case ir_binop_less:
1720 if (supports_ints) {
1721 if (type_is_float(types[0]))
1722 result = nir_flt(&b, srcs[0], srcs[1]);
1723 else if (type_is_signed(types[0]))
1724 result = nir_ilt(&b, srcs[0], srcs[1]);
1725 else
1726 result = nir_ult(&b, srcs[0], srcs[1]);
1727 } else {
1728 result = nir_slt(&b, srcs[0], srcs[1]);
1729 }
1730 break;
1731 case ir_binop_greater:
1732 if (supports_ints) {
1733 if (type_is_float(types[0]))
1734 result = nir_flt(&b, srcs[1], srcs[0]);
1735 else if (type_is_signed(types[0]))
1736 result = nir_ilt(&b, srcs[1], srcs[0]);
1737 else
1738 result = nir_ult(&b, srcs[1], srcs[0]);
1739 } else {
1740 result = nir_slt(&b, srcs[1], srcs[0]);
1741 }
1742 break;
1743 case ir_binop_lequal:
1744 if (supports_ints) {
1745 if (type_is_float(types[0]))
1746 result = nir_fge(&b, srcs[1], srcs[0]);
1747 else if (type_is_signed(types[0]))
1748 result = nir_ige(&b, srcs[1], srcs[0]);
1749 else
1750 result = nir_uge(&b, srcs[1], srcs[0]);
1751 } else {
1752 result = nir_slt(&b, srcs[1], srcs[0]);
1753 }
1754 break;
1755 case ir_binop_gequal:
1756 if (supports_ints) {
1757 if (type_is_float(types[0]))
1758 result = nir_fge(&b, srcs[0], srcs[1]);
1759 else if (type_is_signed(types[0]))
1760 result = nir_ige(&b, srcs[0], srcs[1]);
1761 else
1762 result = nir_uge(&b, srcs[0], srcs[1]);
1763 } else {
1764 result = nir_slt(&b, srcs[0], srcs[1]);
1765 }
1766 break;
1767 case ir_binop_equal:
1768 if (supports_ints) {
1769 if (type_is_float(types[0]))
1770 result = nir_feq(&b, srcs[0], srcs[1]);
1771 else
1772 result = nir_ieq(&b, srcs[0], srcs[1]);
1773 } else {
1774 result = nir_seq(&b, srcs[0], srcs[1]);
1775 }
1776 break;
1777 case ir_binop_nequal:
1778 if (supports_ints) {
1779 if (type_is_float(types[0]))
1780 result = nir_fne(&b, srcs[0], srcs[1]);
1781 else
1782 result = nir_ine(&b, srcs[0], srcs[1]);
1783 } else {
1784 result = nir_sne(&b, srcs[0], srcs[1]);
1785 }
1786 break;
1787 case ir_binop_all_equal:
1788 if (supports_ints) {
1789 if (type_is_float(types[0])) {
1790 switch (ir->operands[0]->type->vector_elements) {
1791 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1792 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1793 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1794 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1795 default:
1796 unreachable("not reached");
1797 }
1798 } else {
1799 switch (ir->operands[0]->type->vector_elements) {
1800 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1801 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1802 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1803 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1804 default:
1805 unreachable("not reached");
1806 }
1807 }
1808 } else {
1809 switch (ir->operands[0]->type->vector_elements) {
1810 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1811 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1812 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1813 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1814 default:
1815 unreachable("not reached");
1816 }
1817 }
1818 break;
1819 case ir_binop_any_nequal:
1820 if (supports_ints) {
1821 if (type_is_float(types[0])) {
1822 switch (ir->operands[0]->type->vector_elements) {
1823 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1824 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1825 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1826 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1827 default:
1828 unreachable("not reached");
1829 }
1830 } else {
1831 switch (ir->operands[0]->type->vector_elements) {
1832 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1833 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1834 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1835 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1836 default:
1837 unreachable("not reached");
1838 }
1839 }
1840 } else {
1841 switch (ir->operands[0]->type->vector_elements) {
1842 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1843 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1844 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1845 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1846 default:
1847 unreachable("not reached");
1848 }
1849 }
1850 break;
1851 case ir_binop_dot:
1852 switch (ir->operands[0]->type->vector_elements) {
1853 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1854 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1855 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1856 default:
1857 unreachable("not reached");
1858 }
1859 break;
1860
1861 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1862 case ir_triop_fma:
1863 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1864 break;
1865 case ir_triop_lrp:
1866 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1867 break;
1868 case ir_triop_csel:
1869 if (supports_ints)
1870 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1871 else
1872 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1873 break;
1874 case ir_triop_bitfield_extract:
1875 result = (out_type == GLSL_TYPE_INT) ?
1876 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1877 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1878 break;
1879 case ir_quadop_bitfield_insert:
1880 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1881 break;
1882 case ir_quadop_vector:
1883 result = nir_vec(&b, srcs, ir->type->vector_elements);
1884 break;
1885
1886 default:
1887 unreachable("not reached");
1888 }
1889 }
1890
1891 void
1892 nir_visitor::visit(ir_swizzle *ir)
1893 {
1894 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1895 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1896 ir->type->vector_elements, !supports_ints);
1897 }
1898
1899 void
1900 nir_visitor::visit(ir_texture *ir)
1901 {
1902 unsigned num_srcs;
1903 nir_texop op;
1904 switch (ir->op) {
1905 case ir_tex:
1906 op = nir_texop_tex;
1907 num_srcs = 1; /* coordinate */
1908 break;
1909
1910 case ir_txb:
1911 case ir_txl:
1912 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1913 num_srcs = 2; /* coordinate, bias/lod */
1914 break;
1915
1916 case ir_txd:
1917 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1918 num_srcs = 3;
1919 break;
1920
1921 case ir_txf:
1922 op = nir_texop_txf;
1923 if (ir->lod_info.lod != NULL)
1924 num_srcs = 2; /* coordinate, lod */
1925 else
1926 num_srcs = 1; /* coordinate */
1927 break;
1928
1929 case ir_txf_ms:
1930 op = nir_texop_txf_ms;
1931 num_srcs = 2; /* coordinate, sample_index */
1932 break;
1933
1934 case ir_txs:
1935 op = nir_texop_txs;
1936 if (ir->lod_info.lod != NULL)
1937 num_srcs = 1; /* lod */
1938 else
1939 num_srcs = 0;
1940 break;
1941
1942 case ir_lod:
1943 op = nir_texop_lod;
1944 num_srcs = 1; /* coordinate */
1945 break;
1946
1947 case ir_tg4:
1948 op = nir_texop_tg4;
1949 num_srcs = 1; /* coordinate */
1950 break;
1951
1952 case ir_query_levels:
1953 op = nir_texop_query_levels;
1954 num_srcs = 0;
1955 break;
1956
1957 case ir_texture_samples:
1958 op = nir_texop_texture_samples;
1959 num_srcs = 0;
1960 break;
1961
1962 case ir_samples_identical:
1963 op = nir_texop_samples_identical;
1964 num_srcs = 1; /* coordinate */
1965 break;
1966
1967 default:
1968 unreachable("not reached");
1969 }
1970
1971 if (ir->projector != NULL)
1972 num_srcs++;
1973 if (ir->shadow_comparator != NULL)
1974 num_srcs++;
1975 if (ir->offset != NULL)
1976 num_srcs++;
1977
1978 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
1979
1980 instr->op = op;
1981 instr->sampler_dim =
1982 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
1983 instr->is_array = ir->sampler->type->sampler_array;
1984 instr->is_shadow = ir->sampler->type->sampler_shadow;
1985 if (instr->is_shadow)
1986 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
1987 switch (ir->type->base_type) {
1988 case GLSL_TYPE_FLOAT:
1989 instr->dest_type = nir_type_float;
1990 break;
1991 case GLSL_TYPE_INT:
1992 instr->dest_type = nir_type_int;
1993 break;
1994 case GLSL_TYPE_BOOL:
1995 case GLSL_TYPE_UINT:
1996 instr->dest_type = nir_type_uint;
1997 break;
1998 default:
1999 unreachable("not reached");
2000 }
2001
2002 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2003
2004 unsigned src_number = 0;
2005
2006 if (ir->coordinate != NULL) {
2007 instr->coord_components = ir->coordinate->type->vector_elements;
2008 instr->src[src_number].src =
2009 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2010 instr->src[src_number].src_type = nir_tex_src_coord;
2011 src_number++;
2012 }
2013
2014 if (ir->projector != NULL) {
2015 instr->src[src_number].src =
2016 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2017 instr->src[src_number].src_type = nir_tex_src_projector;
2018 src_number++;
2019 }
2020
2021 if (ir->shadow_comparator != NULL) {
2022 instr->src[src_number].src =
2023 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2024 instr->src[src_number].src_type = nir_tex_src_comparator;
2025 src_number++;
2026 }
2027
2028 if (ir->offset != NULL) {
2029 /* we don't support multiple offsets yet */
2030 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2031
2032 instr->src[src_number].src =
2033 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2034 instr->src[src_number].src_type = nir_tex_src_offset;
2035 src_number++;
2036 }
2037
2038 switch (ir->op) {
2039 case ir_txb:
2040 instr->src[src_number].src =
2041 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2042 instr->src[src_number].src_type = nir_tex_src_bias;
2043 src_number++;
2044 break;
2045
2046 case ir_txl:
2047 case ir_txf:
2048 case ir_txs:
2049 if (ir->lod_info.lod != NULL) {
2050 instr->src[src_number].src =
2051 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2052 instr->src[src_number].src_type = nir_tex_src_lod;
2053 src_number++;
2054 }
2055 break;
2056
2057 case ir_txd:
2058 instr->src[src_number].src =
2059 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2060 instr->src[src_number].src_type = nir_tex_src_ddx;
2061 src_number++;
2062 instr->src[src_number].src =
2063 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2064 instr->src[src_number].src_type = nir_tex_src_ddy;
2065 src_number++;
2066 break;
2067
2068 case ir_txf_ms:
2069 instr->src[src_number].src =
2070 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2071 instr->src[src_number].src_type = nir_tex_src_ms_index;
2072 src_number++;
2073 break;
2074
2075 case ir_tg4:
2076 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2077 break;
2078
2079 default:
2080 break;
2081 }
2082
2083 assert(src_number == num_srcs);
2084
2085 unsigned bit_size = glsl_get_bit_size(ir->type);
2086 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2087 }
2088
2089 void
2090 nir_visitor::visit(ir_constant *ir)
2091 {
2092 /*
2093 * We don't know if this variable is an array or struct that gets
2094 * dereferenced, so do the safe thing an make it a variable with a
2095 * constant initializer and return a dereference.
2096 */
2097
2098 nir_variable *var =
2099 nir_local_variable_create(this->impl, ir->type, "const_temp");
2100 var->data.read_only = true;
2101 var->constant_initializer = constant_copy(ir, var);
2102
2103 this->deref_head = nir_deref_var_create(this->shader, var);
2104 this->deref_tail = &this->deref_head->deref;
2105 }
2106
2107 void
2108 nir_visitor::visit(ir_dereference_variable *ir)
2109 {
2110 struct hash_entry *entry =
2111 _mesa_hash_table_search(this->var_table, ir->var);
2112 assert(entry);
2113 nir_variable *var = (nir_variable *) entry->data;
2114
2115 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2116 this->deref_head = deref;
2117 this->deref_tail = &deref->deref;
2118 }
2119
2120 void
2121 nir_visitor::visit(ir_dereference_record *ir)
2122 {
2123 ir->record->accept(this);
2124
2125 int field_index = this->deref_tail->type->field_index(ir->field);
2126 assert(field_index >= 0);
2127
2128 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2129 deref->deref.type = ir->type;
2130 this->deref_tail->child = &deref->deref;
2131 this->deref_tail = &deref->deref;
2132 }
2133
2134 void
2135 nir_visitor::visit(ir_dereference_array *ir)
2136 {
2137 nir_deref_array *deref = nir_deref_array_create(this->shader);
2138 deref->deref.type = ir->type;
2139
2140 ir_constant *const_index = ir->array_index->as_constant();
2141 if (const_index != NULL) {
2142 deref->deref_array_type = nir_deref_array_type_direct;
2143 deref->base_offset = const_index->value.u[0];
2144 } else {
2145 deref->deref_array_type = nir_deref_array_type_indirect;
2146 deref->indirect =
2147 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2148 }
2149
2150 ir->array->accept(this);
2151
2152 this->deref_tail->child = &deref->deref;
2153 ralloc_steal(this->deref_tail, deref);
2154 this->deref_tail = &deref->deref;
2155 }
2156
2157 void
2158 nir_visitor::visit(ir_barrier *)
2159 {
2160 nir_intrinsic_instr *instr =
2161 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2162 nir_builder_instr_insert(&b, &instr->instr);
2163 }