compiler: Move double_inputs to gl_program::DualSlotInputs
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_instr *evaluate_deref(ir_instruction *ir);
95
96 /* most recent deref instruction created */
97 nir_deref_instr *deref;
98
99 nir_variable *var; /* variable created by ir_variable visitor */
100
101 /* whether the IR we're operating on is per-function or global */
102 bool is_global;
103
104 /* map of ir_variable -> nir_variable */
105 struct hash_table *var_table;
106
107 /* map of ir_function_signature -> nir_function_overload */
108 struct hash_table *overload_table;
109 };
110
111 /*
112 * This visitor runs before the main visitor, calling create_function() for
113 * each function so that the main visitor can resolve forward references in
114 * calls.
115 */
116
117 class nir_function_visitor : public ir_hierarchical_visitor
118 {
119 public:
120 nir_function_visitor(nir_visitor *v) : visitor(v)
121 {
122 }
123 virtual ir_visitor_status visit_enter(ir_function *);
124
125 private:
126 nir_visitor *visitor;
127 };
128
129 } /* end of anonymous namespace */
130
131 nir_shader *
132 glsl_to_nir(const struct gl_shader_program *shader_prog,
133 gl_shader_stage stage,
134 const nir_shader_compiler_options *options)
135 {
136 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
137
138 nir_shader *shader = nir_shader_create(NULL, stage, options,
139 &sh->Program->info);
140
141 nir_visitor v1(shader);
142 nir_function_visitor v2(&v1);
143 v2.run(sh->ir);
144 visit_exec_list(sh->ir, &v1);
145
146 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
147
148 /* Remap the locations to slots so those requiring two slots will occupy
149 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
150 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
151 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
152 if (shader->info.stage == MESA_SHADER_VERTEX) {
153 sh->Program->DualSlotInputs = nir_get_dual_slot_attributes(shader);
154 if (options->vs_inputs_dual_locations)
155 nir_remap_dual_slot_attributes(shader, sh->Program->DualSlotInputs);
156 }
157
158 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
159 if (shader_prog->Label)
160 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
161
162 /* Check for transform feedback varyings specified via the API */
163 shader->info.has_transform_feedback_varyings =
164 shader_prog->TransformFeedback.NumVarying > 0;
165
166 /* Check for transform feedback varyings specified in the Shader */
167 if (shader_prog->last_vert_prog)
168 shader->info.has_transform_feedback_varyings |=
169 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
170
171 return shader;
172 }
173
174 nir_visitor::nir_visitor(nir_shader *shader)
175 {
176 this->supports_ints = shader->options->native_integers;
177 this->shader = shader;
178 this->is_global = true;
179 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
180 _mesa_key_pointer_equal);
181 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
182 _mesa_key_pointer_equal);
183 this->result = NULL;
184 this->impl = NULL;
185 this->var = NULL;
186 memset(&this->b, 0, sizeof(this->b));
187 }
188
189 nir_visitor::~nir_visitor()
190 {
191 _mesa_hash_table_destroy(this->var_table, NULL);
192 _mesa_hash_table_destroy(this->overload_table, NULL);
193 }
194
195 nir_deref_instr *
196 nir_visitor::evaluate_deref(ir_instruction *ir)
197 {
198 ir->accept(this);
199 return this->deref;
200 }
201
202 static nir_constant *
203 constant_copy(ir_constant *ir, void *mem_ctx)
204 {
205 if (ir == NULL)
206 return NULL;
207
208 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
209
210 const unsigned rows = ir->type->vector_elements;
211 const unsigned cols = ir->type->matrix_columns;
212 unsigned i;
213
214 ret->num_elements = 0;
215 switch (ir->type->base_type) {
216 case GLSL_TYPE_UINT:
217 /* Only float base types can be matrices. */
218 assert(cols == 1);
219
220 for (unsigned r = 0; r < rows; r++)
221 ret->values[0].u32[r] = ir->value.u[r];
222
223 break;
224
225 case GLSL_TYPE_INT:
226 /* Only float base types can be matrices. */
227 assert(cols == 1);
228
229 for (unsigned r = 0; r < rows; r++)
230 ret->values[0].i32[r] = ir->value.i[r];
231
232 break;
233
234 case GLSL_TYPE_FLOAT:
235 for (unsigned c = 0; c < cols; c++) {
236 for (unsigned r = 0; r < rows; r++)
237 ret->values[c].f32[r] = ir->value.f[c * rows + r];
238 }
239 break;
240
241 case GLSL_TYPE_DOUBLE:
242 for (unsigned c = 0; c < cols; c++) {
243 for (unsigned r = 0; r < rows; r++)
244 ret->values[c].f64[r] = ir->value.d[c * rows + r];
245 }
246 break;
247
248 case GLSL_TYPE_UINT64:
249 /* Only float base types can be matrices. */
250 assert(cols == 1);
251
252 for (unsigned r = 0; r < rows; r++)
253 ret->values[0].u64[r] = ir->value.u64[r];
254 break;
255
256 case GLSL_TYPE_INT64:
257 /* Only float base types can be matrices. */
258 assert(cols == 1);
259
260 for (unsigned r = 0; r < rows; r++)
261 ret->values[0].i64[r] = ir->value.i64[r];
262 break;
263
264 case GLSL_TYPE_BOOL:
265 /* Only float base types can be matrices. */
266 assert(cols == 1);
267
268 for (unsigned r = 0; r < rows; r++)
269 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
270
271 break;
272
273 case GLSL_TYPE_STRUCT:
274 case GLSL_TYPE_ARRAY:
275 ret->elements = ralloc_array(mem_ctx, nir_constant *,
276 ir->type->length);
277 ret->num_elements = ir->type->length;
278
279 for (i = 0; i < ir->type->length; i++)
280 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
281 break;
282
283 default:
284 unreachable("not reached");
285 }
286
287 return ret;
288 }
289
290 void
291 nir_visitor::visit(ir_variable *ir)
292 {
293 /* TODO: In future we should switch to using the NIR lowering pass but for
294 * now just ignore these variables as GLSL IR should have lowered them.
295 * Anything remaining are just dead vars that weren't cleaned up.
296 */
297 if (ir->data.mode == ir_var_shader_shared)
298 return;
299
300 nir_variable *var = rzalloc(shader, nir_variable);
301 var->type = ir->type;
302 var->name = ralloc_strdup(var, ir->name);
303
304 var->data.always_active_io = ir->data.always_active_io;
305 var->data.read_only = ir->data.read_only;
306 var->data.centroid = ir->data.centroid;
307 var->data.sample = ir->data.sample;
308 var->data.patch = ir->data.patch;
309 var->data.invariant = ir->data.invariant;
310 var->data.location = ir->data.location;
311 var->data.stream = ir->data.stream;
312 var->data.compact = false;
313
314 switch(ir->data.mode) {
315 case ir_var_auto:
316 case ir_var_temporary:
317 if (is_global)
318 var->data.mode = nir_var_global;
319 else
320 var->data.mode = nir_var_local;
321 break;
322
323 case ir_var_function_in:
324 case ir_var_function_out:
325 case ir_var_function_inout:
326 case ir_var_const_in:
327 var->data.mode = nir_var_local;
328 break;
329
330 case ir_var_shader_in:
331 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
332 ir->data.location == VARYING_SLOT_FACE) {
333 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
334 var->data.location = SYSTEM_VALUE_FRONT_FACE;
335 var->data.mode = nir_var_system_value;
336 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
337 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
338 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
339 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
340 var->data.mode = nir_var_system_value;
341 } else {
342 var->data.mode = nir_var_shader_in;
343
344 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
345 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
346 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
347 var->data.compact = ir->type->without_array()->is_scalar();
348 }
349 }
350 break;
351
352 case ir_var_shader_out:
353 var->data.mode = nir_var_shader_out;
354 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
355 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
356 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
357 var->data.compact = ir->type->without_array()->is_scalar();
358 }
359 break;
360
361 case ir_var_uniform:
362 var->data.mode = nir_var_uniform;
363 break;
364
365 case ir_var_shader_storage:
366 var->data.mode = nir_var_shader_storage;
367 break;
368
369 case ir_var_system_value:
370 var->data.mode = nir_var_system_value;
371 break;
372
373 default:
374 unreachable("not reached");
375 }
376
377 var->data.interpolation = ir->data.interpolation;
378 var->data.origin_upper_left = ir->data.origin_upper_left;
379 var->data.pixel_center_integer = ir->data.pixel_center_integer;
380 var->data.location_frac = ir->data.location_frac;
381
382 if (var->data.pixel_center_integer) {
383 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
384 shader->info.fs.pixel_center_integer = true;
385 }
386
387 switch (ir->data.depth_layout) {
388 case ir_depth_layout_none:
389 var->data.depth_layout = nir_depth_layout_none;
390 break;
391 case ir_depth_layout_any:
392 var->data.depth_layout = nir_depth_layout_any;
393 break;
394 case ir_depth_layout_greater:
395 var->data.depth_layout = nir_depth_layout_greater;
396 break;
397 case ir_depth_layout_less:
398 var->data.depth_layout = nir_depth_layout_less;
399 break;
400 case ir_depth_layout_unchanged:
401 var->data.depth_layout = nir_depth_layout_unchanged;
402 break;
403 default:
404 unreachable("not reached");
405 }
406
407 var->data.index = ir->data.index;
408 var->data.descriptor_set = 0;
409 var->data.binding = ir->data.binding;
410 var->data.explicit_binding = ir->data.explicit_binding;
411 var->data.bindless = ir->data.bindless;
412 var->data.offset = ir->data.offset;
413
414 unsigned image_access = 0;
415 if (ir->data.memory_read_only)
416 image_access |= ACCESS_NON_WRITEABLE;
417 if (ir->data.memory_write_only)
418 image_access |= ACCESS_NON_READABLE;
419 if (ir->data.memory_coherent)
420 image_access |= ACCESS_COHERENT;
421 if (ir->data.memory_volatile)
422 image_access |= ACCESS_VOLATILE;
423 if (ir->data.memory_restrict)
424 image_access |= ACCESS_RESTRICT;
425 var->data.image.access = (gl_access_qualifier)image_access;
426 var->data.image.format = ir->data.image_format;
427
428 var->data.fb_fetch_output = ir->data.fb_fetch_output;
429 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
430 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
431 var->data.xfb_buffer = ir->data.xfb_buffer;
432 var->data.xfb_stride = ir->data.xfb_stride;
433
434 var->num_state_slots = ir->get_num_state_slots();
435 if (var->num_state_slots > 0) {
436 var->state_slots = rzalloc_array(var, nir_state_slot,
437 var->num_state_slots);
438
439 ir_state_slot *state_slots = ir->get_state_slots();
440 for (unsigned i = 0; i < var->num_state_slots; i++) {
441 for (unsigned j = 0; j < 5; j++)
442 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
443 var->state_slots[i].swizzle = state_slots[i].swizzle;
444 }
445 } else {
446 var->state_slots = NULL;
447 }
448
449 var->constant_initializer = constant_copy(ir->constant_initializer, var);
450
451 var->interface_type = ir->get_interface_type();
452
453 if (var->data.mode == nir_var_local)
454 nir_function_impl_add_variable(impl, var);
455 else
456 nir_shader_add_variable(shader, var);
457
458 _mesa_hash_table_insert(var_table, ir, var);
459 this->var = var;
460 }
461
462 ir_visitor_status
463 nir_function_visitor::visit_enter(ir_function *ir)
464 {
465 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
466 visitor->create_function(sig);
467 }
468 return visit_continue_with_parent;
469 }
470
471 void
472 nir_visitor::create_function(ir_function_signature *ir)
473 {
474 if (ir->is_intrinsic())
475 return;
476
477 nir_function *func = nir_function_create(shader, ir->function_name());
478
479 assert(ir->parameters.is_empty());
480 assert(ir->return_type == glsl_type::void_type);
481
482 _mesa_hash_table_insert(this->overload_table, ir, func);
483 }
484
485 void
486 nir_visitor::visit(ir_function *ir)
487 {
488 foreach_in_list(ir_function_signature, sig, &ir->signatures)
489 sig->accept(this);
490 }
491
492 void
493 nir_visitor::visit(ir_function_signature *ir)
494 {
495 if (ir->is_intrinsic())
496 return;
497
498 struct hash_entry *entry =
499 _mesa_hash_table_search(this->overload_table, ir);
500
501 assert(entry);
502 nir_function *func = (nir_function *) entry->data;
503
504 if (ir->is_defined) {
505 nir_function_impl *impl = nir_function_impl_create(func);
506 this->impl = impl;
507
508 assert(strcmp(func->name, "main") == 0);
509 assert(ir->parameters.is_empty());
510
511 this->is_global = false;
512
513 nir_builder_init(&b, impl);
514 b.cursor = nir_after_cf_list(&impl->body);
515 visit_exec_list(&ir->body, this);
516
517 this->is_global = true;
518 } else {
519 func->impl = NULL;
520 }
521 }
522
523 void
524 nir_visitor::visit(ir_loop *ir)
525 {
526 nir_push_loop(&b);
527 visit_exec_list(&ir->body_instructions, this);
528 nir_pop_loop(&b, NULL);
529 }
530
531 void
532 nir_visitor::visit(ir_if *ir)
533 {
534 nir_push_if(&b, evaluate_rvalue(ir->condition));
535 visit_exec_list(&ir->then_instructions, this);
536 nir_push_else(&b, NULL);
537 visit_exec_list(&ir->else_instructions, this);
538 nir_pop_if(&b, NULL);
539 }
540
541 void
542 nir_visitor::visit(ir_discard *ir)
543 {
544 /*
545 * discards aren't treated as control flow, because before we lower them
546 * they can appear anywhere in the shader and the stuff after them may still
547 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
548 * discards will be immediately followed by a return.
549 */
550
551 nir_intrinsic_instr *discard;
552 if (ir->condition) {
553 discard = nir_intrinsic_instr_create(this->shader,
554 nir_intrinsic_discard_if);
555 discard->src[0] =
556 nir_src_for_ssa(evaluate_rvalue(ir->condition));
557 } else {
558 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
559 }
560
561 nir_builder_instr_insert(&b, &discard->instr);
562 }
563
564 void
565 nir_visitor::visit(ir_emit_vertex *ir)
566 {
567 nir_intrinsic_instr *instr =
568 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
569 nir_intrinsic_set_stream_id(instr, ir->stream_id());
570 nir_builder_instr_insert(&b, &instr->instr);
571 }
572
573 void
574 nir_visitor::visit(ir_end_primitive *ir)
575 {
576 nir_intrinsic_instr *instr =
577 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
578 nir_intrinsic_set_stream_id(instr, ir->stream_id());
579 nir_builder_instr_insert(&b, &instr->instr);
580 }
581
582 void
583 nir_visitor::visit(ir_loop_jump *ir)
584 {
585 nir_jump_type type;
586 switch (ir->mode) {
587 case ir_loop_jump::jump_break:
588 type = nir_jump_break;
589 break;
590 case ir_loop_jump::jump_continue:
591 type = nir_jump_continue;
592 break;
593 default:
594 unreachable("not reached");
595 }
596
597 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
598 nir_builder_instr_insert(&b, &instr->instr);
599 }
600
601 void
602 nir_visitor::visit(ir_return *ir)
603 {
604 assert(ir->value == NULL);
605 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
606 nir_builder_instr_insert(&b, &instr->instr);
607 }
608
609 void
610 nir_visitor::visit(ir_call *ir)
611 {
612 if (ir->callee->is_intrinsic()) {
613 nir_intrinsic_op op;
614
615 switch (ir->callee->intrinsic_id) {
616 case ir_intrinsic_atomic_counter_read:
617 op = nir_intrinsic_atomic_counter_read_deref;
618 break;
619 case ir_intrinsic_atomic_counter_increment:
620 op = nir_intrinsic_atomic_counter_inc_deref;
621 break;
622 case ir_intrinsic_atomic_counter_predecrement:
623 op = nir_intrinsic_atomic_counter_pre_dec_deref;
624 break;
625 case ir_intrinsic_atomic_counter_add:
626 op = nir_intrinsic_atomic_counter_add_deref;
627 break;
628 case ir_intrinsic_atomic_counter_and:
629 op = nir_intrinsic_atomic_counter_and_deref;
630 break;
631 case ir_intrinsic_atomic_counter_or:
632 op = nir_intrinsic_atomic_counter_or_deref;
633 break;
634 case ir_intrinsic_atomic_counter_xor:
635 op = nir_intrinsic_atomic_counter_xor_deref;
636 break;
637 case ir_intrinsic_atomic_counter_min:
638 op = nir_intrinsic_atomic_counter_min_deref;
639 break;
640 case ir_intrinsic_atomic_counter_max:
641 op = nir_intrinsic_atomic_counter_max_deref;
642 break;
643 case ir_intrinsic_atomic_counter_exchange:
644 op = nir_intrinsic_atomic_counter_exchange_deref;
645 break;
646 case ir_intrinsic_atomic_counter_comp_swap:
647 op = nir_intrinsic_atomic_counter_comp_swap_deref;
648 break;
649 case ir_intrinsic_image_load:
650 op = nir_intrinsic_image_deref_load;
651 break;
652 case ir_intrinsic_image_store:
653 op = nir_intrinsic_image_deref_store;
654 break;
655 case ir_intrinsic_image_atomic_add:
656 op = ir->return_deref->type->is_integer_32_64()
657 ? nir_intrinsic_image_deref_atomic_add
658 : nir_intrinsic_image_deref_atomic_fadd;
659 break;
660 case ir_intrinsic_image_atomic_min:
661 op = nir_intrinsic_image_deref_atomic_min;
662 break;
663 case ir_intrinsic_image_atomic_max:
664 op = nir_intrinsic_image_deref_atomic_max;
665 break;
666 case ir_intrinsic_image_atomic_and:
667 op = nir_intrinsic_image_deref_atomic_and;
668 break;
669 case ir_intrinsic_image_atomic_or:
670 op = nir_intrinsic_image_deref_atomic_or;
671 break;
672 case ir_intrinsic_image_atomic_xor:
673 op = nir_intrinsic_image_deref_atomic_xor;
674 break;
675 case ir_intrinsic_image_atomic_exchange:
676 op = nir_intrinsic_image_deref_atomic_exchange;
677 break;
678 case ir_intrinsic_image_atomic_comp_swap:
679 op = nir_intrinsic_image_deref_atomic_comp_swap;
680 break;
681 case ir_intrinsic_memory_barrier:
682 op = nir_intrinsic_memory_barrier;
683 break;
684 case ir_intrinsic_image_size:
685 op = nir_intrinsic_image_deref_size;
686 break;
687 case ir_intrinsic_image_samples:
688 op = nir_intrinsic_image_deref_samples;
689 break;
690 case ir_intrinsic_ssbo_store:
691 op = nir_intrinsic_store_ssbo;
692 break;
693 case ir_intrinsic_ssbo_load:
694 op = nir_intrinsic_load_ssbo;
695 break;
696 case ir_intrinsic_ssbo_atomic_add:
697 op = ir->return_deref->type->is_integer_32_64()
698 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
699 break;
700 case ir_intrinsic_ssbo_atomic_and:
701 op = nir_intrinsic_ssbo_atomic_and;
702 break;
703 case ir_intrinsic_ssbo_atomic_or:
704 op = nir_intrinsic_ssbo_atomic_or;
705 break;
706 case ir_intrinsic_ssbo_atomic_xor:
707 op = nir_intrinsic_ssbo_atomic_xor;
708 break;
709 case ir_intrinsic_ssbo_atomic_min:
710 assert(ir->return_deref);
711 if (ir->return_deref->type == glsl_type::int_type)
712 op = nir_intrinsic_ssbo_atomic_imin;
713 else if (ir->return_deref->type == glsl_type::uint_type)
714 op = nir_intrinsic_ssbo_atomic_umin;
715 else if (ir->return_deref->type == glsl_type::float_type)
716 op = nir_intrinsic_ssbo_atomic_fmin;
717 else
718 unreachable("Invalid type");
719 break;
720 case ir_intrinsic_ssbo_atomic_max:
721 assert(ir->return_deref);
722 if (ir->return_deref->type == glsl_type::int_type)
723 op = nir_intrinsic_ssbo_atomic_imax;
724 else if (ir->return_deref->type == glsl_type::uint_type)
725 op = nir_intrinsic_ssbo_atomic_umax;
726 else if (ir->return_deref->type == glsl_type::float_type)
727 op = nir_intrinsic_ssbo_atomic_fmax;
728 else
729 unreachable("Invalid type");
730 break;
731 case ir_intrinsic_ssbo_atomic_exchange:
732 op = nir_intrinsic_ssbo_atomic_exchange;
733 break;
734 case ir_intrinsic_ssbo_atomic_comp_swap:
735 op = ir->return_deref->type->is_integer_32_64()
736 ? nir_intrinsic_ssbo_atomic_comp_swap
737 : nir_intrinsic_ssbo_atomic_fcomp_swap;
738 break;
739 case ir_intrinsic_shader_clock:
740 op = nir_intrinsic_shader_clock;
741 break;
742 case ir_intrinsic_begin_invocation_interlock:
743 op = nir_intrinsic_begin_invocation_interlock;
744 break;
745 case ir_intrinsic_end_invocation_interlock:
746 op = nir_intrinsic_end_invocation_interlock;
747 break;
748 case ir_intrinsic_begin_fragment_shader_ordering:
749 op = nir_intrinsic_begin_fragment_shader_ordering;
750 break;
751 case ir_intrinsic_group_memory_barrier:
752 op = nir_intrinsic_group_memory_barrier;
753 break;
754 case ir_intrinsic_memory_barrier_atomic_counter:
755 op = nir_intrinsic_memory_barrier_atomic_counter;
756 break;
757 case ir_intrinsic_memory_barrier_buffer:
758 op = nir_intrinsic_memory_barrier_buffer;
759 break;
760 case ir_intrinsic_memory_barrier_image:
761 op = nir_intrinsic_memory_barrier_image;
762 break;
763 case ir_intrinsic_memory_barrier_shared:
764 op = nir_intrinsic_memory_barrier_shared;
765 break;
766 case ir_intrinsic_shared_load:
767 op = nir_intrinsic_load_shared;
768 break;
769 case ir_intrinsic_shared_store:
770 op = nir_intrinsic_store_shared;
771 break;
772 case ir_intrinsic_shared_atomic_add:
773 op = ir->return_deref->type->is_integer_32_64()
774 ? nir_intrinsic_shared_atomic_add
775 : nir_intrinsic_shared_atomic_fadd;
776 break;
777 case ir_intrinsic_shared_atomic_and:
778 op = nir_intrinsic_shared_atomic_and;
779 break;
780 case ir_intrinsic_shared_atomic_or:
781 op = nir_intrinsic_shared_atomic_or;
782 break;
783 case ir_intrinsic_shared_atomic_xor:
784 op = nir_intrinsic_shared_atomic_xor;
785 break;
786 case ir_intrinsic_shared_atomic_min:
787 assert(ir->return_deref);
788 if (ir->return_deref->type == glsl_type::int_type)
789 op = nir_intrinsic_shared_atomic_imin;
790 else if (ir->return_deref->type == glsl_type::uint_type)
791 op = nir_intrinsic_shared_atomic_umin;
792 else if (ir->return_deref->type == glsl_type::float_type)
793 op = nir_intrinsic_shared_atomic_fmin;
794 else
795 unreachable("Invalid type");
796 break;
797 case ir_intrinsic_shared_atomic_max:
798 assert(ir->return_deref);
799 if (ir->return_deref->type == glsl_type::int_type)
800 op = nir_intrinsic_shared_atomic_imax;
801 else if (ir->return_deref->type == glsl_type::uint_type)
802 op = nir_intrinsic_shared_atomic_umax;
803 else if (ir->return_deref->type == glsl_type::float_type)
804 op = nir_intrinsic_shared_atomic_fmax;
805 else
806 unreachable("Invalid type");
807 break;
808 case ir_intrinsic_shared_atomic_exchange:
809 op = nir_intrinsic_shared_atomic_exchange;
810 break;
811 case ir_intrinsic_shared_atomic_comp_swap:
812 op = ir->return_deref->type->is_integer_32_64()
813 ? nir_intrinsic_shared_atomic_comp_swap
814 : nir_intrinsic_shared_atomic_fcomp_swap;
815 break;
816 case ir_intrinsic_vote_any:
817 op = nir_intrinsic_vote_any;
818 break;
819 case ir_intrinsic_vote_all:
820 op = nir_intrinsic_vote_all;
821 break;
822 case ir_intrinsic_vote_eq:
823 op = nir_intrinsic_vote_ieq;
824 break;
825 case ir_intrinsic_ballot:
826 op = nir_intrinsic_ballot;
827 break;
828 case ir_intrinsic_read_invocation:
829 op = nir_intrinsic_read_invocation;
830 break;
831 case ir_intrinsic_read_first_invocation:
832 op = nir_intrinsic_read_first_invocation;
833 break;
834 default:
835 unreachable("not reached");
836 }
837
838 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
839 nir_dest *dest = &instr->dest;
840
841 switch (op) {
842 case nir_intrinsic_atomic_counter_read_deref:
843 case nir_intrinsic_atomic_counter_inc_deref:
844 case nir_intrinsic_atomic_counter_pre_dec_deref:
845 case nir_intrinsic_atomic_counter_add_deref:
846 case nir_intrinsic_atomic_counter_min_deref:
847 case nir_intrinsic_atomic_counter_max_deref:
848 case nir_intrinsic_atomic_counter_and_deref:
849 case nir_intrinsic_atomic_counter_or_deref:
850 case nir_intrinsic_atomic_counter_xor_deref:
851 case nir_intrinsic_atomic_counter_exchange_deref:
852 case nir_intrinsic_atomic_counter_comp_swap_deref: {
853 /* Set the counter variable dereference. */
854 exec_node *param = ir->actual_parameters.get_head();
855 ir_dereference *counter = (ir_dereference *)param;
856
857 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
858 param = param->get_next();
859
860 /* Set the intrinsic destination. */
861 if (ir->return_deref) {
862 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
863 }
864
865 /* Set the intrinsic parameters. */
866 if (!param->is_tail_sentinel()) {
867 instr->src[1] =
868 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
869 param = param->get_next();
870 }
871
872 if (!param->is_tail_sentinel()) {
873 instr->src[2] =
874 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
875 param = param->get_next();
876 }
877
878 nir_builder_instr_insert(&b, &instr->instr);
879 break;
880 }
881 case nir_intrinsic_image_deref_load:
882 case nir_intrinsic_image_deref_store:
883 case nir_intrinsic_image_deref_atomic_add:
884 case nir_intrinsic_image_deref_atomic_min:
885 case nir_intrinsic_image_deref_atomic_max:
886 case nir_intrinsic_image_deref_atomic_and:
887 case nir_intrinsic_image_deref_atomic_or:
888 case nir_intrinsic_image_deref_atomic_xor:
889 case nir_intrinsic_image_deref_atomic_exchange:
890 case nir_intrinsic_image_deref_atomic_comp_swap:
891 case nir_intrinsic_image_deref_atomic_fadd:
892 case nir_intrinsic_image_deref_samples:
893 case nir_intrinsic_image_deref_size: {
894 nir_ssa_undef_instr *instr_undef =
895 nir_ssa_undef_instr_create(shader, 1, 32);
896 nir_builder_instr_insert(&b, &instr_undef->instr);
897
898 /* Set the image variable dereference. */
899 exec_node *param = ir->actual_parameters.get_head();
900 ir_dereference *image = (ir_dereference *)param;
901 const glsl_type *type =
902 image->variable_referenced()->type->without_array();
903
904 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
905 param = param->get_next();
906
907 /* Set the intrinsic destination. */
908 if (ir->return_deref) {
909 unsigned num_components = ir->return_deref->type->vector_elements;
910 nir_ssa_dest_init(&instr->instr, &instr->dest,
911 num_components, 32, NULL);
912 }
913
914 if (op == nir_intrinsic_image_deref_size) {
915 instr->num_components = instr->dest.ssa.num_components;
916 } else if (op == nir_intrinsic_image_deref_load ||
917 op == nir_intrinsic_image_deref_store) {
918 instr->num_components = 4;
919 }
920
921 if (op == nir_intrinsic_image_deref_size ||
922 op == nir_intrinsic_image_deref_samples) {
923 nir_builder_instr_insert(&b, &instr->instr);
924 break;
925 }
926
927 /* Set the address argument, extending the coordinate vector to four
928 * components.
929 */
930 nir_ssa_def *src_addr =
931 evaluate_rvalue((ir_dereference *)param);
932 nir_ssa_def *srcs[4];
933
934 for (int i = 0; i < 4; i++) {
935 if (i < type->coordinate_components())
936 srcs[i] = nir_channel(&b, src_addr, i);
937 else
938 srcs[i] = &instr_undef->def;
939 }
940
941 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
942 param = param->get_next();
943
944 /* Set the sample argument, which is undefined for single-sample
945 * images.
946 */
947 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
948 instr->src[2] =
949 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
950 param = param->get_next();
951 } else {
952 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
953 }
954
955 /* Set the intrinsic parameters. */
956 if (!param->is_tail_sentinel()) {
957 instr->src[3] =
958 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
959 param = param->get_next();
960 }
961
962 if (!param->is_tail_sentinel()) {
963 instr->src[4] =
964 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
965 param = param->get_next();
966 }
967 nir_builder_instr_insert(&b, &instr->instr);
968 break;
969 }
970 case nir_intrinsic_memory_barrier:
971 case nir_intrinsic_group_memory_barrier:
972 case nir_intrinsic_memory_barrier_atomic_counter:
973 case nir_intrinsic_memory_barrier_buffer:
974 case nir_intrinsic_memory_barrier_image:
975 case nir_intrinsic_memory_barrier_shared:
976 nir_builder_instr_insert(&b, &instr->instr);
977 break;
978 case nir_intrinsic_shader_clock:
979 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
980 instr->num_components = 2;
981 nir_builder_instr_insert(&b, &instr->instr);
982 break;
983 case nir_intrinsic_begin_invocation_interlock:
984 nir_builder_instr_insert(&b, &instr->instr);
985 break;
986 case nir_intrinsic_end_invocation_interlock:
987 nir_builder_instr_insert(&b, &instr->instr);
988 break;
989 case nir_intrinsic_begin_fragment_shader_ordering:
990 nir_builder_instr_insert(&b, &instr->instr);
991 break;
992 case nir_intrinsic_store_ssbo: {
993 exec_node *param = ir->actual_parameters.get_head();
994 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
995
996 param = param->get_next();
997 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
998
999 param = param->get_next();
1000 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1001
1002 param = param->get_next();
1003 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1004 assert(write_mask);
1005
1006 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1007 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1008 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1009 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1010 instr->num_components = val->type->vector_elements;
1011
1012 nir_builder_instr_insert(&b, &instr->instr);
1013 break;
1014 }
1015 case nir_intrinsic_load_ssbo: {
1016 exec_node *param = ir->actual_parameters.get_head();
1017 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1018
1019 param = param->get_next();
1020 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1021
1022 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1023 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1024
1025 const glsl_type *type = ir->return_deref->var->type;
1026 instr->num_components = type->vector_elements;
1027
1028 /* Setup destination register */
1029 unsigned bit_size = glsl_get_bit_size(type);
1030 nir_ssa_dest_init(&instr->instr, &instr->dest,
1031 type->vector_elements, bit_size, NULL);
1032
1033 /* Insert the created nir instruction now since in the case of boolean
1034 * result we will need to emit another instruction after it
1035 */
1036 nir_builder_instr_insert(&b, &instr->instr);
1037
1038 /*
1039 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1040 * consider a true boolean to be ~0. Fix this up with a != 0
1041 * comparison.
1042 */
1043 if (type->is_boolean()) {
1044 nir_alu_instr *load_ssbo_compare =
1045 nir_alu_instr_create(shader, nir_op_ine);
1046 load_ssbo_compare->src[0].src.is_ssa = true;
1047 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1048 load_ssbo_compare->src[1].src =
1049 nir_src_for_ssa(nir_imm_int(&b, 0));
1050 for (unsigned i = 0; i < type->vector_elements; i++)
1051 load_ssbo_compare->src[1].swizzle[i] = 0;
1052 nir_ssa_dest_init(&load_ssbo_compare->instr,
1053 &load_ssbo_compare->dest.dest,
1054 type->vector_elements, bit_size, NULL);
1055 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1056 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1057 dest = &load_ssbo_compare->dest.dest;
1058 }
1059 break;
1060 }
1061 case nir_intrinsic_ssbo_atomic_add:
1062 case nir_intrinsic_ssbo_atomic_imin:
1063 case nir_intrinsic_ssbo_atomic_umin:
1064 case nir_intrinsic_ssbo_atomic_imax:
1065 case nir_intrinsic_ssbo_atomic_umax:
1066 case nir_intrinsic_ssbo_atomic_and:
1067 case nir_intrinsic_ssbo_atomic_or:
1068 case nir_intrinsic_ssbo_atomic_xor:
1069 case nir_intrinsic_ssbo_atomic_exchange:
1070 case nir_intrinsic_ssbo_atomic_comp_swap:
1071 case nir_intrinsic_ssbo_atomic_fadd:
1072 case nir_intrinsic_ssbo_atomic_fmin:
1073 case nir_intrinsic_ssbo_atomic_fmax:
1074 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1075 int param_count = ir->actual_parameters.length();
1076 assert(param_count == 3 || param_count == 4);
1077
1078 /* Block index */
1079 exec_node *param = ir->actual_parameters.get_head();
1080 ir_instruction *inst = (ir_instruction *) param;
1081 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1082
1083 /* Offset */
1084 param = param->get_next();
1085 inst = (ir_instruction *) param;
1086 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1087
1088 /* data1 parameter (this is always present) */
1089 param = param->get_next();
1090 inst = (ir_instruction *) param;
1091 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1092
1093 /* data2 parameter (only with atomic_comp_swap) */
1094 if (param_count == 4) {
1095 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1096 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1097 param = param->get_next();
1098 inst = (ir_instruction *) param;
1099 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1100 }
1101
1102 /* Atomic result */
1103 assert(ir->return_deref);
1104 nir_ssa_dest_init(&instr->instr, &instr->dest,
1105 ir->return_deref->type->vector_elements, 32, NULL);
1106 nir_builder_instr_insert(&b, &instr->instr);
1107 break;
1108 }
1109 case nir_intrinsic_load_shared: {
1110 exec_node *param = ir->actual_parameters.get_head();
1111 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1112
1113 nir_intrinsic_set_base(instr, 0);
1114 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1115
1116 const glsl_type *type = ir->return_deref->var->type;
1117 instr->num_components = type->vector_elements;
1118
1119 /* Setup destination register */
1120 unsigned bit_size = glsl_get_bit_size(type);
1121 nir_ssa_dest_init(&instr->instr, &instr->dest,
1122 type->vector_elements, bit_size, NULL);
1123
1124 nir_builder_instr_insert(&b, &instr->instr);
1125 break;
1126 }
1127 case nir_intrinsic_store_shared: {
1128 exec_node *param = ir->actual_parameters.get_head();
1129 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1130
1131 param = param->get_next();
1132 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1133
1134 param = param->get_next();
1135 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1136 assert(write_mask);
1137
1138 nir_intrinsic_set_base(instr, 0);
1139 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1140
1141 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1142
1143 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1144 instr->num_components = val->type->vector_elements;
1145
1146 nir_builder_instr_insert(&b, &instr->instr);
1147 break;
1148 }
1149 case nir_intrinsic_shared_atomic_add:
1150 case nir_intrinsic_shared_atomic_imin:
1151 case nir_intrinsic_shared_atomic_umin:
1152 case nir_intrinsic_shared_atomic_imax:
1153 case nir_intrinsic_shared_atomic_umax:
1154 case nir_intrinsic_shared_atomic_and:
1155 case nir_intrinsic_shared_atomic_or:
1156 case nir_intrinsic_shared_atomic_xor:
1157 case nir_intrinsic_shared_atomic_exchange:
1158 case nir_intrinsic_shared_atomic_comp_swap:
1159 case nir_intrinsic_shared_atomic_fadd:
1160 case nir_intrinsic_shared_atomic_fmin:
1161 case nir_intrinsic_shared_atomic_fmax:
1162 case nir_intrinsic_shared_atomic_fcomp_swap: {
1163 int param_count = ir->actual_parameters.length();
1164 assert(param_count == 2 || param_count == 3);
1165
1166 /* Offset */
1167 exec_node *param = ir->actual_parameters.get_head();
1168 ir_instruction *inst = (ir_instruction *) param;
1169 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1170
1171 /* data1 parameter (this is always present) */
1172 param = param->get_next();
1173 inst = (ir_instruction *) param;
1174 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1175
1176 /* data2 parameter (only with atomic_comp_swap) */
1177 if (param_count == 3) {
1178 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1179 op == nir_intrinsic_shared_atomic_fcomp_swap);
1180 param = param->get_next();
1181 inst = (ir_instruction *) param;
1182 instr->src[2] =
1183 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1184 }
1185
1186 /* Atomic result */
1187 assert(ir->return_deref);
1188 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1189 nir_ssa_dest_init(&instr->instr, &instr->dest,
1190 ir->return_deref->type->vector_elements,
1191 bit_size, NULL);
1192 nir_builder_instr_insert(&b, &instr->instr);
1193 break;
1194 }
1195 case nir_intrinsic_vote_any:
1196 case nir_intrinsic_vote_all:
1197 case nir_intrinsic_vote_ieq: {
1198 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1199 instr->num_components = 1;
1200
1201 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1202 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1203
1204 nir_builder_instr_insert(&b, &instr->instr);
1205 break;
1206 }
1207
1208 case nir_intrinsic_ballot: {
1209 nir_ssa_dest_init(&instr->instr, &instr->dest,
1210 ir->return_deref->type->vector_elements, 64, NULL);
1211 instr->num_components = ir->return_deref->type->vector_elements;
1212
1213 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1214 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1215
1216 nir_builder_instr_insert(&b, &instr->instr);
1217 break;
1218 }
1219 case nir_intrinsic_read_invocation: {
1220 nir_ssa_dest_init(&instr->instr, &instr->dest,
1221 ir->return_deref->type->vector_elements, 32, NULL);
1222 instr->num_components = ir->return_deref->type->vector_elements;
1223
1224 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1225 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1226
1227 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1228 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1229
1230 nir_builder_instr_insert(&b, &instr->instr);
1231 break;
1232 }
1233 case nir_intrinsic_read_first_invocation: {
1234 nir_ssa_dest_init(&instr->instr, &instr->dest,
1235 ir->return_deref->type->vector_elements, 32, NULL);
1236 instr->num_components = ir->return_deref->type->vector_elements;
1237
1238 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1239 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1240
1241 nir_builder_instr_insert(&b, &instr->instr);
1242 break;
1243 }
1244 default:
1245 unreachable("not reached");
1246 }
1247
1248 if (ir->return_deref)
1249 nir_store_deref(&b, evaluate_deref(ir->return_deref), &dest->ssa, ~0);
1250
1251 return;
1252 }
1253
1254 unreachable("glsl_to_nir only handles function calls to intrinsics");
1255 }
1256
1257 void
1258 nir_visitor::visit(ir_assignment *ir)
1259 {
1260 unsigned num_components = ir->lhs->type->vector_elements;
1261
1262 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1263 ir->lhs->variable_referenced()->data.precise;
1264
1265 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1266 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1267 if (ir->condition) {
1268 nir_push_if(&b, evaluate_rvalue(ir->condition));
1269 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1270 nir_pop_if(&b, NULL);
1271 } else {
1272 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1273 }
1274 return;
1275 }
1276
1277 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1278
1279 ir->lhs->accept(this);
1280 nir_deref_instr *lhs_deref = this->deref;
1281 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1282
1283 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1284 /* GLSL IR will give us the input to the write-masked assignment in a
1285 * single packed vector. So, for example, if the writemask is xzw, then
1286 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1287 * from the load.
1288 */
1289 unsigned swiz[4];
1290 unsigned component = 0;
1291 for (unsigned i = 0; i < 4; i++) {
1292 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1293 }
1294 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1295 }
1296
1297 if (ir->condition) {
1298 nir_push_if(&b, evaluate_rvalue(ir->condition));
1299 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1300 nir_pop_if(&b, NULL);
1301 } else {
1302 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1303 }
1304 }
1305
1306 /*
1307 * Given an instruction, returns a pointer to its destination or NULL if there
1308 * is no destination.
1309 *
1310 * Note that this only handles instructions we generate at this level.
1311 */
1312 static nir_dest *
1313 get_instr_dest(nir_instr *instr)
1314 {
1315 nir_alu_instr *alu_instr;
1316 nir_intrinsic_instr *intrinsic_instr;
1317 nir_tex_instr *tex_instr;
1318
1319 switch (instr->type) {
1320 case nir_instr_type_alu:
1321 alu_instr = nir_instr_as_alu(instr);
1322 return &alu_instr->dest.dest;
1323
1324 case nir_instr_type_intrinsic:
1325 intrinsic_instr = nir_instr_as_intrinsic(instr);
1326 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1327 return &intrinsic_instr->dest;
1328 else
1329 return NULL;
1330
1331 case nir_instr_type_tex:
1332 tex_instr = nir_instr_as_tex(instr);
1333 return &tex_instr->dest;
1334
1335 default:
1336 unreachable("not reached");
1337 }
1338
1339 return NULL;
1340 }
1341
1342 void
1343 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1344 unsigned bit_size)
1345 {
1346 nir_dest *dest = get_instr_dest(instr);
1347
1348 if (dest)
1349 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1350
1351 nir_builder_instr_insert(&b, instr);
1352
1353 if (dest) {
1354 assert(dest->is_ssa);
1355 this->result = &dest->ssa;
1356 }
1357 }
1358
1359 nir_ssa_def *
1360 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1361 {
1362 ir->accept(this);
1363 if (ir->as_dereference() || ir->as_constant()) {
1364 /*
1365 * A dereference is being used on the right hand side, which means we
1366 * must emit a variable load.
1367 */
1368
1369 this->result = nir_load_deref(&b, this->deref);
1370 }
1371
1372 return this->result;
1373 }
1374
1375 static bool
1376 type_is_float(glsl_base_type type)
1377 {
1378 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1379 type == GLSL_TYPE_FLOAT16;
1380 }
1381
1382 static bool
1383 type_is_signed(glsl_base_type type)
1384 {
1385 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1386 type == GLSL_TYPE_INT16;
1387 }
1388
1389 void
1390 nir_visitor::visit(ir_expression *ir)
1391 {
1392 /* Some special cases */
1393 switch (ir->operation) {
1394 case ir_binop_ubo_load: {
1395 nir_intrinsic_instr *load =
1396 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1397 unsigned bit_size = glsl_get_bit_size(ir->type);
1398 load->num_components = ir->type->vector_elements;
1399 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1400 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1401 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1402
1403 /*
1404 * In UBO's, a true boolean value is any non-zero value, but we consider
1405 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1406 */
1407
1408 if (ir->type->is_boolean())
1409 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1410
1411 return;
1412 }
1413
1414 case ir_unop_interpolate_at_centroid:
1415 case ir_binop_interpolate_at_offset:
1416 case ir_binop_interpolate_at_sample: {
1417 ir_dereference *deref = ir->operands[0]->as_dereference();
1418 ir_swizzle *swizzle = NULL;
1419 if (!deref) {
1420 /* the api does not allow a swizzle here, but the varying packing code
1421 * may have pushed one into here.
1422 */
1423 swizzle = ir->operands[0]->as_swizzle();
1424 assert(swizzle);
1425 deref = swizzle->val->as_dereference();
1426 assert(deref);
1427 }
1428
1429 deref->accept(this);
1430
1431 nir_intrinsic_op op;
1432 if (this->deref->mode == nir_var_shader_in) {
1433 switch (ir->operation) {
1434 case ir_unop_interpolate_at_centroid:
1435 op = nir_intrinsic_interp_deref_at_centroid;
1436 break;
1437 case ir_binop_interpolate_at_offset:
1438 op = nir_intrinsic_interp_deref_at_offset;
1439 break;
1440 case ir_binop_interpolate_at_sample:
1441 op = nir_intrinsic_interp_deref_at_sample;
1442 break;
1443 default:
1444 unreachable("Invalid interpolation intrinsic");
1445 }
1446 } else {
1447 /* This case can happen if the vertex shader does not write the
1448 * given varying. In this case, the linker will lower it to a
1449 * global variable. Since interpolating a variable makes no
1450 * sense, we'll just turn it into a load which will probably
1451 * eventually end up as an SSA definition.
1452 */
1453 assert(this->deref->mode == nir_var_global);
1454 op = nir_intrinsic_load_deref;
1455 }
1456
1457 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1458 intrin->num_components = deref->type->vector_elements;
1459 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1460
1461 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1462 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1463 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1464
1465 unsigned bit_size = glsl_get_bit_size(deref->type);
1466 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1467
1468 if (swizzle) {
1469 unsigned swiz[4] = {
1470 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1471 };
1472
1473 result = nir_swizzle(&b, result, swiz,
1474 swizzle->type->vector_elements, false);
1475 }
1476
1477 return;
1478 }
1479
1480 default:
1481 break;
1482 }
1483
1484 nir_ssa_def *srcs[4];
1485 for (unsigned i = 0; i < ir->num_operands; i++)
1486 srcs[i] = evaluate_rvalue(ir->operands[i]);
1487
1488 glsl_base_type types[4];
1489 for (unsigned i = 0; i < ir->num_operands; i++)
1490 if (supports_ints)
1491 types[i] = ir->operands[i]->type->base_type;
1492 else
1493 types[i] = GLSL_TYPE_FLOAT;
1494
1495 glsl_base_type out_type;
1496 if (supports_ints)
1497 out_type = ir->type->base_type;
1498 else
1499 out_type = GLSL_TYPE_FLOAT;
1500
1501 switch (ir->operation) {
1502 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1503 case ir_unop_logic_not:
1504 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1505 break;
1506 case ir_unop_neg:
1507 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1508 : nir_ineg(&b, srcs[0]);
1509 break;
1510 case ir_unop_abs:
1511 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1512 : nir_iabs(&b, srcs[0]);
1513 break;
1514 case ir_unop_saturate:
1515 assert(type_is_float(types[0]));
1516 result = nir_fsat(&b, srcs[0]);
1517 break;
1518 case ir_unop_sign:
1519 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1520 : nir_isign(&b, srcs[0]);
1521 break;
1522 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1523 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1524 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1525 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1526 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1527 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1528 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1529 case ir_unop_i2f:
1530 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1531 break;
1532 case ir_unop_u2f:
1533 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1534 break;
1535 case ir_unop_b2f:
1536 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1537 break;
1538 case ir_unop_f2i:
1539 case ir_unop_f2u:
1540 case ir_unop_f2b:
1541 case ir_unop_i2b:
1542 case ir_unop_b2i:
1543 case ir_unop_b2i64:
1544 case ir_unop_d2f:
1545 case ir_unop_f2d:
1546 case ir_unop_d2i:
1547 case ir_unop_d2u:
1548 case ir_unop_d2b:
1549 case ir_unop_i2d:
1550 case ir_unop_u2d:
1551 case ir_unop_i642i:
1552 case ir_unop_i642u:
1553 case ir_unop_i642f:
1554 case ir_unop_i642b:
1555 case ir_unop_i642d:
1556 case ir_unop_u642i:
1557 case ir_unop_u642u:
1558 case ir_unop_u642f:
1559 case ir_unop_u642d:
1560 case ir_unop_i2i64:
1561 case ir_unop_u2i64:
1562 case ir_unop_f2i64:
1563 case ir_unop_d2i64:
1564 case ir_unop_i2u64:
1565 case ir_unop_u2u64:
1566 case ir_unop_f2u64:
1567 case ir_unop_d2u64:
1568 case ir_unop_i2u:
1569 case ir_unop_u2i:
1570 case ir_unop_i642u64:
1571 case ir_unop_u642i64: {
1572 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1573 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1574 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1575 nir_rounding_mode_undef),
1576 srcs[0], NULL, NULL, NULL);
1577 /* b2i and b2f don't have fixed bit-size versions so the builder will
1578 * just assume 32 and we have to fix it up here.
1579 */
1580 result->bit_size = nir_alu_type_get_type_size(dst_type);
1581 break;
1582 }
1583
1584 case ir_unop_bitcast_i2f:
1585 case ir_unop_bitcast_f2i:
1586 case ir_unop_bitcast_u2f:
1587 case ir_unop_bitcast_f2u:
1588 case ir_unop_bitcast_i642d:
1589 case ir_unop_bitcast_d2i64:
1590 case ir_unop_bitcast_u642d:
1591 case ir_unop_bitcast_d2u64:
1592 case ir_unop_subroutine_to_int:
1593 /* no-op */
1594 result = nir_imov(&b, srcs[0]);
1595 break;
1596 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1597 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1598 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1599 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1600 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1601 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1602 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1603 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1604 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1605 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1606 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1607 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1608 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1609 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1610 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1611 case ir_unop_pack_snorm_2x16:
1612 result = nir_pack_snorm_2x16(&b, srcs[0]);
1613 break;
1614 case ir_unop_pack_snorm_4x8:
1615 result = nir_pack_snorm_4x8(&b, srcs[0]);
1616 break;
1617 case ir_unop_pack_unorm_2x16:
1618 result = nir_pack_unorm_2x16(&b, srcs[0]);
1619 break;
1620 case ir_unop_pack_unorm_4x8:
1621 result = nir_pack_unorm_4x8(&b, srcs[0]);
1622 break;
1623 case ir_unop_pack_half_2x16:
1624 result = nir_pack_half_2x16(&b, srcs[0]);
1625 break;
1626 case ir_unop_unpack_snorm_2x16:
1627 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1628 break;
1629 case ir_unop_unpack_snorm_4x8:
1630 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1631 break;
1632 case ir_unop_unpack_unorm_2x16:
1633 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1634 break;
1635 case ir_unop_unpack_unorm_4x8:
1636 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1637 break;
1638 case ir_unop_unpack_half_2x16:
1639 result = nir_unpack_half_2x16(&b, srcs[0]);
1640 break;
1641 case ir_unop_pack_sampler_2x32:
1642 case ir_unop_pack_image_2x32:
1643 case ir_unop_pack_double_2x32:
1644 case ir_unop_pack_int_2x32:
1645 case ir_unop_pack_uint_2x32:
1646 result = nir_pack_64_2x32(&b, srcs[0]);
1647 break;
1648 case ir_unop_unpack_sampler_2x32:
1649 case ir_unop_unpack_image_2x32:
1650 case ir_unop_unpack_double_2x32:
1651 case ir_unop_unpack_int_2x32:
1652 case ir_unop_unpack_uint_2x32:
1653 result = nir_unpack_64_2x32(&b, srcs[0]);
1654 break;
1655 case ir_unop_bitfield_reverse:
1656 result = nir_bitfield_reverse(&b, srcs[0]);
1657 break;
1658 case ir_unop_bit_count:
1659 result = nir_bit_count(&b, srcs[0]);
1660 break;
1661 case ir_unop_find_msb:
1662 switch (types[0]) {
1663 case GLSL_TYPE_UINT:
1664 result = nir_ufind_msb(&b, srcs[0]);
1665 break;
1666 case GLSL_TYPE_INT:
1667 result = nir_ifind_msb(&b, srcs[0]);
1668 break;
1669 default:
1670 unreachable("Invalid type for findMSB()");
1671 }
1672 break;
1673 case ir_unop_find_lsb:
1674 result = nir_find_lsb(&b, srcs[0]);
1675 break;
1676
1677 case ir_unop_noise:
1678 switch (ir->type->vector_elements) {
1679 case 1:
1680 switch (ir->operands[0]->type->vector_elements) {
1681 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1682 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1683 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1684 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1685 default: unreachable("not reached");
1686 }
1687 break;
1688 case 2:
1689 switch (ir->operands[0]->type->vector_elements) {
1690 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1691 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1692 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1693 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1694 default: unreachable("not reached");
1695 }
1696 break;
1697 case 3:
1698 switch (ir->operands[0]->type->vector_elements) {
1699 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1700 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1701 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1702 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1703 default: unreachable("not reached");
1704 }
1705 break;
1706 case 4:
1707 switch (ir->operands[0]->type->vector_elements) {
1708 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1709 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1710 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1711 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1712 default: unreachable("not reached");
1713 }
1714 break;
1715 default:
1716 unreachable("not reached");
1717 }
1718 break;
1719 case ir_unop_get_buffer_size: {
1720 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1721 this->shader,
1722 nir_intrinsic_get_buffer_size);
1723 load->num_components = ir->type->vector_elements;
1724 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1725 unsigned bit_size = glsl_get_bit_size(ir->type);
1726 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1727 return;
1728 }
1729
1730 case ir_binop_add:
1731 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1732 : nir_iadd(&b, srcs[0], srcs[1]);
1733 break;
1734 case ir_binop_sub:
1735 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1736 : nir_isub(&b, srcs[0], srcs[1]);
1737 break;
1738 case ir_binop_mul:
1739 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1740 : nir_imul(&b, srcs[0], srcs[1]);
1741 break;
1742 case ir_binop_div:
1743 if (type_is_float(out_type))
1744 result = nir_fdiv(&b, srcs[0], srcs[1]);
1745 else if (type_is_signed(out_type))
1746 result = nir_idiv(&b, srcs[0], srcs[1]);
1747 else
1748 result = nir_udiv(&b, srcs[0], srcs[1]);
1749 break;
1750 case ir_binop_mod:
1751 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1752 : nir_umod(&b, srcs[0], srcs[1]);
1753 break;
1754 case ir_binop_min:
1755 if (type_is_float(out_type))
1756 result = nir_fmin(&b, srcs[0], srcs[1]);
1757 else if (type_is_signed(out_type))
1758 result = nir_imin(&b, srcs[0], srcs[1]);
1759 else
1760 result = nir_umin(&b, srcs[0], srcs[1]);
1761 break;
1762 case ir_binop_max:
1763 if (type_is_float(out_type))
1764 result = nir_fmax(&b, srcs[0], srcs[1]);
1765 else if (type_is_signed(out_type))
1766 result = nir_imax(&b, srcs[0], srcs[1]);
1767 else
1768 result = nir_umax(&b, srcs[0], srcs[1]);
1769 break;
1770 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1771 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1772 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1773 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1774 case ir_binop_logic_and:
1775 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1776 : nir_fand(&b, srcs[0], srcs[1]);
1777 break;
1778 case ir_binop_logic_or:
1779 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1780 : nir_for(&b, srcs[0], srcs[1]);
1781 break;
1782 case ir_binop_logic_xor:
1783 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1784 : nir_fxor(&b, srcs[0], srcs[1]);
1785 break;
1786 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1787 case ir_binop_rshift:
1788 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1789 : nir_ushr(&b, srcs[0], srcs[1]);
1790 break;
1791 case ir_binop_imul_high:
1792 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1793 : nir_umul_high(&b, srcs[0], srcs[1]);
1794 break;
1795 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1796 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1797 case ir_binop_less:
1798 if (supports_ints) {
1799 if (type_is_float(types[0]))
1800 result = nir_flt(&b, srcs[0], srcs[1]);
1801 else if (type_is_signed(types[0]))
1802 result = nir_ilt(&b, srcs[0], srcs[1]);
1803 else
1804 result = nir_ult(&b, srcs[0], srcs[1]);
1805 } else {
1806 result = nir_slt(&b, srcs[0], srcs[1]);
1807 }
1808 break;
1809 case ir_binop_gequal:
1810 if (supports_ints) {
1811 if (type_is_float(types[0]))
1812 result = nir_fge(&b, srcs[0], srcs[1]);
1813 else if (type_is_signed(types[0]))
1814 result = nir_ige(&b, srcs[0], srcs[1]);
1815 else
1816 result = nir_uge(&b, srcs[0], srcs[1]);
1817 } else {
1818 result = nir_sge(&b, srcs[0], srcs[1]);
1819 }
1820 break;
1821 case ir_binop_equal:
1822 if (supports_ints) {
1823 if (type_is_float(types[0]))
1824 result = nir_feq(&b, srcs[0], srcs[1]);
1825 else
1826 result = nir_ieq(&b, srcs[0], srcs[1]);
1827 } else {
1828 result = nir_seq(&b, srcs[0], srcs[1]);
1829 }
1830 break;
1831 case ir_binop_nequal:
1832 if (supports_ints) {
1833 if (type_is_float(types[0]))
1834 result = nir_fne(&b, srcs[0], srcs[1]);
1835 else
1836 result = nir_ine(&b, srcs[0], srcs[1]);
1837 } else {
1838 result = nir_sne(&b, srcs[0], srcs[1]);
1839 }
1840 break;
1841 case ir_binop_all_equal:
1842 if (supports_ints) {
1843 if (type_is_float(types[0])) {
1844 switch (ir->operands[0]->type->vector_elements) {
1845 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1846 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1847 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1848 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1849 default:
1850 unreachable("not reached");
1851 }
1852 } else {
1853 switch (ir->operands[0]->type->vector_elements) {
1854 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1855 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1856 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1857 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1858 default:
1859 unreachable("not reached");
1860 }
1861 }
1862 } else {
1863 switch (ir->operands[0]->type->vector_elements) {
1864 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1865 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1866 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1867 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1868 default:
1869 unreachable("not reached");
1870 }
1871 }
1872 break;
1873 case ir_binop_any_nequal:
1874 if (supports_ints) {
1875 if (type_is_float(types[0])) {
1876 switch (ir->operands[0]->type->vector_elements) {
1877 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1878 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1879 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1880 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1881 default:
1882 unreachable("not reached");
1883 }
1884 } else {
1885 switch (ir->operands[0]->type->vector_elements) {
1886 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1887 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1888 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1889 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1890 default:
1891 unreachable("not reached");
1892 }
1893 }
1894 } else {
1895 switch (ir->operands[0]->type->vector_elements) {
1896 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1897 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1898 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1899 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1900 default:
1901 unreachable("not reached");
1902 }
1903 }
1904 break;
1905 case ir_binop_dot:
1906 switch (ir->operands[0]->type->vector_elements) {
1907 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1908 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1909 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1910 default:
1911 unreachable("not reached");
1912 }
1913 break;
1914 case ir_binop_vector_extract: {
1915 result = nir_channel(&b, srcs[0], 0);
1916 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1917 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1918 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1919 swizzled, result);
1920 }
1921 break;
1922 }
1923
1924 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1925 case ir_triop_fma:
1926 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1927 break;
1928 case ir_triop_lrp:
1929 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1930 break;
1931 case ir_triop_csel:
1932 if (supports_ints)
1933 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1934 else
1935 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1936 break;
1937 case ir_triop_bitfield_extract:
1938 result = (out_type == GLSL_TYPE_INT) ?
1939 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1940 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1941 break;
1942 case ir_quadop_bitfield_insert:
1943 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1944 break;
1945 case ir_quadop_vector:
1946 result = nir_vec(&b, srcs, ir->type->vector_elements);
1947 break;
1948
1949 default:
1950 unreachable("not reached");
1951 }
1952 }
1953
1954 void
1955 nir_visitor::visit(ir_swizzle *ir)
1956 {
1957 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1958 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1959 ir->type->vector_elements, !supports_ints);
1960 }
1961
1962 void
1963 nir_visitor::visit(ir_texture *ir)
1964 {
1965 unsigned num_srcs;
1966 nir_texop op;
1967 switch (ir->op) {
1968 case ir_tex:
1969 op = nir_texop_tex;
1970 num_srcs = 1; /* coordinate */
1971 break;
1972
1973 case ir_txb:
1974 case ir_txl:
1975 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1976 num_srcs = 2; /* coordinate, bias/lod */
1977 break;
1978
1979 case ir_txd:
1980 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1981 num_srcs = 3;
1982 break;
1983
1984 case ir_txf:
1985 op = nir_texop_txf;
1986 if (ir->lod_info.lod != NULL)
1987 num_srcs = 2; /* coordinate, lod */
1988 else
1989 num_srcs = 1; /* coordinate */
1990 break;
1991
1992 case ir_txf_ms:
1993 op = nir_texop_txf_ms;
1994 num_srcs = 2; /* coordinate, sample_index */
1995 break;
1996
1997 case ir_txs:
1998 op = nir_texop_txs;
1999 if (ir->lod_info.lod != NULL)
2000 num_srcs = 1; /* lod */
2001 else
2002 num_srcs = 0;
2003 break;
2004
2005 case ir_lod:
2006 op = nir_texop_lod;
2007 num_srcs = 1; /* coordinate */
2008 break;
2009
2010 case ir_tg4:
2011 op = nir_texop_tg4;
2012 num_srcs = 1; /* coordinate */
2013 break;
2014
2015 case ir_query_levels:
2016 op = nir_texop_query_levels;
2017 num_srcs = 0;
2018 break;
2019
2020 case ir_texture_samples:
2021 op = nir_texop_texture_samples;
2022 num_srcs = 0;
2023 break;
2024
2025 case ir_samples_identical:
2026 op = nir_texop_samples_identical;
2027 num_srcs = 1; /* coordinate */
2028 break;
2029
2030 default:
2031 unreachable("not reached");
2032 }
2033
2034 if (ir->projector != NULL)
2035 num_srcs++;
2036 if (ir->shadow_comparator != NULL)
2037 num_srcs++;
2038 if (ir->offset != NULL)
2039 num_srcs++;
2040
2041 /* Add one for the texture deref */
2042 num_srcs += 2;
2043
2044 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2045
2046 instr->op = op;
2047 instr->sampler_dim =
2048 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2049 instr->is_array = ir->sampler->type->sampler_array;
2050 instr->is_shadow = ir->sampler->type->sampler_shadow;
2051 if (instr->is_shadow)
2052 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2053 switch (ir->type->base_type) {
2054 case GLSL_TYPE_FLOAT:
2055 instr->dest_type = nir_type_float;
2056 break;
2057 case GLSL_TYPE_INT:
2058 instr->dest_type = nir_type_int;
2059 break;
2060 case GLSL_TYPE_BOOL:
2061 case GLSL_TYPE_UINT:
2062 instr->dest_type = nir_type_uint;
2063 break;
2064 default:
2065 unreachable("not reached");
2066 }
2067
2068 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2069 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2070 instr->src[0].src_type = nir_tex_src_texture_deref;
2071 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2072 instr->src[1].src_type = nir_tex_src_sampler_deref;
2073
2074 unsigned src_number = 2;
2075
2076 if (ir->coordinate != NULL) {
2077 instr->coord_components = ir->coordinate->type->vector_elements;
2078 instr->src[src_number].src =
2079 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2080 instr->src[src_number].src_type = nir_tex_src_coord;
2081 src_number++;
2082 }
2083
2084 if (ir->projector != NULL) {
2085 instr->src[src_number].src =
2086 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2087 instr->src[src_number].src_type = nir_tex_src_projector;
2088 src_number++;
2089 }
2090
2091 if (ir->shadow_comparator != NULL) {
2092 instr->src[src_number].src =
2093 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2094 instr->src[src_number].src_type = nir_tex_src_comparator;
2095 src_number++;
2096 }
2097
2098 if (ir->offset != NULL) {
2099 /* we don't support multiple offsets yet */
2100 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2101
2102 instr->src[src_number].src =
2103 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2104 instr->src[src_number].src_type = nir_tex_src_offset;
2105 src_number++;
2106 }
2107
2108 switch (ir->op) {
2109 case ir_txb:
2110 instr->src[src_number].src =
2111 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2112 instr->src[src_number].src_type = nir_tex_src_bias;
2113 src_number++;
2114 break;
2115
2116 case ir_txl:
2117 case ir_txf:
2118 case ir_txs:
2119 if (ir->lod_info.lod != NULL) {
2120 instr->src[src_number].src =
2121 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2122 instr->src[src_number].src_type = nir_tex_src_lod;
2123 src_number++;
2124 }
2125 break;
2126
2127 case ir_txd:
2128 instr->src[src_number].src =
2129 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2130 instr->src[src_number].src_type = nir_tex_src_ddx;
2131 src_number++;
2132 instr->src[src_number].src =
2133 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2134 instr->src[src_number].src_type = nir_tex_src_ddy;
2135 src_number++;
2136 break;
2137
2138 case ir_txf_ms:
2139 instr->src[src_number].src =
2140 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2141 instr->src[src_number].src_type = nir_tex_src_ms_index;
2142 src_number++;
2143 break;
2144
2145 case ir_tg4:
2146 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2147 break;
2148
2149 default:
2150 break;
2151 }
2152
2153 assert(src_number == num_srcs);
2154
2155 unsigned bit_size = glsl_get_bit_size(ir->type);
2156 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2157 }
2158
2159 void
2160 nir_visitor::visit(ir_constant *ir)
2161 {
2162 /*
2163 * We don't know if this variable is an array or struct that gets
2164 * dereferenced, so do the safe thing an make it a variable with a
2165 * constant initializer and return a dereference.
2166 */
2167
2168 nir_variable *var =
2169 nir_local_variable_create(this->impl, ir->type, "const_temp");
2170 var->data.read_only = true;
2171 var->constant_initializer = constant_copy(ir, var);
2172
2173 this->deref = nir_build_deref_var(&b, var);
2174 }
2175
2176 void
2177 nir_visitor::visit(ir_dereference_variable *ir)
2178 {
2179 struct hash_entry *entry =
2180 _mesa_hash_table_search(this->var_table, ir->var);
2181 assert(entry);
2182 nir_variable *var = (nir_variable *) entry->data;
2183
2184 this->deref = nir_build_deref_var(&b, var);
2185 }
2186
2187 void
2188 nir_visitor::visit(ir_dereference_record *ir)
2189 {
2190 ir->record->accept(this);
2191
2192 int field_index = ir->field_idx;
2193 assert(field_index >= 0);
2194
2195 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2196 }
2197
2198 void
2199 nir_visitor::visit(ir_dereference_array *ir)
2200 {
2201 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2202
2203 ir->array->accept(this);
2204
2205 this->deref = nir_build_deref_array(&b, this->deref, index);
2206 }
2207
2208 void
2209 nir_visitor::visit(ir_barrier *)
2210 {
2211 nir_intrinsic_instr *instr =
2212 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2213 nir_builder_instr_insert(&b, &instr->instr);
2214 }