glsl/nir: Use deref instructions instead of dref chains
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_instr *evaluate_deref(ir_instruction *ir);
95
96 /* most recent deref instruction created */
97 nir_deref_instr *deref;
98
99 nir_variable *var; /* variable created by ir_variable visitor */
100
101 /* whether the IR we're operating on is per-function or global */
102 bool is_global;
103
104 /* map of ir_variable -> nir_variable */
105 struct hash_table *var_table;
106
107 /* map of ir_function_signature -> nir_function_overload */
108 struct hash_table *overload_table;
109 };
110
111 /*
112 * This visitor runs before the main visitor, calling create_function() for
113 * each function so that the main visitor can resolve forward references in
114 * calls.
115 */
116
117 class nir_function_visitor : public ir_hierarchical_visitor
118 {
119 public:
120 nir_function_visitor(nir_visitor *v) : visitor(v)
121 {
122 }
123 virtual ir_visitor_status visit_enter(ir_function *);
124
125 private:
126 nir_visitor *visitor;
127 };
128
129 } /* end of anonymous namespace */
130
131 static void
132 nir_remap_attributes(nir_shader *shader,
133 const nir_shader_compiler_options *options)
134 {
135 if (options->vs_inputs_dual_locations) {
136 nir_foreach_variable(var, &shader->inputs) {
137 var->data.location +=
138 _mesa_bitcount_64(shader->info.vs.double_inputs &
139 BITFIELD64_MASK(var->data.location));
140 }
141 }
142
143 /* Once the remap is done, reset double_inputs_read, so later it will have
144 * which location/slots are doubles */
145 shader->info.vs.double_inputs = 0;
146 }
147
148 nir_shader *
149 glsl_to_nir(const struct gl_shader_program *shader_prog,
150 gl_shader_stage stage,
151 const nir_shader_compiler_options *options)
152 {
153 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
154
155 nir_shader *shader = nir_shader_create(NULL, stage, options,
156 &sh->Program->info);
157
158 nir_visitor v1(shader);
159 nir_function_visitor v2(&v1);
160 v2.run(sh->ir);
161 visit_exec_list(sh->ir, &v1);
162
163 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
164
165 /* Remap the locations to slots so those requiring two slots will occupy
166 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
167 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
168 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
169 if (shader->info.stage == MESA_SHADER_VERTEX)
170 nir_remap_attributes(shader, options);
171
172 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
173 if (shader_prog->Label)
174 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
175
176 /* Check for transform feedback varyings specified via the API */
177 shader->info.has_transform_feedback_varyings =
178 shader_prog->TransformFeedback.NumVarying > 0;
179
180 /* Check for transform feedback varyings specified in the Shader */
181 if (shader_prog->last_vert_prog)
182 shader->info.has_transform_feedback_varyings |=
183 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
184
185 return shader;
186 }
187
188 nir_visitor::nir_visitor(nir_shader *shader)
189 {
190 this->supports_ints = shader->options->native_integers;
191 this->shader = shader;
192 this->is_global = true;
193 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
194 _mesa_key_pointer_equal);
195 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->result = NULL;
198 this->impl = NULL;
199 this->var = NULL;
200 memset(&this->b, 0, sizeof(this->b));
201 }
202
203 nir_visitor::~nir_visitor()
204 {
205 _mesa_hash_table_destroy(this->var_table, NULL);
206 _mesa_hash_table_destroy(this->overload_table, NULL);
207 }
208
209 nir_deref_instr *
210 nir_visitor::evaluate_deref(ir_instruction *ir)
211 {
212 ir->accept(this);
213 return this->deref;
214 }
215
216 static nir_constant *
217 constant_copy(ir_constant *ir, void *mem_ctx)
218 {
219 if (ir == NULL)
220 return NULL;
221
222 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
223
224 const unsigned rows = ir->type->vector_elements;
225 const unsigned cols = ir->type->matrix_columns;
226 unsigned i;
227
228 ret->num_elements = 0;
229 switch (ir->type->base_type) {
230 case GLSL_TYPE_UINT:
231 /* Only float base types can be matrices. */
232 assert(cols == 1);
233
234 for (unsigned r = 0; r < rows; r++)
235 ret->values[0].u32[r] = ir->value.u[r];
236
237 break;
238
239 case GLSL_TYPE_INT:
240 /* Only float base types can be matrices. */
241 assert(cols == 1);
242
243 for (unsigned r = 0; r < rows; r++)
244 ret->values[0].i32[r] = ir->value.i[r];
245
246 break;
247
248 case GLSL_TYPE_FLOAT:
249 for (unsigned c = 0; c < cols; c++) {
250 for (unsigned r = 0; r < rows; r++)
251 ret->values[c].f32[r] = ir->value.f[c * rows + r];
252 }
253 break;
254
255 case GLSL_TYPE_DOUBLE:
256 for (unsigned c = 0; c < cols; c++) {
257 for (unsigned r = 0; r < rows; r++)
258 ret->values[c].f64[r] = ir->value.d[c * rows + r];
259 }
260 break;
261
262 case GLSL_TYPE_UINT64:
263 /* Only float base types can be matrices. */
264 assert(cols == 1);
265
266 for (unsigned r = 0; r < rows; r++)
267 ret->values[0].u64[r] = ir->value.u64[r];
268 break;
269
270 case GLSL_TYPE_INT64:
271 /* Only float base types can be matrices. */
272 assert(cols == 1);
273
274 for (unsigned r = 0; r < rows; r++)
275 ret->values[0].i64[r] = ir->value.i64[r];
276 break;
277
278 case GLSL_TYPE_BOOL:
279 /* Only float base types can be matrices. */
280 assert(cols == 1);
281
282 for (unsigned r = 0; r < rows; r++)
283 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
284
285 break;
286
287 case GLSL_TYPE_STRUCT:
288 case GLSL_TYPE_ARRAY:
289 ret->elements = ralloc_array(mem_ctx, nir_constant *,
290 ir->type->length);
291 ret->num_elements = ir->type->length;
292
293 for (i = 0; i < ir->type->length; i++)
294 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
295 break;
296
297 default:
298 unreachable("not reached");
299 }
300
301 return ret;
302 }
303
304 void
305 nir_visitor::visit(ir_variable *ir)
306 {
307 /* TODO: In future we should switch to using the NIR lowering pass but for
308 * now just ignore these variables as GLSL IR should have lowered them.
309 * Anything remaining are just dead vars that weren't cleaned up.
310 */
311 if (ir->data.mode == ir_var_shader_shared)
312 return;
313
314 nir_variable *var = rzalloc(shader, nir_variable);
315 var->type = ir->type;
316 var->name = ralloc_strdup(var, ir->name);
317
318 var->data.always_active_io = ir->data.always_active_io;
319 var->data.read_only = ir->data.read_only;
320 var->data.centroid = ir->data.centroid;
321 var->data.sample = ir->data.sample;
322 var->data.patch = ir->data.patch;
323 var->data.invariant = ir->data.invariant;
324 var->data.location = ir->data.location;
325 var->data.stream = ir->data.stream;
326 var->data.compact = false;
327
328 switch(ir->data.mode) {
329 case ir_var_auto:
330 case ir_var_temporary:
331 if (is_global)
332 var->data.mode = nir_var_global;
333 else
334 var->data.mode = nir_var_local;
335 break;
336
337 case ir_var_function_in:
338 case ir_var_function_out:
339 case ir_var_function_inout:
340 case ir_var_const_in:
341 var->data.mode = nir_var_local;
342 break;
343
344 case ir_var_shader_in:
345 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
346 ir->data.location == VARYING_SLOT_FACE) {
347 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
348 var->data.location = SYSTEM_VALUE_FRONT_FACE;
349 var->data.mode = nir_var_system_value;
350 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
351 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
352 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
353 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
354 var->data.mode = nir_var_system_value;
355 } else {
356 var->data.mode = nir_var_shader_in;
357
358 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
359 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
360 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
361 var->data.compact = ir->type->without_array()->is_scalar();
362 }
363 }
364
365 /* Mark all the locations that require two slots */
366 if (shader->info.stage == MESA_SHADER_VERTEX &&
367 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
368 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
369 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
370 shader->info.vs.double_inputs |= bitfield;
371 }
372 }
373 break;
374
375 case ir_var_shader_out:
376 var->data.mode = nir_var_shader_out;
377 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
378 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
379 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
380 var->data.compact = ir->type->without_array()->is_scalar();
381 }
382 break;
383
384 case ir_var_uniform:
385 var->data.mode = nir_var_uniform;
386 break;
387
388 case ir_var_shader_storage:
389 var->data.mode = nir_var_shader_storage;
390 break;
391
392 case ir_var_system_value:
393 var->data.mode = nir_var_system_value;
394 break;
395
396 default:
397 unreachable("not reached");
398 }
399
400 var->data.interpolation = ir->data.interpolation;
401 var->data.origin_upper_left = ir->data.origin_upper_left;
402 var->data.pixel_center_integer = ir->data.pixel_center_integer;
403 var->data.location_frac = ir->data.location_frac;
404
405 if (var->data.pixel_center_integer) {
406 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
407 shader->info.fs.pixel_center_integer = true;
408 }
409
410 switch (ir->data.depth_layout) {
411 case ir_depth_layout_none:
412 var->data.depth_layout = nir_depth_layout_none;
413 break;
414 case ir_depth_layout_any:
415 var->data.depth_layout = nir_depth_layout_any;
416 break;
417 case ir_depth_layout_greater:
418 var->data.depth_layout = nir_depth_layout_greater;
419 break;
420 case ir_depth_layout_less:
421 var->data.depth_layout = nir_depth_layout_less;
422 break;
423 case ir_depth_layout_unchanged:
424 var->data.depth_layout = nir_depth_layout_unchanged;
425 break;
426 default:
427 unreachable("not reached");
428 }
429
430 var->data.index = ir->data.index;
431 var->data.descriptor_set = 0;
432 var->data.binding = ir->data.binding;
433 var->data.explicit_binding = ir->data.explicit_binding;
434 var->data.bindless = ir->data.bindless;
435 var->data.offset = ir->data.offset;
436 var->data.image.read_only = ir->data.memory_read_only;
437 var->data.image.write_only = ir->data.memory_write_only;
438 var->data.image.coherent = ir->data.memory_coherent;
439 var->data.image._volatile = ir->data.memory_volatile;
440 var->data.image.restrict_flag = ir->data.memory_restrict;
441 var->data.image.format = ir->data.image_format;
442 var->data.fb_fetch_output = ir->data.fb_fetch_output;
443
444 var->num_state_slots = ir->get_num_state_slots();
445 if (var->num_state_slots > 0) {
446 var->state_slots = rzalloc_array(var, nir_state_slot,
447 var->num_state_slots);
448
449 ir_state_slot *state_slots = ir->get_state_slots();
450 for (unsigned i = 0; i < var->num_state_slots; i++) {
451 for (unsigned j = 0; j < 5; j++)
452 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
453 var->state_slots[i].swizzle = state_slots[i].swizzle;
454 }
455 } else {
456 var->state_slots = NULL;
457 }
458
459 var->constant_initializer = constant_copy(ir->constant_initializer, var);
460
461 var->interface_type = ir->get_interface_type();
462
463 if (var->data.mode == nir_var_local)
464 nir_function_impl_add_variable(impl, var);
465 else
466 nir_shader_add_variable(shader, var);
467
468 _mesa_hash_table_insert(var_table, ir, var);
469 this->var = var;
470 }
471
472 ir_visitor_status
473 nir_function_visitor::visit_enter(ir_function *ir)
474 {
475 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
476 visitor->create_function(sig);
477 }
478 return visit_continue_with_parent;
479 }
480
481 void
482 nir_visitor::create_function(ir_function_signature *ir)
483 {
484 if (ir->is_intrinsic())
485 return;
486
487 nir_function *func = nir_function_create(shader, ir->function_name());
488
489 assert(ir->parameters.is_empty());
490 assert(ir->return_type == glsl_type::void_type);
491
492 _mesa_hash_table_insert(this->overload_table, ir, func);
493 }
494
495 void
496 nir_visitor::visit(ir_function *ir)
497 {
498 foreach_in_list(ir_function_signature, sig, &ir->signatures)
499 sig->accept(this);
500 }
501
502 void
503 nir_visitor::visit(ir_function_signature *ir)
504 {
505 if (ir->is_intrinsic())
506 return;
507
508 struct hash_entry *entry =
509 _mesa_hash_table_search(this->overload_table, ir);
510
511 assert(entry);
512 nir_function *func = (nir_function *) entry->data;
513
514 if (ir->is_defined) {
515 nir_function_impl *impl = nir_function_impl_create(func);
516 this->impl = impl;
517
518 assert(strcmp(func->name, "main") == 0);
519 assert(ir->parameters.is_empty());
520 assert(func->return_type == glsl_type::void_type);
521
522 this->is_global = false;
523
524 nir_builder_init(&b, impl);
525 b.cursor = nir_after_cf_list(&impl->body);
526 visit_exec_list(&ir->body, this);
527
528 this->is_global = true;
529 } else {
530 func->impl = NULL;
531 }
532 }
533
534 void
535 nir_visitor::visit(ir_loop *ir)
536 {
537 nir_push_loop(&b);
538 visit_exec_list(&ir->body_instructions, this);
539 nir_pop_loop(&b, NULL);
540 }
541
542 void
543 nir_visitor::visit(ir_if *ir)
544 {
545 nir_push_if(&b, evaluate_rvalue(ir->condition));
546 visit_exec_list(&ir->then_instructions, this);
547 nir_push_else(&b, NULL);
548 visit_exec_list(&ir->else_instructions, this);
549 nir_pop_if(&b, NULL);
550 }
551
552 void
553 nir_visitor::visit(ir_discard *ir)
554 {
555 /*
556 * discards aren't treated as control flow, because before we lower them
557 * they can appear anywhere in the shader and the stuff after them may still
558 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
559 * discards will be immediately followed by a return.
560 */
561
562 nir_intrinsic_instr *discard;
563 if (ir->condition) {
564 discard = nir_intrinsic_instr_create(this->shader,
565 nir_intrinsic_discard_if);
566 discard->src[0] =
567 nir_src_for_ssa(evaluate_rvalue(ir->condition));
568 } else {
569 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
570 }
571
572 nir_builder_instr_insert(&b, &discard->instr);
573 }
574
575 void
576 nir_visitor::visit(ir_emit_vertex *ir)
577 {
578 nir_intrinsic_instr *instr =
579 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
580 nir_intrinsic_set_stream_id(instr, ir->stream_id());
581 nir_builder_instr_insert(&b, &instr->instr);
582 }
583
584 void
585 nir_visitor::visit(ir_end_primitive *ir)
586 {
587 nir_intrinsic_instr *instr =
588 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
589 nir_intrinsic_set_stream_id(instr, ir->stream_id());
590 nir_builder_instr_insert(&b, &instr->instr);
591 }
592
593 void
594 nir_visitor::visit(ir_loop_jump *ir)
595 {
596 nir_jump_type type;
597 switch (ir->mode) {
598 case ir_loop_jump::jump_break:
599 type = nir_jump_break;
600 break;
601 case ir_loop_jump::jump_continue:
602 type = nir_jump_continue;
603 break;
604 default:
605 unreachable("not reached");
606 }
607
608 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
609 nir_builder_instr_insert(&b, &instr->instr);
610 }
611
612 void
613 nir_visitor::visit(ir_return *ir)
614 {
615 assert(ir->value == NULL);
616 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
617 nir_builder_instr_insert(&b, &instr->instr);
618 }
619
620 void
621 nir_visitor::visit(ir_call *ir)
622 {
623 if (ir->callee->is_intrinsic()) {
624 nir_intrinsic_op op;
625
626 switch (ir->callee->intrinsic_id) {
627 case ir_intrinsic_atomic_counter_read:
628 op = nir_intrinsic_atomic_counter_read_deref;
629 break;
630 case ir_intrinsic_atomic_counter_increment:
631 op = nir_intrinsic_atomic_counter_inc_deref;
632 break;
633 case ir_intrinsic_atomic_counter_predecrement:
634 op = nir_intrinsic_atomic_counter_dec_deref;
635 break;
636 case ir_intrinsic_atomic_counter_add:
637 op = nir_intrinsic_atomic_counter_add_deref;
638 break;
639 case ir_intrinsic_atomic_counter_and:
640 op = nir_intrinsic_atomic_counter_and_deref;
641 break;
642 case ir_intrinsic_atomic_counter_or:
643 op = nir_intrinsic_atomic_counter_or_deref;
644 break;
645 case ir_intrinsic_atomic_counter_xor:
646 op = nir_intrinsic_atomic_counter_xor_deref;
647 break;
648 case ir_intrinsic_atomic_counter_min:
649 op = nir_intrinsic_atomic_counter_min_deref;
650 break;
651 case ir_intrinsic_atomic_counter_max:
652 op = nir_intrinsic_atomic_counter_max_deref;
653 break;
654 case ir_intrinsic_atomic_counter_exchange:
655 op = nir_intrinsic_atomic_counter_exchange_deref;
656 break;
657 case ir_intrinsic_atomic_counter_comp_swap:
658 op = nir_intrinsic_atomic_counter_comp_swap_deref;
659 break;
660 case ir_intrinsic_image_load:
661 op = nir_intrinsic_image_deref_load;
662 break;
663 case ir_intrinsic_image_store:
664 op = nir_intrinsic_image_deref_store;
665 break;
666 case ir_intrinsic_image_atomic_add:
667 op = nir_intrinsic_image_deref_atomic_add;
668 break;
669 case ir_intrinsic_image_atomic_min:
670 op = nir_intrinsic_image_deref_atomic_min;
671 break;
672 case ir_intrinsic_image_atomic_max:
673 op = nir_intrinsic_image_deref_atomic_max;
674 break;
675 case ir_intrinsic_image_atomic_and:
676 op = nir_intrinsic_image_deref_atomic_and;
677 break;
678 case ir_intrinsic_image_atomic_or:
679 op = nir_intrinsic_image_deref_atomic_or;
680 break;
681 case ir_intrinsic_image_atomic_xor:
682 op = nir_intrinsic_image_deref_atomic_xor;
683 break;
684 case ir_intrinsic_image_atomic_exchange:
685 op = nir_intrinsic_image_deref_atomic_exchange;
686 break;
687 case ir_intrinsic_image_atomic_comp_swap:
688 op = nir_intrinsic_image_deref_atomic_comp_swap;
689 break;
690 case ir_intrinsic_memory_barrier:
691 op = nir_intrinsic_memory_barrier;
692 break;
693 case ir_intrinsic_image_size:
694 op = nir_intrinsic_image_deref_size;
695 break;
696 case ir_intrinsic_image_samples:
697 op = nir_intrinsic_image_deref_samples;
698 break;
699 case ir_intrinsic_ssbo_store:
700 op = nir_intrinsic_store_ssbo;
701 break;
702 case ir_intrinsic_ssbo_load:
703 op = nir_intrinsic_load_ssbo;
704 break;
705 case ir_intrinsic_ssbo_atomic_add:
706 op = nir_intrinsic_ssbo_atomic_add;
707 break;
708 case ir_intrinsic_ssbo_atomic_and:
709 op = nir_intrinsic_ssbo_atomic_and;
710 break;
711 case ir_intrinsic_ssbo_atomic_or:
712 op = nir_intrinsic_ssbo_atomic_or;
713 break;
714 case ir_intrinsic_ssbo_atomic_xor:
715 op = nir_intrinsic_ssbo_atomic_xor;
716 break;
717 case ir_intrinsic_ssbo_atomic_min:
718 assert(ir->return_deref);
719 if (ir->return_deref->type == glsl_type::int_type)
720 op = nir_intrinsic_ssbo_atomic_imin;
721 else if (ir->return_deref->type == glsl_type::uint_type)
722 op = nir_intrinsic_ssbo_atomic_umin;
723 else
724 unreachable("Invalid type");
725 break;
726 case ir_intrinsic_ssbo_atomic_max:
727 assert(ir->return_deref);
728 if (ir->return_deref->type == glsl_type::int_type)
729 op = nir_intrinsic_ssbo_atomic_imax;
730 else if (ir->return_deref->type == glsl_type::uint_type)
731 op = nir_intrinsic_ssbo_atomic_umax;
732 else
733 unreachable("Invalid type");
734 break;
735 case ir_intrinsic_ssbo_atomic_exchange:
736 op = nir_intrinsic_ssbo_atomic_exchange;
737 break;
738 case ir_intrinsic_ssbo_atomic_comp_swap:
739 op = nir_intrinsic_ssbo_atomic_comp_swap;
740 break;
741 case ir_intrinsic_shader_clock:
742 op = nir_intrinsic_shader_clock;
743 break;
744 case ir_intrinsic_begin_invocation_interlock:
745 op = nir_intrinsic_begin_invocation_interlock;
746 break;
747 case ir_intrinsic_end_invocation_interlock:
748 op = nir_intrinsic_end_invocation_interlock;
749 break;
750 case ir_intrinsic_group_memory_barrier:
751 op = nir_intrinsic_group_memory_barrier;
752 break;
753 case ir_intrinsic_memory_barrier_atomic_counter:
754 op = nir_intrinsic_memory_barrier_atomic_counter;
755 break;
756 case ir_intrinsic_memory_barrier_buffer:
757 op = nir_intrinsic_memory_barrier_buffer;
758 break;
759 case ir_intrinsic_memory_barrier_image:
760 op = nir_intrinsic_memory_barrier_image;
761 break;
762 case ir_intrinsic_memory_barrier_shared:
763 op = nir_intrinsic_memory_barrier_shared;
764 break;
765 case ir_intrinsic_shared_load:
766 op = nir_intrinsic_load_shared;
767 break;
768 case ir_intrinsic_shared_store:
769 op = nir_intrinsic_store_shared;
770 break;
771 case ir_intrinsic_shared_atomic_add:
772 op = nir_intrinsic_shared_atomic_add;
773 break;
774 case ir_intrinsic_shared_atomic_and:
775 op = nir_intrinsic_shared_atomic_and;
776 break;
777 case ir_intrinsic_shared_atomic_or:
778 op = nir_intrinsic_shared_atomic_or;
779 break;
780 case ir_intrinsic_shared_atomic_xor:
781 op = nir_intrinsic_shared_atomic_xor;
782 break;
783 case ir_intrinsic_shared_atomic_min:
784 assert(ir->return_deref);
785 if (ir->return_deref->type == glsl_type::int_type)
786 op = nir_intrinsic_shared_atomic_imin;
787 else if (ir->return_deref->type == glsl_type::uint_type)
788 op = nir_intrinsic_shared_atomic_umin;
789 else
790 unreachable("Invalid type");
791 break;
792 case ir_intrinsic_shared_atomic_max:
793 assert(ir->return_deref);
794 if (ir->return_deref->type == glsl_type::int_type)
795 op = nir_intrinsic_shared_atomic_imax;
796 else if (ir->return_deref->type == glsl_type::uint_type)
797 op = nir_intrinsic_shared_atomic_umax;
798 else
799 unreachable("Invalid type");
800 break;
801 case ir_intrinsic_shared_atomic_exchange:
802 op = nir_intrinsic_shared_atomic_exchange;
803 break;
804 case ir_intrinsic_shared_atomic_comp_swap:
805 op = nir_intrinsic_shared_atomic_comp_swap;
806 break;
807 case ir_intrinsic_vote_any:
808 op = nir_intrinsic_vote_any;
809 break;
810 case ir_intrinsic_vote_all:
811 op = nir_intrinsic_vote_all;
812 break;
813 case ir_intrinsic_vote_eq:
814 op = nir_intrinsic_vote_ieq;
815 break;
816 case ir_intrinsic_ballot:
817 op = nir_intrinsic_ballot;
818 break;
819 case ir_intrinsic_read_invocation:
820 op = nir_intrinsic_read_invocation;
821 break;
822 case ir_intrinsic_read_first_invocation:
823 op = nir_intrinsic_read_first_invocation;
824 break;
825 default:
826 unreachable("not reached");
827 }
828
829 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
830 nir_dest *dest = &instr->dest;
831
832 switch (op) {
833 case nir_intrinsic_atomic_counter_read_deref:
834 case nir_intrinsic_atomic_counter_inc_deref:
835 case nir_intrinsic_atomic_counter_dec_deref:
836 case nir_intrinsic_atomic_counter_add_deref:
837 case nir_intrinsic_atomic_counter_min_deref:
838 case nir_intrinsic_atomic_counter_max_deref:
839 case nir_intrinsic_atomic_counter_and_deref:
840 case nir_intrinsic_atomic_counter_or_deref:
841 case nir_intrinsic_atomic_counter_xor_deref:
842 case nir_intrinsic_atomic_counter_exchange_deref:
843 case nir_intrinsic_atomic_counter_comp_swap_deref: {
844 /* Set the counter variable dereference. */
845 exec_node *param = ir->actual_parameters.get_head();
846 ir_dereference *counter = (ir_dereference *)param;
847
848 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
849 param = param->get_next();
850
851 /* Set the intrinsic destination. */
852 if (ir->return_deref) {
853 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
854 }
855
856 /* Set the intrinsic parameters. */
857 if (!param->is_tail_sentinel()) {
858 instr->src[1] =
859 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
860 param = param->get_next();
861 }
862
863 if (!param->is_tail_sentinel()) {
864 instr->src[2] =
865 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
866 param = param->get_next();
867 }
868
869 nir_builder_instr_insert(&b, &instr->instr);
870 break;
871 }
872 case nir_intrinsic_image_deref_load:
873 case nir_intrinsic_image_deref_store:
874 case nir_intrinsic_image_deref_atomic_add:
875 case nir_intrinsic_image_deref_atomic_min:
876 case nir_intrinsic_image_deref_atomic_max:
877 case nir_intrinsic_image_deref_atomic_and:
878 case nir_intrinsic_image_deref_atomic_or:
879 case nir_intrinsic_image_deref_atomic_xor:
880 case nir_intrinsic_image_deref_atomic_exchange:
881 case nir_intrinsic_image_deref_atomic_comp_swap:
882 case nir_intrinsic_image_deref_samples:
883 case nir_intrinsic_image_deref_size: {
884 nir_ssa_undef_instr *instr_undef =
885 nir_ssa_undef_instr_create(shader, 1, 32);
886 nir_builder_instr_insert(&b, &instr_undef->instr);
887
888 /* Set the image variable dereference. */
889 exec_node *param = ir->actual_parameters.get_head();
890 ir_dereference *image = (ir_dereference *)param;
891 const glsl_type *type =
892 image->variable_referenced()->type->without_array();
893
894 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
895 param = param->get_next();
896
897 /* Set the intrinsic destination. */
898 if (ir->return_deref) {
899 unsigned num_components = ir->return_deref->type->vector_elements;
900 if (instr->intrinsic == nir_intrinsic_image_deref_size)
901 instr->num_components = num_components;
902 nir_ssa_dest_init(&instr->instr, &instr->dest,
903 num_components, 32, NULL);
904 }
905
906 if (op == nir_intrinsic_image_deref_size ||
907 op == nir_intrinsic_image_deref_samples) {
908 nir_builder_instr_insert(&b, &instr->instr);
909 break;
910 }
911
912 /* Set the address argument, extending the coordinate vector to four
913 * components.
914 */
915 nir_ssa_def *src_addr =
916 evaluate_rvalue((ir_dereference *)param);
917 nir_ssa_def *srcs[4];
918
919 for (int i = 0; i < 4; i++) {
920 if (i < type->coordinate_components())
921 srcs[i] = nir_channel(&b, src_addr, i);
922 else
923 srcs[i] = &instr_undef->def;
924 }
925
926 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
927 param = param->get_next();
928
929 /* Set the sample argument, which is undefined for single-sample
930 * images.
931 */
932 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
933 instr->src[2] =
934 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
935 param = param->get_next();
936 } else {
937 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
938 }
939
940 /* Set the intrinsic parameters. */
941 if (!param->is_tail_sentinel()) {
942 instr->src[3] =
943 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
944 param = param->get_next();
945 }
946
947 if (!param->is_tail_sentinel()) {
948 instr->src[4] =
949 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
950 param = param->get_next();
951 }
952 nir_builder_instr_insert(&b, &instr->instr);
953 break;
954 }
955 case nir_intrinsic_memory_barrier:
956 case nir_intrinsic_group_memory_barrier:
957 case nir_intrinsic_memory_barrier_atomic_counter:
958 case nir_intrinsic_memory_barrier_buffer:
959 case nir_intrinsic_memory_barrier_image:
960 case nir_intrinsic_memory_barrier_shared:
961 nir_builder_instr_insert(&b, &instr->instr);
962 break;
963 case nir_intrinsic_shader_clock:
964 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
965 instr->num_components = 2;
966 nir_builder_instr_insert(&b, &instr->instr);
967 break;
968 case nir_intrinsic_begin_invocation_interlock:
969 nir_builder_instr_insert(&b, &instr->instr);
970 break;
971 case nir_intrinsic_end_invocation_interlock:
972 nir_builder_instr_insert(&b, &instr->instr);
973 break;
974 case nir_intrinsic_store_ssbo: {
975 exec_node *param = ir->actual_parameters.get_head();
976 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
977
978 param = param->get_next();
979 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
980
981 param = param->get_next();
982 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
983
984 param = param->get_next();
985 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
986 assert(write_mask);
987
988 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
989 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
990 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
991 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
992 instr->num_components = val->type->vector_elements;
993
994 nir_builder_instr_insert(&b, &instr->instr);
995 break;
996 }
997 case nir_intrinsic_load_ssbo: {
998 exec_node *param = ir->actual_parameters.get_head();
999 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1000
1001 param = param->get_next();
1002 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1003
1004 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1005 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1006
1007 const glsl_type *type = ir->return_deref->var->type;
1008 instr->num_components = type->vector_elements;
1009
1010 /* Setup destination register */
1011 unsigned bit_size = glsl_get_bit_size(type);
1012 nir_ssa_dest_init(&instr->instr, &instr->dest,
1013 type->vector_elements, bit_size, NULL);
1014
1015 /* Insert the created nir instruction now since in the case of boolean
1016 * result we will need to emit another instruction after it
1017 */
1018 nir_builder_instr_insert(&b, &instr->instr);
1019
1020 /*
1021 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1022 * consider a true boolean to be ~0. Fix this up with a != 0
1023 * comparison.
1024 */
1025 if (type->is_boolean()) {
1026 nir_alu_instr *load_ssbo_compare =
1027 nir_alu_instr_create(shader, nir_op_ine);
1028 load_ssbo_compare->src[0].src.is_ssa = true;
1029 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1030 load_ssbo_compare->src[1].src =
1031 nir_src_for_ssa(nir_imm_int(&b, 0));
1032 for (unsigned i = 0; i < type->vector_elements; i++)
1033 load_ssbo_compare->src[1].swizzle[i] = 0;
1034 nir_ssa_dest_init(&load_ssbo_compare->instr,
1035 &load_ssbo_compare->dest.dest,
1036 type->vector_elements, bit_size, NULL);
1037 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1038 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1039 dest = &load_ssbo_compare->dest.dest;
1040 }
1041 break;
1042 }
1043 case nir_intrinsic_ssbo_atomic_add:
1044 case nir_intrinsic_ssbo_atomic_imin:
1045 case nir_intrinsic_ssbo_atomic_umin:
1046 case nir_intrinsic_ssbo_atomic_imax:
1047 case nir_intrinsic_ssbo_atomic_umax:
1048 case nir_intrinsic_ssbo_atomic_and:
1049 case nir_intrinsic_ssbo_atomic_or:
1050 case nir_intrinsic_ssbo_atomic_xor:
1051 case nir_intrinsic_ssbo_atomic_exchange:
1052 case nir_intrinsic_ssbo_atomic_comp_swap: {
1053 int param_count = ir->actual_parameters.length();
1054 assert(param_count == 3 || param_count == 4);
1055
1056 /* Block index */
1057 exec_node *param = ir->actual_parameters.get_head();
1058 ir_instruction *inst = (ir_instruction *) param;
1059 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1060
1061 /* Offset */
1062 param = param->get_next();
1063 inst = (ir_instruction *) param;
1064 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1065
1066 /* data1 parameter (this is always present) */
1067 param = param->get_next();
1068 inst = (ir_instruction *) param;
1069 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1070
1071 /* data2 parameter (only with atomic_comp_swap) */
1072 if (param_count == 4) {
1073 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1074 param = param->get_next();
1075 inst = (ir_instruction *) param;
1076 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1077 }
1078
1079 /* Atomic result */
1080 assert(ir->return_deref);
1081 nir_ssa_dest_init(&instr->instr, &instr->dest,
1082 ir->return_deref->type->vector_elements, 32, NULL);
1083 nir_builder_instr_insert(&b, &instr->instr);
1084 break;
1085 }
1086 case nir_intrinsic_load_shared: {
1087 exec_node *param = ir->actual_parameters.get_head();
1088 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1089
1090 nir_intrinsic_set_base(instr, 0);
1091 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1092
1093 const glsl_type *type = ir->return_deref->var->type;
1094 instr->num_components = type->vector_elements;
1095
1096 /* Setup destination register */
1097 unsigned bit_size = glsl_get_bit_size(type);
1098 nir_ssa_dest_init(&instr->instr, &instr->dest,
1099 type->vector_elements, bit_size, NULL);
1100
1101 nir_builder_instr_insert(&b, &instr->instr);
1102 break;
1103 }
1104 case nir_intrinsic_store_shared: {
1105 exec_node *param = ir->actual_parameters.get_head();
1106 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1107
1108 param = param->get_next();
1109 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1110
1111 param = param->get_next();
1112 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1113 assert(write_mask);
1114
1115 nir_intrinsic_set_base(instr, 0);
1116 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1117
1118 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1119
1120 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1121 instr->num_components = val->type->vector_elements;
1122
1123 nir_builder_instr_insert(&b, &instr->instr);
1124 break;
1125 }
1126 case nir_intrinsic_shared_atomic_add:
1127 case nir_intrinsic_shared_atomic_imin:
1128 case nir_intrinsic_shared_atomic_umin:
1129 case nir_intrinsic_shared_atomic_imax:
1130 case nir_intrinsic_shared_atomic_umax:
1131 case nir_intrinsic_shared_atomic_and:
1132 case nir_intrinsic_shared_atomic_or:
1133 case nir_intrinsic_shared_atomic_xor:
1134 case nir_intrinsic_shared_atomic_exchange:
1135 case nir_intrinsic_shared_atomic_comp_swap: {
1136 int param_count = ir->actual_parameters.length();
1137 assert(param_count == 2 || param_count == 3);
1138
1139 /* Offset */
1140 exec_node *param = ir->actual_parameters.get_head();
1141 ir_instruction *inst = (ir_instruction *) param;
1142 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1143
1144 /* data1 parameter (this is always present) */
1145 param = param->get_next();
1146 inst = (ir_instruction *) param;
1147 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1148
1149 /* data2 parameter (only with atomic_comp_swap) */
1150 if (param_count == 3) {
1151 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1152 param = param->get_next();
1153 inst = (ir_instruction *) param;
1154 instr->src[2] =
1155 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1156 }
1157
1158 /* Atomic result */
1159 assert(ir->return_deref);
1160 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1161 nir_ssa_dest_init(&instr->instr, &instr->dest,
1162 ir->return_deref->type->vector_elements,
1163 bit_size, NULL);
1164 nir_builder_instr_insert(&b, &instr->instr);
1165 break;
1166 }
1167 case nir_intrinsic_vote_any:
1168 case nir_intrinsic_vote_all:
1169 case nir_intrinsic_vote_ieq: {
1170 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1171 instr->num_components = 1;
1172
1173 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1174 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1175
1176 nir_builder_instr_insert(&b, &instr->instr);
1177 break;
1178 }
1179
1180 case nir_intrinsic_ballot: {
1181 nir_ssa_dest_init(&instr->instr, &instr->dest,
1182 ir->return_deref->type->vector_elements, 64, NULL);
1183 instr->num_components = ir->return_deref->type->vector_elements;
1184
1185 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1186 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1187
1188 nir_builder_instr_insert(&b, &instr->instr);
1189 break;
1190 }
1191 case nir_intrinsic_read_invocation: {
1192 nir_ssa_dest_init(&instr->instr, &instr->dest,
1193 ir->return_deref->type->vector_elements, 32, NULL);
1194 instr->num_components = ir->return_deref->type->vector_elements;
1195
1196 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1197 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1198
1199 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1200 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1201
1202 nir_builder_instr_insert(&b, &instr->instr);
1203 break;
1204 }
1205 case nir_intrinsic_read_first_invocation: {
1206 nir_ssa_dest_init(&instr->instr, &instr->dest,
1207 ir->return_deref->type->vector_elements, 32, NULL);
1208 instr->num_components = ir->return_deref->type->vector_elements;
1209
1210 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1211 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1212
1213 nir_builder_instr_insert(&b, &instr->instr);
1214 break;
1215 }
1216 default:
1217 unreachable("not reached");
1218 }
1219
1220 if (ir->return_deref)
1221 nir_store_deref(&b, evaluate_deref(ir->return_deref), &dest->ssa, ~0);
1222
1223 return;
1224 }
1225
1226 unreachable("glsl_to_nir only handles function calls to intrinsics");
1227 }
1228
1229 void
1230 nir_visitor::visit(ir_assignment *ir)
1231 {
1232 unsigned num_components = ir->lhs->type->vector_elements;
1233
1234 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1235 ir->lhs->variable_referenced()->data.precise;
1236
1237 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1238 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1239 if (ir->condition) {
1240 nir_push_if(&b, evaluate_rvalue(ir->condition));
1241 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1242 nir_pop_if(&b, NULL);
1243 } else {
1244 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1245 }
1246 return;
1247 }
1248
1249 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1250
1251 ir->lhs->accept(this);
1252 nir_deref_instr *lhs_deref = this->deref;
1253 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1254
1255 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1256 /* GLSL IR will give us the input to the write-masked assignment in a
1257 * single packed vector. So, for example, if the writemask is xzw, then
1258 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1259 * from the load.
1260 */
1261 unsigned swiz[4];
1262 unsigned component = 0;
1263 for (unsigned i = 0; i < 4; i++) {
1264 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1265 }
1266 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1267 }
1268
1269 if (ir->condition) {
1270 nir_push_if(&b, evaluate_rvalue(ir->condition));
1271 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1272 nir_pop_if(&b, NULL);
1273 } else {
1274 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1275 }
1276 }
1277
1278 /*
1279 * Given an instruction, returns a pointer to its destination or NULL if there
1280 * is no destination.
1281 *
1282 * Note that this only handles instructions we generate at this level.
1283 */
1284 static nir_dest *
1285 get_instr_dest(nir_instr *instr)
1286 {
1287 nir_alu_instr *alu_instr;
1288 nir_intrinsic_instr *intrinsic_instr;
1289 nir_tex_instr *tex_instr;
1290
1291 switch (instr->type) {
1292 case nir_instr_type_alu:
1293 alu_instr = nir_instr_as_alu(instr);
1294 return &alu_instr->dest.dest;
1295
1296 case nir_instr_type_intrinsic:
1297 intrinsic_instr = nir_instr_as_intrinsic(instr);
1298 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1299 return &intrinsic_instr->dest;
1300 else
1301 return NULL;
1302
1303 case nir_instr_type_tex:
1304 tex_instr = nir_instr_as_tex(instr);
1305 return &tex_instr->dest;
1306
1307 default:
1308 unreachable("not reached");
1309 }
1310
1311 return NULL;
1312 }
1313
1314 void
1315 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1316 unsigned bit_size)
1317 {
1318 nir_dest *dest = get_instr_dest(instr);
1319
1320 if (dest)
1321 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1322
1323 nir_builder_instr_insert(&b, instr);
1324
1325 if (dest) {
1326 assert(dest->is_ssa);
1327 this->result = &dest->ssa;
1328 }
1329 }
1330
1331 nir_ssa_def *
1332 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1333 {
1334 ir->accept(this);
1335 if (ir->as_dereference() || ir->as_constant()) {
1336 /*
1337 * A dereference is being used on the right hand side, which means we
1338 * must emit a variable load.
1339 */
1340
1341 this->result = nir_load_deref(&b, this->deref);
1342 }
1343
1344 return this->result;
1345 }
1346
1347 static bool
1348 type_is_float(glsl_base_type type)
1349 {
1350 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1351 type == GLSL_TYPE_FLOAT16;
1352 }
1353
1354 static bool
1355 type_is_signed(glsl_base_type type)
1356 {
1357 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1358 type == GLSL_TYPE_INT16;
1359 }
1360
1361 void
1362 nir_visitor::visit(ir_expression *ir)
1363 {
1364 /* Some special cases */
1365 switch (ir->operation) {
1366 case ir_binop_ubo_load: {
1367 nir_intrinsic_instr *load =
1368 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1369 unsigned bit_size = glsl_get_bit_size(ir->type);
1370 load->num_components = ir->type->vector_elements;
1371 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1372 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1373 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1374
1375 /*
1376 * In UBO's, a true boolean value is any non-zero value, but we consider
1377 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1378 */
1379
1380 if (ir->type->is_boolean())
1381 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1382
1383 return;
1384 }
1385
1386 case ir_unop_interpolate_at_centroid:
1387 case ir_binop_interpolate_at_offset:
1388 case ir_binop_interpolate_at_sample: {
1389 ir_dereference *deref = ir->operands[0]->as_dereference();
1390 ir_swizzle *swizzle = NULL;
1391 if (!deref) {
1392 /* the api does not allow a swizzle here, but the varying packing code
1393 * may have pushed one into here.
1394 */
1395 swizzle = ir->operands[0]->as_swizzle();
1396 assert(swizzle);
1397 deref = swizzle->val->as_dereference();
1398 assert(deref);
1399 }
1400
1401 deref->accept(this);
1402
1403 nir_intrinsic_op op;
1404 if (this->deref->mode == nir_var_shader_in) {
1405 switch (ir->operation) {
1406 case ir_unop_interpolate_at_centroid:
1407 op = nir_intrinsic_interp_deref_at_centroid;
1408 break;
1409 case ir_binop_interpolate_at_offset:
1410 op = nir_intrinsic_interp_deref_at_offset;
1411 break;
1412 case ir_binop_interpolate_at_sample:
1413 op = nir_intrinsic_interp_deref_at_sample;
1414 break;
1415 default:
1416 unreachable("Invalid interpolation intrinsic");
1417 }
1418 } else {
1419 /* This case can happen if the vertex shader does not write the
1420 * given varying. In this case, the linker will lower it to a
1421 * global variable. Since interpolating a variable makes no
1422 * sense, we'll just turn it into a load which will probably
1423 * eventually end up as an SSA definition.
1424 */
1425 assert(this->deref->mode == nir_var_global);
1426 op = nir_intrinsic_load_deref;
1427 }
1428
1429 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1430 intrin->num_components = deref->type->vector_elements;
1431 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1432
1433 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1434 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1435 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1436
1437 unsigned bit_size = glsl_get_bit_size(deref->type);
1438 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1439
1440 if (swizzle) {
1441 unsigned swiz[4] = {
1442 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1443 };
1444
1445 result = nir_swizzle(&b, result, swiz,
1446 swizzle->type->vector_elements, false);
1447 }
1448
1449 return;
1450 }
1451
1452 default:
1453 break;
1454 }
1455
1456 nir_ssa_def *srcs[4];
1457 for (unsigned i = 0; i < ir->num_operands; i++)
1458 srcs[i] = evaluate_rvalue(ir->operands[i]);
1459
1460 glsl_base_type types[4];
1461 for (unsigned i = 0; i < ir->num_operands; i++)
1462 if (supports_ints)
1463 types[i] = ir->operands[i]->type->base_type;
1464 else
1465 types[i] = GLSL_TYPE_FLOAT;
1466
1467 glsl_base_type out_type;
1468 if (supports_ints)
1469 out_type = ir->type->base_type;
1470 else
1471 out_type = GLSL_TYPE_FLOAT;
1472
1473 switch (ir->operation) {
1474 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1475 case ir_unop_logic_not:
1476 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1477 break;
1478 case ir_unop_neg:
1479 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1480 : nir_ineg(&b, srcs[0]);
1481 break;
1482 case ir_unop_abs:
1483 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1484 : nir_iabs(&b, srcs[0]);
1485 break;
1486 case ir_unop_saturate:
1487 assert(type_is_float(types[0]));
1488 result = nir_fsat(&b, srcs[0]);
1489 break;
1490 case ir_unop_sign:
1491 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1492 : nir_isign(&b, srcs[0]);
1493 break;
1494 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1495 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1496 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1497 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1498 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1499 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1500 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1501 case ir_unop_i2f:
1502 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1503 break;
1504 case ir_unop_u2f:
1505 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1506 break;
1507 case ir_unop_b2f:
1508 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1509 break;
1510 case ir_unop_f2i:
1511 case ir_unop_f2u:
1512 case ir_unop_f2b:
1513 case ir_unop_i2b:
1514 case ir_unop_b2i:
1515 case ir_unop_b2i64:
1516 case ir_unop_d2f:
1517 case ir_unop_f2d:
1518 case ir_unop_d2i:
1519 case ir_unop_d2u:
1520 case ir_unop_d2b:
1521 case ir_unop_i2d:
1522 case ir_unop_u2d:
1523 case ir_unop_i642i:
1524 case ir_unop_i642u:
1525 case ir_unop_i642f:
1526 case ir_unop_i642b:
1527 case ir_unop_i642d:
1528 case ir_unop_u642i:
1529 case ir_unop_u642u:
1530 case ir_unop_u642f:
1531 case ir_unop_u642d:
1532 case ir_unop_i2i64:
1533 case ir_unop_u2i64:
1534 case ir_unop_f2i64:
1535 case ir_unop_d2i64:
1536 case ir_unop_i2u64:
1537 case ir_unop_u2u64:
1538 case ir_unop_f2u64:
1539 case ir_unop_d2u64:
1540 case ir_unop_i2u:
1541 case ir_unop_u2i:
1542 case ir_unop_i642u64:
1543 case ir_unop_u642i64: {
1544 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1545 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1546 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1547 nir_rounding_mode_undef),
1548 srcs[0], NULL, NULL, NULL);
1549 /* b2i and b2f don't have fixed bit-size versions so the builder will
1550 * just assume 32 and we have to fix it up here.
1551 */
1552 result->bit_size = nir_alu_type_get_type_size(dst_type);
1553 break;
1554 }
1555
1556 case ir_unop_bitcast_i2f:
1557 case ir_unop_bitcast_f2i:
1558 case ir_unop_bitcast_u2f:
1559 case ir_unop_bitcast_f2u:
1560 case ir_unop_bitcast_i642d:
1561 case ir_unop_bitcast_d2i64:
1562 case ir_unop_bitcast_u642d:
1563 case ir_unop_bitcast_d2u64:
1564 case ir_unop_subroutine_to_int:
1565 /* no-op */
1566 result = nir_imov(&b, srcs[0]);
1567 break;
1568 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1569 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1570 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1571 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1572 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1573 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1574 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1575 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1576 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1577 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1578 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1579 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1580 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1581 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1582 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1583 case ir_unop_pack_snorm_2x16:
1584 result = nir_pack_snorm_2x16(&b, srcs[0]);
1585 break;
1586 case ir_unop_pack_snorm_4x8:
1587 result = nir_pack_snorm_4x8(&b, srcs[0]);
1588 break;
1589 case ir_unop_pack_unorm_2x16:
1590 result = nir_pack_unorm_2x16(&b, srcs[0]);
1591 break;
1592 case ir_unop_pack_unorm_4x8:
1593 result = nir_pack_unorm_4x8(&b, srcs[0]);
1594 break;
1595 case ir_unop_pack_half_2x16:
1596 result = nir_pack_half_2x16(&b, srcs[0]);
1597 break;
1598 case ir_unop_unpack_snorm_2x16:
1599 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1600 break;
1601 case ir_unop_unpack_snorm_4x8:
1602 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1603 break;
1604 case ir_unop_unpack_unorm_2x16:
1605 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1606 break;
1607 case ir_unop_unpack_unorm_4x8:
1608 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1609 break;
1610 case ir_unop_unpack_half_2x16:
1611 result = nir_unpack_half_2x16(&b, srcs[0]);
1612 break;
1613 case ir_unop_pack_sampler_2x32:
1614 case ir_unop_pack_image_2x32:
1615 case ir_unop_pack_double_2x32:
1616 case ir_unop_pack_int_2x32:
1617 case ir_unop_pack_uint_2x32:
1618 result = nir_pack_64_2x32(&b, srcs[0]);
1619 break;
1620 case ir_unop_unpack_sampler_2x32:
1621 case ir_unop_unpack_image_2x32:
1622 case ir_unop_unpack_double_2x32:
1623 case ir_unop_unpack_int_2x32:
1624 case ir_unop_unpack_uint_2x32:
1625 result = nir_unpack_64_2x32(&b, srcs[0]);
1626 break;
1627 case ir_unop_bitfield_reverse:
1628 result = nir_bitfield_reverse(&b, srcs[0]);
1629 break;
1630 case ir_unop_bit_count:
1631 result = nir_bit_count(&b, srcs[0]);
1632 break;
1633 case ir_unop_find_msb:
1634 switch (types[0]) {
1635 case GLSL_TYPE_UINT:
1636 result = nir_ufind_msb(&b, srcs[0]);
1637 break;
1638 case GLSL_TYPE_INT:
1639 result = nir_ifind_msb(&b, srcs[0]);
1640 break;
1641 default:
1642 unreachable("Invalid type for findMSB()");
1643 }
1644 break;
1645 case ir_unop_find_lsb:
1646 result = nir_find_lsb(&b, srcs[0]);
1647 break;
1648
1649 case ir_unop_noise:
1650 switch (ir->type->vector_elements) {
1651 case 1:
1652 switch (ir->operands[0]->type->vector_elements) {
1653 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1654 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1655 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1656 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1657 default: unreachable("not reached");
1658 }
1659 break;
1660 case 2:
1661 switch (ir->operands[0]->type->vector_elements) {
1662 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1663 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1664 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1665 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1666 default: unreachable("not reached");
1667 }
1668 break;
1669 case 3:
1670 switch (ir->operands[0]->type->vector_elements) {
1671 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1672 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1673 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1674 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1675 default: unreachable("not reached");
1676 }
1677 break;
1678 case 4:
1679 switch (ir->operands[0]->type->vector_elements) {
1680 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1681 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1682 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1683 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1684 default: unreachable("not reached");
1685 }
1686 break;
1687 default:
1688 unreachable("not reached");
1689 }
1690 break;
1691 case ir_unop_get_buffer_size: {
1692 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1693 this->shader,
1694 nir_intrinsic_get_buffer_size);
1695 load->num_components = ir->type->vector_elements;
1696 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1697 unsigned bit_size = glsl_get_bit_size(ir->type);
1698 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1699 return;
1700 }
1701
1702 case ir_binop_add:
1703 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1704 : nir_iadd(&b, srcs[0], srcs[1]);
1705 break;
1706 case ir_binop_sub:
1707 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1708 : nir_isub(&b, srcs[0], srcs[1]);
1709 break;
1710 case ir_binop_mul:
1711 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1712 : nir_imul(&b, srcs[0], srcs[1]);
1713 break;
1714 case ir_binop_div:
1715 if (type_is_float(out_type))
1716 result = nir_fdiv(&b, srcs[0], srcs[1]);
1717 else if (type_is_signed(out_type))
1718 result = nir_idiv(&b, srcs[0], srcs[1]);
1719 else
1720 result = nir_udiv(&b, srcs[0], srcs[1]);
1721 break;
1722 case ir_binop_mod:
1723 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1724 : nir_umod(&b, srcs[0], srcs[1]);
1725 break;
1726 case ir_binop_min:
1727 if (type_is_float(out_type))
1728 result = nir_fmin(&b, srcs[0], srcs[1]);
1729 else if (type_is_signed(out_type))
1730 result = nir_imin(&b, srcs[0], srcs[1]);
1731 else
1732 result = nir_umin(&b, srcs[0], srcs[1]);
1733 break;
1734 case ir_binop_max:
1735 if (type_is_float(out_type))
1736 result = nir_fmax(&b, srcs[0], srcs[1]);
1737 else if (type_is_signed(out_type))
1738 result = nir_imax(&b, srcs[0], srcs[1]);
1739 else
1740 result = nir_umax(&b, srcs[0], srcs[1]);
1741 break;
1742 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1743 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1744 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1745 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1746 case ir_binop_logic_and:
1747 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1748 : nir_fand(&b, srcs[0], srcs[1]);
1749 break;
1750 case ir_binop_logic_or:
1751 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1752 : nir_for(&b, srcs[0], srcs[1]);
1753 break;
1754 case ir_binop_logic_xor:
1755 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1756 : nir_fxor(&b, srcs[0], srcs[1]);
1757 break;
1758 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1759 case ir_binop_rshift:
1760 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1761 : nir_ushr(&b, srcs[0], srcs[1]);
1762 break;
1763 case ir_binop_imul_high:
1764 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1765 : nir_umul_high(&b, srcs[0], srcs[1]);
1766 break;
1767 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1768 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1769 case ir_binop_less:
1770 if (supports_ints) {
1771 if (type_is_float(types[0]))
1772 result = nir_flt(&b, srcs[0], srcs[1]);
1773 else if (type_is_signed(types[0]))
1774 result = nir_ilt(&b, srcs[0], srcs[1]);
1775 else
1776 result = nir_ult(&b, srcs[0], srcs[1]);
1777 } else {
1778 result = nir_slt(&b, srcs[0], srcs[1]);
1779 }
1780 break;
1781 case ir_binop_gequal:
1782 if (supports_ints) {
1783 if (type_is_float(types[0]))
1784 result = nir_fge(&b, srcs[0], srcs[1]);
1785 else if (type_is_signed(types[0]))
1786 result = nir_ige(&b, srcs[0], srcs[1]);
1787 else
1788 result = nir_uge(&b, srcs[0], srcs[1]);
1789 } else {
1790 result = nir_sge(&b, srcs[0], srcs[1]);
1791 }
1792 break;
1793 case ir_binop_equal:
1794 if (supports_ints) {
1795 if (type_is_float(types[0]))
1796 result = nir_feq(&b, srcs[0], srcs[1]);
1797 else
1798 result = nir_ieq(&b, srcs[0], srcs[1]);
1799 } else {
1800 result = nir_seq(&b, srcs[0], srcs[1]);
1801 }
1802 break;
1803 case ir_binop_nequal:
1804 if (supports_ints) {
1805 if (type_is_float(types[0]))
1806 result = nir_fne(&b, srcs[0], srcs[1]);
1807 else
1808 result = nir_ine(&b, srcs[0], srcs[1]);
1809 } else {
1810 result = nir_sne(&b, srcs[0], srcs[1]);
1811 }
1812 break;
1813 case ir_binop_all_equal:
1814 if (supports_ints) {
1815 if (type_is_float(types[0])) {
1816 switch (ir->operands[0]->type->vector_elements) {
1817 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1818 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1819 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1820 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1821 default:
1822 unreachable("not reached");
1823 }
1824 } else {
1825 switch (ir->operands[0]->type->vector_elements) {
1826 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1827 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1828 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1829 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1830 default:
1831 unreachable("not reached");
1832 }
1833 }
1834 } else {
1835 switch (ir->operands[0]->type->vector_elements) {
1836 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1837 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1838 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1839 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1840 default:
1841 unreachable("not reached");
1842 }
1843 }
1844 break;
1845 case ir_binop_any_nequal:
1846 if (supports_ints) {
1847 if (type_is_float(types[0])) {
1848 switch (ir->operands[0]->type->vector_elements) {
1849 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1850 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1851 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1852 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1853 default:
1854 unreachable("not reached");
1855 }
1856 } else {
1857 switch (ir->operands[0]->type->vector_elements) {
1858 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1859 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1860 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1861 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1862 default:
1863 unreachable("not reached");
1864 }
1865 }
1866 } else {
1867 switch (ir->operands[0]->type->vector_elements) {
1868 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1869 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1870 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1871 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1872 default:
1873 unreachable("not reached");
1874 }
1875 }
1876 break;
1877 case ir_binop_dot:
1878 switch (ir->operands[0]->type->vector_elements) {
1879 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1880 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1881 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1882 default:
1883 unreachable("not reached");
1884 }
1885 break;
1886 case ir_binop_vector_extract: {
1887 result = nir_channel(&b, srcs[0], 0);
1888 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1889 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1890 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1891 swizzled, result);
1892 }
1893 break;
1894 }
1895
1896 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1897 case ir_triop_fma:
1898 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1899 break;
1900 case ir_triop_lrp:
1901 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1902 break;
1903 case ir_triop_csel:
1904 if (supports_ints)
1905 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1906 else
1907 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1908 break;
1909 case ir_triop_bitfield_extract:
1910 result = (out_type == GLSL_TYPE_INT) ?
1911 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1912 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1913 break;
1914 case ir_quadop_bitfield_insert:
1915 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1916 break;
1917 case ir_quadop_vector:
1918 result = nir_vec(&b, srcs, ir->type->vector_elements);
1919 break;
1920
1921 default:
1922 unreachable("not reached");
1923 }
1924 }
1925
1926 void
1927 nir_visitor::visit(ir_swizzle *ir)
1928 {
1929 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1930 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1931 ir->type->vector_elements, !supports_ints);
1932 }
1933
1934 void
1935 nir_visitor::visit(ir_texture *ir)
1936 {
1937 unsigned num_srcs;
1938 nir_texop op;
1939 switch (ir->op) {
1940 case ir_tex:
1941 op = nir_texop_tex;
1942 num_srcs = 1; /* coordinate */
1943 break;
1944
1945 case ir_txb:
1946 case ir_txl:
1947 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1948 num_srcs = 2; /* coordinate, bias/lod */
1949 break;
1950
1951 case ir_txd:
1952 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1953 num_srcs = 3;
1954 break;
1955
1956 case ir_txf:
1957 op = nir_texop_txf;
1958 if (ir->lod_info.lod != NULL)
1959 num_srcs = 2; /* coordinate, lod */
1960 else
1961 num_srcs = 1; /* coordinate */
1962 break;
1963
1964 case ir_txf_ms:
1965 op = nir_texop_txf_ms;
1966 num_srcs = 2; /* coordinate, sample_index */
1967 break;
1968
1969 case ir_txs:
1970 op = nir_texop_txs;
1971 if (ir->lod_info.lod != NULL)
1972 num_srcs = 1; /* lod */
1973 else
1974 num_srcs = 0;
1975 break;
1976
1977 case ir_lod:
1978 op = nir_texop_lod;
1979 num_srcs = 1; /* coordinate */
1980 break;
1981
1982 case ir_tg4:
1983 op = nir_texop_tg4;
1984 num_srcs = 1; /* coordinate */
1985 break;
1986
1987 case ir_query_levels:
1988 op = nir_texop_query_levels;
1989 num_srcs = 0;
1990 break;
1991
1992 case ir_texture_samples:
1993 op = nir_texop_texture_samples;
1994 num_srcs = 0;
1995 break;
1996
1997 case ir_samples_identical:
1998 op = nir_texop_samples_identical;
1999 num_srcs = 1; /* coordinate */
2000 break;
2001
2002 default:
2003 unreachable("not reached");
2004 }
2005
2006 if (ir->projector != NULL)
2007 num_srcs++;
2008 if (ir->shadow_comparator != NULL)
2009 num_srcs++;
2010 if (ir->offset != NULL)
2011 num_srcs++;
2012
2013 /* Add one for the texture deref */
2014 num_srcs += 1;
2015
2016 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2017
2018 instr->op = op;
2019 instr->sampler_dim =
2020 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2021 instr->is_array = ir->sampler->type->sampler_array;
2022 instr->is_shadow = ir->sampler->type->sampler_shadow;
2023 if (instr->is_shadow)
2024 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2025 switch (ir->type->base_type) {
2026 case GLSL_TYPE_FLOAT:
2027 instr->dest_type = nir_type_float;
2028 break;
2029 case GLSL_TYPE_INT:
2030 instr->dest_type = nir_type_int;
2031 break;
2032 case GLSL_TYPE_BOOL:
2033 case GLSL_TYPE_UINT:
2034 instr->dest_type = nir_type_uint;
2035 break;
2036 default:
2037 unreachable("not reached");
2038 }
2039
2040 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2041 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2042 instr->src[0].src_type = nir_tex_src_texture_deref;
2043
2044 unsigned src_number = 1;
2045
2046 if (ir->coordinate != NULL) {
2047 instr->coord_components = ir->coordinate->type->vector_elements;
2048 instr->src[src_number].src =
2049 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2050 instr->src[src_number].src_type = nir_tex_src_coord;
2051 src_number++;
2052 }
2053
2054 if (ir->projector != NULL) {
2055 instr->src[src_number].src =
2056 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2057 instr->src[src_number].src_type = nir_tex_src_projector;
2058 src_number++;
2059 }
2060
2061 if (ir->shadow_comparator != NULL) {
2062 instr->src[src_number].src =
2063 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2064 instr->src[src_number].src_type = nir_tex_src_comparator;
2065 src_number++;
2066 }
2067
2068 if (ir->offset != NULL) {
2069 /* we don't support multiple offsets yet */
2070 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2071
2072 instr->src[src_number].src =
2073 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2074 instr->src[src_number].src_type = nir_tex_src_offset;
2075 src_number++;
2076 }
2077
2078 switch (ir->op) {
2079 case ir_txb:
2080 instr->src[src_number].src =
2081 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2082 instr->src[src_number].src_type = nir_tex_src_bias;
2083 src_number++;
2084 break;
2085
2086 case ir_txl:
2087 case ir_txf:
2088 case ir_txs:
2089 if (ir->lod_info.lod != NULL) {
2090 instr->src[src_number].src =
2091 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2092 instr->src[src_number].src_type = nir_tex_src_lod;
2093 src_number++;
2094 }
2095 break;
2096
2097 case ir_txd:
2098 instr->src[src_number].src =
2099 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2100 instr->src[src_number].src_type = nir_tex_src_ddx;
2101 src_number++;
2102 instr->src[src_number].src =
2103 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2104 instr->src[src_number].src_type = nir_tex_src_ddy;
2105 src_number++;
2106 break;
2107
2108 case ir_txf_ms:
2109 instr->src[src_number].src =
2110 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2111 instr->src[src_number].src_type = nir_tex_src_ms_index;
2112 src_number++;
2113 break;
2114
2115 case ir_tg4:
2116 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2117 break;
2118
2119 default:
2120 break;
2121 }
2122
2123 assert(src_number == num_srcs);
2124
2125 unsigned bit_size = glsl_get_bit_size(ir->type);
2126 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2127 }
2128
2129 void
2130 nir_visitor::visit(ir_constant *ir)
2131 {
2132 /*
2133 * We don't know if this variable is an array or struct that gets
2134 * dereferenced, so do the safe thing an make it a variable with a
2135 * constant initializer and return a dereference.
2136 */
2137
2138 nir_variable *var =
2139 nir_local_variable_create(this->impl, ir->type, "const_temp");
2140 var->data.read_only = true;
2141 var->constant_initializer = constant_copy(ir, var);
2142
2143 this->deref = nir_build_deref_var(&b, var);
2144 }
2145
2146 void
2147 nir_visitor::visit(ir_dereference_variable *ir)
2148 {
2149 struct hash_entry *entry =
2150 _mesa_hash_table_search(this->var_table, ir->var);
2151 assert(entry);
2152 nir_variable *var = (nir_variable *) entry->data;
2153
2154 this->deref = nir_build_deref_var(&b, var);
2155 }
2156
2157 void
2158 nir_visitor::visit(ir_dereference_record *ir)
2159 {
2160 ir->record->accept(this);
2161
2162 int field_index = ir->field_idx;
2163 assert(field_index >= 0);
2164
2165 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2166 }
2167
2168 void
2169 nir_visitor::visit(ir_dereference_array *ir)
2170 {
2171 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2172
2173 ir->array->accept(this);
2174
2175 this->deref = nir_build_deref_array(&b, this->deref, index);
2176 }
2177
2178 void
2179 nir_visitor::visit(ir_barrier *)
2180 {
2181 nir_intrinsic_instr *instr =
2182 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2183 nir_builder_instr_insert(&b, &instr->instr);
2184 }