nir: Add explicit_binding to nir_variable
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
95
96 /* the head of the dereference chain we're creating */
97 nir_deref_var *deref_head;
98 /* the tail of the dereference chain we're creating */
99 nir_deref *deref_tail;
100
101 nir_variable *var; /* variable created by ir_variable visitor */
102
103 /* whether the IR we're operating on is per-function or global */
104 bool is_global;
105
106 /* map of ir_variable -> nir_variable */
107 struct hash_table *var_table;
108
109 /* map of ir_function_signature -> nir_function_overload */
110 struct hash_table *overload_table;
111 };
112
113 /*
114 * This visitor runs before the main visitor, calling create_function() for
115 * each function so that the main visitor can resolve forward references in
116 * calls.
117 */
118
119 class nir_function_visitor : public ir_hierarchical_visitor
120 {
121 public:
122 nir_function_visitor(nir_visitor *v) : visitor(v)
123 {
124 }
125 virtual ir_visitor_status visit_enter(ir_function *);
126
127 private:
128 nir_visitor *visitor;
129 };
130
131 } /* end of anonymous namespace */
132
133 static void
134 nir_remap_attributes(nir_shader *shader,
135 const nir_shader_compiler_options *options)
136 {
137 if (options->vs_inputs_dual_locations) {
138 nir_foreach_variable(var, &shader->inputs) {
139 var->data.location +=
140 _mesa_bitcount_64(shader->info.vs.double_inputs &
141 BITFIELD64_MASK(var->data.location));
142 }
143 }
144
145 /* Once the remap is done, reset double_inputs_read, so later it will have
146 * which location/slots are doubles */
147 shader->info.vs.double_inputs = 0;
148 }
149
150 nir_shader *
151 glsl_to_nir(const struct gl_shader_program *shader_prog,
152 gl_shader_stage stage,
153 const nir_shader_compiler_options *options)
154 {
155 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
156
157 nir_shader *shader = nir_shader_create(NULL, stage, options,
158 &sh->Program->info);
159
160 nir_visitor v1(shader);
161 nir_function_visitor v2(&v1);
162 v2.run(sh->ir);
163 visit_exec_list(sh->ir, &v1);
164
165 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
166
167 /* Remap the locations to slots so those requiring two slots will occupy
168 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
169 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
170 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
171 if (shader->info.stage == MESA_SHADER_VERTEX)
172 nir_remap_attributes(shader, options);
173
174 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
175 if (shader_prog->Label)
176 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
177
178 /* Check for transform feedback varyings specified via the API */
179 shader->info.has_transform_feedback_varyings =
180 shader_prog->TransformFeedback.NumVarying > 0;
181
182 /* Check for transform feedback varyings specified in the Shader */
183 if (shader_prog->last_vert_prog)
184 shader->info.has_transform_feedback_varyings |=
185 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
186
187 return shader;
188 }
189
190 nir_visitor::nir_visitor(nir_shader *shader)
191 {
192 this->supports_ints = shader->options->native_integers;
193 this->shader = shader;
194 this->is_global = true;
195 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
198 _mesa_key_pointer_equal);
199 this->result = NULL;
200 this->impl = NULL;
201 this->var = NULL;
202 this->deref_head = NULL;
203 this->deref_tail = NULL;
204 memset(&this->b, 0, sizeof(this->b));
205 }
206
207 nir_visitor::~nir_visitor()
208 {
209 _mesa_hash_table_destroy(this->var_table, NULL);
210 _mesa_hash_table_destroy(this->overload_table, NULL);
211 }
212
213 nir_deref_var *
214 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
215 {
216 ir->accept(this);
217 ralloc_steal(mem_ctx, this->deref_head);
218 return this->deref_head;
219 }
220
221 static nir_constant *
222 constant_copy(ir_constant *ir, void *mem_ctx)
223 {
224 if (ir == NULL)
225 return NULL;
226
227 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
228
229 const unsigned rows = ir->type->vector_elements;
230 const unsigned cols = ir->type->matrix_columns;
231 unsigned i;
232
233 ret->num_elements = 0;
234 switch (ir->type->base_type) {
235 case GLSL_TYPE_UINT:
236 /* Only float base types can be matrices. */
237 assert(cols == 1);
238
239 for (unsigned r = 0; r < rows; r++)
240 ret->values[0].u32[r] = ir->value.u[r];
241
242 break;
243
244 case GLSL_TYPE_INT:
245 /* Only float base types can be matrices. */
246 assert(cols == 1);
247
248 for (unsigned r = 0; r < rows; r++)
249 ret->values[0].i32[r] = ir->value.i[r];
250
251 break;
252
253 case GLSL_TYPE_FLOAT:
254 for (unsigned c = 0; c < cols; c++) {
255 for (unsigned r = 0; r < rows; r++)
256 ret->values[c].f32[r] = ir->value.f[c * rows + r];
257 }
258 break;
259
260 case GLSL_TYPE_DOUBLE:
261 for (unsigned c = 0; c < cols; c++) {
262 for (unsigned r = 0; r < rows; r++)
263 ret->values[c].f64[r] = ir->value.d[c * rows + r];
264 }
265 break;
266
267 case GLSL_TYPE_UINT64:
268 /* Only float base types can be matrices. */
269 assert(cols == 1);
270
271 for (unsigned r = 0; r < rows; r++)
272 ret->values[0].u64[r] = ir->value.u64[r];
273 break;
274
275 case GLSL_TYPE_INT64:
276 /* Only float base types can be matrices. */
277 assert(cols == 1);
278
279 for (unsigned r = 0; r < rows; r++)
280 ret->values[0].i64[r] = ir->value.i64[r];
281 break;
282
283 case GLSL_TYPE_BOOL:
284 /* Only float base types can be matrices. */
285 assert(cols == 1);
286
287 for (unsigned r = 0; r < rows; r++)
288 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
289
290 break;
291
292 case GLSL_TYPE_STRUCT:
293 case GLSL_TYPE_ARRAY:
294 ret->elements = ralloc_array(mem_ctx, nir_constant *,
295 ir->type->length);
296 ret->num_elements = ir->type->length;
297
298 for (i = 0; i < ir->type->length; i++)
299 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
300 break;
301
302 default:
303 unreachable("not reached");
304 }
305
306 return ret;
307 }
308
309 void
310 nir_visitor::visit(ir_variable *ir)
311 {
312 /* TODO: In future we should switch to using the NIR lowering pass but for
313 * now just ignore these variables as GLSL IR should have lowered them.
314 * Anything remaining are just dead vars that weren't cleaned up.
315 */
316 if (ir->data.mode == ir_var_shader_shared)
317 return;
318
319 nir_variable *var = rzalloc(shader, nir_variable);
320 var->type = ir->type;
321 var->name = ralloc_strdup(var, ir->name);
322
323 var->data.always_active_io = ir->data.always_active_io;
324 var->data.read_only = ir->data.read_only;
325 var->data.centroid = ir->data.centroid;
326 var->data.sample = ir->data.sample;
327 var->data.patch = ir->data.patch;
328 var->data.invariant = ir->data.invariant;
329 var->data.location = ir->data.location;
330 var->data.stream = ir->data.stream;
331 var->data.compact = false;
332
333 switch(ir->data.mode) {
334 case ir_var_auto:
335 case ir_var_temporary:
336 if (is_global)
337 var->data.mode = nir_var_global;
338 else
339 var->data.mode = nir_var_local;
340 break;
341
342 case ir_var_function_in:
343 case ir_var_function_out:
344 case ir_var_function_inout:
345 case ir_var_const_in:
346 var->data.mode = nir_var_local;
347 break;
348
349 case ir_var_shader_in:
350 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
351 ir->data.location == VARYING_SLOT_FACE) {
352 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
353 var->data.location = SYSTEM_VALUE_FRONT_FACE;
354 var->data.mode = nir_var_system_value;
355 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
356 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
357 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
358 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
359 var->data.mode = nir_var_system_value;
360 } else {
361 var->data.mode = nir_var_shader_in;
362
363 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
364 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
365 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
366 var->data.compact = ir->type->without_array()->is_scalar();
367 }
368 }
369
370 /* Mark all the locations that require two slots */
371 if (shader->info.stage == MESA_SHADER_VERTEX &&
372 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
373 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
374 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
375 shader->info.vs.double_inputs |= bitfield;
376 }
377 }
378 break;
379
380 case ir_var_shader_out:
381 var->data.mode = nir_var_shader_out;
382 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
383 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
384 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
385 var->data.compact = ir->type->without_array()->is_scalar();
386 }
387 break;
388
389 case ir_var_uniform:
390 var->data.mode = nir_var_uniform;
391 break;
392
393 case ir_var_shader_storage:
394 var->data.mode = nir_var_shader_storage;
395 break;
396
397 case ir_var_system_value:
398 var->data.mode = nir_var_system_value;
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 var->data.interpolation = ir->data.interpolation;
406 var->data.origin_upper_left = ir->data.origin_upper_left;
407 var->data.pixel_center_integer = ir->data.pixel_center_integer;
408 var->data.location_frac = ir->data.location_frac;
409
410 if (var->data.pixel_center_integer) {
411 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
412 shader->info.fs.pixel_center_integer = true;
413 }
414
415 switch (ir->data.depth_layout) {
416 case ir_depth_layout_none:
417 var->data.depth_layout = nir_depth_layout_none;
418 break;
419 case ir_depth_layout_any:
420 var->data.depth_layout = nir_depth_layout_any;
421 break;
422 case ir_depth_layout_greater:
423 var->data.depth_layout = nir_depth_layout_greater;
424 break;
425 case ir_depth_layout_less:
426 var->data.depth_layout = nir_depth_layout_less;
427 break;
428 case ir_depth_layout_unchanged:
429 var->data.depth_layout = nir_depth_layout_unchanged;
430 break;
431 default:
432 unreachable("not reached");
433 }
434
435 var->data.index = ir->data.index;
436 var->data.descriptor_set = 0;
437 var->data.binding = ir->data.binding;
438 var->data.explicit_binding = ir->data.explicit_binding;
439 var->data.bindless = ir->data.bindless;
440 var->data.offset = ir->data.offset;
441 var->data.image.read_only = ir->data.memory_read_only;
442 var->data.image.write_only = ir->data.memory_write_only;
443 var->data.image.coherent = ir->data.memory_coherent;
444 var->data.image._volatile = ir->data.memory_volatile;
445 var->data.image.restrict_flag = ir->data.memory_restrict;
446 var->data.image.format = ir->data.image_format;
447 var->data.fb_fetch_output = ir->data.fb_fetch_output;
448
449 var->num_state_slots = ir->get_num_state_slots();
450 if (var->num_state_slots > 0) {
451 var->state_slots = rzalloc_array(var, nir_state_slot,
452 var->num_state_slots);
453
454 ir_state_slot *state_slots = ir->get_state_slots();
455 for (unsigned i = 0; i < var->num_state_slots; i++) {
456 for (unsigned j = 0; j < 5; j++)
457 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
458 var->state_slots[i].swizzle = state_slots[i].swizzle;
459 }
460 } else {
461 var->state_slots = NULL;
462 }
463
464 var->constant_initializer = constant_copy(ir->constant_initializer, var);
465
466 var->interface_type = ir->get_interface_type();
467
468 if (var->data.mode == nir_var_local)
469 nir_function_impl_add_variable(impl, var);
470 else
471 nir_shader_add_variable(shader, var);
472
473 _mesa_hash_table_insert(var_table, ir, var);
474 this->var = var;
475 }
476
477 ir_visitor_status
478 nir_function_visitor::visit_enter(ir_function *ir)
479 {
480 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
481 visitor->create_function(sig);
482 }
483 return visit_continue_with_parent;
484 }
485
486 void
487 nir_visitor::create_function(ir_function_signature *ir)
488 {
489 if (ir->is_intrinsic())
490 return;
491
492 nir_function *func = nir_function_create(shader, ir->function_name());
493
494 assert(ir->parameters.is_empty());
495 assert(ir->return_type == glsl_type::void_type);
496
497 _mesa_hash_table_insert(this->overload_table, ir, func);
498 }
499
500 void
501 nir_visitor::visit(ir_function *ir)
502 {
503 foreach_in_list(ir_function_signature, sig, &ir->signatures)
504 sig->accept(this);
505 }
506
507 void
508 nir_visitor::visit(ir_function_signature *ir)
509 {
510 if (ir->is_intrinsic())
511 return;
512
513 struct hash_entry *entry =
514 _mesa_hash_table_search(this->overload_table, ir);
515
516 assert(entry);
517 nir_function *func = (nir_function *) entry->data;
518
519 if (ir->is_defined) {
520 nir_function_impl *impl = nir_function_impl_create(func);
521 this->impl = impl;
522
523 assert(strcmp(func->name, "main") == 0);
524 assert(ir->parameters.is_empty());
525 assert(func->return_type == glsl_type::void_type);
526
527 this->is_global = false;
528
529 nir_builder_init(&b, impl);
530 b.cursor = nir_after_cf_list(&impl->body);
531 visit_exec_list(&ir->body, this);
532
533 this->is_global = true;
534 } else {
535 func->impl = NULL;
536 }
537 }
538
539 void
540 nir_visitor::visit(ir_loop *ir)
541 {
542 nir_push_loop(&b);
543 visit_exec_list(&ir->body_instructions, this);
544 nir_pop_loop(&b, NULL);
545 }
546
547 void
548 nir_visitor::visit(ir_if *ir)
549 {
550 nir_push_if(&b, evaluate_rvalue(ir->condition));
551 visit_exec_list(&ir->then_instructions, this);
552 nir_push_else(&b, NULL);
553 visit_exec_list(&ir->else_instructions, this);
554 nir_pop_if(&b, NULL);
555 }
556
557 void
558 nir_visitor::visit(ir_discard *ir)
559 {
560 /*
561 * discards aren't treated as control flow, because before we lower them
562 * they can appear anywhere in the shader and the stuff after them may still
563 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
564 * discards will be immediately followed by a return.
565 */
566
567 nir_intrinsic_instr *discard;
568 if (ir->condition) {
569 discard = nir_intrinsic_instr_create(this->shader,
570 nir_intrinsic_discard_if);
571 discard->src[0] =
572 nir_src_for_ssa(evaluate_rvalue(ir->condition));
573 } else {
574 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
575 }
576
577 nir_builder_instr_insert(&b, &discard->instr);
578 }
579
580 void
581 nir_visitor::visit(ir_emit_vertex *ir)
582 {
583 nir_intrinsic_instr *instr =
584 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
585 nir_intrinsic_set_stream_id(instr, ir->stream_id());
586 nir_builder_instr_insert(&b, &instr->instr);
587 }
588
589 void
590 nir_visitor::visit(ir_end_primitive *ir)
591 {
592 nir_intrinsic_instr *instr =
593 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
594 nir_intrinsic_set_stream_id(instr, ir->stream_id());
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_loop_jump *ir)
600 {
601 nir_jump_type type;
602 switch (ir->mode) {
603 case ir_loop_jump::jump_break:
604 type = nir_jump_break;
605 break;
606 case ir_loop_jump::jump_continue:
607 type = nir_jump_continue;
608 break;
609 default:
610 unreachable("not reached");
611 }
612
613 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
614 nir_builder_instr_insert(&b, &instr->instr);
615 }
616
617 void
618 nir_visitor::visit(ir_return *ir)
619 {
620 if (ir->value != NULL) {
621 nir_intrinsic_instr *copy =
622 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
623
624 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
625 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
626 }
627
628 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
629 nir_builder_instr_insert(&b, &instr->instr);
630 }
631
632 void
633 nir_visitor::visit(ir_call *ir)
634 {
635 if (ir->callee->is_intrinsic()) {
636 nir_intrinsic_op op;
637
638 switch (ir->callee->intrinsic_id) {
639 case ir_intrinsic_atomic_counter_read:
640 op = nir_intrinsic_atomic_counter_read_var;
641 break;
642 case ir_intrinsic_atomic_counter_increment:
643 op = nir_intrinsic_atomic_counter_inc_var;
644 break;
645 case ir_intrinsic_atomic_counter_predecrement:
646 op = nir_intrinsic_atomic_counter_dec_var;
647 break;
648 case ir_intrinsic_atomic_counter_add:
649 op = nir_intrinsic_atomic_counter_add_var;
650 break;
651 case ir_intrinsic_atomic_counter_and:
652 op = nir_intrinsic_atomic_counter_and_var;
653 break;
654 case ir_intrinsic_atomic_counter_or:
655 op = nir_intrinsic_atomic_counter_or_var;
656 break;
657 case ir_intrinsic_atomic_counter_xor:
658 op = nir_intrinsic_atomic_counter_xor_var;
659 break;
660 case ir_intrinsic_atomic_counter_min:
661 op = nir_intrinsic_atomic_counter_min_var;
662 break;
663 case ir_intrinsic_atomic_counter_max:
664 op = nir_intrinsic_atomic_counter_max_var;
665 break;
666 case ir_intrinsic_atomic_counter_exchange:
667 op = nir_intrinsic_atomic_counter_exchange_var;
668 break;
669 case ir_intrinsic_atomic_counter_comp_swap:
670 op = nir_intrinsic_atomic_counter_comp_swap_var;
671 break;
672 case ir_intrinsic_image_load:
673 op = nir_intrinsic_image_var_load;
674 break;
675 case ir_intrinsic_image_store:
676 op = nir_intrinsic_image_var_store;
677 break;
678 case ir_intrinsic_image_atomic_add:
679 op = nir_intrinsic_image_var_atomic_add;
680 break;
681 case ir_intrinsic_image_atomic_min:
682 op = nir_intrinsic_image_var_atomic_min;
683 break;
684 case ir_intrinsic_image_atomic_max:
685 op = nir_intrinsic_image_var_atomic_max;
686 break;
687 case ir_intrinsic_image_atomic_and:
688 op = nir_intrinsic_image_var_atomic_and;
689 break;
690 case ir_intrinsic_image_atomic_or:
691 op = nir_intrinsic_image_var_atomic_or;
692 break;
693 case ir_intrinsic_image_atomic_xor:
694 op = nir_intrinsic_image_var_atomic_xor;
695 break;
696 case ir_intrinsic_image_atomic_exchange:
697 op = nir_intrinsic_image_var_atomic_exchange;
698 break;
699 case ir_intrinsic_image_atomic_comp_swap:
700 op = nir_intrinsic_image_var_atomic_comp_swap;
701 break;
702 case ir_intrinsic_memory_barrier:
703 op = nir_intrinsic_memory_barrier;
704 break;
705 case ir_intrinsic_image_size:
706 op = nir_intrinsic_image_var_size;
707 break;
708 case ir_intrinsic_image_samples:
709 op = nir_intrinsic_image_var_samples;
710 break;
711 case ir_intrinsic_ssbo_store:
712 op = nir_intrinsic_store_ssbo;
713 break;
714 case ir_intrinsic_ssbo_load:
715 op = nir_intrinsic_load_ssbo;
716 break;
717 case ir_intrinsic_ssbo_atomic_add:
718 op = nir_intrinsic_ssbo_atomic_add;
719 break;
720 case ir_intrinsic_ssbo_atomic_and:
721 op = nir_intrinsic_ssbo_atomic_and;
722 break;
723 case ir_intrinsic_ssbo_atomic_or:
724 op = nir_intrinsic_ssbo_atomic_or;
725 break;
726 case ir_intrinsic_ssbo_atomic_xor:
727 op = nir_intrinsic_ssbo_atomic_xor;
728 break;
729 case ir_intrinsic_ssbo_atomic_min:
730 assert(ir->return_deref);
731 if (ir->return_deref->type == glsl_type::int_type)
732 op = nir_intrinsic_ssbo_atomic_imin;
733 else if (ir->return_deref->type == glsl_type::uint_type)
734 op = nir_intrinsic_ssbo_atomic_umin;
735 else
736 unreachable("Invalid type");
737 break;
738 case ir_intrinsic_ssbo_atomic_max:
739 assert(ir->return_deref);
740 if (ir->return_deref->type == glsl_type::int_type)
741 op = nir_intrinsic_ssbo_atomic_imax;
742 else if (ir->return_deref->type == glsl_type::uint_type)
743 op = nir_intrinsic_ssbo_atomic_umax;
744 else
745 unreachable("Invalid type");
746 break;
747 case ir_intrinsic_ssbo_atomic_exchange:
748 op = nir_intrinsic_ssbo_atomic_exchange;
749 break;
750 case ir_intrinsic_ssbo_atomic_comp_swap:
751 op = nir_intrinsic_ssbo_atomic_comp_swap;
752 break;
753 case ir_intrinsic_shader_clock:
754 op = nir_intrinsic_shader_clock;
755 break;
756 case ir_intrinsic_begin_invocation_interlock:
757 op = nir_intrinsic_begin_invocation_interlock;
758 break;
759 case ir_intrinsic_end_invocation_interlock:
760 op = nir_intrinsic_end_invocation_interlock;
761 break;
762 case ir_intrinsic_group_memory_barrier:
763 op = nir_intrinsic_group_memory_barrier;
764 break;
765 case ir_intrinsic_memory_barrier_atomic_counter:
766 op = nir_intrinsic_memory_barrier_atomic_counter;
767 break;
768 case ir_intrinsic_memory_barrier_buffer:
769 op = nir_intrinsic_memory_barrier_buffer;
770 break;
771 case ir_intrinsic_memory_barrier_image:
772 op = nir_intrinsic_memory_barrier_image;
773 break;
774 case ir_intrinsic_memory_barrier_shared:
775 op = nir_intrinsic_memory_barrier_shared;
776 break;
777 case ir_intrinsic_shared_load:
778 op = nir_intrinsic_load_shared;
779 break;
780 case ir_intrinsic_shared_store:
781 op = nir_intrinsic_store_shared;
782 break;
783 case ir_intrinsic_shared_atomic_add:
784 op = nir_intrinsic_shared_atomic_add;
785 break;
786 case ir_intrinsic_shared_atomic_and:
787 op = nir_intrinsic_shared_atomic_and;
788 break;
789 case ir_intrinsic_shared_atomic_or:
790 op = nir_intrinsic_shared_atomic_or;
791 break;
792 case ir_intrinsic_shared_atomic_xor:
793 op = nir_intrinsic_shared_atomic_xor;
794 break;
795 case ir_intrinsic_shared_atomic_min:
796 assert(ir->return_deref);
797 if (ir->return_deref->type == glsl_type::int_type)
798 op = nir_intrinsic_shared_atomic_imin;
799 else if (ir->return_deref->type == glsl_type::uint_type)
800 op = nir_intrinsic_shared_atomic_umin;
801 else
802 unreachable("Invalid type");
803 break;
804 case ir_intrinsic_shared_atomic_max:
805 assert(ir->return_deref);
806 if (ir->return_deref->type == glsl_type::int_type)
807 op = nir_intrinsic_shared_atomic_imax;
808 else if (ir->return_deref->type == glsl_type::uint_type)
809 op = nir_intrinsic_shared_atomic_umax;
810 else
811 unreachable("Invalid type");
812 break;
813 case ir_intrinsic_shared_atomic_exchange:
814 op = nir_intrinsic_shared_atomic_exchange;
815 break;
816 case ir_intrinsic_shared_atomic_comp_swap:
817 op = nir_intrinsic_shared_atomic_comp_swap;
818 break;
819 case ir_intrinsic_vote_any:
820 op = nir_intrinsic_vote_any;
821 break;
822 case ir_intrinsic_vote_all:
823 op = nir_intrinsic_vote_all;
824 break;
825 case ir_intrinsic_vote_eq:
826 op = nir_intrinsic_vote_ieq;
827 break;
828 case ir_intrinsic_ballot:
829 op = nir_intrinsic_ballot;
830 break;
831 case ir_intrinsic_read_invocation:
832 op = nir_intrinsic_read_invocation;
833 break;
834 case ir_intrinsic_read_first_invocation:
835 op = nir_intrinsic_read_first_invocation;
836 break;
837 default:
838 unreachable("not reached");
839 }
840
841 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
842 nir_dest *dest = &instr->dest;
843
844 switch (op) {
845 case nir_intrinsic_atomic_counter_read_var:
846 case nir_intrinsic_atomic_counter_inc_var:
847 case nir_intrinsic_atomic_counter_dec_var:
848 case nir_intrinsic_atomic_counter_add_var:
849 case nir_intrinsic_atomic_counter_min_var:
850 case nir_intrinsic_atomic_counter_max_var:
851 case nir_intrinsic_atomic_counter_and_var:
852 case nir_intrinsic_atomic_counter_or_var:
853 case nir_intrinsic_atomic_counter_xor_var:
854 case nir_intrinsic_atomic_counter_exchange_var:
855 case nir_intrinsic_atomic_counter_comp_swap_var: {
856 /* Set the counter variable dereference. */
857 exec_node *param = ir->actual_parameters.get_head();
858 ir_dereference *counter = (ir_dereference *)param;
859
860 instr->variables[0] = evaluate_deref(&instr->instr, counter);
861 param = param->get_next();
862
863 /* Set the intrinsic destination. */
864 if (ir->return_deref) {
865 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
866 }
867
868 /* Set the intrinsic parameters. */
869 if (!param->is_tail_sentinel()) {
870 instr->src[0] =
871 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
872 param = param->get_next();
873 }
874
875 if (!param->is_tail_sentinel()) {
876 instr->src[1] =
877 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
878 param = param->get_next();
879 }
880
881 nir_builder_instr_insert(&b, &instr->instr);
882 break;
883 }
884 case nir_intrinsic_image_var_load:
885 case nir_intrinsic_image_var_store:
886 case nir_intrinsic_image_var_atomic_add:
887 case nir_intrinsic_image_var_atomic_min:
888 case nir_intrinsic_image_var_atomic_max:
889 case nir_intrinsic_image_var_atomic_and:
890 case nir_intrinsic_image_var_atomic_or:
891 case nir_intrinsic_image_var_atomic_xor:
892 case nir_intrinsic_image_var_atomic_exchange:
893 case nir_intrinsic_image_var_atomic_comp_swap:
894 case nir_intrinsic_image_var_samples:
895 case nir_intrinsic_image_var_size: {
896 nir_ssa_undef_instr *instr_undef =
897 nir_ssa_undef_instr_create(shader, 1, 32);
898 nir_builder_instr_insert(&b, &instr_undef->instr);
899
900 /* Set the image variable dereference. */
901 exec_node *param = ir->actual_parameters.get_head();
902 ir_dereference *image = (ir_dereference *)param;
903 const glsl_type *type =
904 image->variable_referenced()->type->without_array();
905
906 instr->variables[0] = evaluate_deref(&instr->instr, image);
907 param = param->get_next();
908
909 /* Set the intrinsic destination. */
910 if (ir->return_deref) {
911 unsigned num_components = ir->return_deref->type->vector_elements;
912 if (instr->intrinsic == nir_intrinsic_image_var_size)
913 instr->num_components = num_components;
914 nir_ssa_dest_init(&instr->instr, &instr->dest,
915 num_components, 32, NULL);
916 }
917
918 if (op == nir_intrinsic_image_var_size ||
919 op == nir_intrinsic_image_var_samples) {
920 nir_builder_instr_insert(&b, &instr->instr);
921 break;
922 }
923
924 /* Set the address argument, extending the coordinate vector to four
925 * components.
926 */
927 nir_ssa_def *src_addr =
928 evaluate_rvalue((ir_dereference *)param);
929 nir_ssa_def *srcs[4];
930
931 for (int i = 0; i < 4; i++) {
932 if (i < type->coordinate_components())
933 srcs[i] = nir_channel(&b, src_addr, i);
934 else
935 srcs[i] = &instr_undef->def;
936 }
937
938 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
939 param = param->get_next();
940
941 /* Set the sample argument, which is undefined for single-sample
942 * images.
943 */
944 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
945 instr->src[1] =
946 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
947 param = param->get_next();
948 } else {
949 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
950 }
951
952 /* Set the intrinsic parameters. */
953 if (!param->is_tail_sentinel()) {
954 instr->src[2] =
955 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
956 param = param->get_next();
957 }
958
959 if (!param->is_tail_sentinel()) {
960 instr->src[3] =
961 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
962 param = param->get_next();
963 }
964 nir_builder_instr_insert(&b, &instr->instr);
965 break;
966 }
967 case nir_intrinsic_memory_barrier:
968 case nir_intrinsic_group_memory_barrier:
969 case nir_intrinsic_memory_barrier_atomic_counter:
970 case nir_intrinsic_memory_barrier_buffer:
971 case nir_intrinsic_memory_barrier_image:
972 case nir_intrinsic_memory_barrier_shared:
973 nir_builder_instr_insert(&b, &instr->instr);
974 break;
975 case nir_intrinsic_shader_clock:
976 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
977 instr->num_components = 2;
978 nir_builder_instr_insert(&b, &instr->instr);
979 break;
980 case nir_intrinsic_begin_invocation_interlock:
981 nir_builder_instr_insert(&b, &instr->instr);
982 break;
983 case nir_intrinsic_end_invocation_interlock:
984 nir_builder_instr_insert(&b, &instr->instr);
985 break;
986 case nir_intrinsic_store_ssbo: {
987 exec_node *param = ir->actual_parameters.get_head();
988 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
989
990 param = param->get_next();
991 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
992
993 param = param->get_next();
994 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
995
996 param = param->get_next();
997 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
998 assert(write_mask);
999
1000 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1001 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1002 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1003 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1004 instr->num_components = val->type->vector_elements;
1005
1006 nir_builder_instr_insert(&b, &instr->instr);
1007 break;
1008 }
1009 case nir_intrinsic_load_ssbo: {
1010 exec_node *param = ir->actual_parameters.get_head();
1011 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1012
1013 param = param->get_next();
1014 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1015
1016 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1017 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1018
1019 const glsl_type *type = ir->return_deref->var->type;
1020 instr->num_components = type->vector_elements;
1021
1022 /* Setup destination register */
1023 unsigned bit_size = glsl_get_bit_size(type);
1024 nir_ssa_dest_init(&instr->instr, &instr->dest,
1025 type->vector_elements, bit_size, NULL);
1026
1027 /* Insert the created nir instruction now since in the case of boolean
1028 * result we will need to emit another instruction after it
1029 */
1030 nir_builder_instr_insert(&b, &instr->instr);
1031
1032 /*
1033 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1034 * consider a true boolean to be ~0. Fix this up with a != 0
1035 * comparison.
1036 */
1037 if (type->is_boolean()) {
1038 nir_alu_instr *load_ssbo_compare =
1039 nir_alu_instr_create(shader, nir_op_ine);
1040 load_ssbo_compare->src[0].src.is_ssa = true;
1041 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1042 load_ssbo_compare->src[1].src =
1043 nir_src_for_ssa(nir_imm_int(&b, 0));
1044 for (unsigned i = 0; i < type->vector_elements; i++)
1045 load_ssbo_compare->src[1].swizzle[i] = 0;
1046 nir_ssa_dest_init(&load_ssbo_compare->instr,
1047 &load_ssbo_compare->dest.dest,
1048 type->vector_elements, bit_size, NULL);
1049 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1050 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1051 dest = &load_ssbo_compare->dest.dest;
1052 }
1053 break;
1054 }
1055 case nir_intrinsic_ssbo_atomic_add:
1056 case nir_intrinsic_ssbo_atomic_imin:
1057 case nir_intrinsic_ssbo_atomic_umin:
1058 case nir_intrinsic_ssbo_atomic_imax:
1059 case nir_intrinsic_ssbo_atomic_umax:
1060 case nir_intrinsic_ssbo_atomic_and:
1061 case nir_intrinsic_ssbo_atomic_or:
1062 case nir_intrinsic_ssbo_atomic_xor:
1063 case nir_intrinsic_ssbo_atomic_exchange:
1064 case nir_intrinsic_ssbo_atomic_comp_swap: {
1065 int param_count = ir->actual_parameters.length();
1066 assert(param_count == 3 || param_count == 4);
1067
1068 /* Block index */
1069 exec_node *param = ir->actual_parameters.get_head();
1070 ir_instruction *inst = (ir_instruction *) param;
1071 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1072
1073 /* Offset */
1074 param = param->get_next();
1075 inst = (ir_instruction *) param;
1076 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1077
1078 /* data1 parameter (this is always present) */
1079 param = param->get_next();
1080 inst = (ir_instruction *) param;
1081 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1082
1083 /* data2 parameter (only with atomic_comp_swap) */
1084 if (param_count == 4) {
1085 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1086 param = param->get_next();
1087 inst = (ir_instruction *) param;
1088 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1089 }
1090
1091 /* Atomic result */
1092 assert(ir->return_deref);
1093 nir_ssa_dest_init(&instr->instr, &instr->dest,
1094 ir->return_deref->type->vector_elements, 32, NULL);
1095 nir_builder_instr_insert(&b, &instr->instr);
1096 break;
1097 }
1098 case nir_intrinsic_load_shared: {
1099 exec_node *param = ir->actual_parameters.get_head();
1100 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1101
1102 nir_intrinsic_set_base(instr, 0);
1103 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1104
1105 const glsl_type *type = ir->return_deref->var->type;
1106 instr->num_components = type->vector_elements;
1107
1108 /* Setup destination register */
1109 unsigned bit_size = glsl_get_bit_size(type);
1110 nir_ssa_dest_init(&instr->instr, &instr->dest,
1111 type->vector_elements, bit_size, NULL);
1112
1113 nir_builder_instr_insert(&b, &instr->instr);
1114 break;
1115 }
1116 case nir_intrinsic_store_shared: {
1117 exec_node *param = ir->actual_parameters.get_head();
1118 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1119
1120 param = param->get_next();
1121 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1122
1123 param = param->get_next();
1124 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1125 assert(write_mask);
1126
1127 nir_intrinsic_set_base(instr, 0);
1128 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1129
1130 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1131
1132 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1133 instr->num_components = val->type->vector_elements;
1134
1135 nir_builder_instr_insert(&b, &instr->instr);
1136 break;
1137 }
1138 case nir_intrinsic_shared_atomic_add:
1139 case nir_intrinsic_shared_atomic_imin:
1140 case nir_intrinsic_shared_atomic_umin:
1141 case nir_intrinsic_shared_atomic_imax:
1142 case nir_intrinsic_shared_atomic_umax:
1143 case nir_intrinsic_shared_atomic_and:
1144 case nir_intrinsic_shared_atomic_or:
1145 case nir_intrinsic_shared_atomic_xor:
1146 case nir_intrinsic_shared_atomic_exchange:
1147 case nir_intrinsic_shared_atomic_comp_swap: {
1148 int param_count = ir->actual_parameters.length();
1149 assert(param_count == 2 || param_count == 3);
1150
1151 /* Offset */
1152 exec_node *param = ir->actual_parameters.get_head();
1153 ir_instruction *inst = (ir_instruction *) param;
1154 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1155
1156 /* data1 parameter (this is always present) */
1157 param = param->get_next();
1158 inst = (ir_instruction *) param;
1159 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1160
1161 /* data2 parameter (only with atomic_comp_swap) */
1162 if (param_count == 3) {
1163 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1164 param = param->get_next();
1165 inst = (ir_instruction *) param;
1166 instr->src[2] =
1167 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1168 }
1169
1170 /* Atomic result */
1171 assert(ir->return_deref);
1172 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1173 nir_ssa_dest_init(&instr->instr, &instr->dest,
1174 ir->return_deref->type->vector_elements,
1175 bit_size, NULL);
1176 nir_builder_instr_insert(&b, &instr->instr);
1177 break;
1178 }
1179 case nir_intrinsic_vote_any:
1180 case nir_intrinsic_vote_all:
1181 case nir_intrinsic_vote_ieq: {
1182 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1183 instr->num_components = 1;
1184
1185 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1186 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1187
1188 nir_builder_instr_insert(&b, &instr->instr);
1189 break;
1190 }
1191
1192 case nir_intrinsic_ballot: {
1193 nir_ssa_dest_init(&instr->instr, &instr->dest,
1194 ir->return_deref->type->vector_elements, 64, NULL);
1195 instr->num_components = ir->return_deref->type->vector_elements;
1196
1197 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1198 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1199
1200 nir_builder_instr_insert(&b, &instr->instr);
1201 break;
1202 }
1203 case nir_intrinsic_read_invocation: {
1204 nir_ssa_dest_init(&instr->instr, &instr->dest,
1205 ir->return_deref->type->vector_elements, 32, NULL);
1206 instr->num_components = ir->return_deref->type->vector_elements;
1207
1208 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1209 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1210
1211 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1212 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1213
1214 nir_builder_instr_insert(&b, &instr->instr);
1215 break;
1216 }
1217 case nir_intrinsic_read_first_invocation: {
1218 nir_ssa_dest_init(&instr->instr, &instr->dest,
1219 ir->return_deref->type->vector_elements, 32, NULL);
1220 instr->num_components = ir->return_deref->type->vector_elements;
1221
1222 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1223 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1224
1225 nir_builder_instr_insert(&b, &instr->instr);
1226 break;
1227 }
1228 default:
1229 unreachable("not reached");
1230 }
1231
1232 if (ir->return_deref) {
1233 nir_intrinsic_instr *store_instr =
1234 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1235 store_instr->num_components = ir->return_deref->type->vector_elements;
1236 nir_intrinsic_set_write_mask(store_instr,
1237 (1 << store_instr->num_components) - 1);
1238
1239 store_instr->variables[0] =
1240 evaluate_deref(&store_instr->instr, ir->return_deref);
1241 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1242
1243 nir_builder_instr_insert(&b, &store_instr->instr);
1244 }
1245
1246 return;
1247 }
1248
1249 struct hash_entry *entry =
1250 _mesa_hash_table_search(this->overload_table, ir->callee);
1251 assert(entry);
1252 nir_function *callee = (nir_function *) entry->data;
1253
1254 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1255
1256 unsigned i = 0;
1257 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1258 instr->params[i] = evaluate_deref(&instr->instr, param);
1259 i++;
1260 }
1261
1262 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1263 nir_builder_instr_insert(&b, &instr->instr);
1264 }
1265
1266 void
1267 nir_visitor::visit(ir_assignment *ir)
1268 {
1269 unsigned num_components = ir->lhs->type->vector_elements;
1270
1271 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1272 ir->lhs->variable_referenced()->data.precise;
1273
1274 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1275 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1276 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1277 nir_intrinsic_instr *copy =
1278 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1279
1280 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1281 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1282
1283 if (ir->condition) {
1284 nir_push_if(&b, evaluate_rvalue(ir->condition));
1285 nir_builder_instr_insert(&b, &copy->instr);
1286 nir_pop_if(&b, NULL);
1287 } else {
1288 nir_builder_instr_insert(&b, &copy->instr);
1289 }
1290 return;
1291 }
1292
1293 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1294
1295 ir->lhs->accept(this);
1296 nir_deref_var *lhs_deref = this->deref_head;
1297 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1298
1299 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1300 /* GLSL IR will give us the input to the write-masked assignment in a
1301 * single packed vector. So, for example, if the writemask is xzw, then
1302 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1303 * from the load.
1304 */
1305 unsigned swiz[4];
1306 unsigned component = 0;
1307 for (unsigned i = 0; i < 4; i++) {
1308 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1309 }
1310 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1311 }
1312
1313 nir_intrinsic_instr *store =
1314 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1315 store->num_components = ir->lhs->type->vector_elements;
1316 nir_intrinsic_set_write_mask(store, ir->write_mask);
1317 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1318 store->src[0] = nir_src_for_ssa(src);
1319
1320 if (ir->condition) {
1321 nir_push_if(&b, evaluate_rvalue(ir->condition));
1322 nir_builder_instr_insert(&b, &store->instr);
1323 nir_pop_if(&b, NULL);
1324 } else {
1325 nir_builder_instr_insert(&b, &store->instr);
1326 }
1327 }
1328
1329 /*
1330 * Given an instruction, returns a pointer to its destination or NULL if there
1331 * is no destination.
1332 *
1333 * Note that this only handles instructions we generate at this level.
1334 */
1335 static nir_dest *
1336 get_instr_dest(nir_instr *instr)
1337 {
1338 nir_alu_instr *alu_instr;
1339 nir_intrinsic_instr *intrinsic_instr;
1340 nir_tex_instr *tex_instr;
1341
1342 switch (instr->type) {
1343 case nir_instr_type_alu:
1344 alu_instr = nir_instr_as_alu(instr);
1345 return &alu_instr->dest.dest;
1346
1347 case nir_instr_type_intrinsic:
1348 intrinsic_instr = nir_instr_as_intrinsic(instr);
1349 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1350 return &intrinsic_instr->dest;
1351 else
1352 return NULL;
1353
1354 case nir_instr_type_tex:
1355 tex_instr = nir_instr_as_tex(instr);
1356 return &tex_instr->dest;
1357
1358 default:
1359 unreachable("not reached");
1360 }
1361
1362 return NULL;
1363 }
1364
1365 void
1366 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1367 unsigned bit_size)
1368 {
1369 nir_dest *dest = get_instr_dest(instr);
1370
1371 if (dest)
1372 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1373
1374 nir_builder_instr_insert(&b, instr);
1375
1376 if (dest) {
1377 assert(dest->is_ssa);
1378 this->result = &dest->ssa;
1379 }
1380 }
1381
1382 nir_ssa_def *
1383 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1384 {
1385 ir->accept(this);
1386 if (ir->as_dereference() || ir->as_constant()) {
1387 /*
1388 * A dereference is being used on the right hand side, which means we
1389 * must emit a variable load.
1390 */
1391
1392 nir_intrinsic_instr *load_instr =
1393 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1394 load_instr->num_components = ir->type->vector_elements;
1395 load_instr->variables[0] = this->deref_head;
1396 ralloc_steal(load_instr, load_instr->variables[0]);
1397 unsigned bit_size = glsl_get_bit_size(ir->type);
1398 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1399 }
1400
1401 return this->result;
1402 }
1403
1404 static bool
1405 type_is_float(glsl_base_type type)
1406 {
1407 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1408 type == GLSL_TYPE_FLOAT16;
1409 }
1410
1411 static bool
1412 type_is_signed(glsl_base_type type)
1413 {
1414 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1415 type == GLSL_TYPE_INT16;
1416 }
1417
1418 void
1419 nir_visitor::visit(ir_expression *ir)
1420 {
1421 /* Some special cases */
1422 switch (ir->operation) {
1423 case ir_binop_ubo_load: {
1424 nir_intrinsic_instr *load =
1425 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1426 unsigned bit_size = glsl_get_bit_size(ir->type);
1427 load->num_components = ir->type->vector_elements;
1428 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1429 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1430 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1431
1432 /*
1433 * In UBO's, a true boolean value is any non-zero value, but we consider
1434 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1435 */
1436
1437 if (ir->type->is_boolean())
1438 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1439
1440 return;
1441 }
1442
1443 case ir_unop_interpolate_at_centroid:
1444 case ir_binop_interpolate_at_offset:
1445 case ir_binop_interpolate_at_sample: {
1446 ir_dereference *deref = ir->operands[0]->as_dereference();
1447 ir_swizzle *swizzle = NULL;
1448 if (!deref) {
1449 /* the api does not allow a swizzle here, but the varying packing code
1450 * may have pushed one into here.
1451 */
1452 swizzle = ir->operands[0]->as_swizzle();
1453 assert(swizzle);
1454 deref = swizzle->val->as_dereference();
1455 assert(deref);
1456 }
1457
1458 deref->accept(this);
1459
1460 nir_intrinsic_op op;
1461 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1462 switch (ir->operation) {
1463 case ir_unop_interpolate_at_centroid:
1464 op = nir_intrinsic_interp_var_at_centroid;
1465 break;
1466 case ir_binop_interpolate_at_offset:
1467 op = nir_intrinsic_interp_var_at_offset;
1468 break;
1469 case ir_binop_interpolate_at_sample:
1470 op = nir_intrinsic_interp_var_at_sample;
1471 break;
1472 default:
1473 unreachable("Invalid interpolation intrinsic");
1474 }
1475 } else {
1476 /* This case can happen if the vertex shader does not write the
1477 * given varying. In this case, the linker will lower it to a
1478 * global variable. Since interpolating a variable makes no
1479 * sense, we'll just turn it into a load which will probably
1480 * eventually end up as an SSA definition.
1481 */
1482 assert(this->deref_head->var->data.mode == nir_var_global);
1483 op = nir_intrinsic_load_var;
1484 }
1485
1486 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1487 intrin->num_components = deref->type->vector_elements;
1488 intrin->variables[0] = this->deref_head;
1489 ralloc_steal(intrin, intrin->variables[0]);
1490
1491 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1492 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1493 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1494
1495 unsigned bit_size = glsl_get_bit_size(deref->type);
1496 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1497
1498 if (swizzle) {
1499 unsigned swiz[4] = {
1500 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1501 };
1502
1503 result = nir_swizzle(&b, result, swiz,
1504 swizzle->type->vector_elements, false);
1505 }
1506
1507 return;
1508 }
1509
1510 default:
1511 break;
1512 }
1513
1514 nir_ssa_def *srcs[4];
1515 for (unsigned i = 0; i < ir->num_operands; i++)
1516 srcs[i] = evaluate_rvalue(ir->operands[i]);
1517
1518 glsl_base_type types[4];
1519 for (unsigned i = 0; i < ir->num_operands; i++)
1520 if (supports_ints)
1521 types[i] = ir->operands[i]->type->base_type;
1522 else
1523 types[i] = GLSL_TYPE_FLOAT;
1524
1525 glsl_base_type out_type;
1526 if (supports_ints)
1527 out_type = ir->type->base_type;
1528 else
1529 out_type = GLSL_TYPE_FLOAT;
1530
1531 switch (ir->operation) {
1532 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1533 case ir_unop_logic_not:
1534 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1535 break;
1536 case ir_unop_neg:
1537 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1538 : nir_ineg(&b, srcs[0]);
1539 break;
1540 case ir_unop_abs:
1541 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1542 : nir_iabs(&b, srcs[0]);
1543 break;
1544 case ir_unop_saturate:
1545 assert(type_is_float(types[0]));
1546 result = nir_fsat(&b, srcs[0]);
1547 break;
1548 case ir_unop_sign:
1549 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1550 : nir_isign(&b, srcs[0]);
1551 break;
1552 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1553 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1554 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1555 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1556 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1557 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1558 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1559 case ir_unop_i2f:
1560 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1561 break;
1562 case ir_unop_u2f:
1563 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1564 break;
1565 case ir_unop_b2f:
1566 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1567 break;
1568 case ir_unop_f2i:
1569 case ir_unop_f2u:
1570 case ir_unop_f2b:
1571 case ir_unop_i2b:
1572 case ir_unop_b2i:
1573 case ir_unop_b2i64:
1574 case ir_unop_d2f:
1575 case ir_unop_f2d:
1576 case ir_unop_d2i:
1577 case ir_unop_d2u:
1578 case ir_unop_d2b:
1579 case ir_unop_i2d:
1580 case ir_unop_u2d:
1581 case ir_unop_i642i:
1582 case ir_unop_i642u:
1583 case ir_unop_i642f:
1584 case ir_unop_i642b:
1585 case ir_unop_i642d:
1586 case ir_unop_u642i:
1587 case ir_unop_u642u:
1588 case ir_unop_u642f:
1589 case ir_unop_u642d:
1590 case ir_unop_i2i64:
1591 case ir_unop_u2i64:
1592 case ir_unop_f2i64:
1593 case ir_unop_d2i64:
1594 case ir_unop_i2u64:
1595 case ir_unop_u2u64:
1596 case ir_unop_f2u64:
1597 case ir_unop_d2u64:
1598 case ir_unop_i2u:
1599 case ir_unop_u2i:
1600 case ir_unop_i642u64:
1601 case ir_unop_u642i64: {
1602 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1603 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1604 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1605 nir_rounding_mode_undef),
1606 srcs[0], NULL, NULL, NULL);
1607 /* b2i and b2f don't have fixed bit-size versions so the builder will
1608 * just assume 32 and we have to fix it up here.
1609 */
1610 result->bit_size = nir_alu_type_get_type_size(dst_type);
1611 break;
1612 }
1613
1614 case ir_unop_bitcast_i2f:
1615 case ir_unop_bitcast_f2i:
1616 case ir_unop_bitcast_u2f:
1617 case ir_unop_bitcast_f2u:
1618 case ir_unop_bitcast_i642d:
1619 case ir_unop_bitcast_d2i64:
1620 case ir_unop_bitcast_u642d:
1621 case ir_unop_bitcast_d2u64:
1622 case ir_unop_subroutine_to_int:
1623 /* no-op */
1624 result = nir_imov(&b, srcs[0]);
1625 break;
1626 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1627 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1628 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1629 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1630 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1631 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1632 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1633 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1634 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1635 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1636 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1637 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1638 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1639 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1640 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1641 case ir_unop_pack_snorm_2x16:
1642 result = nir_pack_snorm_2x16(&b, srcs[0]);
1643 break;
1644 case ir_unop_pack_snorm_4x8:
1645 result = nir_pack_snorm_4x8(&b, srcs[0]);
1646 break;
1647 case ir_unop_pack_unorm_2x16:
1648 result = nir_pack_unorm_2x16(&b, srcs[0]);
1649 break;
1650 case ir_unop_pack_unorm_4x8:
1651 result = nir_pack_unorm_4x8(&b, srcs[0]);
1652 break;
1653 case ir_unop_pack_half_2x16:
1654 result = nir_pack_half_2x16(&b, srcs[0]);
1655 break;
1656 case ir_unop_unpack_snorm_2x16:
1657 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1658 break;
1659 case ir_unop_unpack_snorm_4x8:
1660 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1661 break;
1662 case ir_unop_unpack_unorm_2x16:
1663 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1664 break;
1665 case ir_unop_unpack_unorm_4x8:
1666 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1667 break;
1668 case ir_unop_unpack_half_2x16:
1669 result = nir_unpack_half_2x16(&b, srcs[0]);
1670 break;
1671 case ir_unop_pack_sampler_2x32:
1672 case ir_unop_pack_image_2x32:
1673 case ir_unop_pack_double_2x32:
1674 case ir_unop_pack_int_2x32:
1675 case ir_unop_pack_uint_2x32:
1676 result = nir_pack_64_2x32(&b, srcs[0]);
1677 break;
1678 case ir_unop_unpack_sampler_2x32:
1679 case ir_unop_unpack_image_2x32:
1680 case ir_unop_unpack_double_2x32:
1681 case ir_unop_unpack_int_2x32:
1682 case ir_unop_unpack_uint_2x32:
1683 result = nir_unpack_64_2x32(&b, srcs[0]);
1684 break;
1685 case ir_unop_bitfield_reverse:
1686 result = nir_bitfield_reverse(&b, srcs[0]);
1687 break;
1688 case ir_unop_bit_count:
1689 result = nir_bit_count(&b, srcs[0]);
1690 break;
1691 case ir_unop_find_msb:
1692 switch (types[0]) {
1693 case GLSL_TYPE_UINT:
1694 result = nir_ufind_msb(&b, srcs[0]);
1695 break;
1696 case GLSL_TYPE_INT:
1697 result = nir_ifind_msb(&b, srcs[0]);
1698 break;
1699 default:
1700 unreachable("Invalid type for findMSB()");
1701 }
1702 break;
1703 case ir_unop_find_lsb:
1704 result = nir_find_lsb(&b, srcs[0]);
1705 break;
1706
1707 case ir_unop_noise:
1708 switch (ir->type->vector_elements) {
1709 case 1:
1710 switch (ir->operands[0]->type->vector_elements) {
1711 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1712 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1713 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1714 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1715 default: unreachable("not reached");
1716 }
1717 break;
1718 case 2:
1719 switch (ir->operands[0]->type->vector_elements) {
1720 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1721 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1722 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1723 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1724 default: unreachable("not reached");
1725 }
1726 break;
1727 case 3:
1728 switch (ir->operands[0]->type->vector_elements) {
1729 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1730 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1731 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1732 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1733 default: unreachable("not reached");
1734 }
1735 break;
1736 case 4:
1737 switch (ir->operands[0]->type->vector_elements) {
1738 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1739 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1740 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1741 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1742 default: unreachable("not reached");
1743 }
1744 break;
1745 default:
1746 unreachable("not reached");
1747 }
1748 break;
1749 case ir_unop_get_buffer_size: {
1750 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1751 this->shader,
1752 nir_intrinsic_get_buffer_size);
1753 load->num_components = ir->type->vector_elements;
1754 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1755 unsigned bit_size = glsl_get_bit_size(ir->type);
1756 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1757 return;
1758 }
1759
1760 case ir_binop_add:
1761 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1762 : nir_iadd(&b, srcs[0], srcs[1]);
1763 break;
1764 case ir_binop_sub:
1765 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1766 : nir_isub(&b, srcs[0], srcs[1]);
1767 break;
1768 case ir_binop_mul:
1769 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1770 : nir_imul(&b, srcs[0], srcs[1]);
1771 break;
1772 case ir_binop_div:
1773 if (type_is_float(out_type))
1774 result = nir_fdiv(&b, srcs[0], srcs[1]);
1775 else if (type_is_signed(out_type))
1776 result = nir_idiv(&b, srcs[0], srcs[1]);
1777 else
1778 result = nir_udiv(&b, srcs[0], srcs[1]);
1779 break;
1780 case ir_binop_mod:
1781 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1782 : nir_umod(&b, srcs[0], srcs[1]);
1783 break;
1784 case ir_binop_min:
1785 if (type_is_float(out_type))
1786 result = nir_fmin(&b, srcs[0], srcs[1]);
1787 else if (type_is_signed(out_type))
1788 result = nir_imin(&b, srcs[0], srcs[1]);
1789 else
1790 result = nir_umin(&b, srcs[0], srcs[1]);
1791 break;
1792 case ir_binop_max:
1793 if (type_is_float(out_type))
1794 result = nir_fmax(&b, srcs[0], srcs[1]);
1795 else if (type_is_signed(out_type))
1796 result = nir_imax(&b, srcs[0], srcs[1]);
1797 else
1798 result = nir_umax(&b, srcs[0], srcs[1]);
1799 break;
1800 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1801 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1802 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1803 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1804 case ir_binop_logic_and:
1805 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1806 : nir_fand(&b, srcs[0], srcs[1]);
1807 break;
1808 case ir_binop_logic_or:
1809 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1810 : nir_for(&b, srcs[0], srcs[1]);
1811 break;
1812 case ir_binop_logic_xor:
1813 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1814 : nir_fxor(&b, srcs[0], srcs[1]);
1815 break;
1816 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1817 case ir_binop_rshift:
1818 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1819 : nir_ushr(&b, srcs[0], srcs[1]);
1820 break;
1821 case ir_binop_imul_high:
1822 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1823 : nir_umul_high(&b, srcs[0], srcs[1]);
1824 break;
1825 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1826 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1827 case ir_binop_less:
1828 if (supports_ints) {
1829 if (type_is_float(types[0]))
1830 result = nir_flt(&b, srcs[0], srcs[1]);
1831 else if (type_is_signed(types[0]))
1832 result = nir_ilt(&b, srcs[0], srcs[1]);
1833 else
1834 result = nir_ult(&b, srcs[0], srcs[1]);
1835 } else {
1836 result = nir_slt(&b, srcs[0], srcs[1]);
1837 }
1838 break;
1839 case ir_binop_gequal:
1840 if (supports_ints) {
1841 if (type_is_float(types[0]))
1842 result = nir_fge(&b, srcs[0], srcs[1]);
1843 else if (type_is_signed(types[0]))
1844 result = nir_ige(&b, srcs[0], srcs[1]);
1845 else
1846 result = nir_uge(&b, srcs[0], srcs[1]);
1847 } else {
1848 result = nir_sge(&b, srcs[0], srcs[1]);
1849 }
1850 break;
1851 case ir_binop_equal:
1852 if (supports_ints) {
1853 if (type_is_float(types[0]))
1854 result = nir_feq(&b, srcs[0], srcs[1]);
1855 else
1856 result = nir_ieq(&b, srcs[0], srcs[1]);
1857 } else {
1858 result = nir_seq(&b, srcs[0], srcs[1]);
1859 }
1860 break;
1861 case ir_binop_nequal:
1862 if (supports_ints) {
1863 if (type_is_float(types[0]))
1864 result = nir_fne(&b, srcs[0], srcs[1]);
1865 else
1866 result = nir_ine(&b, srcs[0], srcs[1]);
1867 } else {
1868 result = nir_sne(&b, srcs[0], srcs[1]);
1869 }
1870 break;
1871 case ir_binop_all_equal:
1872 if (supports_ints) {
1873 if (type_is_float(types[0])) {
1874 switch (ir->operands[0]->type->vector_elements) {
1875 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1876 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1877 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1878 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1879 default:
1880 unreachable("not reached");
1881 }
1882 } else {
1883 switch (ir->operands[0]->type->vector_elements) {
1884 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1885 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1886 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1887 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1888 default:
1889 unreachable("not reached");
1890 }
1891 }
1892 } else {
1893 switch (ir->operands[0]->type->vector_elements) {
1894 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1895 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1896 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1897 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1898 default:
1899 unreachable("not reached");
1900 }
1901 }
1902 break;
1903 case ir_binop_any_nequal:
1904 if (supports_ints) {
1905 if (type_is_float(types[0])) {
1906 switch (ir->operands[0]->type->vector_elements) {
1907 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1908 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1909 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1910 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1911 default:
1912 unreachable("not reached");
1913 }
1914 } else {
1915 switch (ir->operands[0]->type->vector_elements) {
1916 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1917 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1918 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1919 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1920 default:
1921 unreachable("not reached");
1922 }
1923 }
1924 } else {
1925 switch (ir->operands[0]->type->vector_elements) {
1926 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1927 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1928 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1929 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1930 default:
1931 unreachable("not reached");
1932 }
1933 }
1934 break;
1935 case ir_binop_dot:
1936 switch (ir->operands[0]->type->vector_elements) {
1937 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1938 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1939 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1940 default:
1941 unreachable("not reached");
1942 }
1943 break;
1944 case ir_binop_vector_extract: {
1945 result = nir_channel(&b, srcs[0], 0);
1946 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1947 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1948 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1949 swizzled, result);
1950 }
1951 break;
1952 }
1953
1954 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1955 case ir_triop_fma:
1956 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1957 break;
1958 case ir_triop_lrp:
1959 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1960 break;
1961 case ir_triop_csel:
1962 if (supports_ints)
1963 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1964 else
1965 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1966 break;
1967 case ir_triop_bitfield_extract:
1968 result = (out_type == GLSL_TYPE_INT) ?
1969 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1970 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1971 break;
1972 case ir_quadop_bitfield_insert:
1973 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1974 break;
1975 case ir_quadop_vector:
1976 result = nir_vec(&b, srcs, ir->type->vector_elements);
1977 break;
1978
1979 default:
1980 unreachable("not reached");
1981 }
1982 }
1983
1984 void
1985 nir_visitor::visit(ir_swizzle *ir)
1986 {
1987 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1988 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1989 ir->type->vector_elements, !supports_ints);
1990 }
1991
1992 void
1993 nir_visitor::visit(ir_texture *ir)
1994 {
1995 unsigned num_srcs;
1996 nir_texop op;
1997 switch (ir->op) {
1998 case ir_tex:
1999 op = nir_texop_tex;
2000 num_srcs = 1; /* coordinate */
2001 break;
2002
2003 case ir_txb:
2004 case ir_txl:
2005 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2006 num_srcs = 2; /* coordinate, bias/lod */
2007 break;
2008
2009 case ir_txd:
2010 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2011 num_srcs = 3;
2012 break;
2013
2014 case ir_txf:
2015 op = nir_texop_txf;
2016 if (ir->lod_info.lod != NULL)
2017 num_srcs = 2; /* coordinate, lod */
2018 else
2019 num_srcs = 1; /* coordinate */
2020 break;
2021
2022 case ir_txf_ms:
2023 op = nir_texop_txf_ms;
2024 num_srcs = 2; /* coordinate, sample_index */
2025 break;
2026
2027 case ir_txs:
2028 op = nir_texop_txs;
2029 if (ir->lod_info.lod != NULL)
2030 num_srcs = 1; /* lod */
2031 else
2032 num_srcs = 0;
2033 break;
2034
2035 case ir_lod:
2036 op = nir_texop_lod;
2037 num_srcs = 1; /* coordinate */
2038 break;
2039
2040 case ir_tg4:
2041 op = nir_texop_tg4;
2042 num_srcs = 1; /* coordinate */
2043 break;
2044
2045 case ir_query_levels:
2046 op = nir_texop_query_levels;
2047 num_srcs = 0;
2048 break;
2049
2050 case ir_texture_samples:
2051 op = nir_texop_texture_samples;
2052 num_srcs = 0;
2053 break;
2054
2055 case ir_samples_identical:
2056 op = nir_texop_samples_identical;
2057 num_srcs = 1; /* coordinate */
2058 break;
2059
2060 default:
2061 unreachable("not reached");
2062 }
2063
2064 if (ir->projector != NULL)
2065 num_srcs++;
2066 if (ir->shadow_comparator != NULL)
2067 num_srcs++;
2068 if (ir->offset != NULL)
2069 num_srcs++;
2070
2071 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2072
2073 instr->op = op;
2074 instr->sampler_dim =
2075 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2076 instr->is_array = ir->sampler->type->sampler_array;
2077 instr->is_shadow = ir->sampler->type->sampler_shadow;
2078 if (instr->is_shadow)
2079 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2080 switch (ir->type->base_type) {
2081 case GLSL_TYPE_FLOAT:
2082 instr->dest_type = nir_type_float;
2083 break;
2084 case GLSL_TYPE_INT:
2085 instr->dest_type = nir_type_int;
2086 break;
2087 case GLSL_TYPE_BOOL:
2088 case GLSL_TYPE_UINT:
2089 instr->dest_type = nir_type_uint;
2090 break;
2091 default:
2092 unreachable("not reached");
2093 }
2094
2095 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2096
2097 unsigned src_number = 0;
2098
2099 if (ir->coordinate != NULL) {
2100 instr->coord_components = ir->coordinate->type->vector_elements;
2101 instr->src[src_number].src =
2102 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2103 instr->src[src_number].src_type = nir_tex_src_coord;
2104 src_number++;
2105 }
2106
2107 if (ir->projector != NULL) {
2108 instr->src[src_number].src =
2109 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2110 instr->src[src_number].src_type = nir_tex_src_projector;
2111 src_number++;
2112 }
2113
2114 if (ir->shadow_comparator != NULL) {
2115 instr->src[src_number].src =
2116 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2117 instr->src[src_number].src_type = nir_tex_src_comparator;
2118 src_number++;
2119 }
2120
2121 if (ir->offset != NULL) {
2122 /* we don't support multiple offsets yet */
2123 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2124
2125 instr->src[src_number].src =
2126 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2127 instr->src[src_number].src_type = nir_tex_src_offset;
2128 src_number++;
2129 }
2130
2131 switch (ir->op) {
2132 case ir_txb:
2133 instr->src[src_number].src =
2134 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2135 instr->src[src_number].src_type = nir_tex_src_bias;
2136 src_number++;
2137 break;
2138
2139 case ir_txl:
2140 case ir_txf:
2141 case ir_txs:
2142 if (ir->lod_info.lod != NULL) {
2143 instr->src[src_number].src =
2144 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2145 instr->src[src_number].src_type = nir_tex_src_lod;
2146 src_number++;
2147 }
2148 break;
2149
2150 case ir_txd:
2151 instr->src[src_number].src =
2152 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2153 instr->src[src_number].src_type = nir_tex_src_ddx;
2154 src_number++;
2155 instr->src[src_number].src =
2156 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2157 instr->src[src_number].src_type = nir_tex_src_ddy;
2158 src_number++;
2159 break;
2160
2161 case ir_txf_ms:
2162 instr->src[src_number].src =
2163 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2164 instr->src[src_number].src_type = nir_tex_src_ms_index;
2165 src_number++;
2166 break;
2167
2168 case ir_tg4:
2169 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2170 break;
2171
2172 default:
2173 break;
2174 }
2175
2176 assert(src_number == num_srcs);
2177
2178 unsigned bit_size = glsl_get_bit_size(ir->type);
2179 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2180 }
2181
2182 void
2183 nir_visitor::visit(ir_constant *ir)
2184 {
2185 /*
2186 * We don't know if this variable is an array or struct that gets
2187 * dereferenced, so do the safe thing an make it a variable with a
2188 * constant initializer and return a dereference.
2189 */
2190
2191 nir_variable *var =
2192 nir_local_variable_create(this->impl, ir->type, "const_temp");
2193 var->data.read_only = true;
2194 var->constant_initializer = constant_copy(ir, var);
2195
2196 this->deref_head = nir_deref_var_create(this->shader, var);
2197 this->deref_tail = &this->deref_head->deref;
2198 }
2199
2200 void
2201 nir_visitor::visit(ir_dereference_variable *ir)
2202 {
2203 struct hash_entry *entry =
2204 _mesa_hash_table_search(this->var_table, ir->var);
2205 assert(entry);
2206 nir_variable *var = (nir_variable *) entry->data;
2207
2208 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2209 this->deref_head = deref;
2210 this->deref_tail = &deref->deref;
2211 }
2212
2213 void
2214 nir_visitor::visit(ir_dereference_record *ir)
2215 {
2216 ir->record->accept(this);
2217
2218 int field_index = ir->field_idx;
2219 assert(field_index >= 0);
2220
2221 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2222 deref->deref.type = ir->type;
2223 this->deref_tail->child = &deref->deref;
2224 this->deref_tail = &deref->deref;
2225 }
2226
2227 void
2228 nir_visitor::visit(ir_dereference_array *ir)
2229 {
2230 nir_deref_array *deref = nir_deref_array_create(this->shader);
2231 deref->deref.type = ir->type;
2232
2233 ir_constant *const_index = ir->array_index->as_constant();
2234 if (const_index != NULL) {
2235 deref->deref_array_type = nir_deref_array_type_direct;
2236 deref->base_offset = const_index->value.u[0];
2237 } else {
2238 deref->deref_array_type = nir_deref_array_type_indirect;
2239 deref->indirect =
2240 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2241 }
2242
2243 ir->array->accept(this);
2244
2245 this->deref_tail->child = &deref->deref;
2246 ralloc_steal(this->deref_tail, deref);
2247 this->deref_tail = &deref->deref;
2248 }
2249
2250 void
2251 nir_visitor::visit(ir_barrier *)
2252 {
2253 nir_intrinsic_instr *instr =
2254 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2255 nir_builder_instr_insert(&b, &instr->instr);
2256 }