37fd9cb5c56bf2b560ad092fa1411da351ab63f4
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options,
36 shader_info *si)
37 {
38 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
39
40 exec_list_make_empty(&shader->uniforms);
41 exec_list_make_empty(&shader->inputs);
42 exec_list_make_empty(&shader->outputs);
43 exec_list_make_empty(&shader->shared);
44
45 shader->options = options;
46
47 shader->info = si ? si : rzalloc(shader, shader_info);
48
49 exec_list_make_empty(&shader->functions);
50 exec_list_make_empty(&shader->registers);
51 exec_list_make_empty(&shader->globals);
52 exec_list_make_empty(&shader->system_values);
53 shader->reg_alloc = 0;
54
55 shader->num_inputs = 0;
56 shader->num_outputs = 0;
57 shader->num_uniforms = 0;
58 shader->num_shared = 0;
59
60 shader->stage = stage;
61
62 return shader;
63 }
64
65 static nir_register *
66 reg_create(void *mem_ctx, struct exec_list *list)
67 {
68 nir_register *reg = ralloc(mem_ctx, nir_register);
69
70 list_inithead(&reg->uses);
71 list_inithead(&reg->defs);
72 list_inithead(&reg->if_uses);
73
74 reg->num_components = 0;
75 reg->bit_size = 32;
76 reg->num_array_elems = 0;
77 reg->is_packed = false;
78 reg->name = NULL;
79
80 exec_list_push_tail(list, &reg->node);
81
82 return reg;
83 }
84
85 nir_register *
86 nir_global_reg_create(nir_shader *shader)
87 {
88 nir_register *reg = reg_create(shader, &shader->registers);
89 reg->index = shader->reg_alloc++;
90 reg->is_global = true;
91
92 return reg;
93 }
94
95 nir_register *
96 nir_local_reg_create(nir_function_impl *impl)
97 {
98 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
99 reg->index = impl->reg_alloc++;
100 reg->is_global = false;
101
102 return reg;
103 }
104
105 void
106 nir_reg_remove(nir_register *reg)
107 {
108 exec_node_remove(&reg->node);
109 }
110
111 void
112 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
113 {
114 switch (var->data.mode) {
115 case nir_var_all:
116 assert(!"invalid mode");
117 break;
118
119 case nir_var_local:
120 assert(!"nir_shader_add_variable cannot be used for local variables");
121 break;
122
123 case nir_var_param:
124 assert(!"nir_shader_add_variable cannot be used for function parameters");
125 break;
126
127 case nir_var_global:
128 exec_list_push_tail(&shader->globals, &var->node);
129 break;
130
131 case nir_var_shader_in:
132 exec_list_push_tail(&shader->inputs, &var->node);
133 break;
134
135 case nir_var_shader_out:
136 exec_list_push_tail(&shader->outputs, &var->node);
137 break;
138
139 case nir_var_uniform:
140 case nir_var_shader_storage:
141 exec_list_push_tail(&shader->uniforms, &var->node);
142 break;
143
144 case nir_var_shared:
145 assert(shader->stage == MESA_SHADER_COMPUTE);
146 exec_list_push_tail(&shader->shared, &var->node);
147 break;
148
149 case nir_var_system_value:
150 exec_list_push_tail(&shader->system_values, &var->node);
151 break;
152 }
153 }
154
155 nir_variable *
156 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
157 const struct glsl_type *type, const char *name)
158 {
159 nir_variable *var = rzalloc(shader, nir_variable);
160 var->name = ralloc_strdup(var, name);
161 var->type = type;
162 var->data.mode = mode;
163
164 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
165 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
166 var->data.interpolation = INTERP_MODE_SMOOTH;
167
168 if (mode == nir_var_shader_in || mode == nir_var_uniform)
169 var->data.read_only = true;
170
171 nir_shader_add_variable(shader, var);
172
173 return var;
174 }
175
176 nir_variable *
177 nir_local_variable_create(nir_function_impl *impl,
178 const struct glsl_type *type, const char *name)
179 {
180 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
181 var->name = ralloc_strdup(var, name);
182 var->type = type;
183 var->data.mode = nir_var_local;
184
185 nir_function_impl_add_variable(impl, var);
186
187 return var;
188 }
189
190 nir_function *
191 nir_function_create(nir_shader *shader, const char *name)
192 {
193 nir_function *func = ralloc(shader, nir_function);
194
195 exec_list_push_tail(&shader->functions, &func->node);
196
197 func->name = ralloc_strdup(func, name);
198 func->shader = shader;
199 func->num_params = 0;
200 func->params = NULL;
201 func->return_type = glsl_void_type();
202 func->impl = NULL;
203
204 return func;
205 }
206
207 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
208 {
209 dest->is_ssa = src->is_ssa;
210 if (src->is_ssa) {
211 dest->ssa = src->ssa;
212 } else {
213 dest->reg.base_offset = src->reg.base_offset;
214 dest->reg.reg = src->reg.reg;
215 if (src->reg.indirect) {
216 dest->reg.indirect = ralloc(mem_ctx, nir_src);
217 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
218 } else {
219 dest->reg.indirect = NULL;
220 }
221 }
222 }
223
224 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
225 {
226 /* Copying an SSA definition makes no sense whatsoever. */
227 assert(!src->is_ssa);
228
229 dest->is_ssa = false;
230
231 dest->reg.base_offset = src->reg.base_offset;
232 dest->reg.reg = src->reg.reg;
233 if (src->reg.indirect) {
234 dest->reg.indirect = ralloc(instr, nir_src);
235 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
236 } else {
237 dest->reg.indirect = NULL;
238 }
239 }
240
241 void
242 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
243 nir_alu_instr *instr)
244 {
245 nir_src_copy(&dest->src, &src->src, &instr->instr);
246 dest->abs = src->abs;
247 dest->negate = src->negate;
248 for (unsigned i = 0; i < 4; i++)
249 dest->swizzle[i] = src->swizzle[i];
250 }
251
252 void
253 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
254 nir_alu_instr *instr)
255 {
256 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
257 dest->write_mask = src->write_mask;
258 dest->saturate = src->saturate;
259 }
260
261
262 static void
263 cf_init(nir_cf_node *node, nir_cf_node_type type)
264 {
265 exec_node_init(&node->node);
266 node->parent = NULL;
267 node->type = type;
268 }
269
270 nir_function_impl *
271 nir_function_impl_create_bare(nir_shader *shader)
272 {
273 nir_function_impl *impl = ralloc(shader, nir_function_impl);
274
275 impl->function = NULL;
276
277 cf_init(&impl->cf_node, nir_cf_node_function);
278
279 exec_list_make_empty(&impl->body);
280 exec_list_make_empty(&impl->registers);
281 exec_list_make_empty(&impl->locals);
282 impl->num_params = 0;
283 impl->params = NULL;
284 impl->return_var = NULL;
285 impl->reg_alloc = 0;
286 impl->ssa_alloc = 0;
287 impl->valid_metadata = nir_metadata_none;
288
289 /* create start & end blocks */
290 nir_block *start_block = nir_block_create(shader);
291 nir_block *end_block = nir_block_create(shader);
292 start_block->cf_node.parent = &impl->cf_node;
293 end_block->cf_node.parent = &impl->cf_node;
294 impl->end_block = end_block;
295
296 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
297
298 start_block->successors[0] = end_block;
299 _mesa_set_add(end_block->predecessors, start_block);
300 return impl;
301 }
302
303 nir_function_impl *
304 nir_function_impl_create(nir_function *function)
305 {
306 assert(function->impl == NULL);
307
308 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
309
310 function->impl = impl;
311 impl->function = function;
312
313 impl->num_params = function->num_params;
314 impl->params = ralloc_array(function->shader,
315 nir_variable *, impl->num_params);
316
317 for (unsigned i = 0; i < impl->num_params; i++) {
318 impl->params[i] = rzalloc(function->shader, nir_variable);
319 impl->params[i]->type = function->params[i].type;
320 impl->params[i]->data.mode = nir_var_param;
321 impl->params[i]->data.location = i;
322 }
323
324 if (!glsl_type_is_void(function->return_type)) {
325 impl->return_var = rzalloc(function->shader, nir_variable);
326 impl->return_var->type = function->return_type;
327 impl->return_var->data.mode = nir_var_param;
328 impl->return_var->data.location = -1;
329 } else {
330 impl->return_var = NULL;
331 }
332
333 return impl;
334 }
335
336 nir_block *
337 nir_block_create(nir_shader *shader)
338 {
339 nir_block *block = rzalloc(shader, nir_block);
340
341 cf_init(&block->cf_node, nir_cf_node_block);
342
343 block->successors[0] = block->successors[1] = NULL;
344 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
345 _mesa_key_pointer_equal);
346 block->imm_dom = NULL;
347 /* XXX maybe it would be worth it to defer allocation? This
348 * way it doesn't get allocated for shader ref's that never run
349 * nir_calc_dominance? For example, state-tracker creates an
350 * initial IR, clones that, runs appropriate lowering pass, passes
351 * to driver which does common lowering/opt, and then stores ref
352 * which is later used to do state specific lowering and futher
353 * opt. Do any of the references not need dominance metadata?
354 */
355 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
356 _mesa_key_pointer_equal);
357
358 exec_list_make_empty(&block->instr_list);
359
360 return block;
361 }
362
363 static inline void
364 src_init(nir_src *src)
365 {
366 src->is_ssa = false;
367 src->reg.reg = NULL;
368 src->reg.indirect = NULL;
369 src->reg.base_offset = 0;
370 }
371
372 nir_if *
373 nir_if_create(nir_shader *shader)
374 {
375 nir_if *if_stmt = ralloc(shader, nir_if);
376
377 cf_init(&if_stmt->cf_node, nir_cf_node_if);
378 src_init(&if_stmt->condition);
379
380 nir_block *then = nir_block_create(shader);
381 exec_list_make_empty(&if_stmt->then_list);
382 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
383 then->cf_node.parent = &if_stmt->cf_node;
384
385 nir_block *else_stmt = nir_block_create(shader);
386 exec_list_make_empty(&if_stmt->else_list);
387 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
388 else_stmt->cf_node.parent = &if_stmt->cf_node;
389
390 return if_stmt;
391 }
392
393 nir_loop *
394 nir_loop_create(nir_shader *shader)
395 {
396 nir_loop *loop = rzalloc(shader, nir_loop);
397
398 cf_init(&loop->cf_node, nir_cf_node_loop);
399
400 nir_block *body = nir_block_create(shader);
401 exec_list_make_empty(&loop->body);
402 exec_list_push_tail(&loop->body, &body->cf_node.node);
403 body->cf_node.parent = &loop->cf_node;
404
405 body->successors[0] = body;
406 _mesa_set_add(body->predecessors, body);
407
408 return loop;
409 }
410
411 static void
412 instr_init(nir_instr *instr, nir_instr_type type)
413 {
414 instr->type = type;
415 instr->block = NULL;
416 exec_node_init(&instr->node);
417 }
418
419 static void
420 dest_init(nir_dest *dest)
421 {
422 dest->is_ssa = false;
423 dest->reg.reg = NULL;
424 dest->reg.indirect = NULL;
425 dest->reg.base_offset = 0;
426 }
427
428 static void
429 alu_dest_init(nir_alu_dest *dest)
430 {
431 dest_init(&dest->dest);
432 dest->saturate = false;
433 dest->write_mask = 0xf;
434 }
435
436 static void
437 alu_src_init(nir_alu_src *src)
438 {
439 src_init(&src->src);
440 src->abs = src->negate = false;
441 src->swizzle[0] = 0;
442 src->swizzle[1] = 1;
443 src->swizzle[2] = 2;
444 src->swizzle[3] = 3;
445 }
446
447 nir_alu_instr *
448 nir_alu_instr_create(nir_shader *shader, nir_op op)
449 {
450 unsigned num_srcs = nir_op_infos[op].num_inputs;
451 /* TODO: don't use rzalloc */
452 nir_alu_instr *instr =
453 rzalloc_size(shader,
454 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
455
456 instr_init(&instr->instr, nir_instr_type_alu);
457 instr->op = op;
458 alu_dest_init(&instr->dest);
459 for (unsigned i = 0; i < num_srcs; i++)
460 alu_src_init(&instr->src[i]);
461
462 return instr;
463 }
464
465 nir_jump_instr *
466 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
467 {
468 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
469 instr_init(&instr->instr, nir_instr_type_jump);
470 instr->type = type;
471 return instr;
472 }
473
474 nir_load_const_instr *
475 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
476 unsigned bit_size)
477 {
478 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
479 instr_init(&instr->instr, nir_instr_type_load_const);
480
481 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
482
483 return instr;
484 }
485
486 nir_intrinsic_instr *
487 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
488 {
489 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
490 /* TODO: don't use rzalloc */
491 nir_intrinsic_instr *instr =
492 rzalloc_size(shader,
493 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
494
495 instr_init(&instr->instr, nir_instr_type_intrinsic);
496 instr->intrinsic = op;
497
498 if (nir_intrinsic_infos[op].has_dest)
499 dest_init(&instr->dest);
500
501 for (unsigned i = 0; i < num_srcs; i++)
502 src_init(&instr->src[i]);
503
504 return instr;
505 }
506
507 nir_call_instr *
508 nir_call_instr_create(nir_shader *shader, nir_function *callee)
509 {
510 nir_call_instr *instr = ralloc(shader, nir_call_instr);
511 instr_init(&instr->instr, nir_instr_type_call);
512
513 instr->callee = callee;
514 instr->num_params = callee->num_params;
515 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
516 instr->return_deref = NULL;
517
518 return instr;
519 }
520
521 nir_tex_instr *
522 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
523 {
524 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
525 instr_init(&instr->instr, nir_instr_type_tex);
526
527 dest_init(&instr->dest);
528
529 instr->num_srcs = num_srcs;
530 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
531 for (unsigned i = 0; i < num_srcs; i++)
532 src_init(&instr->src[i].src);
533
534 instr->texture_index = 0;
535 instr->texture_array_size = 0;
536 instr->texture = NULL;
537 instr->sampler_index = 0;
538 instr->sampler = NULL;
539
540 return instr;
541 }
542
543 void
544 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
545 {
546 assert(src_idx < tex->num_srcs);
547
548 /* First rewrite the source to NIR_SRC_INIT */
549 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
550
551 /* Now, move all of the other sources down */
552 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
553 tex->src[i-1].src_type = tex->src[i].src_type;
554 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
555 }
556 tex->num_srcs--;
557 }
558
559 nir_phi_instr *
560 nir_phi_instr_create(nir_shader *shader)
561 {
562 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
563 instr_init(&instr->instr, nir_instr_type_phi);
564
565 dest_init(&instr->dest);
566 exec_list_make_empty(&instr->srcs);
567 return instr;
568 }
569
570 nir_parallel_copy_instr *
571 nir_parallel_copy_instr_create(nir_shader *shader)
572 {
573 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
574 instr_init(&instr->instr, nir_instr_type_parallel_copy);
575
576 exec_list_make_empty(&instr->entries);
577
578 return instr;
579 }
580
581 nir_ssa_undef_instr *
582 nir_ssa_undef_instr_create(nir_shader *shader,
583 unsigned num_components,
584 unsigned bit_size)
585 {
586 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
587 instr_init(&instr->instr, nir_instr_type_ssa_undef);
588
589 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
590
591 return instr;
592 }
593
594 nir_deref_var *
595 nir_deref_var_create(void *mem_ctx, nir_variable *var)
596 {
597 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
598 deref->deref.deref_type = nir_deref_type_var;
599 deref->deref.child = NULL;
600 deref->deref.type = var->type;
601 deref->var = var;
602 return deref;
603 }
604
605 nir_deref_array *
606 nir_deref_array_create(void *mem_ctx)
607 {
608 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
609 deref->deref.deref_type = nir_deref_type_array;
610 deref->deref.child = NULL;
611 deref->deref_array_type = nir_deref_array_type_direct;
612 src_init(&deref->indirect);
613 deref->base_offset = 0;
614 return deref;
615 }
616
617 nir_deref_struct *
618 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
619 {
620 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
621 deref->deref.deref_type = nir_deref_type_struct;
622 deref->deref.child = NULL;
623 deref->index = field_index;
624 return deref;
625 }
626
627 nir_deref_var *
628 nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx)
629 {
630 if (deref == NULL)
631 return NULL;
632
633 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
634 ret->deref.type = deref->deref.type;
635 if (deref->deref.child)
636 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
637 return ret;
638 }
639
640 static nir_deref_array *
641 deref_array_clone(const nir_deref_array *deref, void *mem_ctx)
642 {
643 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
644 ret->base_offset = deref->base_offset;
645 ret->deref_array_type = deref->deref_array_type;
646 if (deref->deref_array_type == nir_deref_array_type_indirect) {
647 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
648 }
649 ret->deref.type = deref->deref.type;
650 if (deref->deref.child)
651 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
652 return ret;
653 }
654
655 static nir_deref_struct *
656 deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx)
657 {
658 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
659 ret->deref.type = deref->deref.type;
660 if (deref->deref.child)
661 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
662 return ret;
663 }
664
665 nir_deref *
666 nir_deref_clone(const nir_deref *deref, void *mem_ctx)
667 {
668 if (deref == NULL)
669 return NULL;
670
671 switch (deref->deref_type) {
672 case nir_deref_type_var:
673 return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref;
674 case nir_deref_type_array:
675 return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref;
676 case nir_deref_type_struct:
677 return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref;
678 default:
679 unreachable("Invalid dereference type");
680 }
681
682 return NULL;
683 }
684
685 /* This is the second step in the recursion. We've found the tail and made a
686 * copy. Now we need to iterate over all possible leaves and call the
687 * callback on each one.
688 */
689 static bool
690 deref_foreach_leaf_build_recur(nir_deref_var *deref, nir_deref *tail,
691 nir_deref_foreach_leaf_cb cb, void *state)
692 {
693 unsigned length;
694 union {
695 nir_deref_array arr;
696 nir_deref_struct str;
697 } tmp;
698
699 assert(tail->child == NULL);
700 switch (glsl_get_base_type(tail->type)) {
701 case GLSL_TYPE_UINT:
702 case GLSL_TYPE_INT:
703 case GLSL_TYPE_FLOAT:
704 case GLSL_TYPE_DOUBLE:
705 case GLSL_TYPE_BOOL:
706 if (glsl_type_is_vector_or_scalar(tail->type))
707 return cb(deref, state);
708 /* Fall Through */
709
710 case GLSL_TYPE_ARRAY:
711 tmp.arr.deref.deref_type = nir_deref_type_array;
712 tmp.arr.deref.type = glsl_get_array_element(tail->type);
713 tmp.arr.deref_array_type = nir_deref_array_type_direct;
714 tmp.arr.indirect = NIR_SRC_INIT;
715 tail->child = &tmp.arr.deref;
716
717 length = glsl_get_length(tail->type);
718 for (unsigned i = 0; i < length; i++) {
719 tmp.arr.deref.child = NULL;
720 tmp.arr.base_offset = i;
721 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
722 return false;
723 }
724 return true;
725
726 case GLSL_TYPE_STRUCT:
727 tmp.str.deref.deref_type = nir_deref_type_struct;
728 tail->child = &tmp.str.deref;
729
730 length = glsl_get_length(tail->type);
731 for (unsigned i = 0; i < length; i++) {
732 tmp.arr.deref.child = NULL;
733 tmp.str.deref.type = glsl_get_struct_field(tail->type, i);
734 tmp.str.index = i;
735 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
736 return false;
737 }
738 return true;
739
740 default:
741 unreachable("Invalid type for dereference");
742 }
743 }
744
745 /* This is the first step of the foreach_leaf recursion. In this step we are
746 * walking to the end of the deref chain and making a copy in the stack as we
747 * go. This is because we don't want to mutate the deref chain that was
748 * passed in by the caller. The downside is that this deref chain is on the
749 * stack and , if the caller wants to do anything with it, they will have to
750 * make their own copy because this one will go away.
751 */
752 static bool
753 deref_foreach_leaf_copy_recur(nir_deref_var *deref, nir_deref *tail,
754 nir_deref_foreach_leaf_cb cb, void *state)
755 {
756 union {
757 nir_deref_array arr;
758 nir_deref_struct str;
759 } c;
760
761 if (tail->child) {
762 switch (tail->child->deref_type) {
763 case nir_deref_type_array:
764 c.arr = *nir_deref_as_array(tail->child);
765 tail->child = &c.arr.deref;
766 return deref_foreach_leaf_copy_recur(deref, &c.arr.deref, cb, state);
767
768 case nir_deref_type_struct:
769 c.str = *nir_deref_as_struct(tail->child);
770 tail->child = &c.str.deref;
771 return deref_foreach_leaf_copy_recur(deref, &c.str.deref, cb, state);
772
773 case nir_deref_type_var:
774 default:
775 unreachable("Invalid deref type for a child");
776 }
777 } else {
778 /* We've gotten to the end of the original deref. Time to start
779 * building our own derefs.
780 */
781 return deref_foreach_leaf_build_recur(deref, tail, cb, state);
782 }
783 }
784
785 /**
786 * This function iterates over all of the possible derefs that can be created
787 * with the given deref as the head. It then calls the provided callback with
788 * a full deref for each one.
789 *
790 * The deref passed to the callback will be allocated on the stack. You will
791 * need to make a copy if you want it to hang around.
792 */
793 bool
794 nir_deref_foreach_leaf(nir_deref_var *deref,
795 nir_deref_foreach_leaf_cb cb, void *state)
796 {
797 nir_deref_var copy = *deref;
798 return deref_foreach_leaf_copy_recur(&copy, &copy.deref, cb, state);
799 }
800
801 /* Returns a load_const instruction that represents the constant
802 * initializer for the given deref chain. The caller is responsible for
803 * ensuring that there actually is a constant initializer.
804 */
805 nir_load_const_instr *
806 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
807 {
808 nir_constant *constant = deref->var->constant_initializer;
809 assert(constant);
810
811 const nir_deref *tail = &deref->deref;
812 unsigned matrix_col = 0;
813 while (tail->child) {
814 switch (tail->child->deref_type) {
815 case nir_deref_type_array: {
816 nir_deref_array *arr = nir_deref_as_array(tail->child);
817 assert(arr->deref_array_type == nir_deref_array_type_direct);
818 if (glsl_type_is_matrix(tail->type)) {
819 assert(arr->deref.child == NULL);
820 matrix_col = arr->base_offset;
821 } else {
822 constant = constant->elements[arr->base_offset];
823 }
824 break;
825 }
826
827 case nir_deref_type_struct: {
828 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
829 break;
830 }
831
832 default:
833 unreachable("Invalid deref child type");
834 }
835
836 tail = tail->child;
837 }
838
839 unsigned bit_size = glsl_get_bit_size(tail->type);
840 nir_load_const_instr *load =
841 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
842 bit_size);
843
844 switch (glsl_get_base_type(tail->type)) {
845 case GLSL_TYPE_FLOAT:
846 case GLSL_TYPE_INT:
847 case GLSL_TYPE_UINT:
848 case GLSL_TYPE_DOUBLE:
849 case GLSL_TYPE_UINT64:
850 case GLSL_TYPE_INT64:
851 case GLSL_TYPE_BOOL:
852 load->value = constant->values[matrix_col];
853 break;
854 default:
855 unreachable("Invalid immediate type");
856 }
857
858 return load;
859 }
860
861 nir_function_impl *
862 nir_cf_node_get_function(nir_cf_node *node)
863 {
864 while (node->type != nir_cf_node_function) {
865 node = node->parent;
866 }
867
868 return nir_cf_node_as_function(node);
869 }
870
871 /* Reduces a cursor by trying to convert everything to after and trying to
872 * go up to block granularity when possible.
873 */
874 static nir_cursor
875 reduce_cursor(nir_cursor cursor)
876 {
877 switch (cursor.option) {
878 case nir_cursor_before_block:
879 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
880 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
881 if (exec_list_is_empty(&cursor.block->instr_list)) {
882 /* Empty block. After is as good as before. */
883 cursor.option = nir_cursor_after_block;
884 }
885 return cursor;
886
887 case nir_cursor_after_block:
888 return cursor;
889
890 case nir_cursor_before_instr: {
891 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
892 if (prev_instr) {
893 /* Before this instruction is after the previous */
894 cursor.instr = prev_instr;
895 cursor.option = nir_cursor_after_instr;
896 } else {
897 /* No previous instruction. Switch to before block */
898 cursor.block = cursor.instr->block;
899 cursor.option = nir_cursor_before_block;
900 }
901 return reduce_cursor(cursor);
902 }
903
904 case nir_cursor_after_instr:
905 if (nir_instr_next(cursor.instr) == NULL) {
906 /* This is the last instruction, switch to after block */
907 cursor.option = nir_cursor_after_block;
908 cursor.block = cursor.instr->block;
909 }
910 return cursor;
911
912 default:
913 unreachable("Inavlid cursor option");
914 }
915 }
916
917 bool
918 nir_cursors_equal(nir_cursor a, nir_cursor b)
919 {
920 /* Reduced cursors should be unique */
921 a = reduce_cursor(a);
922 b = reduce_cursor(b);
923
924 return a.block == b.block && a.option == b.option;
925 }
926
927 static bool
928 add_use_cb(nir_src *src, void *state)
929 {
930 nir_instr *instr = state;
931
932 src->parent_instr = instr;
933 list_addtail(&src->use_link,
934 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
935
936 return true;
937 }
938
939 static bool
940 add_ssa_def_cb(nir_ssa_def *def, void *state)
941 {
942 nir_instr *instr = state;
943
944 if (instr->block && def->index == UINT_MAX) {
945 nir_function_impl *impl =
946 nir_cf_node_get_function(&instr->block->cf_node);
947
948 def->index = impl->ssa_alloc++;
949 }
950
951 return true;
952 }
953
954 static bool
955 add_reg_def_cb(nir_dest *dest, void *state)
956 {
957 nir_instr *instr = state;
958
959 if (!dest->is_ssa) {
960 dest->reg.parent_instr = instr;
961 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
962 }
963
964 return true;
965 }
966
967 static void
968 add_defs_uses(nir_instr *instr)
969 {
970 nir_foreach_src(instr, add_use_cb, instr);
971 nir_foreach_dest(instr, add_reg_def_cb, instr);
972 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
973 }
974
975 void
976 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
977 {
978 switch (cursor.option) {
979 case nir_cursor_before_block:
980 /* Only allow inserting jumps into empty blocks. */
981 if (instr->type == nir_instr_type_jump)
982 assert(exec_list_is_empty(&cursor.block->instr_list));
983
984 instr->block = cursor.block;
985 add_defs_uses(instr);
986 exec_list_push_head(&cursor.block->instr_list, &instr->node);
987 break;
988 case nir_cursor_after_block: {
989 /* Inserting instructions after a jump is illegal. */
990 nir_instr *last = nir_block_last_instr(cursor.block);
991 assert(last == NULL || last->type != nir_instr_type_jump);
992 (void) last;
993
994 instr->block = cursor.block;
995 add_defs_uses(instr);
996 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
997 break;
998 }
999 case nir_cursor_before_instr:
1000 assert(instr->type != nir_instr_type_jump);
1001 instr->block = cursor.instr->block;
1002 add_defs_uses(instr);
1003 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
1004 break;
1005 case nir_cursor_after_instr:
1006 /* Inserting instructions after a jump is illegal. */
1007 assert(cursor.instr->type != nir_instr_type_jump);
1008
1009 /* Only allow inserting jumps at the end of the block. */
1010 if (instr->type == nir_instr_type_jump)
1011 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
1012
1013 instr->block = cursor.instr->block;
1014 add_defs_uses(instr);
1015 exec_node_insert_after(&cursor.instr->node, &instr->node);
1016 break;
1017 }
1018
1019 if (instr->type == nir_instr_type_jump)
1020 nir_handle_add_jump(instr->block);
1021 }
1022
1023 static bool
1024 src_is_valid(const nir_src *src)
1025 {
1026 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1027 }
1028
1029 static bool
1030 remove_use_cb(nir_src *src, void *state)
1031 {
1032 (void) state;
1033
1034 if (src_is_valid(src))
1035 list_del(&src->use_link);
1036
1037 return true;
1038 }
1039
1040 static bool
1041 remove_def_cb(nir_dest *dest, void *state)
1042 {
1043 (void) state;
1044
1045 if (!dest->is_ssa)
1046 list_del(&dest->reg.def_link);
1047
1048 return true;
1049 }
1050
1051 static void
1052 remove_defs_uses(nir_instr *instr)
1053 {
1054 nir_foreach_dest(instr, remove_def_cb, instr);
1055 nir_foreach_src(instr, remove_use_cb, instr);
1056 }
1057
1058 void nir_instr_remove(nir_instr *instr)
1059 {
1060 remove_defs_uses(instr);
1061 exec_node_remove(&instr->node);
1062
1063 if (instr->type == nir_instr_type_jump) {
1064 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
1065 nir_handle_remove_jump(instr->block, jump_instr->type);
1066 }
1067 }
1068
1069 /*@}*/
1070
1071 void
1072 nir_index_local_regs(nir_function_impl *impl)
1073 {
1074 unsigned index = 0;
1075 foreach_list_typed(nir_register, reg, node, &impl->registers) {
1076 reg->index = index++;
1077 }
1078 impl->reg_alloc = index;
1079 }
1080
1081 void
1082 nir_index_global_regs(nir_shader *shader)
1083 {
1084 unsigned index = 0;
1085 foreach_list_typed(nir_register, reg, node, &shader->registers) {
1086 reg->index = index++;
1087 }
1088 shader->reg_alloc = index;
1089 }
1090
1091 static bool
1092 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
1093 {
1094 return cb(&instr->dest.dest, state);
1095 }
1096
1097 static bool
1098 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
1099 void *state)
1100 {
1101 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
1102 return cb(&instr->dest, state);
1103
1104 return true;
1105 }
1106
1107 static bool
1108 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
1109 void *state)
1110 {
1111 return cb(&instr->dest, state);
1112 }
1113
1114 static bool
1115 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
1116 {
1117 return cb(&instr->dest, state);
1118 }
1119
1120 static bool
1121 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
1122 nir_foreach_dest_cb cb, void *state)
1123 {
1124 nir_foreach_parallel_copy_entry(entry, instr) {
1125 if (!cb(&entry->dest, state))
1126 return false;
1127 }
1128
1129 return true;
1130 }
1131
1132 bool
1133 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1134 {
1135 switch (instr->type) {
1136 case nir_instr_type_alu:
1137 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1138 case nir_instr_type_intrinsic:
1139 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1140 case nir_instr_type_tex:
1141 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1142 case nir_instr_type_phi:
1143 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1144 case nir_instr_type_parallel_copy:
1145 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1146 cb, state);
1147
1148 case nir_instr_type_load_const:
1149 case nir_instr_type_ssa_undef:
1150 case nir_instr_type_call:
1151 case nir_instr_type_jump:
1152 break;
1153
1154 default:
1155 unreachable("Invalid instruction type");
1156 break;
1157 }
1158
1159 return true;
1160 }
1161
1162 struct foreach_ssa_def_state {
1163 nir_foreach_ssa_def_cb cb;
1164 void *client_state;
1165 };
1166
1167 static inline bool
1168 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1169 {
1170 struct foreach_ssa_def_state *state = void_state;
1171
1172 if (dest->is_ssa)
1173 return state->cb(&dest->ssa, state->client_state);
1174 else
1175 return true;
1176 }
1177
1178 bool
1179 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1180 {
1181 switch (instr->type) {
1182 case nir_instr_type_alu:
1183 case nir_instr_type_tex:
1184 case nir_instr_type_intrinsic:
1185 case nir_instr_type_phi:
1186 case nir_instr_type_parallel_copy: {
1187 struct foreach_ssa_def_state foreach_state = {cb, state};
1188 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1189 }
1190
1191 case nir_instr_type_load_const:
1192 return cb(&nir_instr_as_load_const(instr)->def, state);
1193 case nir_instr_type_ssa_undef:
1194 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1195 case nir_instr_type_call:
1196 case nir_instr_type_jump:
1197 return true;
1198 default:
1199 unreachable("Invalid instruction type");
1200 }
1201 }
1202
1203 static bool
1204 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1205 {
1206 if (!cb(src, state))
1207 return false;
1208 if (!src->is_ssa && src->reg.indirect)
1209 return cb(src->reg.indirect, state);
1210 return true;
1211 }
1212
1213 static bool
1214 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1215 void *state)
1216 {
1217 if (deref->deref_array_type == nir_deref_array_type_indirect)
1218 return visit_src(&deref->indirect, cb, state);
1219 return true;
1220 }
1221
1222 static bool
1223 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1224 {
1225 nir_deref *cur = &deref->deref;
1226 while (cur != NULL) {
1227 if (cur->deref_type == nir_deref_type_array) {
1228 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1229 return false;
1230 }
1231
1232 cur = cur->child;
1233 }
1234
1235 return true;
1236 }
1237
1238 static bool
1239 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1240 {
1241 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1242 if (!visit_src(&instr->src[i].src, cb, state))
1243 return false;
1244
1245 return true;
1246 }
1247
1248 static bool
1249 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1250 {
1251 for (unsigned i = 0; i < instr->num_srcs; i++) {
1252 if (!visit_src(&instr->src[i].src, cb, state))
1253 return false;
1254 }
1255
1256 if (instr->texture != NULL) {
1257 if (!visit_deref_src(instr->texture, cb, state))
1258 return false;
1259 }
1260
1261 if (instr->sampler != NULL) {
1262 if (!visit_deref_src(instr->sampler, cb, state))
1263 return false;
1264 }
1265
1266 return true;
1267 }
1268
1269 static bool
1270 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1271 void *state)
1272 {
1273 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1274 for (unsigned i = 0; i < num_srcs; i++) {
1275 if (!visit_src(&instr->src[i], cb, state))
1276 return false;
1277 }
1278
1279 unsigned num_vars =
1280 nir_intrinsic_infos[instr->intrinsic].num_variables;
1281 for (unsigned i = 0; i < num_vars; i++) {
1282 if (!visit_deref_src(instr->variables[i], cb, state))
1283 return false;
1284 }
1285
1286 return true;
1287 }
1288
1289 static bool
1290 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1291 {
1292 nir_foreach_phi_src(src, instr) {
1293 if (!visit_src(&src->src, cb, state))
1294 return false;
1295 }
1296
1297 return true;
1298 }
1299
1300 static bool
1301 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1302 nir_foreach_src_cb cb, void *state)
1303 {
1304 nir_foreach_parallel_copy_entry(entry, instr) {
1305 if (!visit_src(&entry->src, cb, state))
1306 return false;
1307 }
1308
1309 return true;
1310 }
1311
1312 typedef struct {
1313 void *state;
1314 nir_foreach_src_cb cb;
1315 } visit_dest_indirect_state;
1316
1317 static bool
1318 visit_dest_indirect(nir_dest *dest, void *_state)
1319 {
1320 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1321
1322 if (!dest->is_ssa && dest->reg.indirect)
1323 return state->cb(dest->reg.indirect, state->state);
1324
1325 return true;
1326 }
1327
1328 bool
1329 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1330 {
1331 switch (instr->type) {
1332 case nir_instr_type_alu:
1333 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1334 return false;
1335 break;
1336 case nir_instr_type_intrinsic:
1337 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1338 return false;
1339 break;
1340 case nir_instr_type_tex:
1341 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1342 return false;
1343 break;
1344 case nir_instr_type_call:
1345 /* Call instructions have no regular sources */
1346 break;
1347 case nir_instr_type_load_const:
1348 /* Constant load instructions have no regular sources */
1349 break;
1350 case nir_instr_type_phi:
1351 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1352 return false;
1353 break;
1354 case nir_instr_type_parallel_copy:
1355 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1356 cb, state))
1357 return false;
1358 break;
1359 case nir_instr_type_jump:
1360 case nir_instr_type_ssa_undef:
1361 return true;
1362
1363 default:
1364 unreachable("Invalid instruction type");
1365 break;
1366 }
1367
1368 visit_dest_indirect_state dest_state;
1369 dest_state.state = state;
1370 dest_state.cb = cb;
1371 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1372 }
1373
1374 nir_const_value *
1375 nir_src_as_const_value(nir_src src)
1376 {
1377 if (!src.is_ssa)
1378 return NULL;
1379
1380 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1381 return NULL;
1382
1383 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1384
1385 return &load->value;
1386 }
1387
1388 /**
1389 * Returns true if the source is known to be dynamically uniform. Otherwise it
1390 * returns false which means it may or may not be dynamically uniform but it
1391 * can't be determined.
1392 */
1393 bool
1394 nir_src_is_dynamically_uniform(nir_src src)
1395 {
1396 if (!src.is_ssa)
1397 return false;
1398
1399 /* Constants are trivially dynamically uniform */
1400 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1401 return true;
1402
1403 /* As are uniform variables */
1404 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1405 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1406
1407 if (intr->intrinsic == nir_intrinsic_load_uniform)
1408 return true;
1409 }
1410
1411 /* XXX: this could have many more tests, such as when a sampler function is
1412 * called with dynamically uniform arguments.
1413 */
1414 return false;
1415 }
1416
1417 static void
1418 src_remove_all_uses(nir_src *src)
1419 {
1420 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1421 if (!src_is_valid(src))
1422 continue;
1423
1424 list_del(&src->use_link);
1425 }
1426 }
1427
1428 static void
1429 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1430 {
1431 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1432 if (!src_is_valid(src))
1433 continue;
1434
1435 if (parent_instr) {
1436 src->parent_instr = parent_instr;
1437 if (src->is_ssa)
1438 list_addtail(&src->use_link, &src->ssa->uses);
1439 else
1440 list_addtail(&src->use_link, &src->reg.reg->uses);
1441 } else {
1442 assert(parent_if);
1443 src->parent_if = parent_if;
1444 if (src->is_ssa)
1445 list_addtail(&src->use_link, &src->ssa->if_uses);
1446 else
1447 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1448 }
1449 }
1450 }
1451
1452 void
1453 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1454 {
1455 assert(!src_is_valid(src) || src->parent_instr == instr);
1456
1457 src_remove_all_uses(src);
1458 *src = new_src;
1459 src_add_all_uses(src, instr, NULL);
1460 }
1461
1462 void
1463 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1464 {
1465 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1466
1467 src_remove_all_uses(dest);
1468 src_remove_all_uses(src);
1469 *dest = *src;
1470 *src = NIR_SRC_INIT;
1471 src_add_all_uses(dest, dest_instr, NULL);
1472 }
1473
1474 void
1475 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1476 {
1477 nir_src *src = &if_stmt->condition;
1478 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1479
1480 src_remove_all_uses(src);
1481 *src = new_src;
1482 src_add_all_uses(src, NULL, if_stmt);
1483 }
1484
1485 void
1486 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1487 {
1488 if (dest->is_ssa) {
1489 /* We can only overwrite an SSA destination if it has no uses. */
1490 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1491 } else {
1492 list_del(&dest->reg.def_link);
1493 if (dest->reg.indirect)
1494 src_remove_all_uses(dest->reg.indirect);
1495 }
1496
1497 /* We can't re-write with an SSA def */
1498 assert(!new_dest.is_ssa);
1499
1500 nir_dest_copy(dest, &new_dest, instr);
1501
1502 dest->reg.parent_instr = instr;
1503 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1504
1505 if (dest->reg.indirect)
1506 src_add_all_uses(dest->reg.indirect, instr, NULL);
1507 }
1508
1509 /* note: does *not* take ownership of 'name' */
1510 void
1511 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1512 unsigned num_components,
1513 unsigned bit_size, const char *name)
1514 {
1515 def->name = ralloc_strdup(instr, name);
1516 def->parent_instr = instr;
1517 list_inithead(&def->uses);
1518 list_inithead(&def->if_uses);
1519 def->num_components = num_components;
1520 def->bit_size = bit_size;
1521
1522 if (instr->block) {
1523 nir_function_impl *impl =
1524 nir_cf_node_get_function(&instr->block->cf_node);
1525
1526 def->index = impl->ssa_alloc++;
1527 } else {
1528 def->index = UINT_MAX;
1529 }
1530 }
1531
1532 /* note: does *not* take ownership of 'name' */
1533 void
1534 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1535 unsigned num_components, unsigned bit_size,
1536 const char *name)
1537 {
1538 dest->is_ssa = true;
1539 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1540 }
1541
1542 void
1543 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1544 {
1545 assert(!new_src.is_ssa || def != new_src.ssa);
1546
1547 nir_foreach_use_safe(use_src, def)
1548 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1549
1550 nir_foreach_if_use_safe(use_src, def)
1551 nir_if_rewrite_condition(use_src->parent_if, new_src);
1552 }
1553
1554 static bool
1555 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1556 {
1557 assert(start->block == end->block);
1558
1559 if (between->block != start->block)
1560 return false;
1561
1562 /* Search backwards looking for "between" */
1563 while (start != end) {
1564 if (between == end)
1565 return true;
1566
1567 end = nir_instr_prev(end);
1568 assert(end);
1569 }
1570
1571 return false;
1572 }
1573
1574 /* Replaces all uses of the given SSA def with the given source but only if
1575 * the use comes after the after_me instruction. This can be useful if you
1576 * are emitting code to fix up the result of some instruction: you can freely
1577 * use the result in that code and then call rewrite_uses_after and pass the
1578 * last fixup instruction as after_me and it will replace all of the uses you
1579 * want without touching the fixup code.
1580 *
1581 * This function assumes that after_me is in the same block as
1582 * def->parent_instr and that after_me comes after def->parent_instr.
1583 */
1584 void
1585 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1586 nir_instr *after_me)
1587 {
1588 assert(!new_src.is_ssa || def != new_src.ssa);
1589
1590 nir_foreach_use_safe(use_src, def) {
1591 assert(use_src->parent_instr != def->parent_instr);
1592 /* Since def already dominates all of its uses, the only way a use can
1593 * not be dominated by after_me is if it is between def and after_me in
1594 * the instruction list.
1595 */
1596 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1597 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1598 }
1599
1600 nir_foreach_if_use_safe(use_src, def)
1601 nir_if_rewrite_condition(use_src->parent_if, new_src);
1602 }
1603
1604 uint8_t
1605 nir_ssa_def_components_read(nir_ssa_def *def)
1606 {
1607 uint8_t read_mask = 0;
1608 nir_foreach_use(use, def) {
1609 if (use->parent_instr->type == nir_instr_type_alu) {
1610 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1611 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1612 int src_idx = alu_src - &alu->src[0];
1613 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1614
1615 for (unsigned c = 0; c < 4; c++) {
1616 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1617 continue;
1618
1619 read_mask |= (1 << alu_src->swizzle[c]);
1620 }
1621 } else {
1622 return (1 << def->num_components) - 1;
1623 }
1624 }
1625
1626 return read_mask;
1627 }
1628
1629 nir_block *
1630 nir_block_cf_tree_next(nir_block *block)
1631 {
1632 if (block == NULL) {
1633 /* nir_foreach_block_safe() will call this function on a NULL block
1634 * after the last iteration, but it won't use the result so just return
1635 * NULL here.
1636 */
1637 return NULL;
1638 }
1639
1640 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1641 if (cf_next)
1642 return nir_cf_node_cf_tree_first(cf_next);
1643
1644 nir_cf_node *parent = block->cf_node.parent;
1645
1646 switch (parent->type) {
1647 case nir_cf_node_if: {
1648 /* Are we at the end of the if? Go to the beginning of the else */
1649 nir_if *if_stmt = nir_cf_node_as_if(parent);
1650 if (block == nir_if_last_then_block(if_stmt))
1651 return nir_if_first_else_block(if_stmt);
1652
1653 assert(block == nir_if_last_else_block(if_stmt));
1654 /* fall through */
1655 }
1656
1657 case nir_cf_node_loop:
1658 return nir_cf_node_as_block(nir_cf_node_next(parent));
1659
1660 case nir_cf_node_function:
1661 return NULL;
1662
1663 default:
1664 unreachable("unknown cf node type");
1665 }
1666 }
1667
1668 nir_block *
1669 nir_block_cf_tree_prev(nir_block *block)
1670 {
1671 if (block == NULL) {
1672 /* do this for consistency with nir_block_cf_tree_next() */
1673 return NULL;
1674 }
1675
1676 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1677 if (cf_prev)
1678 return nir_cf_node_cf_tree_last(cf_prev);
1679
1680 nir_cf_node *parent = block->cf_node.parent;
1681
1682 switch (parent->type) {
1683 case nir_cf_node_if: {
1684 /* Are we at the beginning of the else? Go to the end of the if */
1685 nir_if *if_stmt = nir_cf_node_as_if(parent);
1686 if (block == nir_if_first_else_block(if_stmt))
1687 return nir_if_last_then_block(if_stmt);
1688
1689 assert(block == nir_if_first_then_block(if_stmt));
1690 /* fall through */
1691 }
1692
1693 case nir_cf_node_loop:
1694 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1695
1696 case nir_cf_node_function:
1697 return NULL;
1698
1699 default:
1700 unreachable("unknown cf node type");
1701 }
1702 }
1703
1704 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1705 {
1706 switch (node->type) {
1707 case nir_cf_node_function: {
1708 nir_function_impl *impl = nir_cf_node_as_function(node);
1709 return nir_start_block(impl);
1710 }
1711
1712 case nir_cf_node_if: {
1713 nir_if *if_stmt = nir_cf_node_as_if(node);
1714 return nir_if_first_then_block(if_stmt);
1715 }
1716
1717 case nir_cf_node_loop: {
1718 nir_loop *loop = nir_cf_node_as_loop(node);
1719 return nir_loop_first_block(loop);
1720 }
1721
1722 case nir_cf_node_block: {
1723 return nir_cf_node_as_block(node);
1724 }
1725
1726 default:
1727 unreachable("unknown node type");
1728 }
1729 }
1730
1731 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1732 {
1733 switch (node->type) {
1734 case nir_cf_node_function: {
1735 nir_function_impl *impl = nir_cf_node_as_function(node);
1736 return nir_impl_last_block(impl);
1737 }
1738
1739 case nir_cf_node_if: {
1740 nir_if *if_stmt = nir_cf_node_as_if(node);
1741 return nir_if_last_else_block(if_stmt);
1742 }
1743
1744 case nir_cf_node_loop: {
1745 nir_loop *loop = nir_cf_node_as_loop(node);
1746 return nir_loop_last_block(loop);
1747 }
1748
1749 case nir_cf_node_block: {
1750 return nir_cf_node_as_block(node);
1751 }
1752
1753 default:
1754 unreachable("unknown node type");
1755 }
1756 }
1757
1758 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1759 {
1760 if (node->type == nir_cf_node_block)
1761 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1762 else if (node->type == nir_cf_node_function)
1763 return NULL;
1764 else
1765 return nir_cf_node_as_block(nir_cf_node_next(node));
1766 }
1767
1768 nir_if *
1769 nir_block_get_following_if(nir_block *block)
1770 {
1771 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1772 return NULL;
1773
1774 if (nir_cf_node_is_last(&block->cf_node))
1775 return NULL;
1776
1777 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1778
1779 if (next_node->type != nir_cf_node_if)
1780 return NULL;
1781
1782 return nir_cf_node_as_if(next_node);
1783 }
1784
1785 nir_loop *
1786 nir_block_get_following_loop(nir_block *block)
1787 {
1788 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1789 return NULL;
1790
1791 if (nir_cf_node_is_last(&block->cf_node))
1792 return NULL;
1793
1794 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1795
1796 if (next_node->type != nir_cf_node_loop)
1797 return NULL;
1798
1799 return nir_cf_node_as_loop(next_node);
1800 }
1801
1802 void
1803 nir_index_blocks(nir_function_impl *impl)
1804 {
1805 unsigned index = 0;
1806
1807 if (impl->valid_metadata & nir_metadata_block_index)
1808 return;
1809
1810 nir_foreach_block(block, impl) {
1811 block->index = index++;
1812 }
1813
1814 impl->num_blocks = index;
1815 }
1816
1817 static bool
1818 index_ssa_def_cb(nir_ssa_def *def, void *state)
1819 {
1820 unsigned *index = (unsigned *) state;
1821 def->index = (*index)++;
1822
1823 return true;
1824 }
1825
1826 /**
1827 * The indices are applied top-to-bottom which has the very nice property
1828 * that, if A dominates B, then A->index <= B->index.
1829 */
1830 void
1831 nir_index_ssa_defs(nir_function_impl *impl)
1832 {
1833 unsigned index = 0;
1834
1835 nir_foreach_block(block, impl) {
1836 nir_foreach_instr(instr, block)
1837 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1838 }
1839
1840 impl->ssa_alloc = index;
1841 }
1842
1843 /**
1844 * The indices are applied top-to-bottom which has the very nice property
1845 * that, if A dominates B, then A->index <= B->index.
1846 */
1847 unsigned
1848 nir_index_instrs(nir_function_impl *impl)
1849 {
1850 unsigned index = 0;
1851
1852 nir_foreach_block(block, impl) {
1853 nir_foreach_instr(instr, block)
1854 instr->index = index++;
1855 }
1856
1857 return index;
1858 }
1859
1860 nir_intrinsic_op
1861 nir_intrinsic_from_system_value(gl_system_value val)
1862 {
1863 switch (val) {
1864 case SYSTEM_VALUE_VERTEX_ID:
1865 return nir_intrinsic_load_vertex_id;
1866 case SYSTEM_VALUE_INSTANCE_ID:
1867 return nir_intrinsic_load_instance_id;
1868 case SYSTEM_VALUE_DRAW_ID:
1869 return nir_intrinsic_load_draw_id;
1870 case SYSTEM_VALUE_BASE_INSTANCE:
1871 return nir_intrinsic_load_base_instance;
1872 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1873 return nir_intrinsic_load_vertex_id_zero_base;
1874 case SYSTEM_VALUE_BASE_VERTEX:
1875 return nir_intrinsic_load_base_vertex;
1876 case SYSTEM_VALUE_INVOCATION_ID:
1877 return nir_intrinsic_load_invocation_id;
1878 case SYSTEM_VALUE_FRONT_FACE:
1879 return nir_intrinsic_load_front_face;
1880 case SYSTEM_VALUE_SAMPLE_ID:
1881 return nir_intrinsic_load_sample_id;
1882 case SYSTEM_VALUE_SAMPLE_POS:
1883 return nir_intrinsic_load_sample_pos;
1884 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1885 return nir_intrinsic_load_sample_mask_in;
1886 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1887 return nir_intrinsic_load_local_invocation_id;
1888 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1889 return nir_intrinsic_load_local_invocation_index;
1890 case SYSTEM_VALUE_WORK_GROUP_ID:
1891 return nir_intrinsic_load_work_group_id;
1892 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1893 return nir_intrinsic_load_num_work_groups;
1894 case SYSTEM_VALUE_PRIMITIVE_ID:
1895 return nir_intrinsic_load_primitive_id;
1896 case SYSTEM_VALUE_TESS_COORD:
1897 return nir_intrinsic_load_tess_coord;
1898 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1899 return nir_intrinsic_load_tess_level_outer;
1900 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1901 return nir_intrinsic_load_tess_level_inner;
1902 case SYSTEM_VALUE_VERTICES_IN:
1903 return nir_intrinsic_load_patch_vertices_in;
1904 case SYSTEM_VALUE_HELPER_INVOCATION:
1905 return nir_intrinsic_load_helper_invocation;
1906 default:
1907 unreachable("system value does not directly correspond to intrinsic");
1908 }
1909 }
1910
1911 gl_system_value
1912 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1913 {
1914 switch (intrin) {
1915 case nir_intrinsic_load_vertex_id:
1916 return SYSTEM_VALUE_VERTEX_ID;
1917 case nir_intrinsic_load_instance_id:
1918 return SYSTEM_VALUE_INSTANCE_ID;
1919 case nir_intrinsic_load_draw_id:
1920 return SYSTEM_VALUE_DRAW_ID;
1921 case nir_intrinsic_load_base_instance:
1922 return SYSTEM_VALUE_BASE_INSTANCE;
1923 case nir_intrinsic_load_vertex_id_zero_base:
1924 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1925 case nir_intrinsic_load_base_vertex:
1926 return SYSTEM_VALUE_BASE_VERTEX;
1927 case nir_intrinsic_load_invocation_id:
1928 return SYSTEM_VALUE_INVOCATION_ID;
1929 case nir_intrinsic_load_front_face:
1930 return SYSTEM_VALUE_FRONT_FACE;
1931 case nir_intrinsic_load_sample_id:
1932 return SYSTEM_VALUE_SAMPLE_ID;
1933 case nir_intrinsic_load_sample_pos:
1934 return SYSTEM_VALUE_SAMPLE_POS;
1935 case nir_intrinsic_load_sample_mask_in:
1936 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1937 case nir_intrinsic_load_local_invocation_id:
1938 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1939 case nir_intrinsic_load_local_invocation_index:
1940 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
1941 case nir_intrinsic_load_num_work_groups:
1942 return SYSTEM_VALUE_NUM_WORK_GROUPS;
1943 case nir_intrinsic_load_work_group_id:
1944 return SYSTEM_VALUE_WORK_GROUP_ID;
1945 case nir_intrinsic_load_primitive_id:
1946 return SYSTEM_VALUE_PRIMITIVE_ID;
1947 case nir_intrinsic_load_tess_coord:
1948 return SYSTEM_VALUE_TESS_COORD;
1949 case nir_intrinsic_load_tess_level_outer:
1950 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1951 case nir_intrinsic_load_tess_level_inner:
1952 return SYSTEM_VALUE_TESS_LEVEL_INNER;
1953 case nir_intrinsic_load_patch_vertices_in:
1954 return SYSTEM_VALUE_VERTICES_IN;
1955 case nir_intrinsic_load_helper_invocation:
1956 return SYSTEM_VALUE_HELPER_INVOCATION;
1957 default:
1958 unreachable("intrinsic doesn't produce a system value");
1959 }
1960 }
1961
1962 nir_op
1963 nir_type_conversion_op(nir_alu_type src, nir_alu_type dst)
1964 {
1965 nir_alu_type src_base_type = (nir_alu_type) nir_alu_type_get_base_type(src);
1966 nir_alu_type dst_base_type = (nir_alu_type) nir_alu_type_get_base_type(dst);
1967 unsigned src_bitsize = nir_alu_type_get_type_size(src);
1968 unsigned dst_bitsize = nir_alu_type_get_type_size(dst);
1969
1970 if (src_bitsize == dst_bitsize) {
1971 switch (src_base_type) {
1972 case nir_type_int:
1973 case nir_type_uint:
1974 if (dst_base_type == nir_type_uint || dst_base_type == nir_type_int)
1975 return nir_op_imov;
1976 break;
1977 case nir_type_float:
1978 if (dst_base_type == nir_type_float)
1979 return nir_op_fmov;
1980 break;
1981 case nir_type_bool:
1982 if (dst_base_type == nir_type_bool)
1983 return nir_op_imov;
1984 break;
1985 default:
1986 unreachable("Invalid conversion");
1987 }
1988 }
1989
1990 switch (src_base_type) {
1991 case nir_type_int:
1992 switch (dst_base_type) {
1993 case nir_type_int:
1994 assert(src_bitsize != dst_bitsize);
1995 return (dst_bitsize == 32) ? nir_op_i2i32 : nir_op_i2i64;
1996 case nir_type_uint:
1997 assert(src_bitsize != dst_bitsize);
1998 return (dst_bitsize == 32) ? nir_op_i2u32 : nir_op_i2u64;
1999 case nir_type_float:
2000 switch (src_bitsize) {
2001 case 32:
2002 return (dst_bitsize == 32) ? nir_op_i2f : nir_op_i2d;
2003 case 64:
2004 return (dst_bitsize == 32) ? nir_op_i642f : nir_op_i642d;
2005 default:
2006 unreachable("Invalid conversion");
2007 }
2008 case nir_type_bool:
2009 return (src_bitsize == 32) ? nir_op_i2b : nir_op_i642b;
2010 default:
2011 unreachable("Invalid conversion");
2012 }
2013
2014 case nir_type_uint:
2015 switch (dst_base_type) {
2016 case nir_type_int:
2017 assert(src_bitsize != dst_bitsize);
2018 return (dst_bitsize == 32) ? nir_op_u2i32 : nir_op_u2i64;
2019 case nir_type_uint:
2020 assert(src_bitsize != dst_bitsize);
2021 return (dst_bitsize == 32) ? nir_op_u2u32 : nir_op_u2u64;
2022 case nir_type_float:
2023 switch (src_bitsize) {
2024 case 32:
2025 return (dst_bitsize == 32) ? nir_op_u2f : nir_op_u2d;
2026 case 64:
2027 return (dst_bitsize == 32) ? nir_op_u642f : nir_op_u642d;
2028 default:
2029 unreachable("Invalid conversion");
2030 }
2031 case nir_type_bool:
2032 return (src_bitsize == 32) ? nir_op_i2b : nir_op_i642b;
2033 default:
2034 unreachable("Invalid conversion");
2035 }
2036
2037 case nir_type_float:
2038 switch (dst_base_type) {
2039 case nir_type_int:
2040 switch (src_bitsize) {
2041 case 32:
2042 return (dst_bitsize == 32) ? nir_op_f2i : nir_op_f2i64;
2043 case 64:
2044 return (dst_bitsize == 32) ? nir_op_d2i : nir_op_f2i64;
2045 default:
2046 unreachable("Invalid conversion");
2047 }
2048 case nir_type_uint:
2049 switch (src_bitsize) {
2050 case 32:
2051 return (dst_bitsize == 32) ? nir_op_f2u : nir_op_f2u64;
2052 case 64:
2053 return (dst_bitsize == 32) ? nir_op_d2u : nir_op_f2u64;
2054 default:
2055 unreachable("Invalid conversion");
2056 }
2057 case nir_type_float:
2058 assert(src_bitsize != dst_bitsize);
2059 return (dst_bitsize == 32) ? nir_op_d2f : nir_op_f2d;
2060 case nir_type_bool:
2061 return (src_bitsize == 32) ? nir_op_f2b : nir_op_d2b;
2062 default:
2063 unreachable("Invalid conversion");
2064 }
2065
2066 case nir_type_bool:
2067 switch (dst_base_type) {
2068 case nir_type_int:
2069 case nir_type_uint:
2070 return (dst_bitsize == 32) ? nir_op_b2i : nir_op_b2i64;
2071 case nir_type_float:
2072 /* GLSL just emits f2d(b2f(x)) for b2d */
2073 assert(dst_bitsize == 32);
2074 return nir_op_b2f;
2075 default:
2076 unreachable("Invalid conversion");
2077 }
2078
2079 default:
2080 unreachable("Invalid conversion");
2081 }
2082 }