2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
29 #include "nir_control_flow_private.h"
30 #include "util/half_float.h"
34 #include "util/u_math.h"
36 #include "main/menums.h" /* BITFIELD64_MASK */
39 nir_shader_create(void *mem_ctx
,
40 gl_shader_stage stage
,
41 const nir_shader_compiler_options
*options
,
44 nir_shader
*shader
= rzalloc(mem_ctx
, nir_shader
);
46 exec_list_make_empty(&shader
->uniforms
);
47 exec_list_make_empty(&shader
->inputs
);
48 exec_list_make_empty(&shader
->outputs
);
49 exec_list_make_empty(&shader
->shared
);
51 shader
->options
= options
;
54 assert(si
->stage
== stage
);
57 shader
->info
.stage
= stage
;
60 exec_list_make_empty(&shader
->functions
);
61 exec_list_make_empty(&shader
->registers
);
62 exec_list_make_empty(&shader
->globals
);
63 exec_list_make_empty(&shader
->system_values
);
64 shader
->reg_alloc
= 0;
66 shader
->num_inputs
= 0;
67 shader
->num_outputs
= 0;
68 shader
->num_uniforms
= 0;
69 shader
->num_shared
= 0;
75 reg_create(void *mem_ctx
, struct exec_list
*list
)
77 nir_register
*reg
= ralloc(mem_ctx
, nir_register
);
79 list_inithead(®
->uses
);
80 list_inithead(®
->defs
);
81 list_inithead(®
->if_uses
);
83 reg
->num_components
= 0;
85 reg
->num_array_elems
= 0;
86 reg
->is_packed
= false;
89 exec_list_push_tail(list
, ®
->node
);
95 nir_global_reg_create(nir_shader
*shader
)
97 nir_register
*reg
= reg_create(shader
, &shader
->registers
);
98 reg
->index
= shader
->reg_alloc
++;
99 reg
->is_global
= true;
105 nir_local_reg_create(nir_function_impl
*impl
)
107 nir_register
*reg
= reg_create(ralloc_parent(impl
), &impl
->registers
);
108 reg
->index
= impl
->reg_alloc
++;
109 reg
->is_global
= false;
115 nir_reg_remove(nir_register
*reg
)
117 exec_node_remove(®
->node
);
121 nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
)
123 switch (var
->data
.mode
) {
125 assert(!"invalid mode");
129 assert(!"nir_shader_add_variable cannot be used for local variables");
133 exec_list_push_tail(&shader
->globals
, &var
->node
);
136 case nir_var_shader_in
:
137 exec_list_push_tail(&shader
->inputs
, &var
->node
);
140 case nir_var_shader_out
:
141 exec_list_push_tail(&shader
->outputs
, &var
->node
);
144 case nir_var_uniform
:
145 case nir_var_shader_storage
:
146 exec_list_push_tail(&shader
->uniforms
, &var
->node
);
150 assert(shader
->info
.stage
== MESA_SHADER_COMPUTE
);
151 exec_list_push_tail(&shader
->shared
, &var
->node
);
154 case nir_var_system_value
:
155 exec_list_push_tail(&shader
->system_values
, &var
->node
);
161 nir_variable_create(nir_shader
*shader
, nir_variable_mode mode
,
162 const struct glsl_type
*type
, const char *name
)
164 nir_variable
*var
= rzalloc(shader
, nir_variable
);
165 var
->name
= ralloc_strdup(var
, name
);
167 var
->data
.mode
= mode
;
168 var
->data
.how_declared
= nir_var_declared_normally
;
170 if ((mode
== nir_var_shader_in
&&
171 shader
->info
.stage
!= MESA_SHADER_VERTEX
) ||
172 (mode
== nir_var_shader_out
&&
173 shader
->info
.stage
!= MESA_SHADER_FRAGMENT
))
174 var
->data
.interpolation
= INTERP_MODE_SMOOTH
;
176 if (mode
== nir_var_shader_in
|| mode
== nir_var_uniform
)
177 var
->data
.read_only
= true;
179 nir_shader_add_variable(shader
, var
);
185 nir_local_variable_create(nir_function_impl
*impl
,
186 const struct glsl_type
*type
, const char *name
)
188 nir_variable
*var
= rzalloc(impl
->function
->shader
, nir_variable
);
189 var
->name
= ralloc_strdup(var
, name
);
191 var
->data
.mode
= nir_var_local
;
193 nir_function_impl_add_variable(impl
, var
);
199 nir_function_create(nir_shader
*shader
, const char *name
)
201 nir_function
*func
= ralloc(shader
, nir_function
);
203 exec_list_push_tail(&shader
->functions
, &func
->node
);
205 func
->name
= ralloc_strdup(func
, name
);
206 func
->shader
= shader
;
207 func
->num_params
= 0;
214 /* NOTE: if the instruction you are copying a src to is already added
215 * to the IR, use nir_instr_rewrite_src() instead.
217 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *mem_ctx
)
219 dest
->is_ssa
= src
->is_ssa
;
221 dest
->ssa
= src
->ssa
;
223 dest
->reg
.base_offset
= src
->reg
.base_offset
;
224 dest
->reg
.reg
= src
->reg
.reg
;
225 if (src
->reg
.indirect
) {
226 dest
->reg
.indirect
= ralloc(mem_ctx
, nir_src
);
227 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, mem_ctx
);
229 dest
->reg
.indirect
= NULL
;
234 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
)
236 /* Copying an SSA definition makes no sense whatsoever. */
237 assert(!src
->is_ssa
);
239 dest
->is_ssa
= false;
241 dest
->reg
.base_offset
= src
->reg
.base_offset
;
242 dest
->reg
.reg
= src
->reg
.reg
;
243 if (src
->reg
.indirect
) {
244 dest
->reg
.indirect
= ralloc(instr
, nir_src
);
245 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, instr
);
247 dest
->reg
.indirect
= NULL
;
252 nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
253 nir_alu_instr
*instr
)
255 nir_src_copy(&dest
->src
, &src
->src
, &instr
->instr
);
256 dest
->abs
= src
->abs
;
257 dest
->negate
= src
->negate
;
258 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++)
259 dest
->swizzle
[i
] = src
->swizzle
[i
];
263 nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
264 nir_alu_instr
*instr
)
266 nir_dest_copy(&dest
->dest
, &src
->dest
, &instr
->instr
);
267 dest
->write_mask
= src
->write_mask
;
268 dest
->saturate
= src
->saturate
;
273 cf_init(nir_cf_node
*node
, nir_cf_node_type type
)
275 exec_node_init(&node
->node
);
281 nir_function_impl_create_bare(nir_shader
*shader
)
283 nir_function_impl
*impl
= ralloc(shader
, nir_function_impl
);
285 impl
->function
= NULL
;
287 cf_init(&impl
->cf_node
, nir_cf_node_function
);
289 exec_list_make_empty(&impl
->body
);
290 exec_list_make_empty(&impl
->registers
);
291 exec_list_make_empty(&impl
->locals
);
294 impl
->valid_metadata
= nir_metadata_none
;
296 /* create start & end blocks */
297 nir_block
*start_block
= nir_block_create(shader
);
298 nir_block
*end_block
= nir_block_create(shader
);
299 start_block
->cf_node
.parent
= &impl
->cf_node
;
300 end_block
->cf_node
.parent
= &impl
->cf_node
;
301 impl
->end_block
= end_block
;
303 exec_list_push_tail(&impl
->body
, &start_block
->cf_node
.node
);
305 start_block
->successors
[0] = end_block
;
306 _mesa_set_add(end_block
->predecessors
, start_block
);
311 nir_function_impl_create(nir_function
*function
)
313 assert(function
->impl
== NULL
);
315 nir_function_impl
*impl
= nir_function_impl_create_bare(function
->shader
);
317 function
->impl
= impl
;
318 impl
->function
= function
;
324 nir_block_create(nir_shader
*shader
)
326 nir_block
*block
= rzalloc(shader
, nir_block
);
328 cf_init(&block
->cf_node
, nir_cf_node_block
);
330 block
->successors
[0] = block
->successors
[1] = NULL
;
331 block
->predecessors
= _mesa_set_create(block
, _mesa_hash_pointer
,
332 _mesa_key_pointer_equal
);
333 block
->imm_dom
= NULL
;
334 /* XXX maybe it would be worth it to defer allocation? This
335 * way it doesn't get allocated for shader refs that never run
336 * nir_calc_dominance? For example, state-tracker creates an
337 * initial IR, clones that, runs appropriate lowering pass, passes
338 * to driver which does common lowering/opt, and then stores ref
339 * which is later used to do state specific lowering and futher
340 * opt. Do any of the references not need dominance metadata?
342 block
->dom_frontier
= _mesa_set_create(block
, _mesa_hash_pointer
,
343 _mesa_key_pointer_equal
);
345 exec_list_make_empty(&block
->instr_list
);
351 src_init(nir_src
*src
)
355 src
->reg
.indirect
= NULL
;
356 src
->reg
.base_offset
= 0;
360 nir_if_create(nir_shader
*shader
)
362 nir_if
*if_stmt
= ralloc(shader
, nir_if
);
364 cf_init(&if_stmt
->cf_node
, nir_cf_node_if
);
365 src_init(&if_stmt
->condition
);
367 nir_block
*then
= nir_block_create(shader
);
368 exec_list_make_empty(&if_stmt
->then_list
);
369 exec_list_push_tail(&if_stmt
->then_list
, &then
->cf_node
.node
);
370 then
->cf_node
.parent
= &if_stmt
->cf_node
;
372 nir_block
*else_stmt
= nir_block_create(shader
);
373 exec_list_make_empty(&if_stmt
->else_list
);
374 exec_list_push_tail(&if_stmt
->else_list
, &else_stmt
->cf_node
.node
);
375 else_stmt
->cf_node
.parent
= &if_stmt
->cf_node
;
381 nir_loop_create(nir_shader
*shader
)
383 nir_loop
*loop
= rzalloc(shader
, nir_loop
);
385 cf_init(&loop
->cf_node
, nir_cf_node_loop
);
387 nir_block
*body
= nir_block_create(shader
);
388 exec_list_make_empty(&loop
->body
);
389 exec_list_push_tail(&loop
->body
, &body
->cf_node
.node
);
390 body
->cf_node
.parent
= &loop
->cf_node
;
392 body
->successors
[0] = body
;
393 _mesa_set_add(body
->predecessors
, body
);
399 instr_init(nir_instr
*instr
, nir_instr_type type
)
403 exec_node_init(&instr
->node
);
407 dest_init(nir_dest
*dest
)
409 dest
->is_ssa
= false;
410 dest
->reg
.reg
= NULL
;
411 dest
->reg
.indirect
= NULL
;
412 dest
->reg
.base_offset
= 0;
416 alu_dest_init(nir_alu_dest
*dest
)
418 dest_init(&dest
->dest
);
419 dest
->saturate
= false;
420 dest
->write_mask
= 0xf;
424 alu_src_init(nir_alu_src
*src
)
427 src
->abs
= src
->negate
= false;
428 for (int i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; ++i
)
433 nir_alu_instr_create(nir_shader
*shader
, nir_op op
)
435 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
436 /* TODO: don't use rzalloc */
437 nir_alu_instr
*instr
=
439 sizeof(nir_alu_instr
) + num_srcs
* sizeof(nir_alu_src
));
441 instr_init(&instr
->instr
, nir_instr_type_alu
);
443 alu_dest_init(&instr
->dest
);
444 for (unsigned i
= 0; i
< num_srcs
; i
++)
445 alu_src_init(&instr
->src
[i
]);
451 nir_deref_instr_create(nir_shader
*shader
, nir_deref_type deref_type
)
453 nir_deref_instr
*instr
=
454 rzalloc_size(shader
, sizeof(nir_deref_instr
));
456 instr_init(&instr
->instr
, nir_instr_type_deref
);
458 instr
->deref_type
= deref_type
;
459 if (deref_type
!= nir_deref_type_var
)
460 src_init(&instr
->parent
);
462 if (deref_type
== nir_deref_type_array
)
463 src_init(&instr
->arr
.index
);
465 dest_init(&instr
->dest
);
471 nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
)
473 nir_jump_instr
*instr
= ralloc(shader
, nir_jump_instr
);
474 instr_init(&instr
->instr
, nir_instr_type_jump
);
479 nir_load_const_instr
*
480 nir_load_const_instr_create(nir_shader
*shader
, unsigned num_components
,
483 nir_load_const_instr
*instr
= rzalloc(shader
, nir_load_const_instr
);
484 instr_init(&instr
->instr
, nir_instr_type_load_const
);
486 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
491 nir_intrinsic_instr
*
492 nir_intrinsic_instr_create(nir_shader
*shader
, nir_intrinsic_op op
)
494 unsigned num_srcs
= nir_intrinsic_infos
[op
].num_srcs
;
495 /* TODO: don't use rzalloc */
496 nir_intrinsic_instr
*instr
=
498 sizeof(nir_intrinsic_instr
) + num_srcs
* sizeof(nir_src
));
500 instr_init(&instr
->instr
, nir_instr_type_intrinsic
);
501 instr
->intrinsic
= op
;
503 if (nir_intrinsic_infos
[op
].has_dest
)
504 dest_init(&instr
->dest
);
506 for (unsigned i
= 0; i
< num_srcs
; i
++)
507 src_init(&instr
->src
[i
]);
513 nir_call_instr_create(nir_shader
*shader
, nir_function
*callee
)
515 const unsigned num_params
= callee
->num_params
;
516 nir_call_instr
*instr
=
517 rzalloc_size(shader
, sizeof(*instr
) +
518 num_params
* sizeof(instr
->params
[0]));
520 instr_init(&instr
->instr
, nir_instr_type_call
);
521 instr
->callee
= callee
;
522 instr
->num_params
= num_params
;
523 for (unsigned i
= 0; i
< num_params
; i
++)
524 src_init(&instr
->params
[i
]);
530 nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
)
532 nir_tex_instr
*instr
= rzalloc(shader
, nir_tex_instr
);
533 instr_init(&instr
->instr
, nir_instr_type_tex
);
535 dest_init(&instr
->dest
);
537 instr
->num_srcs
= num_srcs
;
538 instr
->src
= ralloc_array(instr
, nir_tex_src
, num_srcs
);
539 for (unsigned i
= 0; i
< num_srcs
; i
++)
540 src_init(&instr
->src
[i
].src
);
542 instr
->texture_index
= 0;
543 instr
->texture_array_size
= 0;
544 instr
->sampler_index
= 0;
550 nir_tex_instr_add_src(nir_tex_instr
*tex
,
551 nir_tex_src_type src_type
,
554 nir_tex_src
*new_srcs
= rzalloc_array(tex
, nir_tex_src
,
557 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
558 new_srcs
[i
].src_type
= tex
->src
[i
].src_type
;
559 nir_instr_move_src(&tex
->instr
, &new_srcs
[i
].src
,
563 ralloc_free(tex
->src
);
566 tex
->src
[tex
->num_srcs
].src_type
= src_type
;
567 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[tex
->num_srcs
].src
, src
);
572 nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
)
574 assert(src_idx
< tex
->num_srcs
);
576 /* First rewrite the source to NIR_SRC_INIT */
577 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[src_idx
].src
, NIR_SRC_INIT
);
579 /* Now, move all of the other sources down */
580 for (unsigned i
= src_idx
+ 1; i
< tex
->num_srcs
; i
++) {
581 tex
->src
[i
-1].src_type
= tex
->src
[i
].src_type
;
582 nir_instr_move_src(&tex
->instr
, &tex
->src
[i
-1].src
, &tex
->src
[i
].src
);
588 nir_phi_instr_create(nir_shader
*shader
)
590 nir_phi_instr
*instr
= ralloc(shader
, nir_phi_instr
);
591 instr_init(&instr
->instr
, nir_instr_type_phi
);
593 dest_init(&instr
->dest
);
594 exec_list_make_empty(&instr
->srcs
);
598 nir_parallel_copy_instr
*
599 nir_parallel_copy_instr_create(nir_shader
*shader
)
601 nir_parallel_copy_instr
*instr
= ralloc(shader
, nir_parallel_copy_instr
);
602 instr_init(&instr
->instr
, nir_instr_type_parallel_copy
);
604 exec_list_make_empty(&instr
->entries
);
609 nir_ssa_undef_instr
*
610 nir_ssa_undef_instr_create(nir_shader
*shader
,
611 unsigned num_components
,
614 nir_ssa_undef_instr
*instr
= ralloc(shader
, nir_ssa_undef_instr
);
615 instr_init(&instr
->instr
, nir_instr_type_ssa_undef
);
617 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
622 static nir_const_value
623 const_value_float(double d
, unsigned bit_size
)
627 case 16: v
.u16
[0] = _mesa_float_to_half(d
); break;
628 case 32: v
.f32
[0] = d
; break;
629 case 64: v
.f64
[0] = d
; break;
631 unreachable("Invalid bit size");
636 static nir_const_value
637 const_value_int(int64_t i
, unsigned bit_size
)
641 case 8: v
.i8
[0] = i
; break;
642 case 16: v
.i16
[0] = i
; break;
643 case 32: v
.i32
[0] = i
; break;
644 case 64: v
.i64
[0] = i
; break;
646 unreachable("Invalid bit size");
652 nir_alu_binop_identity(nir_op binop
, unsigned bit_size
)
654 const int64_t max_int
= (1ull << (bit_size
- 1)) - 1;
655 const int64_t min_int
= -max_int
- 1;
658 return const_value_int(0, bit_size
);
660 return const_value_float(0, bit_size
);
662 return const_value_int(1, bit_size
);
664 return const_value_float(1, bit_size
);
666 return const_value_int(max_int
, bit_size
);
668 return const_value_int(~0ull, bit_size
);
670 return const_value_float(INFINITY
, bit_size
);
672 return const_value_int(min_int
, bit_size
);
674 return const_value_int(0, bit_size
);
676 return const_value_float(-INFINITY
, bit_size
);
678 return const_value_int(~0ull, bit_size
);
680 return const_value_int(0, bit_size
);
682 return const_value_int(0, bit_size
);
684 unreachable("Invalid reduction operation");
689 nir_cf_node_get_function(nir_cf_node
*node
)
691 while (node
->type
!= nir_cf_node_function
) {
695 return nir_cf_node_as_function(node
);
698 /* Reduces a cursor by trying to convert everything to after and trying to
699 * go up to block granularity when possible.
702 reduce_cursor(nir_cursor cursor
)
704 switch (cursor
.option
) {
705 case nir_cursor_before_block
:
706 assert(nir_cf_node_prev(&cursor
.block
->cf_node
) == NULL
||
707 nir_cf_node_prev(&cursor
.block
->cf_node
)->type
!= nir_cf_node_block
);
708 if (exec_list_is_empty(&cursor
.block
->instr_list
)) {
709 /* Empty block. After is as good as before. */
710 cursor
.option
= nir_cursor_after_block
;
714 case nir_cursor_after_block
:
717 case nir_cursor_before_instr
: {
718 nir_instr
*prev_instr
= nir_instr_prev(cursor
.instr
);
720 /* Before this instruction is after the previous */
721 cursor
.instr
= prev_instr
;
722 cursor
.option
= nir_cursor_after_instr
;
724 /* No previous instruction. Switch to before block */
725 cursor
.block
= cursor
.instr
->block
;
726 cursor
.option
= nir_cursor_before_block
;
728 return reduce_cursor(cursor
);
731 case nir_cursor_after_instr
:
732 if (nir_instr_next(cursor
.instr
) == NULL
) {
733 /* This is the last instruction, switch to after block */
734 cursor
.option
= nir_cursor_after_block
;
735 cursor
.block
= cursor
.instr
->block
;
740 unreachable("Inavlid cursor option");
745 nir_cursors_equal(nir_cursor a
, nir_cursor b
)
747 /* Reduced cursors should be unique */
748 a
= reduce_cursor(a
);
749 b
= reduce_cursor(b
);
751 return a
.block
== b
.block
&& a
.option
== b
.option
;
755 add_use_cb(nir_src
*src
, void *state
)
757 nir_instr
*instr
= state
;
759 src
->parent_instr
= instr
;
760 list_addtail(&src
->use_link
,
761 src
->is_ssa
? &src
->ssa
->uses
: &src
->reg
.reg
->uses
);
767 add_ssa_def_cb(nir_ssa_def
*def
, void *state
)
769 nir_instr
*instr
= state
;
771 if (instr
->block
&& def
->index
== UINT_MAX
) {
772 nir_function_impl
*impl
=
773 nir_cf_node_get_function(&instr
->block
->cf_node
);
775 def
->index
= impl
->ssa_alloc
++;
782 add_reg_def_cb(nir_dest
*dest
, void *state
)
784 nir_instr
*instr
= state
;
787 dest
->reg
.parent_instr
= instr
;
788 list_addtail(&dest
->reg
.def_link
, &dest
->reg
.reg
->defs
);
795 add_defs_uses(nir_instr
*instr
)
797 nir_foreach_src(instr
, add_use_cb
, instr
);
798 nir_foreach_dest(instr
, add_reg_def_cb
, instr
);
799 nir_foreach_ssa_def(instr
, add_ssa_def_cb
, instr
);
803 nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
)
805 switch (cursor
.option
) {
806 case nir_cursor_before_block
:
807 /* Only allow inserting jumps into empty blocks. */
808 if (instr
->type
== nir_instr_type_jump
)
809 assert(exec_list_is_empty(&cursor
.block
->instr_list
));
811 instr
->block
= cursor
.block
;
812 add_defs_uses(instr
);
813 exec_list_push_head(&cursor
.block
->instr_list
, &instr
->node
);
815 case nir_cursor_after_block
: {
816 /* Inserting instructions after a jump is illegal. */
817 nir_instr
*last
= nir_block_last_instr(cursor
.block
);
818 assert(last
== NULL
|| last
->type
!= nir_instr_type_jump
);
821 instr
->block
= cursor
.block
;
822 add_defs_uses(instr
);
823 exec_list_push_tail(&cursor
.block
->instr_list
, &instr
->node
);
826 case nir_cursor_before_instr
:
827 assert(instr
->type
!= nir_instr_type_jump
);
828 instr
->block
= cursor
.instr
->block
;
829 add_defs_uses(instr
);
830 exec_node_insert_node_before(&cursor
.instr
->node
, &instr
->node
);
832 case nir_cursor_after_instr
:
833 /* Inserting instructions after a jump is illegal. */
834 assert(cursor
.instr
->type
!= nir_instr_type_jump
);
836 /* Only allow inserting jumps at the end of the block. */
837 if (instr
->type
== nir_instr_type_jump
)
838 assert(cursor
.instr
== nir_block_last_instr(cursor
.instr
->block
));
840 instr
->block
= cursor
.instr
->block
;
841 add_defs_uses(instr
);
842 exec_node_insert_after(&cursor
.instr
->node
, &instr
->node
);
846 if (instr
->type
== nir_instr_type_jump
)
847 nir_handle_add_jump(instr
->block
);
851 src_is_valid(const nir_src
*src
)
853 return src
->is_ssa
? (src
->ssa
!= NULL
) : (src
->reg
.reg
!= NULL
);
857 remove_use_cb(nir_src
*src
, void *state
)
861 if (src_is_valid(src
))
862 list_del(&src
->use_link
);
868 remove_def_cb(nir_dest
*dest
, void *state
)
873 list_del(&dest
->reg
.def_link
);
879 remove_defs_uses(nir_instr
*instr
)
881 nir_foreach_dest(instr
, remove_def_cb
, instr
);
882 nir_foreach_src(instr
, remove_use_cb
, instr
);
885 void nir_instr_remove_v(nir_instr
*instr
)
887 remove_defs_uses(instr
);
888 exec_node_remove(&instr
->node
);
890 if (instr
->type
== nir_instr_type_jump
) {
891 nir_jump_instr
*jump_instr
= nir_instr_as_jump(instr
);
892 nir_handle_remove_jump(instr
->block
, jump_instr
->type
);
899 nir_index_local_regs(nir_function_impl
*impl
)
902 foreach_list_typed(nir_register
, reg
, node
, &impl
->registers
) {
903 reg
->index
= index
++;
905 impl
->reg_alloc
= index
;
909 nir_index_global_regs(nir_shader
*shader
)
912 foreach_list_typed(nir_register
, reg
, node
, &shader
->registers
) {
913 reg
->index
= index
++;
915 shader
->reg_alloc
= index
;
919 visit_alu_dest(nir_alu_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
921 return cb(&instr
->dest
.dest
, state
);
925 visit_deref_dest(nir_deref_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
927 return cb(&instr
->dest
, state
);
931 visit_intrinsic_dest(nir_intrinsic_instr
*instr
, nir_foreach_dest_cb cb
,
934 if (nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
935 return cb(&instr
->dest
, state
);
941 visit_texture_dest(nir_tex_instr
*instr
, nir_foreach_dest_cb cb
,
944 return cb(&instr
->dest
, state
);
948 visit_phi_dest(nir_phi_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
950 return cb(&instr
->dest
, state
);
954 visit_parallel_copy_dest(nir_parallel_copy_instr
*instr
,
955 nir_foreach_dest_cb cb
, void *state
)
957 nir_foreach_parallel_copy_entry(entry
, instr
) {
958 if (!cb(&entry
->dest
, state
))
966 nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
968 switch (instr
->type
) {
969 case nir_instr_type_alu
:
970 return visit_alu_dest(nir_instr_as_alu(instr
), cb
, state
);
971 case nir_instr_type_deref
:
972 return visit_deref_dest(nir_instr_as_deref(instr
), cb
, state
);
973 case nir_instr_type_intrinsic
:
974 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr
), cb
, state
);
975 case nir_instr_type_tex
:
976 return visit_texture_dest(nir_instr_as_tex(instr
), cb
, state
);
977 case nir_instr_type_phi
:
978 return visit_phi_dest(nir_instr_as_phi(instr
), cb
, state
);
979 case nir_instr_type_parallel_copy
:
980 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr
),
983 case nir_instr_type_load_const
:
984 case nir_instr_type_ssa_undef
:
985 case nir_instr_type_call
:
986 case nir_instr_type_jump
:
990 unreachable("Invalid instruction type");
997 struct foreach_ssa_def_state
{
998 nir_foreach_ssa_def_cb cb
;
1003 nir_ssa_def_visitor(nir_dest
*dest
, void *void_state
)
1005 struct foreach_ssa_def_state
*state
= void_state
;
1008 return state
->cb(&dest
->ssa
, state
->client_state
);
1014 nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
, void *state
)
1016 switch (instr
->type
) {
1017 case nir_instr_type_alu
:
1018 case nir_instr_type_deref
:
1019 case nir_instr_type_tex
:
1020 case nir_instr_type_intrinsic
:
1021 case nir_instr_type_phi
:
1022 case nir_instr_type_parallel_copy
: {
1023 struct foreach_ssa_def_state foreach_state
= {cb
, state
};
1024 return nir_foreach_dest(instr
, nir_ssa_def_visitor
, &foreach_state
);
1027 case nir_instr_type_load_const
:
1028 return cb(&nir_instr_as_load_const(instr
)->def
, state
);
1029 case nir_instr_type_ssa_undef
:
1030 return cb(&nir_instr_as_ssa_undef(instr
)->def
, state
);
1031 case nir_instr_type_call
:
1032 case nir_instr_type_jump
:
1035 unreachable("Invalid instruction type");
1040 visit_src(nir_src
*src
, nir_foreach_src_cb cb
, void *state
)
1042 if (!cb(src
, state
))
1044 if (!src
->is_ssa
&& src
->reg
.indirect
)
1045 return cb(src
->reg
.indirect
, state
);
1050 visit_alu_src(nir_alu_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1052 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1053 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1060 visit_deref_instr_src(nir_deref_instr
*instr
,
1061 nir_foreach_src_cb cb
, void *state
)
1063 if (instr
->deref_type
!= nir_deref_type_var
) {
1064 if (!visit_src(&instr
->parent
, cb
, state
))
1068 if (instr
->deref_type
== nir_deref_type_array
) {
1069 if (!visit_src(&instr
->arr
.index
, cb
, state
))
1077 visit_tex_src(nir_tex_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1079 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
1080 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1088 visit_intrinsic_src(nir_intrinsic_instr
*instr
, nir_foreach_src_cb cb
,
1091 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
1092 for (unsigned i
= 0; i
< num_srcs
; i
++) {
1093 if (!visit_src(&instr
->src
[i
], cb
, state
))
1101 visit_call_src(nir_call_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1103 for (unsigned i
= 0; i
< instr
->num_params
; i
++) {
1104 if (!visit_src(&instr
->params
[i
], cb
, state
))
1112 visit_phi_src(nir_phi_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1114 nir_foreach_phi_src(src
, instr
) {
1115 if (!visit_src(&src
->src
, cb
, state
))
1123 visit_parallel_copy_src(nir_parallel_copy_instr
*instr
,
1124 nir_foreach_src_cb cb
, void *state
)
1126 nir_foreach_parallel_copy_entry(entry
, instr
) {
1127 if (!visit_src(&entry
->src
, cb
, state
))
1136 nir_foreach_src_cb cb
;
1137 } visit_dest_indirect_state
;
1140 visit_dest_indirect(nir_dest
*dest
, void *_state
)
1142 visit_dest_indirect_state
*state
= (visit_dest_indirect_state
*) _state
;
1144 if (!dest
->is_ssa
&& dest
->reg
.indirect
)
1145 return state
->cb(dest
->reg
.indirect
, state
->state
);
1151 nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1153 switch (instr
->type
) {
1154 case nir_instr_type_alu
:
1155 if (!visit_alu_src(nir_instr_as_alu(instr
), cb
, state
))
1158 case nir_instr_type_deref
:
1159 if (!visit_deref_instr_src(nir_instr_as_deref(instr
), cb
, state
))
1162 case nir_instr_type_intrinsic
:
1163 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr
), cb
, state
))
1166 case nir_instr_type_tex
:
1167 if (!visit_tex_src(nir_instr_as_tex(instr
), cb
, state
))
1170 case nir_instr_type_call
:
1171 if (!visit_call_src(nir_instr_as_call(instr
), cb
, state
))
1174 case nir_instr_type_load_const
:
1175 /* Constant load instructions have no regular sources */
1177 case nir_instr_type_phi
:
1178 if (!visit_phi_src(nir_instr_as_phi(instr
), cb
, state
))
1181 case nir_instr_type_parallel_copy
:
1182 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr
),
1186 case nir_instr_type_jump
:
1187 case nir_instr_type_ssa_undef
:
1191 unreachable("Invalid instruction type");
1195 visit_dest_indirect_state dest_state
;
1196 dest_state
.state
= state
;
1198 return nir_foreach_dest(instr
, visit_dest_indirect
, &dest_state
);
1202 nir_src_as_const_value(nir_src src
)
1207 if (src
.ssa
->parent_instr
->type
!= nir_instr_type_load_const
)
1210 nir_load_const_instr
*load
= nir_instr_as_load_const(src
.ssa
->parent_instr
);
1212 return &load
->value
;
1216 * Returns true if the source is known to be dynamically uniform. Otherwise it
1217 * returns false which means it may or may not be dynamically uniform but it
1218 * can't be determined.
1221 nir_src_is_dynamically_uniform(nir_src src
)
1226 /* Constants are trivially dynamically uniform */
1227 if (src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
1230 /* As are uniform variables */
1231 if (src
.ssa
->parent_instr
->type
== nir_instr_type_intrinsic
) {
1232 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(src
.ssa
->parent_instr
);
1234 if (intr
->intrinsic
== nir_intrinsic_load_uniform
)
1238 /* XXX: this could have many more tests, such as when a sampler function is
1239 * called with dynamically uniform arguments.
1245 src_remove_all_uses(nir_src
*src
)
1247 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1248 if (!src_is_valid(src
))
1251 list_del(&src
->use_link
);
1256 src_add_all_uses(nir_src
*src
, nir_instr
*parent_instr
, nir_if
*parent_if
)
1258 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1259 if (!src_is_valid(src
))
1263 src
->parent_instr
= parent_instr
;
1265 list_addtail(&src
->use_link
, &src
->ssa
->uses
);
1267 list_addtail(&src
->use_link
, &src
->reg
.reg
->uses
);
1270 src
->parent_if
= parent_if
;
1272 list_addtail(&src
->use_link
, &src
->ssa
->if_uses
);
1274 list_addtail(&src
->use_link
, &src
->reg
.reg
->if_uses
);
1280 nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
)
1282 assert(!src_is_valid(src
) || src
->parent_instr
== instr
);
1284 src_remove_all_uses(src
);
1286 src_add_all_uses(src
, instr
, NULL
);
1290 nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
)
1292 assert(!src_is_valid(dest
) || dest
->parent_instr
== dest_instr
);
1294 src_remove_all_uses(dest
);
1295 src_remove_all_uses(src
);
1297 *src
= NIR_SRC_INIT
;
1298 src_add_all_uses(dest
, dest_instr
, NULL
);
1302 nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
)
1304 nir_src
*src
= &if_stmt
->condition
;
1305 assert(!src_is_valid(src
) || src
->parent_if
== if_stmt
);
1307 src_remove_all_uses(src
);
1309 src_add_all_uses(src
, NULL
, if_stmt
);
1313 nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
, nir_dest new_dest
)
1316 /* We can only overwrite an SSA destination if it has no uses. */
1317 assert(list_empty(&dest
->ssa
.uses
) && list_empty(&dest
->ssa
.if_uses
));
1319 list_del(&dest
->reg
.def_link
);
1320 if (dest
->reg
.indirect
)
1321 src_remove_all_uses(dest
->reg
.indirect
);
1324 /* We can't re-write with an SSA def */
1325 assert(!new_dest
.is_ssa
);
1327 nir_dest_copy(dest
, &new_dest
, instr
);
1329 dest
->reg
.parent_instr
= instr
;
1330 list_addtail(&dest
->reg
.def_link
, &new_dest
.reg
.reg
->defs
);
1332 if (dest
->reg
.indirect
)
1333 src_add_all_uses(dest
->reg
.indirect
, instr
, NULL
);
1336 /* note: does *not* take ownership of 'name' */
1338 nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
1339 unsigned num_components
,
1340 unsigned bit_size
, const char *name
)
1342 def
->name
= ralloc_strdup(instr
, name
);
1343 def
->parent_instr
= instr
;
1344 list_inithead(&def
->uses
);
1345 list_inithead(&def
->if_uses
);
1346 def
->num_components
= num_components
;
1347 def
->bit_size
= bit_size
;
1350 nir_function_impl
*impl
=
1351 nir_cf_node_get_function(&instr
->block
->cf_node
);
1353 def
->index
= impl
->ssa_alloc
++;
1355 def
->index
= UINT_MAX
;
1359 /* note: does *not* take ownership of 'name' */
1361 nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
1362 unsigned num_components
, unsigned bit_size
,
1365 dest
->is_ssa
= true;
1366 nir_ssa_def_init(instr
, &dest
->ssa
, num_components
, bit_size
, name
);
1370 nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
)
1372 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1374 nir_foreach_use_safe(use_src
, def
)
1375 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1377 nir_foreach_if_use_safe(use_src
, def
)
1378 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1382 is_instr_between(nir_instr
*start
, nir_instr
*end
, nir_instr
*between
)
1384 assert(start
->block
== end
->block
);
1386 if (between
->block
!= start
->block
)
1389 /* Search backwards looking for "between" */
1390 while (start
!= end
) {
1394 end
= nir_instr_prev(end
);
1401 /* Replaces all uses of the given SSA def with the given source but only if
1402 * the use comes after the after_me instruction. This can be useful if you
1403 * are emitting code to fix up the result of some instruction: you can freely
1404 * use the result in that code and then call rewrite_uses_after and pass the
1405 * last fixup instruction as after_me and it will replace all of the uses you
1406 * want without touching the fixup code.
1408 * This function assumes that after_me is in the same block as
1409 * def->parent_instr and that after_me comes after def->parent_instr.
1412 nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
1413 nir_instr
*after_me
)
1415 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1417 nir_foreach_use_safe(use_src
, def
) {
1418 assert(use_src
->parent_instr
!= def
->parent_instr
);
1419 /* Since def already dominates all of its uses, the only way a use can
1420 * not be dominated by after_me is if it is between def and after_me in
1421 * the instruction list.
1423 if (!is_instr_between(def
->parent_instr
, after_me
, use_src
->parent_instr
))
1424 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1427 nir_foreach_if_use_safe(use_src
, def
)
1428 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1431 nir_component_mask_t
1432 nir_ssa_def_components_read(const nir_ssa_def
*def
)
1434 nir_component_mask_t read_mask
= 0;
1435 nir_foreach_use(use
, def
) {
1436 if (use
->parent_instr
->type
== nir_instr_type_alu
) {
1437 nir_alu_instr
*alu
= nir_instr_as_alu(use
->parent_instr
);
1438 nir_alu_src
*alu_src
= exec_node_data(nir_alu_src
, use
, src
);
1439 int src_idx
= alu_src
- &alu
->src
[0];
1440 assert(src_idx
>= 0 && src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
1442 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1443 if (!nir_alu_instr_channel_used(alu
, src_idx
, c
))
1446 read_mask
|= (1 << alu_src
->swizzle
[c
]);
1449 return (1 << def
->num_components
) - 1;
1453 if (!list_empty(&def
->if_uses
))
1460 nir_block_cf_tree_next(nir_block
*block
)
1462 if (block
== NULL
) {
1463 /* nir_foreach_block_safe() will call this function on a NULL block
1464 * after the last iteration, but it won't use the result so just return
1470 nir_cf_node
*cf_next
= nir_cf_node_next(&block
->cf_node
);
1472 return nir_cf_node_cf_tree_first(cf_next
);
1474 nir_cf_node
*parent
= block
->cf_node
.parent
;
1476 switch (parent
->type
) {
1477 case nir_cf_node_if
: {
1478 /* Are we at the end of the if? Go to the beginning of the else */
1479 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1480 if (block
== nir_if_last_then_block(if_stmt
))
1481 return nir_if_first_else_block(if_stmt
);
1483 assert(block
== nir_if_last_else_block(if_stmt
));
1487 case nir_cf_node_loop
:
1488 return nir_cf_node_as_block(nir_cf_node_next(parent
));
1490 case nir_cf_node_function
:
1494 unreachable("unknown cf node type");
1499 nir_block_cf_tree_prev(nir_block
*block
)
1501 if (block
== NULL
) {
1502 /* do this for consistency with nir_block_cf_tree_next() */
1506 nir_cf_node
*cf_prev
= nir_cf_node_prev(&block
->cf_node
);
1508 return nir_cf_node_cf_tree_last(cf_prev
);
1510 nir_cf_node
*parent
= block
->cf_node
.parent
;
1512 switch (parent
->type
) {
1513 case nir_cf_node_if
: {
1514 /* Are we at the beginning of the else? Go to the end of the if */
1515 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1516 if (block
== nir_if_first_else_block(if_stmt
))
1517 return nir_if_last_then_block(if_stmt
);
1519 assert(block
== nir_if_first_then_block(if_stmt
));
1523 case nir_cf_node_loop
:
1524 return nir_cf_node_as_block(nir_cf_node_prev(parent
));
1526 case nir_cf_node_function
:
1530 unreachable("unknown cf node type");
1534 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
)
1536 switch (node
->type
) {
1537 case nir_cf_node_function
: {
1538 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1539 return nir_start_block(impl
);
1542 case nir_cf_node_if
: {
1543 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1544 return nir_if_first_then_block(if_stmt
);
1547 case nir_cf_node_loop
: {
1548 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1549 return nir_loop_first_block(loop
);
1552 case nir_cf_node_block
: {
1553 return nir_cf_node_as_block(node
);
1557 unreachable("unknown node type");
1561 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
)
1563 switch (node
->type
) {
1564 case nir_cf_node_function
: {
1565 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1566 return nir_impl_last_block(impl
);
1569 case nir_cf_node_if
: {
1570 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1571 return nir_if_last_else_block(if_stmt
);
1574 case nir_cf_node_loop
: {
1575 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1576 return nir_loop_last_block(loop
);
1579 case nir_cf_node_block
: {
1580 return nir_cf_node_as_block(node
);
1584 unreachable("unknown node type");
1588 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
)
1590 if (node
->type
== nir_cf_node_block
)
1591 return nir_block_cf_tree_next(nir_cf_node_as_block(node
));
1592 else if (node
->type
== nir_cf_node_function
)
1595 return nir_cf_node_as_block(nir_cf_node_next(node
));
1599 nir_block_get_following_if(nir_block
*block
)
1601 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1604 if (nir_cf_node_is_last(&block
->cf_node
))
1607 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1609 if (next_node
->type
!= nir_cf_node_if
)
1612 return nir_cf_node_as_if(next_node
);
1616 nir_block_get_following_loop(nir_block
*block
)
1618 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1621 if (nir_cf_node_is_last(&block
->cf_node
))
1624 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1626 if (next_node
->type
!= nir_cf_node_loop
)
1629 return nir_cf_node_as_loop(next_node
);
1633 nir_index_blocks(nir_function_impl
*impl
)
1637 if (impl
->valid_metadata
& nir_metadata_block_index
)
1640 nir_foreach_block(block
, impl
) {
1641 block
->index
= index
++;
1644 /* The end_block isn't really part of the program, which is why its index
1647 impl
->num_blocks
= impl
->end_block
->index
= index
;
1651 index_ssa_def_cb(nir_ssa_def
*def
, void *state
)
1653 unsigned *index
= (unsigned *) state
;
1654 def
->index
= (*index
)++;
1660 * The indices are applied top-to-bottom which has the very nice property
1661 * that, if A dominates B, then A->index <= B->index.
1664 nir_index_ssa_defs(nir_function_impl
*impl
)
1668 nir_foreach_block(block
, impl
) {
1669 nir_foreach_instr(instr
, block
)
1670 nir_foreach_ssa_def(instr
, index_ssa_def_cb
, &index
);
1673 impl
->ssa_alloc
= index
;
1677 * The indices are applied top-to-bottom which has the very nice property
1678 * that, if A dominates B, then A->index <= B->index.
1681 nir_index_instrs(nir_function_impl
*impl
)
1685 nir_foreach_block(block
, impl
) {
1686 nir_foreach_instr(instr
, block
)
1687 instr
->index
= index
++;
1694 nir_intrinsic_from_system_value(gl_system_value val
)
1697 case SYSTEM_VALUE_VERTEX_ID
:
1698 return nir_intrinsic_load_vertex_id
;
1699 case SYSTEM_VALUE_INSTANCE_ID
:
1700 return nir_intrinsic_load_instance_id
;
1701 case SYSTEM_VALUE_DRAW_ID
:
1702 return nir_intrinsic_load_draw_id
;
1703 case SYSTEM_VALUE_BASE_INSTANCE
:
1704 return nir_intrinsic_load_base_instance
;
1705 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
:
1706 return nir_intrinsic_load_vertex_id_zero_base
;
1707 case SYSTEM_VALUE_IS_INDEXED_DRAW
:
1708 return nir_intrinsic_load_is_indexed_draw
;
1709 case SYSTEM_VALUE_FIRST_VERTEX
:
1710 return nir_intrinsic_load_first_vertex
;
1711 case SYSTEM_VALUE_BASE_VERTEX
:
1712 return nir_intrinsic_load_base_vertex
;
1713 case SYSTEM_VALUE_INVOCATION_ID
:
1714 return nir_intrinsic_load_invocation_id
;
1715 case SYSTEM_VALUE_FRAG_COORD
:
1716 return nir_intrinsic_load_frag_coord
;
1717 case SYSTEM_VALUE_FRONT_FACE
:
1718 return nir_intrinsic_load_front_face
;
1719 case SYSTEM_VALUE_SAMPLE_ID
:
1720 return nir_intrinsic_load_sample_id
;
1721 case SYSTEM_VALUE_SAMPLE_POS
:
1722 return nir_intrinsic_load_sample_pos
;
1723 case SYSTEM_VALUE_SAMPLE_MASK_IN
:
1724 return nir_intrinsic_load_sample_mask_in
;
1725 case SYSTEM_VALUE_LOCAL_INVOCATION_ID
:
1726 return nir_intrinsic_load_local_invocation_id
;
1727 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
:
1728 return nir_intrinsic_load_local_invocation_index
;
1729 case SYSTEM_VALUE_WORK_GROUP_ID
:
1730 return nir_intrinsic_load_work_group_id
;
1731 case SYSTEM_VALUE_NUM_WORK_GROUPS
:
1732 return nir_intrinsic_load_num_work_groups
;
1733 case SYSTEM_VALUE_PRIMITIVE_ID
:
1734 return nir_intrinsic_load_primitive_id
;
1735 case SYSTEM_VALUE_TESS_COORD
:
1736 return nir_intrinsic_load_tess_coord
;
1737 case SYSTEM_VALUE_TESS_LEVEL_OUTER
:
1738 return nir_intrinsic_load_tess_level_outer
;
1739 case SYSTEM_VALUE_TESS_LEVEL_INNER
:
1740 return nir_intrinsic_load_tess_level_inner
;
1741 case SYSTEM_VALUE_VERTICES_IN
:
1742 return nir_intrinsic_load_patch_vertices_in
;
1743 case SYSTEM_VALUE_HELPER_INVOCATION
:
1744 return nir_intrinsic_load_helper_invocation
;
1745 case SYSTEM_VALUE_VIEW_INDEX
:
1746 return nir_intrinsic_load_view_index
;
1747 case SYSTEM_VALUE_SUBGROUP_SIZE
:
1748 return nir_intrinsic_load_subgroup_size
;
1749 case SYSTEM_VALUE_SUBGROUP_INVOCATION
:
1750 return nir_intrinsic_load_subgroup_invocation
;
1751 case SYSTEM_VALUE_SUBGROUP_EQ_MASK
:
1752 return nir_intrinsic_load_subgroup_eq_mask
;
1753 case SYSTEM_VALUE_SUBGROUP_GE_MASK
:
1754 return nir_intrinsic_load_subgroup_ge_mask
;
1755 case SYSTEM_VALUE_SUBGROUP_GT_MASK
:
1756 return nir_intrinsic_load_subgroup_gt_mask
;
1757 case SYSTEM_VALUE_SUBGROUP_LE_MASK
:
1758 return nir_intrinsic_load_subgroup_le_mask
;
1759 case SYSTEM_VALUE_SUBGROUP_LT_MASK
:
1760 return nir_intrinsic_load_subgroup_lt_mask
;
1761 case SYSTEM_VALUE_NUM_SUBGROUPS
:
1762 return nir_intrinsic_load_num_subgroups
;
1763 case SYSTEM_VALUE_SUBGROUP_ID
:
1764 return nir_intrinsic_load_subgroup_id
;
1765 case SYSTEM_VALUE_LOCAL_GROUP_SIZE
:
1766 return nir_intrinsic_load_local_group_size
;
1767 case SYSTEM_VALUE_GLOBAL_INVOCATION_ID
:
1768 return nir_intrinsic_load_global_invocation_id
;
1769 case SYSTEM_VALUE_WORK_DIM
:
1770 return nir_intrinsic_load_work_dim
;
1772 unreachable("system value does not directly correspond to intrinsic");
1777 nir_system_value_from_intrinsic(nir_intrinsic_op intrin
)
1780 case nir_intrinsic_load_vertex_id
:
1781 return SYSTEM_VALUE_VERTEX_ID
;
1782 case nir_intrinsic_load_instance_id
:
1783 return SYSTEM_VALUE_INSTANCE_ID
;
1784 case nir_intrinsic_load_draw_id
:
1785 return SYSTEM_VALUE_DRAW_ID
;
1786 case nir_intrinsic_load_base_instance
:
1787 return SYSTEM_VALUE_BASE_INSTANCE
;
1788 case nir_intrinsic_load_vertex_id_zero_base
:
1789 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
;
1790 case nir_intrinsic_load_first_vertex
:
1791 return SYSTEM_VALUE_FIRST_VERTEX
;
1792 case nir_intrinsic_load_is_indexed_draw
:
1793 return SYSTEM_VALUE_IS_INDEXED_DRAW
;
1794 case nir_intrinsic_load_base_vertex
:
1795 return SYSTEM_VALUE_BASE_VERTEX
;
1796 case nir_intrinsic_load_invocation_id
:
1797 return SYSTEM_VALUE_INVOCATION_ID
;
1798 case nir_intrinsic_load_frag_coord
:
1799 return SYSTEM_VALUE_FRAG_COORD
;
1800 case nir_intrinsic_load_front_face
:
1801 return SYSTEM_VALUE_FRONT_FACE
;
1802 case nir_intrinsic_load_sample_id
:
1803 return SYSTEM_VALUE_SAMPLE_ID
;
1804 case nir_intrinsic_load_sample_pos
:
1805 return SYSTEM_VALUE_SAMPLE_POS
;
1806 case nir_intrinsic_load_sample_mask_in
:
1807 return SYSTEM_VALUE_SAMPLE_MASK_IN
;
1808 case nir_intrinsic_load_local_invocation_id
:
1809 return SYSTEM_VALUE_LOCAL_INVOCATION_ID
;
1810 case nir_intrinsic_load_local_invocation_index
:
1811 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
;
1812 case nir_intrinsic_load_num_work_groups
:
1813 return SYSTEM_VALUE_NUM_WORK_GROUPS
;
1814 case nir_intrinsic_load_work_group_id
:
1815 return SYSTEM_VALUE_WORK_GROUP_ID
;
1816 case nir_intrinsic_load_primitive_id
:
1817 return SYSTEM_VALUE_PRIMITIVE_ID
;
1818 case nir_intrinsic_load_tess_coord
:
1819 return SYSTEM_VALUE_TESS_COORD
;
1820 case nir_intrinsic_load_tess_level_outer
:
1821 return SYSTEM_VALUE_TESS_LEVEL_OUTER
;
1822 case nir_intrinsic_load_tess_level_inner
:
1823 return SYSTEM_VALUE_TESS_LEVEL_INNER
;
1824 case nir_intrinsic_load_patch_vertices_in
:
1825 return SYSTEM_VALUE_VERTICES_IN
;
1826 case nir_intrinsic_load_helper_invocation
:
1827 return SYSTEM_VALUE_HELPER_INVOCATION
;
1828 case nir_intrinsic_load_view_index
:
1829 return SYSTEM_VALUE_VIEW_INDEX
;
1830 case nir_intrinsic_load_subgroup_size
:
1831 return SYSTEM_VALUE_SUBGROUP_SIZE
;
1832 case nir_intrinsic_load_subgroup_invocation
:
1833 return SYSTEM_VALUE_SUBGROUP_INVOCATION
;
1834 case nir_intrinsic_load_subgroup_eq_mask
:
1835 return SYSTEM_VALUE_SUBGROUP_EQ_MASK
;
1836 case nir_intrinsic_load_subgroup_ge_mask
:
1837 return SYSTEM_VALUE_SUBGROUP_GE_MASK
;
1838 case nir_intrinsic_load_subgroup_gt_mask
:
1839 return SYSTEM_VALUE_SUBGROUP_GT_MASK
;
1840 case nir_intrinsic_load_subgroup_le_mask
:
1841 return SYSTEM_VALUE_SUBGROUP_LE_MASK
;
1842 case nir_intrinsic_load_subgroup_lt_mask
:
1843 return SYSTEM_VALUE_SUBGROUP_LT_MASK
;
1844 case nir_intrinsic_load_num_subgroups
:
1845 return SYSTEM_VALUE_NUM_SUBGROUPS
;
1846 case nir_intrinsic_load_subgroup_id
:
1847 return SYSTEM_VALUE_SUBGROUP_ID
;
1848 case nir_intrinsic_load_local_group_size
:
1849 return SYSTEM_VALUE_LOCAL_GROUP_SIZE
;
1850 case nir_intrinsic_load_global_invocation_id
:
1851 return SYSTEM_VALUE_GLOBAL_INVOCATION_ID
;
1853 unreachable("intrinsic doesn't produce a system value");
1857 /* OpenGL utility method that remaps the location attributes if they are
1858 * doubles. Not needed for vulkan due the differences on the input location
1859 * count for doubles on vulkan vs OpenGL
1861 * The bitfield returned in dual_slot is one bit for each double input slot in
1862 * the original OpenGL single-slot input numbering. The mapping from old
1863 * locations to new locations is as follows:
1865 * new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc))
1868 nir_remap_dual_slot_attributes(nir_shader
*shader
, uint64_t *dual_slot
)
1870 assert(shader
->info
.stage
== MESA_SHADER_VERTEX
);
1873 nir_foreach_variable(var
, &shader
->inputs
) {
1874 if (glsl_type_is_dual_slot(glsl_without_array(var
->type
))) {
1875 unsigned slots
= glsl_count_attribute_slots(var
->type
, true);
1876 *dual_slot
|= BITFIELD64_MASK(slots
) << var
->data
.location
;
1880 nir_foreach_variable(var
, &shader
->inputs
) {
1881 var
->data
.location
+=
1882 util_bitcount64(*dual_slot
& BITFIELD64_MASK(var
->data
.location
));
1886 /* Returns an attribute mask that has been re-compacted using the given
1890 nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
)
1893 unsigned loc
= u_bit_scan64(&dual_slot
);
1894 /* mask of all bits up to and including loc */
1895 uint64_t mask
= BITFIELD64_MASK(loc
+ 1);
1896 attribs
= (attribs
& mask
) | ((attribs
& ~mask
) >> 1);