2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
29 #include "nir_control_flow_private.h"
33 nir_shader_create(void *mem_ctx
,
34 gl_shader_stage stage
,
35 const nir_shader_compiler_options
*options
)
37 nir_shader
*shader
= ralloc(mem_ctx
, nir_shader
);
39 exec_list_make_empty(&shader
->uniforms
);
40 exec_list_make_empty(&shader
->inputs
);
41 exec_list_make_empty(&shader
->outputs
);
43 shader
->options
= options
;
44 memset(&shader
->info
, 0, sizeof(shader
->info
));
46 exec_list_make_empty(&shader
->functions
);
47 exec_list_make_empty(&shader
->registers
);
48 exec_list_make_empty(&shader
->globals
);
49 exec_list_make_empty(&shader
->system_values
);
50 shader
->reg_alloc
= 0;
52 shader
->num_inputs
= 0;
53 shader
->num_outputs
= 0;
54 shader
->num_uniforms
= 0;
56 shader
->stage
= stage
;
62 reg_create(void *mem_ctx
, struct exec_list
*list
)
64 nir_register
*reg
= ralloc(mem_ctx
, nir_register
);
66 list_inithead(®
->uses
);
67 list_inithead(®
->defs
);
68 list_inithead(®
->if_uses
);
70 reg
->num_components
= 0;
71 reg
->num_array_elems
= 0;
72 reg
->is_packed
= false;
75 exec_list_push_tail(list
, ®
->node
);
81 nir_global_reg_create(nir_shader
*shader
)
83 nir_register
*reg
= reg_create(shader
, &shader
->registers
);
84 reg
->index
= shader
->reg_alloc
++;
85 reg
->is_global
= true;
91 nir_local_reg_create(nir_function_impl
*impl
)
93 nir_register
*reg
= reg_create(ralloc_parent(impl
), &impl
->registers
);
94 reg
->index
= impl
->reg_alloc
++;
95 reg
->is_global
= false;
101 nir_reg_remove(nir_register
*reg
)
103 exec_node_remove(®
->node
);
107 nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
)
109 switch (var
->data
.mode
) {
111 assert(!"invalid mode");
115 assert(!"nir_shader_add_variable cannot be used for local variables");
119 exec_list_push_tail(&shader
->globals
, &var
->node
);
122 case nir_var_shader_in
:
123 exec_list_push_tail(&shader
->inputs
, &var
->node
);
126 case nir_var_shader_out
:
127 exec_list_push_tail(&shader
->outputs
, &var
->node
);
130 case nir_var_uniform
:
131 case nir_var_shader_storage
:
132 exec_list_push_tail(&shader
->uniforms
, &var
->node
);
135 case nir_var_system_value
:
136 exec_list_push_tail(&shader
->system_values
, &var
->node
);
142 nir_variable_create(nir_shader
*shader
, nir_variable_mode mode
,
143 const struct glsl_type
*type
, const char *name
)
145 nir_variable
*var
= rzalloc(shader
, nir_variable
);
146 var
->name
= ralloc_strdup(var
, name
);
148 var
->data
.mode
= mode
;
150 if ((mode
== nir_var_shader_in
&& shader
->stage
!= MESA_SHADER_VERTEX
) ||
151 (mode
== nir_var_shader_out
&& shader
->stage
!= MESA_SHADER_FRAGMENT
))
152 var
->data
.interpolation
= INTERP_QUALIFIER_SMOOTH
;
154 if (mode
== nir_var_shader_in
|| mode
== nir_var_uniform
)
155 var
->data
.read_only
= true;
157 nir_shader_add_variable(shader
, var
);
163 nir_local_variable_create(nir_function_impl
*impl
,
164 const struct glsl_type
*type
, const char *name
)
166 nir_variable
*var
= rzalloc(impl
->function
->shader
, nir_variable
);
167 var
->name
= ralloc_strdup(var
, name
);
169 var
->data
.mode
= nir_var_local
;
171 nir_function_impl_add_variable(impl
, var
);
177 nir_function_create(nir_shader
*shader
, const char *name
)
179 nir_function
*func
= ralloc(shader
, nir_function
);
181 exec_list_push_tail(&shader
->functions
, &func
->node
);
183 func
->name
= ralloc_strdup(func
, name
);
184 func
->shader
= shader
;
185 func
->num_params
= 0;
187 func
->return_type
= glsl_void_type();
193 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *mem_ctx
)
195 dest
->is_ssa
= src
->is_ssa
;
197 dest
->ssa
= src
->ssa
;
199 dest
->reg
.base_offset
= src
->reg
.base_offset
;
200 dest
->reg
.reg
= src
->reg
.reg
;
201 if (src
->reg
.indirect
) {
202 dest
->reg
.indirect
= ralloc(mem_ctx
, nir_src
);
203 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, mem_ctx
);
205 dest
->reg
.indirect
= NULL
;
210 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
)
212 /* Copying an SSA definition makes no sense whatsoever. */
213 assert(!src
->is_ssa
);
215 dest
->is_ssa
= false;
217 dest
->reg
.base_offset
= src
->reg
.base_offset
;
218 dest
->reg
.reg
= src
->reg
.reg
;
219 if (src
->reg
.indirect
) {
220 dest
->reg
.indirect
= ralloc(instr
, nir_src
);
221 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, instr
);
223 dest
->reg
.indirect
= NULL
;
228 nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
229 nir_alu_instr
*instr
)
231 nir_src_copy(&dest
->src
, &src
->src
, &instr
->instr
);
232 dest
->abs
= src
->abs
;
233 dest
->negate
= src
->negate
;
234 for (unsigned i
= 0; i
< 4; i
++)
235 dest
->swizzle
[i
] = src
->swizzle
[i
];
239 nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
240 nir_alu_instr
*instr
)
242 nir_dest_copy(&dest
->dest
, &src
->dest
, &instr
->instr
);
243 dest
->write_mask
= src
->write_mask
;
244 dest
->saturate
= src
->saturate
;
249 cf_init(nir_cf_node
*node
, nir_cf_node_type type
)
251 exec_node_init(&node
->node
);
257 nir_function_impl_create(nir_function
*function
)
259 assert(function
->impl
== NULL
);
261 void *mem_ctx
= ralloc_parent(function
);
263 nir_function_impl
*impl
= ralloc(mem_ctx
, nir_function_impl
);
265 function
->impl
= impl
;
266 impl
->function
= function
;
268 cf_init(&impl
->cf_node
, nir_cf_node_function
);
270 exec_list_make_empty(&impl
->body
);
271 exec_list_make_empty(&impl
->registers
);
272 exec_list_make_empty(&impl
->locals
);
273 impl
->num_params
= 0;
275 impl
->return_var
= NULL
;
278 impl
->valid_metadata
= nir_metadata_none
;
280 /* create start & end blocks */
281 nir_block
*start_block
= nir_block_create(mem_ctx
);
282 nir_block
*end_block
= nir_block_create(mem_ctx
);
283 start_block
->cf_node
.parent
= &impl
->cf_node
;
284 end_block
->cf_node
.parent
= &impl
->cf_node
;
285 impl
->end_block
= end_block
;
287 exec_list_push_tail(&impl
->body
, &start_block
->cf_node
.node
);
289 start_block
->successors
[0] = end_block
;
290 _mesa_set_add(end_block
->predecessors
, start_block
);
295 nir_block_create(nir_shader
*shader
)
297 nir_block
*block
= ralloc(shader
, nir_block
);
299 cf_init(&block
->cf_node
, nir_cf_node_block
);
301 block
->successors
[0] = block
->successors
[1] = NULL
;
302 block
->predecessors
= _mesa_set_create(block
, _mesa_hash_pointer
,
303 _mesa_key_pointer_equal
);
304 block
->imm_dom
= NULL
;
305 /* XXX maybe it would be worth it to defer allocation? This
306 * way it doesn't get allocated for shader ref's that never run
307 * nir_calc_dominance? For example, state-tracker creates an
308 * initial IR, clones that, runs appropriate lowering pass, passes
309 * to driver which does common lowering/opt, and then stores ref
310 * which is later used to do state specific lowering and futher
311 * opt. Do any of the references not need dominance metadata?
313 block
->dom_frontier
= _mesa_set_create(block
, _mesa_hash_pointer
,
314 _mesa_key_pointer_equal
);
316 exec_list_make_empty(&block
->instr_list
);
322 src_init(nir_src
*src
)
326 src
->reg
.indirect
= NULL
;
327 src
->reg
.base_offset
= 0;
331 nir_if_create(nir_shader
*shader
)
333 nir_if
*if_stmt
= ralloc(shader
, nir_if
);
335 cf_init(&if_stmt
->cf_node
, nir_cf_node_if
);
336 src_init(&if_stmt
->condition
);
338 nir_block
*then
= nir_block_create(shader
);
339 exec_list_make_empty(&if_stmt
->then_list
);
340 exec_list_push_tail(&if_stmt
->then_list
, &then
->cf_node
.node
);
341 then
->cf_node
.parent
= &if_stmt
->cf_node
;
343 nir_block
*else_stmt
= nir_block_create(shader
);
344 exec_list_make_empty(&if_stmt
->else_list
);
345 exec_list_push_tail(&if_stmt
->else_list
, &else_stmt
->cf_node
.node
);
346 else_stmt
->cf_node
.parent
= &if_stmt
->cf_node
;
352 nir_loop_create(nir_shader
*shader
)
354 nir_loop
*loop
= ralloc(shader
, nir_loop
);
356 cf_init(&loop
->cf_node
, nir_cf_node_loop
);
358 nir_block
*body
= nir_block_create(shader
);
359 exec_list_make_empty(&loop
->body
);
360 exec_list_push_tail(&loop
->body
, &body
->cf_node
.node
);
361 body
->cf_node
.parent
= &loop
->cf_node
;
363 body
->successors
[0] = body
;
364 _mesa_set_add(body
->predecessors
, body
);
370 instr_init(nir_instr
*instr
, nir_instr_type type
)
374 exec_node_init(&instr
->node
);
378 dest_init(nir_dest
*dest
)
380 dest
->is_ssa
= false;
381 dest
->reg
.reg
= NULL
;
382 dest
->reg
.indirect
= NULL
;
383 dest
->reg
.base_offset
= 0;
387 alu_dest_init(nir_alu_dest
*dest
)
389 dest_init(&dest
->dest
);
390 dest
->saturate
= false;
391 dest
->write_mask
= 0xf;
395 alu_src_init(nir_alu_src
*src
)
398 src
->abs
= src
->negate
= false;
406 nir_alu_instr_create(nir_shader
*shader
, nir_op op
)
408 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
409 nir_alu_instr
*instr
=
411 sizeof(nir_alu_instr
) + num_srcs
* sizeof(nir_alu_src
));
413 instr_init(&instr
->instr
, nir_instr_type_alu
);
415 alu_dest_init(&instr
->dest
);
416 for (unsigned i
= 0; i
< num_srcs
; i
++)
417 alu_src_init(&instr
->src
[i
]);
423 nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
)
425 nir_jump_instr
*instr
= ralloc(shader
, nir_jump_instr
);
426 instr_init(&instr
->instr
, nir_instr_type_jump
);
431 nir_load_const_instr
*
432 nir_load_const_instr_create(nir_shader
*shader
, unsigned num_components
)
434 nir_load_const_instr
*instr
= ralloc(shader
, nir_load_const_instr
);
435 instr_init(&instr
->instr
, nir_instr_type_load_const
);
437 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, NULL
);
442 nir_intrinsic_instr
*
443 nir_intrinsic_instr_create(nir_shader
*shader
, nir_intrinsic_op op
)
445 unsigned num_srcs
= nir_intrinsic_infos
[op
].num_srcs
;
446 nir_intrinsic_instr
*instr
=
448 sizeof(nir_intrinsic_instr
) + num_srcs
* sizeof(nir_src
));
450 instr_init(&instr
->instr
, nir_instr_type_intrinsic
);
451 instr
->intrinsic
= op
;
453 if (nir_intrinsic_infos
[op
].has_dest
)
454 dest_init(&instr
->dest
);
456 for (unsigned i
= 0; i
< num_srcs
; i
++)
457 src_init(&instr
->src
[i
]);
463 nir_call_instr_create(nir_shader
*shader
, nir_function
*callee
)
465 nir_call_instr
*instr
= ralloc(shader
, nir_call_instr
);
466 instr_init(&instr
->instr
, nir_instr_type_call
);
468 instr
->callee
= callee
;
469 instr
->num_params
= callee
->num_params
;
470 instr
->params
= ralloc_array(instr
, nir_deref_var
*, instr
->num_params
);
471 instr
->return_deref
= NULL
;
477 nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
)
479 nir_tex_instr
*instr
= rzalloc(shader
, nir_tex_instr
);
480 instr_init(&instr
->instr
, nir_instr_type_tex
);
482 dest_init(&instr
->dest
);
484 instr
->num_srcs
= num_srcs
;
485 instr
->src
= ralloc_array(instr
, nir_tex_src
, num_srcs
);
486 for (unsigned i
= 0; i
< num_srcs
; i
++)
487 src_init(&instr
->src
[i
].src
);
489 instr
->texture_index
= 0;
490 instr
->texture_array_size
= 0;
491 instr
->texture
= NULL
;
497 nir_phi_instr_create(nir_shader
*shader
)
499 nir_phi_instr
*instr
= ralloc(shader
, nir_phi_instr
);
500 instr_init(&instr
->instr
, nir_instr_type_phi
);
502 dest_init(&instr
->dest
);
503 exec_list_make_empty(&instr
->srcs
);
507 nir_parallel_copy_instr
*
508 nir_parallel_copy_instr_create(nir_shader
*shader
)
510 nir_parallel_copy_instr
*instr
= ralloc(shader
, nir_parallel_copy_instr
);
511 instr_init(&instr
->instr
, nir_instr_type_parallel_copy
);
513 exec_list_make_empty(&instr
->entries
);
518 nir_ssa_undef_instr
*
519 nir_ssa_undef_instr_create(nir_shader
*shader
, unsigned num_components
)
521 nir_ssa_undef_instr
*instr
= ralloc(shader
, nir_ssa_undef_instr
);
522 instr_init(&instr
->instr
, nir_instr_type_ssa_undef
);
524 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, NULL
);
530 nir_deref_var_create(void *mem_ctx
, nir_variable
*var
)
532 nir_deref_var
*deref
= ralloc(mem_ctx
, nir_deref_var
);
533 deref
->deref
.deref_type
= nir_deref_type_var
;
534 deref
->deref
.child
= NULL
;
535 deref
->deref
.type
= var
->type
;
541 nir_deref_array_create(void *mem_ctx
)
543 nir_deref_array
*deref
= ralloc(mem_ctx
, nir_deref_array
);
544 deref
->deref
.deref_type
= nir_deref_type_array
;
545 deref
->deref
.child
= NULL
;
546 deref
->deref_array_type
= nir_deref_array_type_direct
;
547 src_init(&deref
->indirect
);
548 deref
->base_offset
= 0;
553 nir_deref_struct_create(void *mem_ctx
, unsigned field_index
)
555 nir_deref_struct
*deref
= ralloc(mem_ctx
, nir_deref_struct
);
556 deref
->deref
.deref_type
= nir_deref_type_struct
;
557 deref
->deref
.child
= NULL
;
558 deref
->index
= field_index
;
562 static nir_deref_var
*
563 copy_deref_var(void *mem_ctx
, nir_deref_var
*deref
)
565 nir_deref_var
*ret
= nir_deref_var_create(mem_ctx
, deref
->var
);
566 ret
->deref
.type
= deref
->deref
.type
;
567 if (deref
->deref
.child
)
568 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
572 static nir_deref_array
*
573 copy_deref_array(void *mem_ctx
, nir_deref_array
*deref
)
575 nir_deref_array
*ret
= nir_deref_array_create(mem_ctx
);
576 ret
->base_offset
= deref
->base_offset
;
577 ret
->deref_array_type
= deref
->deref_array_type
;
578 if (deref
->deref_array_type
== nir_deref_array_type_indirect
) {
579 nir_src_copy(&ret
->indirect
, &deref
->indirect
, mem_ctx
);
581 ret
->deref
.type
= deref
->deref
.type
;
582 if (deref
->deref
.child
)
583 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
587 static nir_deref_struct
*
588 copy_deref_struct(void *mem_ctx
, nir_deref_struct
*deref
)
590 nir_deref_struct
*ret
= nir_deref_struct_create(mem_ctx
, deref
->index
);
591 ret
->deref
.type
= deref
->deref
.type
;
592 if (deref
->deref
.child
)
593 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
598 nir_copy_deref(void *mem_ctx
, nir_deref
*deref
)
600 switch (deref
->deref_type
) {
601 case nir_deref_type_var
:
602 return ©_deref_var(mem_ctx
, nir_deref_as_var(deref
))->deref
;
603 case nir_deref_type_array
:
604 return ©_deref_array(mem_ctx
, nir_deref_as_array(deref
))->deref
;
605 case nir_deref_type_struct
:
606 return ©_deref_struct(mem_ctx
, nir_deref_as_struct(deref
))->deref
;
608 unreachable("Invalid dereference type");
614 /* Returns a load_const instruction that represents the constant
615 * initializer for the given deref chain. The caller is responsible for
616 * ensuring that there actually is a constant initializer.
618 nir_load_const_instr
*
619 nir_deref_get_const_initializer_load(nir_shader
*shader
, nir_deref_var
*deref
)
621 nir_constant
*constant
= deref
->var
->constant_initializer
;
624 const nir_deref
*tail
= &deref
->deref
;
625 unsigned matrix_offset
= 0;
626 while (tail
->child
) {
627 switch (tail
->child
->deref_type
) {
628 case nir_deref_type_array
: {
629 nir_deref_array
*arr
= nir_deref_as_array(tail
->child
);
630 assert(arr
->deref_array_type
== nir_deref_array_type_direct
);
631 if (glsl_type_is_matrix(tail
->type
)) {
632 assert(arr
->deref
.child
== NULL
);
633 matrix_offset
= arr
->base_offset
;
635 constant
= constant
->elements
[arr
->base_offset
];
640 case nir_deref_type_struct
: {
641 constant
= constant
->elements
[nir_deref_as_struct(tail
->child
)->index
];
646 unreachable("Invalid deref child type");
652 nir_load_const_instr
*load
=
653 nir_load_const_instr_create(shader
, glsl_get_vector_elements(tail
->type
));
655 matrix_offset
*= load
->def
.num_components
;
656 for (unsigned i
= 0; i
< load
->def
.num_components
; i
++) {
657 switch (glsl_get_base_type(tail
->type
)) {
658 case GLSL_TYPE_FLOAT
:
661 load
->value
.u
[i
] = constant
->value
.u
[matrix_offset
+ i
];
664 load
->value
.u
[i
] = constant
->value
.b
[matrix_offset
+ i
] ?
665 NIR_TRUE
: NIR_FALSE
;
668 unreachable("Invalid immediate type");
676 nir_cf_node_get_function(nir_cf_node
*node
)
678 while (node
->type
!= nir_cf_node_function
) {
682 return nir_cf_node_as_function(node
);
686 add_use_cb(nir_src
*src
, void *state
)
688 nir_instr
*instr
= state
;
690 src
->parent_instr
= instr
;
691 list_addtail(&src
->use_link
,
692 src
->is_ssa
? &src
->ssa
->uses
: &src
->reg
.reg
->uses
);
698 add_ssa_def_cb(nir_ssa_def
*def
, void *state
)
700 nir_instr
*instr
= state
;
702 if (instr
->block
&& def
->index
== UINT_MAX
) {
703 nir_function_impl
*impl
=
704 nir_cf_node_get_function(&instr
->block
->cf_node
);
706 def
->index
= impl
->ssa_alloc
++;
713 add_reg_def_cb(nir_dest
*dest
, void *state
)
715 nir_instr
*instr
= state
;
718 dest
->reg
.parent_instr
= instr
;
719 list_addtail(&dest
->reg
.def_link
, &dest
->reg
.reg
->defs
);
726 add_defs_uses(nir_instr
*instr
)
728 nir_foreach_src(instr
, add_use_cb
, instr
);
729 nir_foreach_dest(instr
, add_reg_def_cb
, instr
);
730 nir_foreach_ssa_def(instr
, add_ssa_def_cb
, instr
);
734 nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
)
736 switch (cursor
.option
) {
737 case nir_cursor_before_block
:
738 /* Only allow inserting jumps into empty blocks. */
739 if (instr
->type
== nir_instr_type_jump
)
740 assert(exec_list_is_empty(&cursor
.block
->instr_list
));
742 instr
->block
= cursor
.block
;
743 add_defs_uses(instr
);
744 exec_list_push_head(&cursor
.block
->instr_list
, &instr
->node
);
746 case nir_cursor_after_block
: {
747 /* Inserting instructions after a jump is illegal. */
748 nir_instr
*last
= nir_block_last_instr(cursor
.block
);
749 assert(last
== NULL
|| last
->type
!= nir_instr_type_jump
);
752 instr
->block
= cursor
.block
;
753 add_defs_uses(instr
);
754 exec_list_push_tail(&cursor
.block
->instr_list
, &instr
->node
);
757 case nir_cursor_before_instr
:
758 assert(instr
->type
!= nir_instr_type_jump
);
759 instr
->block
= cursor
.instr
->block
;
760 add_defs_uses(instr
);
761 exec_node_insert_node_before(&cursor
.instr
->node
, &instr
->node
);
763 case nir_cursor_after_instr
:
764 /* Inserting instructions after a jump is illegal. */
765 assert(cursor
.instr
->type
!= nir_instr_type_jump
);
767 /* Only allow inserting jumps at the end of the block. */
768 if (instr
->type
== nir_instr_type_jump
)
769 assert(cursor
.instr
== nir_block_last_instr(cursor
.instr
->block
));
771 instr
->block
= cursor
.instr
->block
;
772 add_defs_uses(instr
);
773 exec_node_insert_after(&cursor
.instr
->node
, &instr
->node
);
777 if (instr
->type
== nir_instr_type_jump
)
778 nir_handle_add_jump(instr
->block
);
782 src_is_valid(const nir_src
*src
)
784 return src
->is_ssa
? (src
->ssa
!= NULL
) : (src
->reg
.reg
!= NULL
);
788 remove_use_cb(nir_src
*src
, void *state
)
790 if (src_is_valid(src
))
791 list_del(&src
->use_link
);
797 remove_def_cb(nir_dest
*dest
, void *state
)
800 list_del(&dest
->reg
.def_link
);
806 remove_defs_uses(nir_instr
*instr
)
808 nir_foreach_dest(instr
, remove_def_cb
, instr
);
809 nir_foreach_src(instr
, remove_use_cb
, instr
);
812 void nir_instr_remove(nir_instr
*instr
)
814 remove_defs_uses(instr
);
815 exec_node_remove(&instr
->node
);
817 if (instr
->type
== nir_instr_type_jump
) {
818 nir_jump_instr
*jump_instr
= nir_instr_as_jump(instr
);
819 nir_handle_remove_jump(instr
->block
, jump_instr
->type
);
826 nir_index_local_regs(nir_function_impl
*impl
)
829 foreach_list_typed(nir_register
, reg
, node
, &impl
->registers
) {
830 reg
->index
= index
++;
832 impl
->reg_alloc
= index
;
836 nir_index_global_regs(nir_shader
*shader
)
839 foreach_list_typed(nir_register
, reg
, node
, &shader
->registers
) {
840 reg
->index
= index
++;
842 shader
->reg_alloc
= index
;
846 visit_alu_dest(nir_alu_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
848 return cb(&instr
->dest
.dest
, state
);
852 visit_intrinsic_dest(nir_intrinsic_instr
*instr
, nir_foreach_dest_cb cb
,
855 if (nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
856 return cb(&instr
->dest
, state
);
862 visit_texture_dest(nir_tex_instr
*instr
, nir_foreach_dest_cb cb
,
865 return cb(&instr
->dest
, state
);
869 visit_phi_dest(nir_phi_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
871 return cb(&instr
->dest
, state
);
875 visit_parallel_copy_dest(nir_parallel_copy_instr
*instr
,
876 nir_foreach_dest_cb cb
, void *state
)
878 nir_foreach_parallel_copy_entry(instr
, entry
) {
879 if (!cb(&entry
->dest
, state
))
887 nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
889 switch (instr
->type
) {
890 case nir_instr_type_alu
:
891 return visit_alu_dest(nir_instr_as_alu(instr
), cb
, state
);
892 case nir_instr_type_intrinsic
:
893 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr
), cb
, state
);
894 case nir_instr_type_tex
:
895 return visit_texture_dest(nir_instr_as_tex(instr
), cb
, state
);
896 case nir_instr_type_phi
:
897 return visit_phi_dest(nir_instr_as_phi(instr
), cb
, state
);
898 case nir_instr_type_parallel_copy
:
899 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr
),
902 case nir_instr_type_load_const
:
903 case nir_instr_type_ssa_undef
:
904 case nir_instr_type_call
:
905 case nir_instr_type_jump
:
909 unreachable("Invalid instruction type");
916 struct foreach_ssa_def_state
{
917 nir_foreach_ssa_def_cb cb
;
922 nir_ssa_def_visitor(nir_dest
*dest
, void *void_state
)
924 struct foreach_ssa_def_state
*state
= void_state
;
927 return state
->cb(&dest
->ssa
, state
->client_state
);
933 nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
, void *state
)
935 switch (instr
->type
) {
936 case nir_instr_type_alu
:
937 case nir_instr_type_tex
:
938 case nir_instr_type_intrinsic
:
939 case nir_instr_type_phi
:
940 case nir_instr_type_parallel_copy
: {
941 struct foreach_ssa_def_state foreach_state
= {cb
, state
};
942 return nir_foreach_dest(instr
, nir_ssa_def_visitor
, &foreach_state
);
945 case nir_instr_type_load_const
:
946 return cb(&nir_instr_as_load_const(instr
)->def
, state
);
947 case nir_instr_type_ssa_undef
:
948 return cb(&nir_instr_as_ssa_undef(instr
)->def
, state
);
949 case nir_instr_type_call
:
950 case nir_instr_type_jump
:
953 unreachable("Invalid instruction type");
958 visit_src(nir_src
*src
, nir_foreach_src_cb cb
, void *state
)
962 if (!src
->is_ssa
&& src
->reg
.indirect
)
963 return cb(src
->reg
.indirect
, state
);
968 visit_deref_array_src(nir_deref_array
*deref
, nir_foreach_src_cb cb
,
971 if (deref
->deref_array_type
== nir_deref_array_type_indirect
)
972 return visit_src(&deref
->indirect
, cb
, state
);
977 visit_deref_src(nir_deref_var
*deref
, nir_foreach_src_cb cb
, void *state
)
979 nir_deref
*cur
= &deref
->deref
;
980 while (cur
!= NULL
) {
981 if (cur
->deref_type
== nir_deref_type_array
) {
982 if (!visit_deref_array_src(nir_deref_as_array(cur
), cb
, state
))
993 visit_alu_src(nir_alu_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
995 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
996 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1003 visit_tex_src(nir_tex_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1005 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
1006 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1010 if (instr
->texture
!= NULL
) {
1011 if (!visit_deref_src(instr
->texture
, cb
, state
))
1019 visit_intrinsic_src(nir_intrinsic_instr
*instr
, nir_foreach_src_cb cb
,
1022 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
1023 for (unsigned i
= 0; i
< num_srcs
; i
++) {
1024 if (!visit_src(&instr
->src
[i
], cb
, state
))
1029 nir_intrinsic_infos
[instr
->intrinsic
].num_variables
;
1030 for (unsigned i
= 0; i
< num_vars
; i
++) {
1031 if (!visit_deref_src(instr
->variables
[i
], cb
, state
))
1039 visit_call_src(nir_call_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1045 visit_load_const_src(nir_load_const_instr
*instr
, nir_foreach_src_cb cb
,
1052 visit_phi_src(nir_phi_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1054 nir_foreach_phi_src(instr
, src
) {
1055 if (!visit_src(&src
->src
, cb
, state
))
1063 visit_parallel_copy_src(nir_parallel_copy_instr
*instr
,
1064 nir_foreach_src_cb cb
, void *state
)
1066 nir_foreach_parallel_copy_entry(instr
, entry
) {
1067 if (!visit_src(&entry
->src
, cb
, state
))
1076 nir_foreach_src_cb cb
;
1077 } visit_dest_indirect_state
;
1080 visit_dest_indirect(nir_dest
*dest
, void *_state
)
1082 visit_dest_indirect_state
*state
= (visit_dest_indirect_state
*) _state
;
1084 if (!dest
->is_ssa
&& dest
->reg
.indirect
)
1085 return state
->cb(dest
->reg
.indirect
, state
->state
);
1091 nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1093 switch (instr
->type
) {
1094 case nir_instr_type_alu
:
1095 if (!visit_alu_src(nir_instr_as_alu(instr
), cb
, state
))
1098 case nir_instr_type_intrinsic
:
1099 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr
), cb
, state
))
1102 case nir_instr_type_tex
:
1103 if (!visit_tex_src(nir_instr_as_tex(instr
), cb
, state
))
1106 case nir_instr_type_call
:
1107 if (!visit_call_src(nir_instr_as_call(instr
), cb
, state
))
1110 case nir_instr_type_load_const
:
1111 if (!visit_load_const_src(nir_instr_as_load_const(instr
), cb
, state
))
1114 case nir_instr_type_phi
:
1115 if (!visit_phi_src(nir_instr_as_phi(instr
), cb
, state
))
1118 case nir_instr_type_parallel_copy
:
1119 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr
),
1123 case nir_instr_type_jump
:
1124 case nir_instr_type_ssa_undef
:
1128 unreachable("Invalid instruction type");
1132 visit_dest_indirect_state dest_state
;
1133 dest_state
.state
= state
;
1135 return nir_foreach_dest(instr
, visit_dest_indirect
, &dest_state
);
1139 nir_src_as_const_value(nir_src src
)
1144 if (src
.ssa
->parent_instr
->type
!= nir_instr_type_load_const
)
1147 nir_load_const_instr
*load
= nir_instr_as_load_const(src
.ssa
->parent_instr
);
1149 return &load
->value
;
1153 * Returns true if the source is known to be dynamically uniform. Otherwise it
1154 * returns false which means it may or may not be dynamically uniform but it
1155 * can't be determined.
1158 nir_src_is_dynamically_uniform(nir_src src
)
1163 /* Constants are trivially dynamically uniform */
1164 if (src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
1167 /* As are uniform variables */
1168 if (src
.ssa
->parent_instr
->type
== nir_instr_type_intrinsic
) {
1169 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(src
.ssa
->parent_instr
);
1171 if (intr
->intrinsic
== nir_intrinsic_load_uniform
)
1175 /* XXX: this could have many more tests, such as when a sampler function is
1176 * called with dynamically uniform arguments.
1182 src_remove_all_uses(nir_src
*src
)
1184 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1185 if (!src_is_valid(src
))
1188 list_del(&src
->use_link
);
1193 src_add_all_uses(nir_src
*src
, nir_instr
*parent_instr
, nir_if
*parent_if
)
1195 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1196 if (!src_is_valid(src
))
1200 src
->parent_instr
= parent_instr
;
1202 list_addtail(&src
->use_link
, &src
->ssa
->uses
);
1204 list_addtail(&src
->use_link
, &src
->reg
.reg
->uses
);
1207 src
->parent_if
= parent_if
;
1209 list_addtail(&src
->use_link
, &src
->ssa
->if_uses
);
1211 list_addtail(&src
->use_link
, &src
->reg
.reg
->if_uses
);
1217 nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
)
1219 assert(!src_is_valid(src
) || src
->parent_instr
== instr
);
1221 src_remove_all_uses(src
);
1223 src_add_all_uses(src
, instr
, NULL
);
1227 nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
)
1229 assert(!src_is_valid(dest
) || dest
->parent_instr
== dest_instr
);
1231 src_remove_all_uses(dest
);
1232 src_remove_all_uses(src
);
1234 *src
= NIR_SRC_INIT
;
1235 src_add_all_uses(dest
, dest_instr
, NULL
);
1239 nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
)
1241 nir_src
*src
= &if_stmt
->condition
;
1242 assert(!src_is_valid(src
) || src
->parent_if
== if_stmt
);
1244 src_remove_all_uses(src
);
1246 src_add_all_uses(src
, NULL
, if_stmt
);
1250 nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
, nir_dest new_dest
)
1253 /* We can only overwrite an SSA destination if it has no uses. */
1254 assert(list_empty(&dest
->ssa
.uses
) && list_empty(&dest
->ssa
.if_uses
));
1256 list_del(&dest
->reg
.def_link
);
1257 if (dest
->reg
.indirect
)
1258 src_remove_all_uses(dest
->reg
.indirect
);
1261 /* We can't re-write with an SSA def */
1262 assert(!new_dest
.is_ssa
);
1264 nir_dest_copy(dest
, &new_dest
, instr
);
1266 dest
->reg
.parent_instr
= instr
;
1267 list_addtail(&dest
->reg
.def_link
, &new_dest
.reg
.reg
->defs
);
1269 if (dest
->reg
.indirect
)
1270 src_add_all_uses(dest
->reg
.indirect
, instr
, NULL
);
1274 nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
1275 unsigned num_components
, const char *name
)
1278 def
->parent_instr
= instr
;
1279 list_inithead(&def
->uses
);
1280 list_inithead(&def
->if_uses
);
1281 def
->num_components
= num_components
;
1284 nir_function_impl
*impl
=
1285 nir_cf_node_get_function(&instr
->block
->cf_node
);
1287 def
->index
= impl
->ssa_alloc
++;
1289 def
->index
= UINT_MAX
;
1294 nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
1295 unsigned num_components
, const char *name
)
1297 dest
->is_ssa
= true;
1298 nir_ssa_def_init(instr
, &dest
->ssa
, num_components
, name
);
1302 nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
)
1304 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1306 nir_foreach_use_safe(def
, use_src
)
1307 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1309 nir_foreach_if_use_safe(def
, use_src
)
1310 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1314 is_instr_between(nir_instr
*start
, nir_instr
*end
, nir_instr
*between
)
1316 assert(start
->block
== end
->block
);
1318 if (between
->block
!= start
->block
)
1321 /* Search backwards looking for "between" */
1322 while (start
!= end
) {
1326 end
= nir_instr_prev(end
);
1333 /* Replaces all uses of the given SSA def with the given source but only if
1334 * the use comes after the after_me instruction. This can be useful if you
1335 * are emitting code to fix up the result of some instruction: you can freely
1336 * use the result in that code and then call rewrite_uses_after and pass the
1337 * last fixup instruction as after_me and it will replace all of the uses you
1338 * want without touching the fixup code.
1340 * This function assumes that after_me is in the same block as
1341 * def->parent_instr and that after_me comes after def->parent_instr.
1344 nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
1345 nir_instr
*after_me
)
1347 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1349 nir_foreach_use_safe(def
, use_src
) {
1350 assert(use_src
->parent_instr
!= def
->parent_instr
);
1351 /* Since def already dominates all of its uses, the only way a use can
1352 * not be dominated by after_me is if it is between def and after_me in
1353 * the instruction list.
1355 if (!is_instr_between(def
->parent_instr
, after_me
, use_src
->parent_instr
))
1356 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1359 nir_foreach_if_use_safe(def
, use_src
)
1360 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1363 static bool foreach_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1364 bool reverse
, void *state
);
1367 foreach_if(nir_if
*if_stmt
, nir_foreach_block_cb cb
, bool reverse
, void *state
)
1370 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
,
1371 &if_stmt
->else_list
) {
1372 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1376 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
,
1377 &if_stmt
->then_list
) {
1378 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1382 foreach_list_typed_safe(nir_cf_node
, node
, node
, &if_stmt
->then_list
) {
1383 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1387 foreach_list_typed_safe(nir_cf_node
, node
, node
, &if_stmt
->else_list
) {
1388 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1397 foreach_loop(nir_loop
*loop
, nir_foreach_block_cb cb
, bool reverse
, void *state
)
1400 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
, &loop
->body
) {
1401 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1405 foreach_list_typed_safe(nir_cf_node
, node
, node
, &loop
->body
) {
1406 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1415 foreach_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1416 bool reverse
, void *state
)
1418 switch (node
->type
) {
1419 case nir_cf_node_block
:
1420 return cb(nir_cf_node_as_block(node
), state
);
1421 case nir_cf_node_if
:
1422 return foreach_if(nir_cf_node_as_if(node
), cb
, reverse
, state
);
1423 case nir_cf_node_loop
:
1424 return foreach_loop(nir_cf_node_as_loop(node
), cb
, reverse
, state
);
1428 unreachable("Invalid CFG node type");
1436 nir_foreach_block_in_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1439 return foreach_cf_node(node
, cb
, false, state
);
1443 nir_foreach_block(nir_function_impl
*impl
, nir_foreach_block_cb cb
, void *state
)
1445 foreach_list_typed_safe(nir_cf_node
, node
, node
, &impl
->body
) {
1446 if (!foreach_cf_node(node
, cb
, false, state
))
1450 return cb(impl
->end_block
, state
);
1454 nir_foreach_block_reverse(nir_function_impl
*impl
, nir_foreach_block_cb cb
,
1457 if (!cb(impl
->end_block
, state
))
1460 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
, &impl
->body
) {
1461 if (!foreach_cf_node(node
, cb
, true, state
))
1469 nir_block_get_following_if(nir_block
*block
)
1471 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1474 if (nir_cf_node_is_last(&block
->cf_node
))
1477 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1479 if (next_node
->type
!= nir_cf_node_if
)
1482 return nir_cf_node_as_if(next_node
);
1486 nir_block_get_following_loop(nir_block
*block
)
1488 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1491 if (nir_cf_node_is_last(&block
->cf_node
))
1494 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1496 if (next_node
->type
!= nir_cf_node_loop
)
1499 return nir_cf_node_as_loop(next_node
);
1502 index_block(nir_block
*block
, void *state
)
1504 unsigned *index
= state
;
1505 block
->index
= (*index
)++;
1510 nir_index_blocks(nir_function_impl
*impl
)
1514 if (impl
->valid_metadata
& nir_metadata_block_index
)
1517 nir_foreach_block(impl
, index_block
, &index
);
1519 impl
->num_blocks
= index
;
1523 index_ssa_def_cb(nir_ssa_def
*def
, void *state
)
1525 unsigned *index
= (unsigned *) state
;
1526 def
->index
= (*index
)++;
1532 index_ssa_block(nir_block
*block
, void *state
)
1534 nir_foreach_instr(block
, instr
)
1535 nir_foreach_ssa_def(instr
, index_ssa_def_cb
, state
);
1541 * The indices are applied top-to-bottom which has the very nice property
1542 * that, if A dominates B, then A->index <= B->index.
1545 nir_index_ssa_defs(nir_function_impl
*impl
)
1548 nir_foreach_block(impl
, index_ssa_block
, &index
);
1549 impl
->ssa_alloc
= index
;
1553 index_instrs_block(nir_block
*block
, void *state
)
1555 unsigned *index
= state
;
1556 nir_foreach_instr(block
, instr
)
1557 instr
->index
= (*index
)++;
1563 * The indices are applied top-to-bottom which has the very nice property
1564 * that, if A dominates B, then A->index <= B->index.
1567 nir_index_instrs(nir_function_impl
*impl
)
1570 nir_foreach_block(impl
, index_instrs_block
, &index
);
1575 nir_intrinsic_from_system_value(gl_system_value val
)
1578 case SYSTEM_VALUE_VERTEX_ID
:
1579 return nir_intrinsic_load_vertex_id
;
1580 case SYSTEM_VALUE_INSTANCE_ID
:
1581 return nir_intrinsic_load_instance_id
;
1582 case SYSTEM_VALUE_DRAW_ID
:
1583 return nir_intrinsic_load_draw_id
;
1584 case SYSTEM_VALUE_BASE_INSTANCE
:
1585 return nir_intrinsic_load_base_instance
;
1586 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
:
1587 return nir_intrinsic_load_vertex_id_zero_base
;
1588 case SYSTEM_VALUE_BASE_VERTEX
:
1589 return nir_intrinsic_load_base_vertex
;
1590 case SYSTEM_VALUE_INVOCATION_ID
:
1591 return nir_intrinsic_load_invocation_id
;
1592 case SYSTEM_VALUE_FRONT_FACE
:
1593 return nir_intrinsic_load_front_face
;
1594 case SYSTEM_VALUE_SAMPLE_ID
:
1595 return nir_intrinsic_load_sample_id
;
1596 case SYSTEM_VALUE_SAMPLE_POS
:
1597 return nir_intrinsic_load_sample_pos
;
1598 case SYSTEM_VALUE_SAMPLE_MASK_IN
:
1599 return nir_intrinsic_load_sample_mask_in
;
1600 case SYSTEM_VALUE_LOCAL_INVOCATION_ID
:
1601 return nir_intrinsic_load_local_invocation_id
;
1602 case SYSTEM_VALUE_WORK_GROUP_ID
:
1603 return nir_intrinsic_load_work_group_id
;
1604 case SYSTEM_VALUE_NUM_WORK_GROUPS
:
1605 return nir_intrinsic_load_num_work_groups
;
1606 case SYSTEM_VALUE_PRIMITIVE_ID
:
1607 return nir_intrinsic_load_primitive_id
;
1608 case SYSTEM_VALUE_TESS_COORD
:
1609 return nir_intrinsic_load_tess_coord
;
1610 case SYSTEM_VALUE_TESS_LEVEL_OUTER
:
1611 return nir_intrinsic_load_tess_level_outer
;
1612 case SYSTEM_VALUE_TESS_LEVEL_INNER
:
1613 return nir_intrinsic_load_tess_level_inner
;
1614 case SYSTEM_VALUE_VERTICES_IN
:
1615 return nir_intrinsic_load_patch_vertices_in
;
1616 case SYSTEM_VALUE_HELPER_INVOCATION
:
1617 return nir_intrinsic_load_helper_invocation
;
1619 unreachable("system value does not directly correspond to intrinsic");
1624 nir_system_value_from_intrinsic(nir_intrinsic_op intrin
)
1627 case nir_intrinsic_load_vertex_id
:
1628 return SYSTEM_VALUE_VERTEX_ID
;
1629 case nir_intrinsic_load_instance_id
:
1630 return SYSTEM_VALUE_INSTANCE_ID
;
1631 case nir_intrinsic_load_draw_id
:
1632 return SYSTEM_VALUE_DRAW_ID
;
1633 case nir_intrinsic_load_base_instance
:
1634 return SYSTEM_VALUE_BASE_INSTANCE
;
1635 case nir_intrinsic_load_vertex_id_zero_base
:
1636 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
;
1637 case nir_intrinsic_load_base_vertex
:
1638 return SYSTEM_VALUE_BASE_VERTEX
;
1639 case nir_intrinsic_load_invocation_id
:
1640 return SYSTEM_VALUE_INVOCATION_ID
;
1641 case nir_intrinsic_load_front_face
:
1642 return SYSTEM_VALUE_FRONT_FACE
;
1643 case nir_intrinsic_load_sample_id
:
1644 return SYSTEM_VALUE_SAMPLE_ID
;
1645 case nir_intrinsic_load_sample_pos
:
1646 return SYSTEM_VALUE_SAMPLE_POS
;
1647 case nir_intrinsic_load_sample_mask_in
:
1648 return SYSTEM_VALUE_SAMPLE_MASK_IN
;
1649 case nir_intrinsic_load_local_invocation_id
:
1650 return SYSTEM_VALUE_LOCAL_INVOCATION_ID
;
1651 case nir_intrinsic_load_num_work_groups
:
1652 return SYSTEM_VALUE_NUM_WORK_GROUPS
;
1653 case nir_intrinsic_load_work_group_id
:
1654 return SYSTEM_VALUE_WORK_GROUP_ID
;
1655 case nir_intrinsic_load_primitive_id
:
1656 return SYSTEM_VALUE_PRIMITIVE_ID
;
1657 case nir_intrinsic_load_tess_coord
:
1658 return SYSTEM_VALUE_TESS_COORD
;
1659 case nir_intrinsic_load_tess_level_outer
:
1660 return SYSTEM_VALUE_TESS_LEVEL_OUTER
;
1661 case nir_intrinsic_load_tess_level_inner
:
1662 return SYSTEM_VALUE_TESS_LEVEL_INNER
;
1663 case nir_intrinsic_load_patch_vertices_in
:
1664 return SYSTEM_VALUE_VERTICES_IN
;
1665 case nir_intrinsic_load_helper_invocation
:
1666 return SYSTEM_VALUE_HELPER_INVOCATION
;
1668 unreachable("intrinsic doesn't produce a system value");