src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->bit_size = 32;
  74    reg->num_array_elems = 0;
  75    reg->is_packed = false;
  76    reg->name = NULL;
  77
  78    exec_list_push_tail(list, &reg->node);
  79
  80    return reg;
  81 }
  82
  83 nir_register *
  84 nir_global_reg_create(nir_shader *shader)
  85 {
  86    nir_register *reg = reg_create(shader, &shader->registers);
  87    reg->index = shader->reg_alloc++;
  88    reg->is_global = true;
  89
  90    return reg;
  91 }
  92
  93 nir_register *
  94 nir_local_reg_create(nir_function_impl *impl)
  95 {
  96    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  97    reg->index = impl->reg_alloc++;
  98    reg->is_global = false;
  99
 100    return reg;
 101 }
 102
 103 void
 104 nir_reg_remove(nir_register *reg)
 105 {
 106    exec_node_remove(&reg->node);
 107 }
 108
 109 void
 110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 111 {
 112    switch (var->data.mode) {
 113    case nir_var_all:
 114       assert(!"invalid mode");
 115       break;
 116
 117    case nir_var_local:
 118       assert(!"nir_shader_add_variable cannot be used for local variables");
 119       break;
 120
 121    case nir_var_param:
 122       assert(!"nir_shader_add_variable cannot be used for function parameters");
 123       break;
 124
 125    case nir_var_global:
 126       exec_list_push_tail(&shader->globals, &var->node);
 127       break;
 128
 129    case nir_var_shader_in:
 130       exec_list_push_tail(&shader->inputs, &var->node);
 131       break;
 132
 133    case nir_var_shader_out:
 134       exec_list_push_tail(&shader->outputs, &var->node);
 135       break;
 136
 137    case nir_var_uniform:
 138    case nir_var_shader_storage:
 139       exec_list_push_tail(&shader->uniforms, &var->node);
 140       break;
 141
 142    case nir_var_shared:
 143       assert(shader->stage == MESA_SHADER_COMPUTE);
 144       exec_list_push_tail(&shader->shared, &var->node);
 145       break;
 146
 147    case nir_var_system_value:
 148       exec_list_push_tail(&shader->system_values, &var->node);
 149       break;
 150    }
 151 }
 152
 153 nir_variable *
 154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 155                     const struct glsl_type *type, const char *name)
 156 {
 157    nir_variable *var = rzalloc(shader, nir_variable);
 158    var->name = ralloc_strdup(var, name);
 159    var->type = type;
 160    var->data.mode = mode;
 161
 162    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 163        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 164       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 165
 166    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 167       var->data.read_only = true;
 168
 169    nir_shader_add_variable(shader, var);
 170
 171    return var;
 172 }
 173
 174 nir_variable *
 175 nir_local_variable_create(nir_function_impl *impl,
 176                           const struct glsl_type *type, const char *name)
 177 {
 178    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 179    var->name = ralloc_strdup(var, name);
 180    var->type = type;
 181    var->data.mode = nir_var_local;
 182
 183    nir_function_impl_add_variable(impl, var);
 184
 185    return var;
 186 }
 187
 188 nir_function *
 189 nir_function_create(nir_shader *shader, const char *name)
 190 {
 191    nir_function *func = ralloc(shader, nir_function);
 192
 193    exec_list_push_tail(&shader->functions, &func->node);
 194
 195    func->name = ralloc_strdup(func, name);
 196    func->shader = shader;
 197    func->num_params = 0;
 198    func->params = NULL;
 199    func->return_type = glsl_void_type();
 200    func->impl = NULL;
 201
 202    return func;
 203 }
 204
 205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 206 {
 207    dest->is_ssa = src->is_ssa;
 208    if (src->is_ssa) {
 209       dest->ssa = src->ssa;
 210    } else {
 211       dest->reg.base_offset = src->reg.base_offset;
 212       dest->reg.reg = src->reg.reg;
 213       if (src->reg.indirect) {
 214          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 215          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 216       } else {
 217          dest->reg.indirect = NULL;
 218       }
 219    }
 220 }
 221
 222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 223 {
 224    /* Copying an SSA definition makes no sense whatsoever. */
 225    assert(!src->is_ssa);
 226
 227    dest->is_ssa = false;
 228
 229    dest->reg.base_offset = src->reg.base_offset;
 230    dest->reg.reg = src->reg.reg;
 231    if (src->reg.indirect) {
 232       dest->reg.indirect = ralloc(instr, nir_src);
 233       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 234    } else {
 235       dest->reg.indirect = NULL;
 236    }
 237 }
 238
 239 void
 240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 241                  nir_alu_instr *instr)
 242 {
 243    nir_src_copy(&dest->src, &src->src, &instr->instr);
 244    dest->abs = src->abs;
 245    dest->negate = src->negate;
 246    for (unsigned i = 0; i < 4; i++)
 247       dest->swizzle[i] = src->swizzle[i];
 248 }
 249
 250 void
 251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 252                   nir_alu_instr *instr)
 253 {
 254    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 255    dest->write_mask = src->write_mask;
 256    dest->saturate = src->saturate;
 257 }
 258
 259
 260 static void
 261 cf_init(nir_cf_node *node, nir_cf_node_type type)
 262 {
 263    exec_node_init(&node->node);
 264    node->parent = NULL;
 265    node->type = type;
 266 }
 267
 268 nir_function_impl *
 269 nir_function_impl_create_bare(nir_shader *shader)
 270 {
 271    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 272
 273    impl->function = NULL;
 274
 275    cf_init(&impl->cf_node, nir_cf_node_function);
 276
 277    exec_list_make_empty(&impl->body);
 278    exec_list_make_empty(&impl->registers);
 279    exec_list_make_empty(&impl->locals);
 280    impl->num_params = 0;
 281    impl->params = NULL;
 282    impl->return_var = NULL;
 283    impl->reg_alloc = 0;
 284    impl->ssa_alloc = 0;
 285    impl->valid_metadata = nir_metadata_none;
 286
 287    /* create start & end blocks */
 288    nir_block *start_block = nir_block_create(shader);
 289    nir_block *end_block = nir_block_create(shader);
 290    start_block->cf_node.parent = &impl->cf_node;
 291    end_block->cf_node.parent = &impl->cf_node;
 292    impl->end_block = end_block;
 293
 294    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 295
 296    start_block->successors[0] = end_block;
 297    _mesa_set_add(end_block->predecessors, start_block);
 298    return impl;
 299 }
 300
 301 nir_function_impl *
 302 nir_function_impl_create(nir_function *function)
 303 {
 304    assert(function->impl == NULL);
 305
 306    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 307
 308    function->impl = impl;
 309    impl->function = function;
 310
 311    impl->num_params = function->num_params;
 312    impl->params = ralloc_array(function->shader,
 313                                nir_variable *, impl->num_params);
 314
 315    for (unsigned i = 0; i < impl->num_params; i++) {
 316       impl->params[i] = rzalloc(function->shader, nir_variable);
 317       impl->params[i]->type = function->params[i].type;
 318       impl->params[i]->data.mode = nir_var_param;
 319       impl->params[i]->data.location = i;
 320    }
 321
 322    if (!glsl_type_is_void(function->return_type)) {
 323       impl->return_var = rzalloc(function->shader, nir_variable);
 324       impl->return_var->type = function->return_type;
 325       impl->return_var->data.mode = nir_var_param;
 326       impl->return_var->data.location = -1;
 327    } else {
 328       impl->return_var = NULL;
 329    }
 330
 331    return impl;
 332 }
 333
 334 nir_block *
 335 nir_block_create(nir_shader *shader)
 336 {
 337    nir_block *block = ralloc(shader, nir_block);
 338
 339    cf_init(&block->cf_node, nir_cf_node_block);
 340
 341    block->successors[0] = block->successors[1] = NULL;
 342    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 343                                           _mesa_key_pointer_equal);
 344    block->imm_dom = NULL;
 345    /* XXX maybe it would be worth it to defer allocation?  This
 346     * way it doesn't get allocated for shader ref's that never run
 347     * nir_calc_dominance?  For example, state-tracker creates an
 348     * initial IR, clones that, runs appropriate lowering pass, passes
 349     * to driver which does common lowering/opt, and then stores ref
 350     * which is later used to do state specific lowering and futher
 351     * opt.  Do any of the references not need dominance metadata?
 352     */
 353    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 354                                           _mesa_key_pointer_equal);
 355
 356    exec_list_make_empty(&block->instr_list);
 357
 358    return block;
 359 }
 360
 361 static inline void
 362 src_init(nir_src *src)
 363 {
 364    src->is_ssa = false;
 365    src->reg.reg = NULL;
 366    src->reg.indirect = NULL;
 367    src->reg.base_offset = 0;
 368 }
 369
 370 nir_if *
 371 nir_if_create(nir_shader *shader)
 372 {
 373    nir_if *if_stmt = ralloc(shader, nir_if);
 374
 375    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 376    src_init(&if_stmt->condition);
 377
 378    nir_block *then = nir_block_create(shader);
 379    exec_list_make_empty(&if_stmt->then_list);
 380    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 381    then->cf_node.parent = &if_stmt->cf_node;
 382
 383    nir_block *else_stmt = nir_block_create(shader);
 384    exec_list_make_empty(&if_stmt->else_list);
 385    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 386    else_stmt->cf_node.parent = &if_stmt->cf_node;
 387
 388    return if_stmt;
 389 }
 390
 391 nir_loop *
 392 nir_loop_create(nir_shader *shader)
 393 {
 394    nir_loop *loop = ralloc(shader, nir_loop);
 395
 396    cf_init(&loop->cf_node, nir_cf_node_loop);
 397
 398    nir_block *body = nir_block_create(shader);
 399    exec_list_make_empty(&loop->body);
 400    exec_list_push_tail(&loop->body, &body->cf_node.node);
 401    body->cf_node.parent = &loop->cf_node;
 402
 403    body->successors[0] = body;
 404    _mesa_set_add(body->predecessors, body);
 405
 406    return loop;
 407 }
 408
 409 static void
 410 instr_init(nir_instr *instr, nir_instr_type type)
 411 {
 412    instr->type = type;
 413    instr->block = NULL;
 414    exec_node_init(&instr->node);
 415 }
 416
 417 static void
 418 dest_init(nir_dest *dest)
 419 {
 420    dest->is_ssa = false;
 421    dest->reg.reg = NULL;
 422    dest->reg.indirect = NULL;
 423    dest->reg.base_offset = 0;
 424 }
 425
 426 static void
 427 alu_dest_init(nir_alu_dest *dest)
 428 {
 429    dest_init(&dest->dest);
 430    dest->saturate = false;
 431    dest->write_mask = 0xf;
 432 }
 433
 434 static void
 435 alu_src_init(nir_alu_src *src)
 436 {
 437    src_init(&src->src);
 438    src->abs = src->negate = false;
 439    src->swizzle[0] = 0;
 440    src->swizzle[1] = 1;
 441    src->swizzle[2] = 2;
 442    src->swizzle[3] = 3;
 443 }
 444
 445 nir_alu_instr *
 446 nir_alu_instr_create(nir_shader *shader, nir_op op)
 447 {
 448    unsigned num_srcs = nir_op_infos[op].num_inputs;
 449    nir_alu_instr *instr =
 450       ralloc_size(shader,
 451                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 452
 453    instr_init(&instr->instr, nir_instr_type_alu);
 454    instr->op = op;
 455    alu_dest_init(&instr->dest);
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       alu_src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_jump_instr *
 463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 464 {
 465    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 466    instr_init(&instr->instr, nir_instr_type_jump);
 467    instr->type = type;
 468    return instr;
 469 }
 470
 471 nir_load_const_instr *
 472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
 473                             unsigned bit_size)
 474 {
 475    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 476    instr_init(&instr->instr, nir_instr_type_load_const);
 477
 478    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 479
 480    return instr;
 481 }
 482
 483 nir_intrinsic_instr *
 484 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 485 {
 486    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 487    nir_intrinsic_instr *instr =
 488       ralloc_size(shader,
 489                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 490
 491    instr_init(&instr->instr, nir_instr_type_intrinsic);
 492    instr->intrinsic = op;
 493
 494    if (nir_intrinsic_infos[op].has_dest)
 495       dest_init(&instr->dest);
 496
 497    for (unsigned i = 0; i < num_srcs; i++)
 498       src_init(&instr->src[i]);
 499
 500    return instr;
 501 }
 502
 503 nir_call_instr *
 504 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 505 {
 506    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 507    instr_init(&instr->instr, nir_instr_type_call);
 508
 509    instr->callee = callee;
 510    instr->num_params = callee->num_params;
 511    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 512    instr->return_deref = NULL;
 513
 514    return instr;
 515 }
 516
 517 nir_tex_instr *
 518 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 519 {
 520    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 521    instr_init(&instr->instr, nir_instr_type_tex);
 522
 523    dest_init(&instr->dest);
 524
 525    instr->num_srcs = num_srcs;
 526    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 527    for (unsigned i = 0; i < num_srcs; i++)
 528       src_init(&instr->src[i].src);
 529
 530    instr->texture_index = 0;
 531    instr->texture_array_size = 0;
 532    instr->texture = NULL;
 533    instr->sampler_index = 0;
 534    instr->sampler = NULL;
 535
 536    return instr;
 537 }
 538
 539 nir_phi_instr *
 540 nir_phi_instr_create(nir_shader *shader)
 541 {
 542    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 543    instr_init(&instr->instr, nir_instr_type_phi);
 544
 545    dest_init(&instr->dest);
 546    exec_list_make_empty(&instr->srcs);
 547    return instr;
 548 }
 549
 550 nir_parallel_copy_instr *
 551 nir_parallel_copy_instr_create(nir_shader *shader)
 552 {
 553    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 554    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 555
 556    exec_list_make_empty(&instr->entries);
 557
 558    return instr;
 559 }
 560
 561 nir_ssa_undef_instr *
 562 nir_ssa_undef_instr_create(nir_shader *shader,
 563                            unsigned num_components,
 564                            unsigned bit_size)
 565 {
 566    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 567    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 568
 569    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 570
 571    return instr;
 572 }
 573
 574 nir_deref_var *
 575 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 576 {
 577    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 578    deref->deref.deref_type = nir_deref_type_var;
 579    deref->deref.child = NULL;
 580    deref->deref.type = var->type;
 581    deref->var = var;
 582    return deref;
 583 }
 584
 585 nir_deref_array *
 586 nir_deref_array_create(void *mem_ctx)
 587 {
 588    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 589    deref->deref.deref_type = nir_deref_type_array;
 590    deref->deref.child = NULL;
 591    deref->deref_array_type = nir_deref_array_type_direct;
 592    src_init(&deref->indirect);
 593    deref->base_offset = 0;
 594    return deref;
 595 }
 596
 597 nir_deref_struct *
 598 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 599 {
 600    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 601    deref->deref.deref_type = nir_deref_type_struct;
 602    deref->deref.child = NULL;
 603    deref->index = field_index;
 604    return deref;
 605 }
 606
 607 static nir_deref_var *
 608 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 609 {
 610    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 611    ret->deref.type = deref->deref.type;
 612    if (deref->deref.child)
 613       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 614    return ret;
 615 }
 616
 617 static nir_deref_array *
 618 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 619 {
 620    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 621    ret->base_offset = deref->base_offset;
 622    ret->deref_array_type = deref->deref_array_type;
 623    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 624       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 625    }
 626    ret->deref.type = deref->deref.type;
 627    if (deref->deref.child)
 628       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 629    return ret;
 630 }
 631
 632 static nir_deref_struct *
 633 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 634 {
 635    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 636    ret->deref.type = deref->deref.type;
 637    if (deref->deref.child)
 638       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 639    return ret;
 640 }
 641
 642 nir_deref *
 643 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 644 {
 645    switch (deref->deref_type) {
 646    case nir_deref_type_var:
 647       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 648    case nir_deref_type_array:
 649       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 650    case nir_deref_type_struct:
 651       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 652    default:
 653       unreachable("Invalid dereference type");
 654    }
 655
 656    return NULL;
 657 }
 658
 659 /* Returns a load_const instruction that represents the constant
 660  * initializer for the given deref chain.  The caller is responsible for
 661  * ensuring that there actually is a constant initializer.
 662  */
 663 nir_load_const_instr *
 664 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 665 {
 666    nir_constant *constant = deref->var->constant_initializer;
 667    assert(constant);
 668
 669    const nir_deref *tail = &deref->deref;
 670    unsigned matrix_offset = 0;
 671    while (tail->child) {
 672       switch (tail->child->deref_type) {
 673       case nir_deref_type_array: {
 674          nir_deref_array *arr = nir_deref_as_array(tail->child);
 675          assert(arr->deref_array_type == nir_deref_array_type_direct);
 676          if (glsl_type_is_matrix(tail->type)) {
 677             assert(arr->deref.child == NULL);
 678             matrix_offset = arr->base_offset;
 679          } else {
 680             constant = constant->elements[arr->base_offset];
 681          }
 682          break;
 683       }
 684
 685       case nir_deref_type_struct: {
 686          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 687          break;
 688       }
 689
 690       default:
 691          unreachable("Invalid deref child type");
 692       }
 693
 694       tail = tail->child;
 695    }
 696
 697    unsigned bit_size = glsl_get_bit_size(tail->type);
 698    nir_load_const_instr *load =
 699       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
 700                                   bit_size);
 701
 702    matrix_offset *= load->def.num_components;
 703    for (unsigned i = 0; i < load->def.num_components; i++) {
 704       switch (glsl_get_base_type(tail->type)) {
 705       case GLSL_TYPE_FLOAT:
 706       case GLSL_TYPE_INT:
 707       case GLSL_TYPE_UINT:
 708          load->value.u32[i] = constant->value.u[matrix_offset + i];
 709          break;
 710       case GLSL_TYPE_DOUBLE:
 711          load->value.f64[i] = constant->value.d[matrix_offset + i];
 712          break;
 713       case GLSL_TYPE_BOOL:
 714          load->value.u32[i] = constant->value.b[matrix_offset + i] ?
 715                              NIR_TRUE : NIR_FALSE;
 716          break;
 717       default:
 718          unreachable("Invalid immediate type");
 719       }
 720    }
 721
 722    return load;
 723 }
 724
 725 nir_function_impl *
 726 nir_cf_node_get_function(nir_cf_node *node)
 727 {
 728    while (node->type != nir_cf_node_function) {
 729       node = node->parent;
 730    }
 731
 732    return nir_cf_node_as_function(node);
 733 }
 734
 735 /* Reduces a cursor by trying to convert everything to after and trying to
 736  * go up to block granularity when possible.
 737  */
 738 static nir_cursor
 739 reduce_cursor(nir_cursor cursor)
 740 {
 741    switch (cursor.option) {
 742    case nir_cursor_before_block:
 743       assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
 744              nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
 745       if (exec_list_is_empty(&cursor.block->instr_list)) {
 746          /* Empty block.  After is as good as before. */
 747          cursor.option = nir_cursor_after_block;
 748       }
 749       return cursor;
 750
 751    case nir_cursor_after_block:
 752       return cursor;
 753
 754    case nir_cursor_before_instr: {
 755       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 756       if (prev_instr) {
 757          /* Before this instruction is after the previous */
 758          cursor.instr = prev_instr;
 759          cursor.option = nir_cursor_after_instr;
 760       } else {
 761          /* No previous instruction.  Switch to before block */
 762          cursor.block = cursor.instr->block;
 763          cursor.option = nir_cursor_before_block;
 764       }
 765       return reduce_cursor(cursor);
 766    }
 767
 768    case nir_cursor_after_instr:
 769       if (nir_instr_next(cursor.instr) == NULL) {
 770          /* This is the last instruction, switch to after block */
 771          cursor.option = nir_cursor_after_block;
 772          cursor.block = cursor.instr->block;
 773       }
 774       return cursor;
 775
 776    default:
 777       unreachable("Inavlid cursor option");
 778    }
 779 }
 780
 781 bool
 782 nir_cursors_equal(nir_cursor a, nir_cursor b)
 783 {
 784    /* Reduced cursors should be unique */
 785    a = reduce_cursor(a);
 786    b = reduce_cursor(b);
 787
 788    return a.block == b.block && a.option == b.option;
 789 }
 790
 791 static bool
 792 add_use_cb(nir_src *src, void *state)
 793 {
 794    nir_instr *instr = state;
 795
 796    src->parent_instr = instr;
 797    list_addtail(&src->use_link,
 798                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 799
 800    return true;
 801 }
 802
 803 static bool
 804 add_ssa_def_cb(nir_ssa_def *def, void *state)
 805 {
 806    nir_instr *instr = state;
 807
 808    if (instr->block && def->index == UINT_MAX) {
 809       nir_function_impl *impl =
 810          nir_cf_node_get_function(&instr->block->cf_node);
 811
 812       def->index = impl->ssa_alloc++;
 813    }
 814
 815    return true;
 816 }
 817
 818 static bool
 819 add_reg_def_cb(nir_dest *dest, void *state)
 820 {
 821    nir_instr *instr = state;
 822
 823    if (!dest->is_ssa) {
 824       dest->reg.parent_instr = instr;
 825       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 826    }
 827
 828    return true;
 829 }
 830
 831 static void
 832 add_defs_uses(nir_instr *instr)
 833 {
 834    nir_foreach_src(instr, add_use_cb, instr);
 835    nir_foreach_dest(instr, add_reg_def_cb, instr);
 836    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 837 }
 838
 839 void
 840 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 841 {
 842    switch (cursor.option) {
 843    case nir_cursor_before_block:
 844       /* Only allow inserting jumps into empty blocks. */
 845       if (instr->type == nir_instr_type_jump)
 846          assert(exec_list_is_empty(&cursor.block->instr_list));
 847
 848       instr->block = cursor.block;
 849       add_defs_uses(instr);
 850       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 851       break;
 852    case nir_cursor_after_block: {
 853       /* Inserting instructions after a jump is illegal. */
 854       nir_instr *last = nir_block_last_instr(cursor.block);
 855       assert(last == NULL || last->type != nir_instr_type_jump);
 856       (void) last;
 857
 858       instr->block = cursor.block;
 859       add_defs_uses(instr);
 860       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 861       break;
 862    }
 863    case nir_cursor_before_instr:
 864       assert(instr->type != nir_instr_type_jump);
 865       instr->block = cursor.instr->block;
 866       add_defs_uses(instr);
 867       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 868       break;
 869    case nir_cursor_after_instr:
 870       /* Inserting instructions after a jump is illegal. */
 871       assert(cursor.instr->type != nir_instr_type_jump);
 872
 873       /* Only allow inserting jumps at the end of the block. */
 874       if (instr->type == nir_instr_type_jump)
 875          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 876
 877       instr->block = cursor.instr->block;
 878       add_defs_uses(instr);
 879       exec_node_insert_after(&cursor.instr->node, &instr->node);
 880       break;
 881    }
 882
 883    if (instr->type == nir_instr_type_jump)
 884       nir_handle_add_jump(instr->block);
 885 }
 886
 887 static bool
 888 src_is_valid(const nir_src *src)
 889 {
 890    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 891 }
 892
 893 static bool
 894 remove_use_cb(nir_src *src, void *state)
 895 {
 896    if (src_is_valid(src))
 897       list_del(&src->use_link);
 898
 899    return true;
 900 }
 901
 902 static bool
 903 remove_def_cb(nir_dest *dest, void *state)
 904 {
 905    if (!dest->is_ssa)
 906       list_del(&dest->reg.def_link);
 907
 908    return true;
 909 }
 910
 911 static void
 912 remove_defs_uses(nir_instr *instr)
 913 {
 914    nir_foreach_dest(instr, remove_def_cb, instr);
 915    nir_foreach_src(instr, remove_use_cb, instr);
 916 }
 917
 918 void nir_instr_remove(nir_instr *instr)
 919 {
 920    remove_defs_uses(instr);
 921    exec_node_remove(&instr->node);
 922
 923    if (instr->type == nir_instr_type_jump) {
 924       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 925       nir_handle_remove_jump(instr->block, jump_instr->type);
 926    }
 927 }
 928
 929 /*@}*/
 930
 931 void
 932 nir_index_local_regs(nir_function_impl *impl)
 933 {
 934    unsigned index = 0;
 935    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 936       reg->index = index++;
 937    }
 938    impl->reg_alloc = index;
 939 }
 940
 941 void
 942 nir_index_global_regs(nir_shader *shader)
 943 {
 944    unsigned index = 0;
 945    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 946       reg->index = index++;
 947    }
 948    shader->reg_alloc = index;
 949 }
 950
 951 static bool
 952 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 953 {
 954    return cb(&instr->dest.dest, state);
 955 }
 956
 957 static bool
 958 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 959                      void *state)
 960 {
 961    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 962       return cb(&instr->dest, state);
 963
 964    return true;
 965 }
 966
 967 static bool
 968 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 969                    void *state)
 970 {
 971    return cb(&instr->dest, state);
 972 }
 973
 974 static bool
 975 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 976 {
 977    return cb(&instr->dest, state);
 978 }
 979
 980 static bool
 981 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 982                          nir_foreach_dest_cb cb, void *state)
 983 {
 984    nir_foreach_parallel_copy_entry(entry, instr) {
 985       if (!cb(&entry->dest, state))
 986          return false;
 987    }
 988
 989    return true;
 990 }
 991
 992 bool
 993 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 994 {
 995    switch (instr->type) {
 996    case nir_instr_type_alu:
 997       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 998    case nir_instr_type_intrinsic:
 999       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1000    case nir_instr_type_tex:
1001       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1002    case nir_instr_type_phi:
1003       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1004    case nir_instr_type_parallel_copy:
1005       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1006                                       cb, state);
1007
1008    case nir_instr_type_load_const:
1009    case nir_instr_type_ssa_undef:
1010    case nir_instr_type_call:
1011    case nir_instr_type_jump:
1012       break;
1013
1014    default:
1015       unreachable("Invalid instruction type");
1016       break;
1017    }
1018
1019    return true;
1020 }
1021
1022 struct foreach_ssa_def_state {
1023    nir_foreach_ssa_def_cb cb;
1024    void *client_state;
1025 };
1026
1027 static inline bool
1028 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1029 {
1030    struct foreach_ssa_def_state *state = void_state;
1031
1032    if (dest->is_ssa)
1033       return state->cb(&dest->ssa, state->client_state);
1034    else
1035       return true;
1036 }
1037
1038 bool
1039 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1040 {
1041    switch (instr->type) {
1042    case nir_instr_type_alu:
1043    case nir_instr_type_tex:
1044    case nir_instr_type_intrinsic:
1045    case nir_instr_type_phi:
1046    case nir_instr_type_parallel_copy: {
1047       struct foreach_ssa_def_state foreach_state = {cb, state};
1048       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1049    }
1050
1051    case nir_instr_type_load_const:
1052       return cb(&nir_instr_as_load_const(instr)->def, state);
1053    case nir_instr_type_ssa_undef:
1054       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1055    case nir_instr_type_call:
1056    case nir_instr_type_jump:
1057       return true;
1058    default:
1059       unreachable("Invalid instruction type");
1060    }
1061 }
1062
1063 static bool
1064 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1065 {
1066    if (!cb(src, state))
1067       return false;
1068    if (!src->is_ssa && src->reg.indirect)
1069       return cb(src->reg.indirect, state);
1070    return true;
1071 }
1072
1073 static bool
1074 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1075                       void *state)
1076 {
1077    if (deref->deref_array_type == nir_deref_array_type_indirect)
1078       return visit_src(&deref->indirect, cb, state);
1079    return true;
1080 }
1081
1082 static bool
1083 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1084 {
1085    nir_deref *cur = &deref->deref;
1086    while (cur != NULL) {
1087       if (cur->deref_type == nir_deref_type_array) {
1088          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1089             return false;
1090       }
1091
1092       cur = cur->child;
1093    }
1094
1095    return true;
1096 }
1097
1098 static bool
1099 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1100 {
1101    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1102       if (!visit_src(&instr->src[i].src, cb, state))
1103          return false;
1104
1105    return true;
1106 }
1107
1108 static bool
1109 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1110 {
1111    for (unsigned i = 0; i < instr->num_srcs; i++) {
1112       if (!visit_src(&instr->src[i].src, cb, state))
1113          return false;
1114    }
1115
1116    if (instr->texture != NULL) {
1117       if (!visit_deref_src(instr->texture, cb, state))
1118          return false;
1119    }
1120
1121    if (instr->sampler != NULL) {
1122       if (!visit_deref_src(instr->sampler, cb, state))
1123          return false;
1124    }
1125
1126    return true;
1127 }
1128
1129 static bool
1130 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1131                     void *state)
1132 {
1133    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1134    for (unsigned i = 0; i < num_srcs; i++) {
1135       if (!visit_src(&instr->src[i], cb, state))
1136          return false;
1137    }
1138
1139    unsigned num_vars =
1140       nir_intrinsic_infos[instr->intrinsic].num_variables;
1141    for (unsigned i = 0; i < num_vars; i++) {
1142       if (!visit_deref_src(instr->variables[i], cb, state))
1143          return false;
1144    }
1145
1146    return true;
1147 }
1148
1149 static bool
1150 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1151 {
1152    return true;
1153 }
1154
1155 static bool
1156 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1157                      void *state)
1158 {
1159    return true;
1160 }
1161
1162 static bool
1163 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1164 {
1165    nir_foreach_phi_src(src, instr) {
1166       if (!visit_src(&src->src, cb, state))
1167          return false;
1168    }
1169
1170    return true;
1171 }
1172
1173 static bool
1174 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1175                         nir_foreach_src_cb cb, void *state)
1176 {
1177    nir_foreach_parallel_copy_entry(entry, instr) {
1178       if (!visit_src(&entry->src, cb, state))
1179          return false;
1180    }
1181
1182    return true;
1183 }
1184
1185 typedef struct {
1186    void *state;
1187    nir_foreach_src_cb cb;
1188 } visit_dest_indirect_state;
1189
1190 static bool
1191 visit_dest_indirect(nir_dest *dest, void *_state)
1192 {
1193    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1194
1195    if (!dest->is_ssa && dest->reg.indirect)
1196       return state->cb(dest->reg.indirect, state->state);
1197
1198    return true;
1199 }
1200
1201 bool
1202 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1203 {
1204    switch (instr->type) {
1205    case nir_instr_type_alu:
1206       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1207          return false;
1208       break;
1209    case nir_instr_type_intrinsic:
1210       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1211          return false;
1212       break;
1213    case nir_instr_type_tex:
1214       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1215          return false;
1216       break;
1217    case nir_instr_type_call:
1218       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1219          return false;
1220       break;
1221    case nir_instr_type_load_const:
1222       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1223          return false;
1224       break;
1225    case nir_instr_type_phi:
1226       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1227          return false;
1228       break;
1229    case nir_instr_type_parallel_copy:
1230       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1231                                    cb, state))
1232          return false;
1233       break;
1234    case nir_instr_type_jump:
1235    case nir_instr_type_ssa_undef:
1236       return true;
1237
1238    default:
1239       unreachable("Invalid instruction type");
1240       break;
1241    }
1242
1243    visit_dest_indirect_state dest_state;
1244    dest_state.state = state;
1245    dest_state.cb = cb;
1246    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1247 }
1248
1249 nir_const_value *
1250 nir_src_as_const_value(nir_src src)
1251 {
1252    if (!src.is_ssa)
1253       return NULL;
1254
1255    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1256       return NULL;
1257
1258    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1259
1260    return &load->value;
1261 }
1262
1263 /**
1264  * Returns true if the source is known to be dynamically uniform. Otherwise it
1265  * returns false which means it may or may not be dynamically uniform but it
1266  * can't be determined.
1267  */
1268 bool
1269 nir_src_is_dynamically_uniform(nir_src src)
1270 {
1271    if (!src.is_ssa)
1272       return false;
1273
1274    /* Constants are trivially dynamically uniform */
1275    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1276       return true;
1277
1278    /* As are uniform variables */
1279    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1280       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1281
1282       if (intr->intrinsic == nir_intrinsic_load_uniform)
1283          return true;
1284    }
1285
1286    /* XXX: this could have many more tests, such as when a sampler function is
1287     * called with dynamically uniform arguments.
1288     */
1289    return false;
1290 }
1291
1292 static void
1293 src_remove_all_uses(nir_src *src)
1294 {
1295    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1296       if (!src_is_valid(src))
1297          continue;
1298
1299       list_del(&src->use_link);
1300    }
1301 }
1302
1303 static void
1304 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1305 {
1306    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1307       if (!src_is_valid(src))
1308          continue;
1309
1310       if (parent_instr) {
1311          src->parent_instr = parent_instr;
1312          if (src->is_ssa)
1313             list_addtail(&src->use_link, &src->ssa->uses);
1314          else
1315             list_addtail(&src->use_link, &src->reg.reg->uses);
1316       } else {
1317          assert(parent_if);
1318          src->parent_if = parent_if;
1319          if (src->is_ssa)
1320             list_addtail(&src->use_link, &src->ssa->if_uses);
1321          else
1322             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1323       }
1324    }
1325 }
1326
1327 void
1328 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1329 {
1330    assert(!src_is_valid(src) || src->parent_instr == instr);
1331
1332    src_remove_all_uses(src);
1333    *src = new_src;
1334    src_add_all_uses(src, instr, NULL);
1335 }
1336
1337 void
1338 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1339 {
1340    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1341
1342    src_remove_all_uses(dest);
1343    src_remove_all_uses(src);
1344    *dest = *src;
1345    *src = NIR_SRC_INIT;
1346    src_add_all_uses(dest, dest_instr, NULL);
1347 }
1348
1349 void
1350 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1351 {
1352    nir_src *src = &if_stmt->condition;
1353    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1354
1355    src_remove_all_uses(src);
1356    *src = new_src;
1357    src_add_all_uses(src, NULL, if_stmt);
1358 }
1359
1360 void
1361 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1362 {
1363    if (dest->is_ssa) {
1364       /* We can only overwrite an SSA destination if it has no uses. */
1365       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1366    } else {
1367       list_del(&dest->reg.def_link);
1368       if (dest->reg.indirect)
1369          src_remove_all_uses(dest->reg.indirect);
1370    }
1371
1372    /* We can't re-write with an SSA def */
1373    assert(!new_dest.is_ssa);
1374
1375    nir_dest_copy(dest, &new_dest, instr);
1376
1377    dest->reg.parent_instr = instr;
1378    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1379
1380    if (dest->reg.indirect)
1381       src_add_all_uses(dest->reg.indirect, instr, NULL);
1382 }
1383
1384 /* note: does *not* take ownership of 'name' */
1385 void
1386 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1387                  unsigned num_components,
1388                  unsigned bit_size, const char *name)
1389 {
1390    def->name = ralloc_strdup(instr, name);
1391    def->parent_instr = instr;
1392    list_inithead(&def->uses);
1393    list_inithead(&def->if_uses);
1394    def->num_components = num_components;
1395    def->bit_size = bit_size;
1396
1397    if (instr->block) {
1398       nir_function_impl *impl =
1399          nir_cf_node_get_function(&instr->block->cf_node);
1400
1401       def->index = impl->ssa_alloc++;
1402    } else {
1403       def->index = UINT_MAX;
1404    }
1405 }
1406
1407 /* note: does *not* take ownership of 'name' */
1408 void
1409 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1410                  unsigned num_components, unsigned bit_size,
1411                  const char *name)
1412 {
1413    dest->is_ssa = true;
1414    nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1415 }
1416
1417 void
1418 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1419 {
1420    assert(!new_src.is_ssa || def != new_src.ssa);
1421
1422    nir_foreach_use_safe(use_src, def)
1423       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1424
1425    nir_foreach_if_use_safe(use_src, def)
1426       nir_if_rewrite_condition(use_src->parent_if, new_src);
1427 }
1428
1429 static bool
1430 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1431 {
1432    assert(start->block == end->block);
1433
1434    if (between->block != start->block)
1435       return false;
1436
1437    /* Search backwards looking for "between" */
1438    while (start != end) {
1439       if (between == end)
1440          return true;
1441
1442       end = nir_instr_prev(end);
1443       assert(end);
1444    }
1445
1446    return false;
1447 }
1448
1449 /* Replaces all uses of the given SSA def with the given source but only if
1450  * the use comes after the after_me instruction.  This can be useful if you
1451  * are emitting code to fix up the result of some instruction: you can freely
1452  * use the result in that code and then call rewrite_uses_after and pass the
1453  * last fixup instruction as after_me and it will replace all of the uses you
1454  * want without touching the fixup code.
1455  *
1456  * This function assumes that after_me is in the same block as
1457  * def->parent_instr and that after_me comes after def->parent_instr.
1458  */
1459 void
1460 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1461                                nir_instr *after_me)
1462 {
1463    assert(!new_src.is_ssa || def != new_src.ssa);
1464
1465    nir_foreach_use_safe(use_src, def) {
1466       assert(use_src->parent_instr != def->parent_instr);
1467       /* Since def already dominates all of its uses, the only way a use can
1468        * not be dominated by after_me is if it is between def and after_me in
1469        * the instruction list.
1470        */
1471       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1472          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1473    }
1474
1475    nir_foreach_if_use_safe(use_src, def)
1476       nir_if_rewrite_condition(use_src->parent_if, new_src);
1477 }
1478
1479 uint8_t
1480 nir_ssa_def_components_read(nir_ssa_def *def)
1481 {
1482    uint8_t read_mask = 0;
1483    nir_foreach_use(use, def) {
1484       if (use->parent_instr->type == nir_instr_type_alu) {
1485          nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1486          nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1487          int src_idx = alu_src - &alu->src[0];
1488          assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1489
1490          for (unsigned c = 0; c < 4; c++) {
1491             if (!nir_alu_instr_channel_used(alu, src_idx, c))
1492                continue;
1493
1494             read_mask |= (1 << alu_src->swizzle[c]);
1495          }
1496       } else {
1497          return (1 << def->num_components) - 1;
1498       }
1499    }
1500
1501    return read_mask;
1502 }
1503
1504 nir_block *
1505 nir_block_cf_tree_next(nir_block *block)
1506 {
1507    if (block == NULL) {
1508       /* nir_foreach_block_safe() will call this function on a NULL block
1509        * after the last iteration, but it won't use the result so just return
1510        * NULL here.
1511        */
1512       return NULL;
1513    }
1514
1515    nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1516    if (cf_next)
1517       return nir_cf_node_cf_tree_first(cf_next);
1518
1519    nir_cf_node *parent = block->cf_node.parent;
1520
1521    switch (parent->type) {
1522    case nir_cf_node_if: {
1523       /* Are we at the end of the if? Go to the beginning of the else */
1524       nir_if *if_stmt = nir_cf_node_as_if(parent);
1525       if (&block->cf_node == nir_if_last_then_node(if_stmt))
1526          return nir_cf_node_as_block(nir_if_first_else_node(if_stmt));
1527
1528       assert(&block->cf_node == nir_if_last_else_node(if_stmt));
1529       /* fall through */
1530    }
1531
1532    case nir_cf_node_loop:
1533       return nir_cf_node_as_block(nir_cf_node_next(parent));
1534
1535    case nir_cf_node_function:
1536       return NULL;
1537
1538    default:
1539       unreachable("unknown cf node type");
1540    }
1541 }
1542
1543 nir_block *
1544 nir_block_cf_tree_prev(nir_block *block)
1545 {
1546    if (block == NULL) {
1547       /* do this for consistency with nir_block_cf_tree_next() */
1548       return NULL;
1549    }
1550
1551    nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1552    if (cf_prev)
1553       return nir_cf_node_cf_tree_last(cf_prev);
1554
1555    nir_cf_node *parent = block->cf_node.parent;
1556
1557    switch (parent->type) {
1558    case nir_cf_node_if: {
1559       /* Are we at the beginning of the else? Go to the end of the if */
1560       nir_if *if_stmt = nir_cf_node_as_if(parent);
1561       if (&block->cf_node == nir_if_first_else_node(if_stmt))
1562          return nir_cf_node_as_block(nir_if_last_then_node(if_stmt));
1563
1564       assert(&block->cf_node == nir_if_first_then_node(if_stmt));
1565       /* fall through */
1566    }
1567
1568    case nir_cf_node_loop:
1569       return nir_cf_node_as_block(nir_cf_node_prev(parent));
1570
1571    case nir_cf_node_function:
1572       return NULL;
1573
1574    default:
1575       unreachable("unknown cf node type");
1576    }
1577 }
1578
1579 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1580 {
1581    switch (node->type) {
1582    case nir_cf_node_function: {
1583       nir_function_impl *impl = nir_cf_node_as_function(node);
1584       return nir_start_block(impl);
1585    }
1586
1587    case nir_cf_node_if: {
1588       nir_if *if_stmt = nir_cf_node_as_if(node);
1589       return nir_cf_node_as_block(nir_if_first_then_node(if_stmt));
1590    }
1591
1592    case nir_cf_node_loop: {
1593       nir_loop *loop = nir_cf_node_as_loop(node);
1594       return nir_cf_node_as_block(nir_loop_first_cf_node(loop));
1595    }
1596
1597    case nir_cf_node_block: {
1598       return nir_cf_node_as_block(node);
1599    }
1600
1601    default:
1602       unreachable("unknown node type");
1603    }
1604 }
1605
1606 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1607 {
1608    switch (node->type) {
1609    case nir_cf_node_function: {
1610       nir_function_impl *impl = nir_cf_node_as_function(node);
1611       return nir_impl_last_block(impl);
1612    }
1613
1614    case nir_cf_node_if: {
1615       nir_if *if_stmt = nir_cf_node_as_if(node);
1616       return nir_cf_node_as_block(nir_if_last_else_node(if_stmt));
1617    }
1618
1619    case nir_cf_node_loop: {
1620       nir_loop *loop = nir_cf_node_as_loop(node);
1621       return nir_cf_node_as_block(nir_loop_last_cf_node(loop));
1622    }
1623
1624    case nir_cf_node_block: {
1625       return nir_cf_node_as_block(node);
1626    }
1627
1628    default:
1629       unreachable("unknown node type");
1630    }
1631 }
1632
1633 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1634 {
1635    if (node->type == nir_cf_node_block)
1636       return nir_cf_node_cf_tree_first(nir_cf_node_next(node));
1637    else if (node->type == nir_cf_node_function)
1638       return NULL;
1639    else
1640       return nir_cf_node_as_block(nir_cf_node_next(node));
1641 }
1642
1643 nir_if *
1644 nir_block_get_following_if(nir_block *block)
1645 {
1646    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1647       return NULL;
1648
1649    if (nir_cf_node_is_last(&block->cf_node))
1650       return NULL;
1651
1652    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1653
1654    if (next_node->type != nir_cf_node_if)
1655       return NULL;
1656
1657    return nir_cf_node_as_if(next_node);
1658 }
1659
1660 nir_loop *
1661 nir_block_get_following_loop(nir_block *block)
1662 {
1663    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1664       return NULL;
1665
1666    if (nir_cf_node_is_last(&block->cf_node))
1667       return NULL;
1668
1669    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1670
1671    if (next_node->type != nir_cf_node_loop)
1672       return NULL;
1673
1674    return nir_cf_node_as_loop(next_node);
1675 }
1676
1677 void
1678 nir_index_blocks(nir_function_impl *impl)
1679 {
1680    unsigned index = 0;
1681
1682    if (impl->valid_metadata & nir_metadata_block_index)
1683       return;
1684
1685    nir_foreach_block(block, impl) {
1686       block->index = index++;
1687    }
1688
1689    impl->num_blocks = index;
1690 }
1691
1692 static bool
1693 index_ssa_def_cb(nir_ssa_def *def, void *state)
1694 {
1695    unsigned *index = (unsigned *) state;
1696    def->index = (*index)++;
1697
1698    return true;
1699 }
1700
1701 /**
1702  * The indices are applied top-to-bottom which has the very nice property
1703  * that, if A dominates B, then A->index <= B->index.
1704  */
1705 void
1706 nir_index_ssa_defs(nir_function_impl *impl)
1707 {
1708    unsigned index = 0;
1709
1710    nir_foreach_block(block, impl) {
1711       nir_foreach_instr(instr, block)
1712          nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1713    }
1714
1715    impl->ssa_alloc = index;
1716 }
1717
1718 /**
1719  * The indices are applied top-to-bottom which has the very nice property
1720  * that, if A dominates B, then A->index <= B->index.
1721  */
1722 unsigned
1723 nir_index_instrs(nir_function_impl *impl)
1724 {
1725    unsigned index = 0;
1726
1727    nir_foreach_block(block, impl) {
1728       nir_foreach_instr(instr, block)
1729          instr->index = index++;
1730    }
1731
1732    return index;
1733 }
1734
1735 nir_intrinsic_op
1736 nir_intrinsic_from_system_value(gl_system_value val)
1737 {
1738    switch (val) {
1739    case SYSTEM_VALUE_VERTEX_ID:
1740       return nir_intrinsic_load_vertex_id;
1741    case SYSTEM_VALUE_INSTANCE_ID:
1742       return nir_intrinsic_load_instance_id;
1743    case SYSTEM_VALUE_DRAW_ID:
1744       return nir_intrinsic_load_draw_id;
1745    case SYSTEM_VALUE_BASE_INSTANCE:
1746       return nir_intrinsic_load_base_instance;
1747    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1748       return nir_intrinsic_load_vertex_id_zero_base;
1749    case SYSTEM_VALUE_BASE_VERTEX:
1750       return nir_intrinsic_load_base_vertex;
1751    case SYSTEM_VALUE_INVOCATION_ID:
1752       return nir_intrinsic_load_invocation_id;
1753    case SYSTEM_VALUE_FRONT_FACE:
1754       return nir_intrinsic_load_front_face;
1755    case SYSTEM_VALUE_SAMPLE_ID:
1756       return nir_intrinsic_load_sample_id;
1757    case SYSTEM_VALUE_SAMPLE_POS:
1758       return nir_intrinsic_load_sample_pos;
1759    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1760       return nir_intrinsic_load_sample_mask_in;
1761    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1762       return nir_intrinsic_load_local_invocation_id;
1763    case SYSTEM_VALUE_WORK_GROUP_ID:
1764       return nir_intrinsic_load_work_group_id;
1765    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1766       return nir_intrinsic_load_num_work_groups;
1767    case SYSTEM_VALUE_PRIMITIVE_ID:
1768       return nir_intrinsic_load_primitive_id;
1769    case SYSTEM_VALUE_TESS_COORD:
1770       return nir_intrinsic_load_tess_coord;
1771    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1772       return nir_intrinsic_load_tess_level_outer;
1773    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1774       return nir_intrinsic_load_tess_level_inner;
1775    case SYSTEM_VALUE_VERTICES_IN:
1776       return nir_intrinsic_load_patch_vertices_in;
1777    case SYSTEM_VALUE_HELPER_INVOCATION:
1778       return nir_intrinsic_load_helper_invocation;
1779    default:
1780       unreachable("system value does not directly correspond to intrinsic");
1781    }
1782 }
1783
1784 gl_system_value
1785 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1786 {
1787    switch (intrin) {
1788    case nir_intrinsic_load_vertex_id:
1789       return SYSTEM_VALUE_VERTEX_ID;
1790    case nir_intrinsic_load_instance_id:
1791       return SYSTEM_VALUE_INSTANCE_ID;
1792    case nir_intrinsic_load_draw_id:
1793       return SYSTEM_VALUE_DRAW_ID;
1794    case nir_intrinsic_load_base_instance:
1795       return SYSTEM_VALUE_BASE_INSTANCE;
1796    case nir_intrinsic_load_vertex_id_zero_base:
1797       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1798    case nir_intrinsic_load_base_vertex:
1799       return SYSTEM_VALUE_BASE_VERTEX;
1800    case nir_intrinsic_load_invocation_id:
1801       return SYSTEM_VALUE_INVOCATION_ID;
1802    case nir_intrinsic_load_front_face:
1803       return SYSTEM_VALUE_FRONT_FACE;
1804    case nir_intrinsic_load_sample_id:
1805       return SYSTEM_VALUE_SAMPLE_ID;
1806    case nir_intrinsic_load_sample_pos:
1807       return SYSTEM_VALUE_SAMPLE_POS;
1808    case nir_intrinsic_load_sample_mask_in:
1809       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1810    case nir_intrinsic_load_local_invocation_id:
1811       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1812    case nir_intrinsic_load_num_work_groups:
1813       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1814    case nir_intrinsic_load_work_group_id:
1815       return SYSTEM_VALUE_WORK_GROUP_ID;
1816    case nir_intrinsic_load_primitive_id:
1817       return SYSTEM_VALUE_PRIMITIVE_ID;
1818    case nir_intrinsic_load_tess_coord:
1819       return SYSTEM_VALUE_TESS_COORD;
1820    case nir_intrinsic_load_tess_level_outer:
1821       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1822    case nir_intrinsic_load_tess_level_inner:
1823       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1824    case nir_intrinsic_load_patch_vertices_in:
1825       return SYSTEM_VALUE_VERTICES_IN;
1826    case nir_intrinsic_load_helper_invocation:
1827       return SYSTEM_VALUE_HELPER_INVOCATION;
1828    default:
1829       unreachable("intrinsic doesn't produce a system value");
1830    }
1831 }