src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->bit_size = 32;
  74    reg->num_array_elems = 0;
  75    reg->is_packed = false;
  76    reg->name = NULL;
  77
  78    exec_list_push_tail(list, &reg->node);
  79
  80    return reg;
  81 }
  82
  83 nir_register *
  84 nir_global_reg_create(nir_shader *shader)
  85 {
  86    nir_register *reg = reg_create(shader, &shader->registers);
  87    reg->index = shader->reg_alloc++;
  88    reg->is_global = true;
  89
  90    return reg;
  91 }
  92
  93 nir_register *
  94 nir_local_reg_create(nir_function_impl *impl)
  95 {
  96    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  97    reg->index = impl->reg_alloc++;
  98    reg->is_global = false;
  99
 100    return reg;
 101 }
 102
 103 void
 104 nir_reg_remove(nir_register *reg)
 105 {
 106    exec_node_remove(&reg->node);
 107 }
 108
 109 void
 110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 111 {
 112    switch (var->data.mode) {
 113    case nir_var_all:
 114       assert(!"invalid mode");
 115       break;
 116
 117    case nir_var_local:
 118       assert(!"nir_shader_add_variable cannot be used for local variables");
 119       break;
 120
 121    case nir_var_param:
 122       assert(!"nir_shader_add_variable cannot be used for function parameters");
 123       break;
 124
 125    case nir_var_global:
 126       exec_list_push_tail(&shader->globals, &var->node);
 127       break;
 128
 129    case nir_var_shader_in:
 130       exec_list_push_tail(&shader->inputs, &var->node);
 131       break;
 132
 133    case nir_var_shader_out:
 134       exec_list_push_tail(&shader->outputs, &var->node);
 135       break;
 136
 137    case nir_var_uniform:
 138    case nir_var_shader_storage:
 139       exec_list_push_tail(&shader->uniforms, &var->node);
 140       break;
 141
 142    case nir_var_shared:
 143       assert(shader->stage == MESA_SHADER_COMPUTE);
 144       exec_list_push_tail(&shader->shared, &var->node);
 145       break;
 146
 147    case nir_var_system_value:
 148       exec_list_push_tail(&shader->system_values, &var->node);
 149       break;
 150    }
 151 }
 152
 153 nir_variable *
 154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 155                     const struct glsl_type *type, const char *name)
 156 {
 157    nir_variable *var = rzalloc(shader, nir_variable);
 158    var->name = ralloc_strdup(var, name);
 159    var->type = type;
 160    var->data.mode = mode;
 161
 162    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 163        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 164       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 165
 166    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 167       var->data.read_only = true;
 168
 169    nir_shader_add_variable(shader, var);
 170
 171    return var;
 172 }
 173
 174 nir_variable *
 175 nir_local_variable_create(nir_function_impl *impl,
 176                           const struct glsl_type *type, const char *name)
 177 {
 178    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 179    var->name = ralloc_strdup(var, name);
 180    var->type = type;
 181    var->data.mode = nir_var_local;
 182
 183    nir_function_impl_add_variable(impl, var);
 184
 185    return var;
 186 }
 187
 188 nir_function *
 189 nir_function_create(nir_shader *shader, const char *name)
 190 {
 191    nir_function *func = ralloc(shader, nir_function);
 192
 193    exec_list_push_tail(&shader->functions, &func->node);
 194
 195    func->name = ralloc_strdup(func, name);
 196    func->shader = shader;
 197    func->num_params = 0;
 198    func->params = NULL;
 199    func->return_type = glsl_void_type();
 200    func->impl = NULL;
 201
 202    return func;
 203 }
 204
 205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 206 {
 207    dest->is_ssa = src->is_ssa;
 208    if (src->is_ssa) {
 209       dest->ssa = src->ssa;
 210    } else {
 211       dest->reg.base_offset = src->reg.base_offset;
 212       dest->reg.reg = src->reg.reg;
 213       if (src->reg.indirect) {
 214          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 215          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 216       } else {
 217          dest->reg.indirect = NULL;
 218       }
 219    }
 220 }
 221
 222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 223 {
 224    /* Copying an SSA definition makes no sense whatsoever. */
 225    assert(!src->is_ssa);
 226
 227    dest->is_ssa = false;
 228
 229    dest->reg.base_offset = src->reg.base_offset;
 230    dest->reg.reg = src->reg.reg;
 231    if (src->reg.indirect) {
 232       dest->reg.indirect = ralloc(instr, nir_src);
 233       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 234    } else {
 235       dest->reg.indirect = NULL;
 236    }
 237 }
 238
 239 void
 240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 241                  nir_alu_instr *instr)
 242 {
 243    nir_src_copy(&dest->src, &src->src, &instr->instr);
 244    dest->abs = src->abs;
 245    dest->negate = src->negate;
 246    for (unsigned i = 0; i < 4; i++)
 247       dest->swizzle[i] = src->swizzle[i];
 248 }
 249
 250 void
 251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 252                   nir_alu_instr *instr)
 253 {
 254    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 255    dest->write_mask = src->write_mask;
 256    dest->saturate = src->saturate;
 257 }
 258
 259
 260 static void
 261 cf_init(nir_cf_node *node, nir_cf_node_type type)
 262 {
 263    exec_node_init(&node->node);
 264    node->parent = NULL;
 265    node->type = type;
 266 }
 267
 268 nir_function_impl *
 269 nir_function_impl_create_bare(nir_shader *shader)
 270 {
 271    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 272
 273    impl->function = NULL;
 274
 275    cf_init(&impl->cf_node, nir_cf_node_function);
 276
 277    exec_list_make_empty(&impl->body);
 278    exec_list_make_empty(&impl->registers);
 279    exec_list_make_empty(&impl->locals);
 280    impl->num_params = 0;
 281    impl->params = NULL;
 282    impl->return_var = NULL;
 283    impl->reg_alloc = 0;
 284    impl->ssa_alloc = 0;
 285    impl->valid_metadata = nir_metadata_none;
 286
 287    /* create start & end blocks */
 288    nir_block *start_block = nir_block_create(shader);
 289    nir_block *end_block = nir_block_create(shader);
 290    start_block->cf_node.parent = &impl->cf_node;
 291    end_block->cf_node.parent = &impl->cf_node;
 292    impl->end_block = end_block;
 293
 294    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 295
 296    start_block->successors[0] = end_block;
 297    _mesa_set_add(end_block->predecessors, start_block);
 298    return impl;
 299 }
 300
 301 nir_function_impl *
 302 nir_function_impl_create(nir_function *function)
 303 {
 304    assert(function->impl == NULL);
 305
 306    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 307
 308    function->impl = impl;
 309    impl->function = function;
 310
 311    impl->num_params = function->num_params;
 312    impl->params = ralloc_array(function->shader,
 313                                nir_variable *, impl->num_params);
 314
 315    for (unsigned i = 0; i < impl->num_params; i++) {
 316       impl->params[i] = rzalloc(function->shader, nir_variable);
 317       impl->params[i]->type = function->params[i].type;
 318       impl->params[i]->data.mode = nir_var_param;
 319       impl->params[i]->data.location = i;
 320    }
 321
 322    if (!glsl_type_is_void(function->return_type)) {
 323       impl->return_var = rzalloc(function->shader, nir_variable);
 324       impl->return_var->type = function->return_type;
 325       impl->return_var->data.mode = nir_var_param;
 326       impl->return_var->data.location = -1;
 327    } else {
 328       impl->return_var = NULL;
 329    }
 330
 331    return impl;
 332 }
 333
 334 nir_block *
 335 nir_block_create(nir_shader *shader)
 336 {
 337    nir_block *block = ralloc(shader, nir_block);
 338
 339    cf_init(&block->cf_node, nir_cf_node_block);
 340
 341    block->successors[0] = block->successors[1] = NULL;
 342    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 343                                           _mesa_key_pointer_equal);
 344    block->imm_dom = NULL;
 345    /* XXX maybe it would be worth it to defer allocation?  This
 346     * way it doesn't get allocated for shader ref's that never run
 347     * nir_calc_dominance?  For example, state-tracker creates an
 348     * initial IR, clones that, runs appropriate lowering pass, passes
 349     * to driver which does common lowering/opt, and then stores ref
 350     * which is later used to do state specific lowering and futher
 351     * opt.  Do any of the references not need dominance metadata?
 352     */
 353    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 354                                           _mesa_key_pointer_equal);
 355
 356    exec_list_make_empty(&block->instr_list);
 357
 358    return block;
 359 }
 360
 361 static inline void
 362 src_init(nir_src *src)
 363 {
 364    src->is_ssa = false;
 365    src->reg.reg = NULL;
 366    src->reg.indirect = NULL;
 367    src->reg.base_offset = 0;
 368 }
 369
 370 nir_if *
 371 nir_if_create(nir_shader *shader)
 372 {
 373    nir_if *if_stmt = ralloc(shader, nir_if);
 374
 375    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 376    src_init(&if_stmt->condition);
 377
 378    nir_block *then = nir_block_create(shader);
 379    exec_list_make_empty(&if_stmt->then_list);
 380    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 381    then->cf_node.parent = &if_stmt->cf_node;
 382
 383    nir_block *else_stmt = nir_block_create(shader);
 384    exec_list_make_empty(&if_stmt->else_list);
 385    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 386    else_stmt->cf_node.parent = &if_stmt->cf_node;
 387
 388    return if_stmt;
 389 }
 390
 391 nir_loop *
 392 nir_loop_create(nir_shader *shader)
 393 {
 394    nir_loop *loop = ralloc(shader, nir_loop);
 395
 396    cf_init(&loop->cf_node, nir_cf_node_loop);
 397
 398    nir_block *body = nir_block_create(shader);
 399    exec_list_make_empty(&loop->body);
 400    exec_list_push_tail(&loop->body, &body->cf_node.node);
 401    body->cf_node.parent = &loop->cf_node;
 402
 403    body->successors[0] = body;
 404    _mesa_set_add(body->predecessors, body);
 405
 406    return loop;
 407 }
 408
 409 static void
 410 instr_init(nir_instr *instr, nir_instr_type type)
 411 {
 412    instr->type = type;
 413    instr->block = NULL;
 414    exec_node_init(&instr->node);
 415 }
 416
 417 static void
 418 dest_init(nir_dest *dest)
 419 {
 420    dest->is_ssa = false;
 421    dest->reg.reg = NULL;
 422    dest->reg.indirect = NULL;
 423    dest->reg.base_offset = 0;
 424 }
 425
 426 static void
 427 alu_dest_init(nir_alu_dest *dest)
 428 {
 429    dest_init(&dest->dest);
 430    dest->saturate = false;
 431    dest->write_mask = 0xf;
 432 }
 433
 434 static void
 435 alu_src_init(nir_alu_src *src)
 436 {
 437    src_init(&src->src);
 438    src->abs = src->negate = false;
 439    src->swizzle[0] = 0;
 440    src->swizzle[1] = 1;
 441    src->swizzle[2] = 2;
 442    src->swizzle[3] = 3;
 443 }
 444
 445 nir_alu_instr *
 446 nir_alu_instr_create(nir_shader *shader, nir_op op)
 447 {
 448    unsigned num_srcs = nir_op_infos[op].num_inputs;
 449    nir_alu_instr *instr =
 450       ralloc_size(shader,
 451                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 452
 453    instr_init(&instr->instr, nir_instr_type_alu);
 454    instr->op = op;
 455    alu_dest_init(&instr->dest);
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       alu_src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_jump_instr *
 463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 464 {
 465    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 466    instr_init(&instr->instr, nir_instr_type_jump);
 467    instr->type = type;
 468    return instr;
 469 }
 470
 471 nir_load_const_instr *
 472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 473 {
 474    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 475    instr_init(&instr->instr, nir_instr_type_load_const);
 476
 477    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 478
 479    return instr;
 480 }
 481
 482 nir_intrinsic_instr *
 483 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 484 {
 485    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 486    nir_intrinsic_instr *instr =
 487       ralloc_size(shader,
 488                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 489
 490    instr_init(&instr->instr, nir_instr_type_intrinsic);
 491    instr->intrinsic = op;
 492
 493    if (nir_intrinsic_infos[op].has_dest)
 494       dest_init(&instr->dest);
 495
 496    for (unsigned i = 0; i < num_srcs; i++)
 497       src_init(&instr->src[i]);
 498
 499    return instr;
 500 }
 501
 502 nir_call_instr *
 503 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 504 {
 505    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 506    instr_init(&instr->instr, nir_instr_type_call);
 507
 508    instr->callee = callee;
 509    instr->num_params = callee->num_params;
 510    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 511    instr->return_deref = NULL;
 512
 513    return instr;
 514 }
 515
 516 nir_tex_instr *
 517 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 518 {
 519    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 520    instr_init(&instr->instr, nir_instr_type_tex);
 521
 522    dest_init(&instr->dest);
 523
 524    instr->num_srcs = num_srcs;
 525    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 526    for (unsigned i = 0; i < num_srcs; i++)
 527       src_init(&instr->src[i].src);
 528
 529    instr->texture_index = 0;
 530    instr->texture_array_size = 0;
 531    instr->texture = NULL;
 532    instr->sampler_index = 0;
 533    instr->sampler = NULL;
 534
 535    return instr;
 536 }
 537
 538 nir_phi_instr *
 539 nir_phi_instr_create(nir_shader *shader)
 540 {
 541    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 542    instr_init(&instr->instr, nir_instr_type_phi);
 543
 544    dest_init(&instr->dest);
 545    exec_list_make_empty(&instr->srcs);
 546    return instr;
 547 }
 548
 549 nir_parallel_copy_instr *
 550 nir_parallel_copy_instr_create(nir_shader *shader)
 551 {
 552    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 553    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 554
 555    exec_list_make_empty(&instr->entries);
 556
 557    return instr;
 558 }
 559
 560 nir_ssa_undef_instr *
 561 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 562 {
 563    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 564    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 565
 566    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 567
 568    return instr;
 569 }
 570
 571 nir_deref_var *
 572 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 573 {
 574    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 575    deref->deref.deref_type = nir_deref_type_var;
 576    deref->deref.child = NULL;
 577    deref->deref.type = var->type;
 578    deref->var = var;
 579    return deref;
 580 }
 581
 582 nir_deref_array *
 583 nir_deref_array_create(void *mem_ctx)
 584 {
 585    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 586    deref->deref.deref_type = nir_deref_type_array;
 587    deref->deref.child = NULL;
 588    deref->deref_array_type = nir_deref_array_type_direct;
 589    src_init(&deref->indirect);
 590    deref->base_offset = 0;
 591    return deref;
 592 }
 593
 594 nir_deref_struct *
 595 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 596 {
 597    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 598    deref->deref.deref_type = nir_deref_type_struct;
 599    deref->deref.child = NULL;
 600    deref->index = field_index;
 601    return deref;
 602 }
 603
 604 static nir_deref_var *
 605 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 606 {
 607    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 608    ret->deref.type = deref->deref.type;
 609    if (deref->deref.child)
 610       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 611    return ret;
 612 }
 613
 614 static nir_deref_array *
 615 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 616 {
 617    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 618    ret->base_offset = deref->base_offset;
 619    ret->deref_array_type = deref->deref_array_type;
 620    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 621       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 622    }
 623    ret->deref.type = deref->deref.type;
 624    if (deref->deref.child)
 625       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 626    return ret;
 627 }
 628
 629 static nir_deref_struct *
 630 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 631 {
 632    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 633    ret->deref.type = deref->deref.type;
 634    if (deref->deref.child)
 635       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 636    return ret;
 637 }
 638
 639 nir_deref *
 640 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 641 {
 642    switch (deref->deref_type) {
 643    case nir_deref_type_var:
 644       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 645    case nir_deref_type_array:
 646       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 647    case nir_deref_type_struct:
 648       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 649    default:
 650       unreachable("Invalid dereference type");
 651    }
 652
 653    return NULL;
 654 }
 655
 656 /* Returns a load_const instruction that represents the constant
 657  * initializer for the given deref chain.  The caller is responsible for
 658  * ensuring that there actually is a constant initializer.
 659  */
 660 nir_load_const_instr *
 661 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 662 {
 663    nir_constant *constant = deref->var->constant_initializer;
 664    assert(constant);
 665
 666    const nir_deref *tail = &deref->deref;
 667    unsigned matrix_offset = 0;
 668    while (tail->child) {
 669       switch (tail->child->deref_type) {
 670       case nir_deref_type_array: {
 671          nir_deref_array *arr = nir_deref_as_array(tail->child);
 672          assert(arr->deref_array_type == nir_deref_array_type_direct);
 673          if (glsl_type_is_matrix(tail->type)) {
 674             assert(arr->deref.child == NULL);
 675             matrix_offset = arr->base_offset;
 676          } else {
 677             constant = constant->elements[arr->base_offset];
 678          }
 679          break;
 680       }
 681
 682       case nir_deref_type_struct: {
 683          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 684          break;
 685       }
 686
 687       default:
 688          unreachable("Invalid deref child type");
 689       }
 690
 691       tail = tail->child;
 692    }
 693
 694    nir_load_const_instr *load =
 695       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 696
 697    matrix_offset *= load->def.num_components;
 698    for (unsigned i = 0; i < load->def.num_components; i++) {
 699       switch (glsl_get_base_type(tail->type)) {
 700       case GLSL_TYPE_FLOAT:
 701       case GLSL_TYPE_INT:
 702       case GLSL_TYPE_UINT:
 703          load->value.u32[i] = constant->value.u[matrix_offset + i];
 704          break;
 705       case GLSL_TYPE_BOOL:
 706          load->value.u32[i] = constant->value.b[matrix_offset + i] ?
 707                              NIR_TRUE : NIR_FALSE;
 708          break;
 709       default:
 710          unreachable("Invalid immediate type");
 711       }
 712    }
 713
 714    return load;
 715 }
 716
 717 nir_function_impl *
 718 nir_cf_node_get_function(nir_cf_node *node)
 719 {
 720    while (node->type != nir_cf_node_function) {
 721       node = node->parent;
 722    }
 723
 724    return nir_cf_node_as_function(node);
 725 }
 726
 727 static bool
 728 add_use_cb(nir_src *src, void *state)
 729 {
 730    nir_instr *instr = state;
 731
 732    src->parent_instr = instr;
 733    list_addtail(&src->use_link,
 734                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 735
 736    return true;
 737 }
 738
 739 static bool
 740 add_ssa_def_cb(nir_ssa_def *def, void *state)
 741 {
 742    nir_instr *instr = state;
 743
 744    if (instr->block && def->index == UINT_MAX) {
 745       nir_function_impl *impl =
 746          nir_cf_node_get_function(&instr->block->cf_node);
 747
 748       def->index = impl->ssa_alloc++;
 749    }
 750
 751    return true;
 752 }
 753
 754 static bool
 755 add_reg_def_cb(nir_dest *dest, void *state)
 756 {
 757    nir_instr *instr = state;
 758
 759    if (!dest->is_ssa) {
 760       dest->reg.parent_instr = instr;
 761       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 762    }
 763
 764    return true;
 765 }
 766
 767 static void
 768 add_defs_uses(nir_instr *instr)
 769 {
 770    nir_foreach_src(instr, add_use_cb, instr);
 771    nir_foreach_dest(instr, add_reg_def_cb, instr);
 772    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 773 }
 774
 775 void
 776 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 777 {
 778    switch (cursor.option) {
 779    case nir_cursor_before_block:
 780       /* Only allow inserting jumps into empty blocks. */
 781       if (instr->type == nir_instr_type_jump)
 782          assert(exec_list_is_empty(&cursor.block->instr_list));
 783
 784       instr->block = cursor.block;
 785       add_defs_uses(instr);
 786       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 787       break;
 788    case nir_cursor_after_block: {
 789       /* Inserting instructions after a jump is illegal. */
 790       nir_instr *last = nir_block_last_instr(cursor.block);
 791       assert(last == NULL || last->type != nir_instr_type_jump);
 792       (void) last;
 793
 794       instr->block = cursor.block;
 795       add_defs_uses(instr);
 796       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 797       break;
 798    }
 799    case nir_cursor_before_instr:
 800       assert(instr->type != nir_instr_type_jump);
 801       instr->block = cursor.instr->block;
 802       add_defs_uses(instr);
 803       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 804       break;
 805    case nir_cursor_after_instr:
 806       /* Inserting instructions after a jump is illegal. */
 807       assert(cursor.instr->type != nir_instr_type_jump);
 808
 809       /* Only allow inserting jumps at the end of the block. */
 810       if (instr->type == nir_instr_type_jump)
 811          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 812
 813       instr->block = cursor.instr->block;
 814       add_defs_uses(instr);
 815       exec_node_insert_after(&cursor.instr->node, &instr->node);
 816       break;
 817    }
 818
 819    if (instr->type == nir_instr_type_jump)
 820       nir_handle_add_jump(instr->block);
 821 }
 822
 823 static bool
 824 src_is_valid(const nir_src *src)
 825 {
 826    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 827 }
 828
 829 static bool
 830 remove_use_cb(nir_src *src, void *state)
 831 {
 832    if (src_is_valid(src))
 833       list_del(&src->use_link);
 834
 835    return true;
 836 }
 837
 838 static bool
 839 remove_def_cb(nir_dest *dest, void *state)
 840 {
 841    if (!dest->is_ssa)
 842       list_del(&dest->reg.def_link);
 843
 844    return true;
 845 }
 846
 847 static void
 848 remove_defs_uses(nir_instr *instr)
 849 {
 850    nir_foreach_dest(instr, remove_def_cb, instr);
 851    nir_foreach_src(instr, remove_use_cb, instr);
 852 }
 853
 854 void nir_instr_remove(nir_instr *instr)
 855 {
 856    remove_defs_uses(instr);
 857    exec_node_remove(&instr->node);
 858
 859    if (instr->type == nir_instr_type_jump) {
 860       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 861       nir_handle_remove_jump(instr->block, jump_instr->type);
 862    }
 863 }
 864
 865 /*@}*/
 866
 867 void
 868 nir_index_local_regs(nir_function_impl *impl)
 869 {
 870    unsigned index = 0;
 871    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 872       reg->index = index++;
 873    }
 874    impl->reg_alloc = index;
 875 }
 876
 877 void
 878 nir_index_global_regs(nir_shader *shader)
 879 {
 880    unsigned index = 0;
 881    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 882       reg->index = index++;
 883    }
 884    shader->reg_alloc = index;
 885 }
 886
 887 static bool
 888 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 889 {
 890    return cb(&instr->dest.dest, state);
 891 }
 892
 893 static bool
 894 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 895                      void *state)
 896 {
 897    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 898       return cb(&instr->dest, state);
 899
 900    return true;
 901 }
 902
 903 static bool
 904 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 905                    void *state)
 906 {
 907    return cb(&instr->dest, state);
 908 }
 909
 910 static bool
 911 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 912 {
 913    return cb(&instr->dest, state);
 914 }
 915
 916 static bool
 917 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 918                          nir_foreach_dest_cb cb, void *state)
 919 {
 920    nir_foreach_parallel_copy_entry(instr, entry) {
 921       if (!cb(&entry->dest, state))
 922          return false;
 923    }
 924
 925    return true;
 926 }
 927
 928 bool
 929 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 930 {
 931    switch (instr->type) {
 932    case nir_instr_type_alu:
 933       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 934    case nir_instr_type_intrinsic:
 935       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 936    case nir_instr_type_tex:
 937       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 938    case nir_instr_type_phi:
 939       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 940    case nir_instr_type_parallel_copy:
 941       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 942                                       cb, state);
 943
 944    case nir_instr_type_load_const:
 945    case nir_instr_type_ssa_undef:
 946    case nir_instr_type_call:
 947    case nir_instr_type_jump:
 948       break;
 949
 950    default:
 951       unreachable("Invalid instruction type");
 952       break;
 953    }
 954
 955    return true;
 956 }
 957
 958 struct foreach_ssa_def_state {
 959    nir_foreach_ssa_def_cb cb;
 960    void *client_state;
 961 };
 962
 963 static inline bool
 964 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
 965 {
 966    struct foreach_ssa_def_state *state = void_state;
 967
 968    if (dest->is_ssa)
 969       return state->cb(&dest->ssa, state->client_state);
 970    else
 971       return true;
 972 }
 973
 974 bool
 975 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
 976 {
 977    switch (instr->type) {
 978    case nir_instr_type_alu:
 979    case nir_instr_type_tex:
 980    case nir_instr_type_intrinsic:
 981    case nir_instr_type_phi:
 982    case nir_instr_type_parallel_copy: {
 983       struct foreach_ssa_def_state foreach_state = {cb, state};
 984       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
 985    }
 986
 987    case nir_instr_type_load_const:
 988       return cb(&nir_instr_as_load_const(instr)->def, state);
 989    case nir_instr_type_ssa_undef:
 990       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
 991    case nir_instr_type_call:
 992    case nir_instr_type_jump:
 993       return true;
 994    default:
 995       unreachable("Invalid instruction type");
 996    }
 997 }
 998
 999 static bool
1000 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1001 {
1002    if (!cb(src, state))
1003       return false;
1004    if (!src->is_ssa && src->reg.indirect)
1005       return cb(src->reg.indirect, state);
1006    return true;
1007 }
1008
1009 static bool
1010 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1011                       void *state)
1012 {
1013    if (deref->deref_array_type == nir_deref_array_type_indirect)
1014       return visit_src(&deref->indirect, cb, state);
1015    return true;
1016 }
1017
1018 static bool
1019 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1020 {
1021    nir_deref *cur = &deref->deref;
1022    while (cur != NULL) {
1023       if (cur->deref_type == nir_deref_type_array) {
1024          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1025             return false;
1026       }
1027
1028       cur = cur->child;
1029    }
1030
1031    return true;
1032 }
1033
1034 static bool
1035 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1036 {
1037    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1038       if (!visit_src(&instr->src[i].src, cb, state))
1039          return false;
1040
1041    return true;
1042 }
1043
1044 static bool
1045 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1046 {
1047    for (unsigned i = 0; i < instr->num_srcs; i++) {
1048       if (!visit_src(&instr->src[i].src, cb, state))
1049          return false;
1050    }
1051
1052    if (instr->texture != NULL) {
1053       if (!visit_deref_src(instr->texture, cb, state))
1054          return false;
1055    }
1056
1057    if (instr->sampler != NULL) {
1058       if (!visit_deref_src(instr->sampler, cb, state))
1059          return false;
1060    }
1061
1062    return true;
1063 }
1064
1065 static bool
1066 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1067                     void *state)
1068 {
1069    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1070    for (unsigned i = 0; i < num_srcs; i++) {
1071       if (!visit_src(&instr->src[i], cb, state))
1072          return false;
1073    }
1074
1075    unsigned num_vars =
1076       nir_intrinsic_infos[instr->intrinsic].num_variables;
1077    for (unsigned i = 0; i < num_vars; i++) {
1078       if (!visit_deref_src(instr->variables[i], cb, state))
1079          return false;
1080    }
1081
1082    return true;
1083 }
1084
1085 static bool
1086 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1087 {
1088    return true;
1089 }
1090
1091 static bool
1092 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1093                      void *state)
1094 {
1095    return true;
1096 }
1097
1098 static bool
1099 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1100 {
1101    nir_foreach_phi_src(instr, src) {
1102       if (!visit_src(&src->src, cb, state))
1103          return false;
1104    }
1105
1106    return true;
1107 }
1108
1109 static bool
1110 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1111                         nir_foreach_src_cb cb, void *state)
1112 {
1113    nir_foreach_parallel_copy_entry(instr, entry) {
1114       if (!visit_src(&entry->src, cb, state))
1115          return false;
1116    }
1117
1118    return true;
1119 }
1120
1121 typedef struct {
1122    void *state;
1123    nir_foreach_src_cb cb;
1124 } visit_dest_indirect_state;
1125
1126 static bool
1127 visit_dest_indirect(nir_dest *dest, void *_state)
1128 {
1129    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1130
1131    if (!dest->is_ssa && dest->reg.indirect)
1132       return state->cb(dest->reg.indirect, state->state);
1133
1134    return true;
1135 }
1136
1137 bool
1138 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1139 {
1140    switch (instr->type) {
1141    case nir_instr_type_alu:
1142       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1143          return false;
1144       break;
1145    case nir_instr_type_intrinsic:
1146       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1147          return false;
1148       break;
1149    case nir_instr_type_tex:
1150       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1151          return false;
1152       break;
1153    case nir_instr_type_call:
1154       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1155          return false;
1156       break;
1157    case nir_instr_type_load_const:
1158       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1159          return false;
1160       break;
1161    case nir_instr_type_phi:
1162       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1163          return false;
1164       break;
1165    case nir_instr_type_parallel_copy:
1166       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1167                                    cb, state))
1168          return false;
1169       break;
1170    case nir_instr_type_jump:
1171    case nir_instr_type_ssa_undef:
1172       return true;
1173
1174    default:
1175       unreachable("Invalid instruction type");
1176       break;
1177    }
1178
1179    visit_dest_indirect_state dest_state;
1180    dest_state.state = state;
1181    dest_state.cb = cb;
1182    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1183 }
1184
1185 nir_const_value *
1186 nir_src_as_const_value(nir_src src)
1187 {
1188    if (!src.is_ssa)
1189       return NULL;
1190
1191    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1192       return NULL;
1193
1194    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1195
1196    return &load->value;
1197 }
1198
1199 /**
1200  * Returns true if the source is known to be dynamically uniform. Otherwise it
1201  * returns false which means it may or may not be dynamically uniform but it
1202  * can't be determined.
1203  */
1204 bool
1205 nir_src_is_dynamically_uniform(nir_src src)
1206 {
1207    if (!src.is_ssa)
1208       return false;
1209
1210    /* Constants are trivially dynamically uniform */
1211    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1212       return true;
1213
1214    /* As are uniform variables */
1215    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1216       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1217
1218       if (intr->intrinsic == nir_intrinsic_load_uniform)
1219          return true;
1220    }
1221
1222    /* XXX: this could have many more tests, such as when a sampler function is
1223     * called with dynamically uniform arguments.
1224     */
1225    return false;
1226 }
1227
1228 static void
1229 src_remove_all_uses(nir_src *src)
1230 {
1231    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1232       if (!src_is_valid(src))
1233          continue;
1234
1235       list_del(&src->use_link);
1236    }
1237 }
1238
1239 static void
1240 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1241 {
1242    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1243       if (!src_is_valid(src))
1244          continue;
1245
1246       if (parent_instr) {
1247          src->parent_instr = parent_instr;
1248          if (src->is_ssa)
1249             list_addtail(&src->use_link, &src->ssa->uses);
1250          else
1251             list_addtail(&src->use_link, &src->reg.reg->uses);
1252       } else {
1253          assert(parent_if);
1254          src->parent_if = parent_if;
1255          if (src->is_ssa)
1256             list_addtail(&src->use_link, &src->ssa->if_uses);
1257          else
1258             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1259       }
1260    }
1261 }
1262
1263 void
1264 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1265 {
1266    assert(!src_is_valid(src) || src->parent_instr == instr);
1267
1268    src_remove_all_uses(src);
1269    *src = new_src;
1270    src_add_all_uses(src, instr, NULL);
1271 }
1272
1273 void
1274 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1275 {
1276    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1277
1278    src_remove_all_uses(dest);
1279    src_remove_all_uses(src);
1280    *dest = *src;
1281    *src = NIR_SRC_INIT;
1282    src_add_all_uses(dest, dest_instr, NULL);
1283 }
1284
1285 void
1286 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1287 {
1288    nir_src *src = &if_stmt->condition;
1289    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1290
1291    src_remove_all_uses(src);
1292    *src = new_src;
1293    src_add_all_uses(src, NULL, if_stmt);
1294 }
1295
1296 void
1297 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1298 {
1299    if (dest->is_ssa) {
1300       /* We can only overwrite an SSA destination if it has no uses. */
1301       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1302    } else {
1303       list_del(&dest->reg.def_link);
1304       if (dest->reg.indirect)
1305          src_remove_all_uses(dest->reg.indirect);
1306    }
1307
1308    /* We can't re-write with an SSA def */
1309    assert(!new_dest.is_ssa);
1310
1311    nir_dest_copy(dest, &new_dest, instr);
1312
1313    dest->reg.parent_instr = instr;
1314    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1315
1316    if (dest->reg.indirect)
1317       src_add_all_uses(dest->reg.indirect, instr, NULL);
1318 }
1319
1320 void
1321 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1322                  unsigned num_components, const char *name)
1323 {
1324    def->name = name;
1325    def->parent_instr = instr;
1326    list_inithead(&def->uses);
1327    list_inithead(&def->if_uses);
1328    def->num_components = num_components;
1329    def->bit_size = 32; /* FIXME: Add an input paremeter or guess? */
1330
1331    if (instr->block) {
1332       nir_function_impl *impl =
1333          nir_cf_node_get_function(&instr->block->cf_node);
1334
1335       def->index = impl->ssa_alloc++;
1336    } else {
1337       def->index = UINT_MAX;
1338    }
1339 }
1340
1341 void
1342 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1343                  unsigned num_components, const char *name)
1344 {
1345    dest->is_ssa = true;
1346    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1347 }
1348
1349 void
1350 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1351 {
1352    assert(!new_src.is_ssa || def != new_src.ssa);
1353
1354    nir_foreach_use_safe(def, use_src)
1355       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1356
1357    nir_foreach_if_use_safe(def, use_src)
1358       nir_if_rewrite_condition(use_src->parent_if, new_src);
1359 }
1360
1361 static bool
1362 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1363 {
1364    assert(start->block == end->block);
1365
1366    if (between->block != start->block)
1367       return false;
1368
1369    /* Search backwards looking for "between" */
1370    while (start != end) {
1371       if (between == end)
1372          return true;
1373
1374       end = nir_instr_prev(end);
1375       assert(end);
1376    }
1377
1378    return false;
1379 }
1380
1381 /* Replaces all uses of the given SSA def with the given source but only if
1382  * the use comes after the after_me instruction.  This can be useful if you
1383  * are emitting code to fix up the result of some instruction: you can freely
1384  * use the result in that code and then call rewrite_uses_after and pass the
1385  * last fixup instruction as after_me and it will replace all of the uses you
1386  * want without touching the fixup code.
1387  *
1388  * This function assumes that after_me is in the same block as
1389  * def->parent_instr and that after_me comes after def->parent_instr.
1390  */
1391 void
1392 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1393                                nir_instr *after_me)
1394 {
1395    assert(!new_src.is_ssa || def != new_src.ssa);
1396
1397    nir_foreach_use_safe(def, use_src) {
1398       assert(use_src->parent_instr != def->parent_instr);
1399       /* Since def already dominates all of its uses, the only way a use can
1400        * not be dominated by after_me is if it is between def and after_me in
1401        * the instruction list.
1402        */
1403       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1404          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1405    }
1406
1407    nir_foreach_if_use_safe(def, use_src)
1408       nir_if_rewrite_condition(use_src->parent_if, new_src);
1409 }
1410
1411 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1412                             bool reverse, void *state);
1413
1414 static inline bool
1415 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1416 {
1417    if (reverse) {
1418       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1419                                       &if_stmt->else_list) {
1420          if (!foreach_cf_node(node, cb, reverse, state))
1421             return false;
1422       }
1423
1424       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1425                                       &if_stmt->then_list) {
1426          if (!foreach_cf_node(node, cb, reverse, state))
1427             return false;
1428       }
1429    } else {
1430       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1431          if (!foreach_cf_node(node, cb, reverse, state))
1432             return false;
1433       }
1434
1435       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1436          if (!foreach_cf_node(node, cb, reverse, state))
1437             return false;
1438       }
1439    }
1440
1441    return true;
1442 }
1443
1444 static inline bool
1445 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1446 {
1447    if (reverse) {
1448       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1449          if (!foreach_cf_node(node, cb, reverse, state))
1450             return false;
1451       }
1452    } else {
1453       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1454          if (!foreach_cf_node(node, cb, reverse, state))
1455             return false;
1456       }
1457    }
1458
1459    return true;
1460 }
1461
1462 static bool
1463 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1464                 bool reverse, void *state)
1465 {
1466    switch (node->type) {
1467    case nir_cf_node_block:
1468       return cb(nir_cf_node_as_block(node), state);
1469    case nir_cf_node_if:
1470       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1471    case nir_cf_node_loop:
1472       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1473       break;
1474
1475    default:
1476       unreachable("Invalid CFG node type");
1477       break;
1478    }
1479
1480    return false;
1481 }
1482
1483 bool
1484 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1485                              void *state)
1486 {
1487    return foreach_cf_node(node, cb, false, state);
1488 }
1489
1490 bool
1491 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1492 {
1493    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1494       if (!foreach_cf_node(node, cb, false, state))
1495          return false;
1496    }
1497
1498    return cb(impl->end_block, state);
1499 }
1500
1501 bool
1502 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1503                           void *state)
1504 {
1505    if (!cb(impl->end_block, state))
1506       return false;
1507
1508    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1509       if (!foreach_cf_node(node, cb, true, state))
1510          return false;
1511    }
1512
1513    return true;
1514 }
1515
1516 nir_if *
1517 nir_block_get_following_if(nir_block *block)
1518 {
1519    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1520       return NULL;
1521
1522    if (nir_cf_node_is_last(&block->cf_node))
1523       return NULL;
1524
1525    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1526
1527    if (next_node->type != nir_cf_node_if)
1528       return NULL;
1529
1530    return nir_cf_node_as_if(next_node);
1531 }
1532
1533 nir_loop *
1534 nir_block_get_following_loop(nir_block *block)
1535 {
1536    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1537       return NULL;
1538
1539    if (nir_cf_node_is_last(&block->cf_node))
1540       return NULL;
1541
1542    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1543
1544    if (next_node->type != nir_cf_node_loop)
1545       return NULL;
1546
1547    return nir_cf_node_as_loop(next_node);
1548 }
1549 static bool
1550 index_block(nir_block *block, void *state)
1551 {
1552    unsigned *index = state;
1553    block->index = (*index)++;
1554    return true;
1555 }
1556
1557 void
1558 nir_index_blocks(nir_function_impl *impl)
1559 {
1560    unsigned index = 0;
1561
1562    if (impl->valid_metadata & nir_metadata_block_index)
1563       return;
1564
1565    nir_foreach_block(impl, index_block, &index);
1566
1567    impl->num_blocks = index;
1568 }
1569
1570 static bool
1571 index_ssa_def_cb(nir_ssa_def *def, void *state)
1572 {
1573    unsigned *index = (unsigned *) state;
1574    def->index = (*index)++;
1575
1576    return true;
1577 }
1578
1579 static bool
1580 index_ssa_block(nir_block *block, void *state)
1581 {
1582    nir_foreach_instr(block, instr)
1583       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1584
1585    return true;
1586 }
1587
1588 /**
1589  * The indices are applied top-to-bottom which has the very nice property
1590  * that, if A dominates B, then A->index <= B->index.
1591  */
1592 void
1593 nir_index_ssa_defs(nir_function_impl *impl)
1594 {
1595    unsigned index = 0;
1596    nir_foreach_block(impl, index_ssa_block, &index);
1597    impl->ssa_alloc = index;
1598 }
1599
1600 static bool
1601 index_instrs_block(nir_block *block, void *state)
1602 {
1603    unsigned *index = state;
1604    nir_foreach_instr(block, instr)
1605       instr->index = (*index)++;
1606
1607    return true;
1608 }
1609
1610 /**
1611  * The indices are applied top-to-bottom which has the very nice property
1612  * that, if A dominates B, then A->index <= B->index.
1613  */
1614 unsigned
1615 nir_index_instrs(nir_function_impl *impl)
1616 {
1617    unsigned index = 0;
1618    nir_foreach_block(impl, index_instrs_block, &index);
1619    return index;
1620 }
1621
1622 nir_intrinsic_op
1623 nir_intrinsic_from_system_value(gl_system_value val)
1624 {
1625    switch (val) {
1626    case SYSTEM_VALUE_VERTEX_ID:
1627       return nir_intrinsic_load_vertex_id;
1628    case SYSTEM_VALUE_INSTANCE_ID:
1629       return nir_intrinsic_load_instance_id;
1630    case SYSTEM_VALUE_DRAW_ID:
1631       return nir_intrinsic_load_draw_id;
1632    case SYSTEM_VALUE_BASE_INSTANCE:
1633       return nir_intrinsic_load_base_instance;
1634    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1635       return nir_intrinsic_load_vertex_id_zero_base;
1636    case SYSTEM_VALUE_BASE_VERTEX:
1637       return nir_intrinsic_load_base_vertex;
1638    case SYSTEM_VALUE_INVOCATION_ID:
1639       return nir_intrinsic_load_invocation_id;
1640    case SYSTEM_VALUE_FRONT_FACE:
1641       return nir_intrinsic_load_front_face;
1642    case SYSTEM_VALUE_SAMPLE_ID:
1643       return nir_intrinsic_load_sample_id;
1644    case SYSTEM_VALUE_SAMPLE_POS:
1645       return nir_intrinsic_load_sample_pos;
1646    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1647       return nir_intrinsic_load_sample_mask_in;
1648    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1649       return nir_intrinsic_load_local_invocation_id;
1650    case SYSTEM_VALUE_WORK_GROUP_ID:
1651       return nir_intrinsic_load_work_group_id;
1652    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1653       return nir_intrinsic_load_num_work_groups;
1654    case SYSTEM_VALUE_PRIMITIVE_ID:
1655       return nir_intrinsic_load_primitive_id;
1656    case SYSTEM_VALUE_TESS_COORD:
1657       return nir_intrinsic_load_tess_coord;
1658    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1659       return nir_intrinsic_load_tess_level_outer;
1660    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1661       return nir_intrinsic_load_tess_level_inner;
1662    case SYSTEM_VALUE_VERTICES_IN:
1663       return nir_intrinsic_load_patch_vertices_in;
1664    case SYSTEM_VALUE_HELPER_INVOCATION:
1665       return nir_intrinsic_load_helper_invocation;
1666    default:
1667       unreachable("system value does not directly correspond to intrinsic");
1668    }
1669 }
1670
1671 gl_system_value
1672 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1673 {
1674    switch (intrin) {
1675    case nir_intrinsic_load_vertex_id:
1676       return SYSTEM_VALUE_VERTEX_ID;
1677    case nir_intrinsic_load_instance_id:
1678       return SYSTEM_VALUE_INSTANCE_ID;
1679    case nir_intrinsic_load_draw_id:
1680       return SYSTEM_VALUE_DRAW_ID;
1681    case nir_intrinsic_load_base_instance:
1682       return SYSTEM_VALUE_BASE_INSTANCE;
1683    case nir_intrinsic_load_vertex_id_zero_base:
1684       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1685    case nir_intrinsic_load_base_vertex:
1686       return SYSTEM_VALUE_BASE_VERTEX;
1687    case nir_intrinsic_load_invocation_id:
1688       return SYSTEM_VALUE_INVOCATION_ID;
1689    case nir_intrinsic_load_front_face:
1690       return SYSTEM_VALUE_FRONT_FACE;
1691    case nir_intrinsic_load_sample_id:
1692       return SYSTEM_VALUE_SAMPLE_ID;
1693    case nir_intrinsic_load_sample_pos:
1694       return SYSTEM_VALUE_SAMPLE_POS;
1695    case nir_intrinsic_load_sample_mask_in:
1696       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1697    case nir_intrinsic_load_local_invocation_id:
1698       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1699    case nir_intrinsic_load_num_work_groups:
1700       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1701    case nir_intrinsic_load_work_group_id:
1702       return SYSTEM_VALUE_WORK_GROUP_ID;
1703    case nir_intrinsic_load_primitive_id:
1704       return SYSTEM_VALUE_PRIMITIVE_ID;
1705    case nir_intrinsic_load_tess_coord:
1706       return SYSTEM_VALUE_TESS_COORD;
1707    case nir_intrinsic_load_tess_level_outer:
1708       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1709    case nir_intrinsic_load_tess_level_inner:
1710       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1711    case nir_intrinsic_load_patch_vertices_in:
1712       return SYSTEM_VALUE_VERTICES_IN;
1713    case nir_intrinsic_load_helper_invocation:
1714       return SYSTEM_VALUE_HELPER_INVOCATION;
1715    default:
1716       unreachable("intrinsic doesn't produce a system value");
1717    }
1718 }