2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
29 #include "nir_control_flow_private.h"
30 #include "util/half_float.h"
36 nir_shader_create(void *mem_ctx
,
37 gl_shader_stage stage
,
38 const nir_shader_compiler_options
*options
,
41 nir_shader
*shader
= rzalloc(mem_ctx
, nir_shader
);
43 exec_list_make_empty(&shader
->uniforms
);
44 exec_list_make_empty(&shader
->inputs
);
45 exec_list_make_empty(&shader
->outputs
);
46 exec_list_make_empty(&shader
->shared
);
48 shader
->options
= options
;
51 assert(si
->stage
== stage
);
54 shader
->info
.stage
= stage
;
57 exec_list_make_empty(&shader
->functions
);
58 exec_list_make_empty(&shader
->registers
);
59 exec_list_make_empty(&shader
->globals
);
60 exec_list_make_empty(&shader
->system_values
);
61 shader
->reg_alloc
= 0;
63 shader
->num_inputs
= 0;
64 shader
->num_outputs
= 0;
65 shader
->num_uniforms
= 0;
66 shader
->num_shared
= 0;
72 reg_create(void *mem_ctx
, struct exec_list
*list
)
74 nir_register
*reg
= ralloc(mem_ctx
, nir_register
);
76 list_inithead(®
->uses
);
77 list_inithead(®
->defs
);
78 list_inithead(®
->if_uses
);
80 reg
->num_components
= 0;
82 reg
->num_array_elems
= 0;
83 reg
->is_packed
= false;
86 exec_list_push_tail(list
, ®
->node
);
92 nir_global_reg_create(nir_shader
*shader
)
94 nir_register
*reg
= reg_create(shader
, &shader
->registers
);
95 reg
->index
= shader
->reg_alloc
++;
96 reg
->is_global
= true;
102 nir_local_reg_create(nir_function_impl
*impl
)
104 nir_register
*reg
= reg_create(ralloc_parent(impl
), &impl
->registers
);
105 reg
->index
= impl
->reg_alloc
++;
106 reg
->is_global
= false;
112 nir_reg_remove(nir_register
*reg
)
114 exec_node_remove(®
->node
);
118 nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
)
120 switch (var
->data
.mode
) {
122 assert(!"invalid mode");
126 assert(!"nir_shader_add_variable cannot be used for local variables");
130 exec_list_push_tail(&shader
->globals
, &var
->node
);
133 case nir_var_shader_in
:
134 exec_list_push_tail(&shader
->inputs
, &var
->node
);
137 case nir_var_shader_out
:
138 exec_list_push_tail(&shader
->outputs
, &var
->node
);
141 case nir_var_uniform
:
142 case nir_var_shader_storage
:
143 exec_list_push_tail(&shader
->uniforms
, &var
->node
);
147 assert(shader
->info
.stage
== MESA_SHADER_COMPUTE
);
148 exec_list_push_tail(&shader
->shared
, &var
->node
);
151 case nir_var_system_value
:
152 exec_list_push_tail(&shader
->system_values
, &var
->node
);
158 nir_variable_create(nir_shader
*shader
, nir_variable_mode mode
,
159 const struct glsl_type
*type
, const char *name
)
161 nir_variable
*var
= rzalloc(shader
, nir_variable
);
162 var
->name
= ralloc_strdup(var
, name
);
164 var
->data
.mode
= mode
;
166 if ((mode
== nir_var_shader_in
&&
167 shader
->info
.stage
!= MESA_SHADER_VERTEX
) ||
168 (mode
== nir_var_shader_out
&&
169 shader
->info
.stage
!= MESA_SHADER_FRAGMENT
))
170 var
->data
.interpolation
= INTERP_MODE_SMOOTH
;
172 if (mode
== nir_var_shader_in
|| mode
== nir_var_uniform
)
173 var
->data
.read_only
= true;
175 nir_shader_add_variable(shader
, var
);
181 nir_local_variable_create(nir_function_impl
*impl
,
182 const struct glsl_type
*type
, const char *name
)
184 nir_variable
*var
= rzalloc(impl
->function
->shader
, nir_variable
);
185 var
->name
= ralloc_strdup(var
, name
);
187 var
->data
.mode
= nir_var_local
;
189 nir_function_impl_add_variable(impl
, var
);
195 nir_function_create(nir_shader
*shader
, const char *name
)
197 nir_function
*func
= ralloc(shader
, nir_function
);
199 exec_list_push_tail(&shader
->functions
, &func
->node
);
201 func
->name
= ralloc_strdup(func
, name
);
202 func
->shader
= shader
;
203 func
->num_params
= 0;
210 /* NOTE: if the instruction you are copying a src to is already added
211 * to the IR, use nir_instr_rewrite_src() instead.
213 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *mem_ctx
)
215 dest
->is_ssa
= src
->is_ssa
;
217 dest
->ssa
= src
->ssa
;
219 dest
->reg
.base_offset
= src
->reg
.base_offset
;
220 dest
->reg
.reg
= src
->reg
.reg
;
221 if (src
->reg
.indirect
) {
222 dest
->reg
.indirect
= ralloc(mem_ctx
, nir_src
);
223 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, mem_ctx
);
225 dest
->reg
.indirect
= NULL
;
230 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
)
232 /* Copying an SSA definition makes no sense whatsoever. */
233 assert(!src
->is_ssa
);
235 dest
->is_ssa
= false;
237 dest
->reg
.base_offset
= src
->reg
.base_offset
;
238 dest
->reg
.reg
= src
->reg
.reg
;
239 if (src
->reg
.indirect
) {
240 dest
->reg
.indirect
= ralloc(instr
, nir_src
);
241 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, instr
);
243 dest
->reg
.indirect
= NULL
;
248 nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
249 nir_alu_instr
*instr
)
251 nir_src_copy(&dest
->src
, &src
->src
, &instr
->instr
);
252 dest
->abs
= src
->abs
;
253 dest
->negate
= src
->negate
;
254 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++)
255 dest
->swizzle
[i
] = src
->swizzle
[i
];
259 nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
260 nir_alu_instr
*instr
)
262 nir_dest_copy(&dest
->dest
, &src
->dest
, &instr
->instr
);
263 dest
->write_mask
= src
->write_mask
;
264 dest
->saturate
= src
->saturate
;
269 cf_init(nir_cf_node
*node
, nir_cf_node_type type
)
271 exec_node_init(&node
->node
);
277 nir_function_impl_create_bare(nir_shader
*shader
)
279 nir_function_impl
*impl
= ralloc(shader
, nir_function_impl
);
281 impl
->function
= NULL
;
283 cf_init(&impl
->cf_node
, nir_cf_node_function
);
285 exec_list_make_empty(&impl
->body
);
286 exec_list_make_empty(&impl
->registers
);
287 exec_list_make_empty(&impl
->locals
);
290 impl
->valid_metadata
= nir_metadata_none
;
292 /* create start & end blocks */
293 nir_block
*start_block
= nir_block_create(shader
);
294 nir_block
*end_block
= nir_block_create(shader
);
295 start_block
->cf_node
.parent
= &impl
->cf_node
;
296 end_block
->cf_node
.parent
= &impl
->cf_node
;
297 impl
->end_block
= end_block
;
299 exec_list_push_tail(&impl
->body
, &start_block
->cf_node
.node
);
301 start_block
->successors
[0] = end_block
;
302 _mesa_set_add(end_block
->predecessors
, start_block
);
307 nir_function_impl_create(nir_function
*function
)
309 assert(function
->impl
== NULL
);
311 nir_function_impl
*impl
= nir_function_impl_create_bare(function
->shader
);
313 function
->impl
= impl
;
314 impl
->function
= function
;
320 nir_block_create(nir_shader
*shader
)
322 nir_block
*block
= rzalloc(shader
, nir_block
);
324 cf_init(&block
->cf_node
, nir_cf_node_block
);
326 block
->successors
[0] = block
->successors
[1] = NULL
;
327 block
->predecessors
= _mesa_set_create(block
, _mesa_hash_pointer
,
328 _mesa_key_pointer_equal
);
329 block
->imm_dom
= NULL
;
330 /* XXX maybe it would be worth it to defer allocation? This
331 * way it doesn't get allocated for shader refs that never run
332 * nir_calc_dominance? For example, state-tracker creates an
333 * initial IR, clones that, runs appropriate lowering pass, passes
334 * to driver which does common lowering/opt, and then stores ref
335 * which is later used to do state specific lowering and futher
336 * opt. Do any of the references not need dominance metadata?
338 block
->dom_frontier
= _mesa_set_create(block
, _mesa_hash_pointer
,
339 _mesa_key_pointer_equal
);
341 exec_list_make_empty(&block
->instr_list
);
347 src_init(nir_src
*src
)
351 src
->reg
.indirect
= NULL
;
352 src
->reg
.base_offset
= 0;
356 nir_if_create(nir_shader
*shader
)
358 nir_if
*if_stmt
= ralloc(shader
, nir_if
);
360 cf_init(&if_stmt
->cf_node
, nir_cf_node_if
);
361 src_init(&if_stmt
->condition
);
363 nir_block
*then
= nir_block_create(shader
);
364 exec_list_make_empty(&if_stmt
->then_list
);
365 exec_list_push_tail(&if_stmt
->then_list
, &then
->cf_node
.node
);
366 then
->cf_node
.parent
= &if_stmt
->cf_node
;
368 nir_block
*else_stmt
= nir_block_create(shader
);
369 exec_list_make_empty(&if_stmt
->else_list
);
370 exec_list_push_tail(&if_stmt
->else_list
, &else_stmt
->cf_node
.node
);
371 else_stmt
->cf_node
.parent
= &if_stmt
->cf_node
;
377 nir_loop_create(nir_shader
*shader
)
379 nir_loop
*loop
= rzalloc(shader
, nir_loop
);
381 cf_init(&loop
->cf_node
, nir_cf_node_loop
);
383 nir_block
*body
= nir_block_create(shader
);
384 exec_list_make_empty(&loop
->body
);
385 exec_list_push_tail(&loop
->body
, &body
->cf_node
.node
);
386 body
->cf_node
.parent
= &loop
->cf_node
;
388 body
->successors
[0] = body
;
389 _mesa_set_add(body
->predecessors
, body
);
395 instr_init(nir_instr
*instr
, nir_instr_type type
)
399 exec_node_init(&instr
->node
);
403 dest_init(nir_dest
*dest
)
405 dest
->is_ssa
= false;
406 dest
->reg
.reg
= NULL
;
407 dest
->reg
.indirect
= NULL
;
408 dest
->reg
.base_offset
= 0;
412 alu_dest_init(nir_alu_dest
*dest
)
414 dest_init(&dest
->dest
);
415 dest
->saturate
= false;
416 dest
->write_mask
= 0xf;
420 alu_src_init(nir_alu_src
*src
)
423 src
->abs
= src
->negate
= false;
424 for (int i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; ++i
)
429 nir_alu_instr_create(nir_shader
*shader
, nir_op op
)
431 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
432 /* TODO: don't use rzalloc */
433 nir_alu_instr
*instr
=
435 sizeof(nir_alu_instr
) + num_srcs
* sizeof(nir_alu_src
));
437 instr_init(&instr
->instr
, nir_instr_type_alu
);
439 alu_dest_init(&instr
->dest
);
440 for (unsigned i
= 0; i
< num_srcs
; i
++)
441 alu_src_init(&instr
->src
[i
]);
447 nir_deref_instr_create(nir_shader
*shader
, nir_deref_type deref_type
)
449 nir_deref_instr
*instr
=
450 rzalloc_size(shader
, sizeof(nir_deref_instr
));
452 instr_init(&instr
->instr
, nir_instr_type_deref
);
454 instr
->deref_type
= deref_type
;
455 if (deref_type
!= nir_deref_type_var
)
456 src_init(&instr
->parent
);
458 if (deref_type
== nir_deref_type_array
)
459 src_init(&instr
->arr
.index
);
461 dest_init(&instr
->dest
);
467 nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
)
469 nir_jump_instr
*instr
= ralloc(shader
, nir_jump_instr
);
470 instr_init(&instr
->instr
, nir_instr_type_jump
);
475 nir_load_const_instr
*
476 nir_load_const_instr_create(nir_shader
*shader
, unsigned num_components
,
479 nir_load_const_instr
*instr
= rzalloc(shader
, nir_load_const_instr
);
480 instr_init(&instr
->instr
, nir_instr_type_load_const
);
482 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
487 nir_intrinsic_instr
*
488 nir_intrinsic_instr_create(nir_shader
*shader
, nir_intrinsic_op op
)
490 unsigned num_srcs
= nir_intrinsic_infos
[op
].num_srcs
;
491 /* TODO: don't use rzalloc */
492 nir_intrinsic_instr
*instr
=
494 sizeof(nir_intrinsic_instr
) + num_srcs
* sizeof(nir_src
));
496 instr_init(&instr
->instr
, nir_instr_type_intrinsic
);
497 instr
->intrinsic
= op
;
499 if (nir_intrinsic_infos
[op
].has_dest
)
500 dest_init(&instr
->dest
);
502 for (unsigned i
= 0; i
< num_srcs
; i
++)
503 src_init(&instr
->src
[i
]);
509 nir_call_instr_create(nir_shader
*shader
, nir_function
*callee
)
511 const unsigned num_params
= callee
->num_params
;
512 nir_call_instr
*instr
=
513 rzalloc_size(shader
, sizeof(*instr
) +
514 num_params
* sizeof(instr
->params
[0]));
516 instr_init(&instr
->instr
, nir_instr_type_call
);
517 instr
->callee
= callee
;
518 instr
->num_params
= num_params
;
519 for (unsigned i
= 0; i
< num_params
; i
++)
520 src_init(&instr
->params
[i
]);
526 nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
)
528 nir_tex_instr
*instr
= rzalloc(shader
, nir_tex_instr
);
529 instr_init(&instr
->instr
, nir_instr_type_tex
);
531 dest_init(&instr
->dest
);
533 instr
->num_srcs
= num_srcs
;
534 instr
->src
= ralloc_array(instr
, nir_tex_src
, num_srcs
);
535 for (unsigned i
= 0; i
< num_srcs
; i
++)
536 src_init(&instr
->src
[i
].src
);
538 instr
->texture_index
= 0;
539 instr
->texture_array_size
= 0;
540 instr
->sampler_index
= 0;
546 nir_tex_instr_add_src(nir_tex_instr
*tex
,
547 nir_tex_src_type src_type
,
550 nir_tex_src
*new_srcs
= rzalloc_array(tex
, nir_tex_src
,
553 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
554 new_srcs
[i
].src_type
= tex
->src
[i
].src_type
;
555 nir_instr_move_src(&tex
->instr
, &new_srcs
[i
].src
,
559 ralloc_free(tex
->src
);
562 tex
->src
[tex
->num_srcs
].src_type
= src_type
;
563 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[tex
->num_srcs
].src
, src
);
568 nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
)
570 assert(src_idx
< tex
->num_srcs
);
572 /* First rewrite the source to NIR_SRC_INIT */
573 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[src_idx
].src
, NIR_SRC_INIT
);
575 /* Now, move all of the other sources down */
576 for (unsigned i
= src_idx
+ 1; i
< tex
->num_srcs
; i
++) {
577 tex
->src
[i
-1].src_type
= tex
->src
[i
].src_type
;
578 nir_instr_move_src(&tex
->instr
, &tex
->src
[i
-1].src
, &tex
->src
[i
].src
);
584 nir_phi_instr_create(nir_shader
*shader
)
586 nir_phi_instr
*instr
= ralloc(shader
, nir_phi_instr
);
587 instr_init(&instr
->instr
, nir_instr_type_phi
);
589 dest_init(&instr
->dest
);
590 exec_list_make_empty(&instr
->srcs
);
594 nir_parallel_copy_instr
*
595 nir_parallel_copy_instr_create(nir_shader
*shader
)
597 nir_parallel_copy_instr
*instr
= ralloc(shader
, nir_parallel_copy_instr
);
598 instr_init(&instr
->instr
, nir_instr_type_parallel_copy
);
600 exec_list_make_empty(&instr
->entries
);
605 nir_ssa_undef_instr
*
606 nir_ssa_undef_instr_create(nir_shader
*shader
,
607 unsigned num_components
,
610 nir_ssa_undef_instr
*instr
= ralloc(shader
, nir_ssa_undef_instr
);
611 instr_init(&instr
->instr
, nir_instr_type_ssa_undef
);
613 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
618 static nir_const_value
619 const_value_float(double d
, unsigned bit_size
)
623 case 16: v
.u16
[0] = _mesa_float_to_half(d
); break;
624 case 32: v
.f32
[0] = d
; break;
625 case 64: v
.f64
[0] = d
; break;
627 unreachable("Invalid bit size");
632 static nir_const_value
633 const_value_int(int64_t i
, unsigned bit_size
)
637 case 8: v
.i8
[0] = i
; break;
638 case 16: v
.i16
[0] = i
; break;
639 case 32: v
.i32
[0] = i
; break;
640 case 64: v
.i64
[0] = i
; break;
642 unreachable("Invalid bit size");
648 nir_alu_binop_identity(nir_op binop
, unsigned bit_size
)
650 const int64_t max_int
= (1ull << (bit_size
- 1)) - 1;
651 const int64_t min_int
= -max_int
- 1;
654 return const_value_int(0, bit_size
);
656 return const_value_float(0, bit_size
);
658 return const_value_int(1, bit_size
);
660 return const_value_float(1, bit_size
);
662 return const_value_int(max_int
, bit_size
);
664 return const_value_int(~0ull, bit_size
);
666 return const_value_float(INFINITY
, bit_size
);
668 return const_value_int(min_int
, bit_size
);
670 return const_value_int(0, bit_size
);
672 return const_value_float(-INFINITY
, bit_size
);
674 return const_value_int(~0ull, bit_size
);
676 return const_value_int(0, bit_size
);
678 return const_value_int(0, bit_size
);
680 unreachable("Invalid reduction operation");
685 nir_cf_node_get_function(nir_cf_node
*node
)
687 while (node
->type
!= nir_cf_node_function
) {
691 return nir_cf_node_as_function(node
);
694 /* Reduces a cursor by trying to convert everything to after and trying to
695 * go up to block granularity when possible.
698 reduce_cursor(nir_cursor cursor
)
700 switch (cursor
.option
) {
701 case nir_cursor_before_block
:
702 assert(nir_cf_node_prev(&cursor
.block
->cf_node
) == NULL
||
703 nir_cf_node_prev(&cursor
.block
->cf_node
)->type
!= nir_cf_node_block
);
704 if (exec_list_is_empty(&cursor
.block
->instr_list
)) {
705 /* Empty block. After is as good as before. */
706 cursor
.option
= nir_cursor_after_block
;
710 case nir_cursor_after_block
:
713 case nir_cursor_before_instr
: {
714 nir_instr
*prev_instr
= nir_instr_prev(cursor
.instr
);
716 /* Before this instruction is after the previous */
717 cursor
.instr
= prev_instr
;
718 cursor
.option
= nir_cursor_after_instr
;
720 /* No previous instruction. Switch to before block */
721 cursor
.block
= cursor
.instr
->block
;
722 cursor
.option
= nir_cursor_before_block
;
724 return reduce_cursor(cursor
);
727 case nir_cursor_after_instr
:
728 if (nir_instr_next(cursor
.instr
) == NULL
) {
729 /* This is the last instruction, switch to after block */
730 cursor
.option
= nir_cursor_after_block
;
731 cursor
.block
= cursor
.instr
->block
;
736 unreachable("Inavlid cursor option");
741 nir_cursors_equal(nir_cursor a
, nir_cursor b
)
743 /* Reduced cursors should be unique */
744 a
= reduce_cursor(a
);
745 b
= reduce_cursor(b
);
747 return a
.block
== b
.block
&& a
.option
== b
.option
;
751 add_use_cb(nir_src
*src
, void *state
)
753 nir_instr
*instr
= state
;
755 src
->parent_instr
= instr
;
756 list_addtail(&src
->use_link
,
757 src
->is_ssa
? &src
->ssa
->uses
: &src
->reg
.reg
->uses
);
763 add_ssa_def_cb(nir_ssa_def
*def
, void *state
)
765 nir_instr
*instr
= state
;
767 if (instr
->block
&& def
->index
== UINT_MAX
) {
768 nir_function_impl
*impl
=
769 nir_cf_node_get_function(&instr
->block
->cf_node
);
771 def
->index
= impl
->ssa_alloc
++;
778 add_reg_def_cb(nir_dest
*dest
, void *state
)
780 nir_instr
*instr
= state
;
783 dest
->reg
.parent_instr
= instr
;
784 list_addtail(&dest
->reg
.def_link
, &dest
->reg
.reg
->defs
);
791 add_defs_uses(nir_instr
*instr
)
793 nir_foreach_src(instr
, add_use_cb
, instr
);
794 nir_foreach_dest(instr
, add_reg_def_cb
, instr
);
795 nir_foreach_ssa_def(instr
, add_ssa_def_cb
, instr
);
799 nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
)
801 switch (cursor
.option
) {
802 case nir_cursor_before_block
:
803 /* Only allow inserting jumps into empty blocks. */
804 if (instr
->type
== nir_instr_type_jump
)
805 assert(exec_list_is_empty(&cursor
.block
->instr_list
));
807 instr
->block
= cursor
.block
;
808 add_defs_uses(instr
);
809 exec_list_push_head(&cursor
.block
->instr_list
, &instr
->node
);
811 case nir_cursor_after_block
: {
812 /* Inserting instructions after a jump is illegal. */
813 nir_instr
*last
= nir_block_last_instr(cursor
.block
);
814 assert(last
== NULL
|| last
->type
!= nir_instr_type_jump
);
817 instr
->block
= cursor
.block
;
818 add_defs_uses(instr
);
819 exec_list_push_tail(&cursor
.block
->instr_list
, &instr
->node
);
822 case nir_cursor_before_instr
:
823 assert(instr
->type
!= nir_instr_type_jump
);
824 instr
->block
= cursor
.instr
->block
;
825 add_defs_uses(instr
);
826 exec_node_insert_node_before(&cursor
.instr
->node
, &instr
->node
);
828 case nir_cursor_after_instr
:
829 /* Inserting instructions after a jump is illegal. */
830 assert(cursor
.instr
->type
!= nir_instr_type_jump
);
832 /* Only allow inserting jumps at the end of the block. */
833 if (instr
->type
== nir_instr_type_jump
)
834 assert(cursor
.instr
== nir_block_last_instr(cursor
.instr
->block
));
836 instr
->block
= cursor
.instr
->block
;
837 add_defs_uses(instr
);
838 exec_node_insert_after(&cursor
.instr
->node
, &instr
->node
);
842 if (instr
->type
== nir_instr_type_jump
)
843 nir_handle_add_jump(instr
->block
);
847 src_is_valid(const nir_src
*src
)
849 return src
->is_ssa
? (src
->ssa
!= NULL
) : (src
->reg
.reg
!= NULL
);
853 remove_use_cb(nir_src
*src
, void *state
)
857 if (src_is_valid(src
))
858 list_del(&src
->use_link
);
864 remove_def_cb(nir_dest
*dest
, void *state
)
869 list_del(&dest
->reg
.def_link
);
875 remove_defs_uses(nir_instr
*instr
)
877 nir_foreach_dest(instr
, remove_def_cb
, instr
);
878 nir_foreach_src(instr
, remove_use_cb
, instr
);
881 void nir_instr_remove_v(nir_instr
*instr
)
883 remove_defs_uses(instr
);
884 exec_node_remove(&instr
->node
);
886 if (instr
->type
== nir_instr_type_jump
) {
887 nir_jump_instr
*jump_instr
= nir_instr_as_jump(instr
);
888 nir_handle_remove_jump(instr
->block
, jump_instr
->type
);
895 nir_index_local_regs(nir_function_impl
*impl
)
898 foreach_list_typed(nir_register
, reg
, node
, &impl
->registers
) {
899 reg
->index
= index
++;
901 impl
->reg_alloc
= index
;
905 nir_index_global_regs(nir_shader
*shader
)
908 foreach_list_typed(nir_register
, reg
, node
, &shader
->registers
) {
909 reg
->index
= index
++;
911 shader
->reg_alloc
= index
;
915 visit_alu_dest(nir_alu_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
917 return cb(&instr
->dest
.dest
, state
);
921 visit_deref_dest(nir_deref_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
923 return cb(&instr
->dest
, state
);
927 visit_intrinsic_dest(nir_intrinsic_instr
*instr
, nir_foreach_dest_cb cb
,
930 if (nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
931 return cb(&instr
->dest
, state
);
937 visit_texture_dest(nir_tex_instr
*instr
, nir_foreach_dest_cb cb
,
940 return cb(&instr
->dest
, state
);
944 visit_phi_dest(nir_phi_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
946 return cb(&instr
->dest
, state
);
950 visit_parallel_copy_dest(nir_parallel_copy_instr
*instr
,
951 nir_foreach_dest_cb cb
, void *state
)
953 nir_foreach_parallel_copy_entry(entry
, instr
) {
954 if (!cb(&entry
->dest
, state
))
962 nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
964 switch (instr
->type
) {
965 case nir_instr_type_alu
:
966 return visit_alu_dest(nir_instr_as_alu(instr
), cb
, state
);
967 case nir_instr_type_deref
:
968 return visit_deref_dest(nir_instr_as_deref(instr
), cb
, state
);
969 case nir_instr_type_intrinsic
:
970 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr
), cb
, state
);
971 case nir_instr_type_tex
:
972 return visit_texture_dest(nir_instr_as_tex(instr
), cb
, state
);
973 case nir_instr_type_phi
:
974 return visit_phi_dest(nir_instr_as_phi(instr
), cb
, state
);
975 case nir_instr_type_parallel_copy
:
976 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr
),
979 case nir_instr_type_load_const
:
980 case nir_instr_type_ssa_undef
:
981 case nir_instr_type_call
:
982 case nir_instr_type_jump
:
986 unreachable("Invalid instruction type");
993 struct foreach_ssa_def_state
{
994 nir_foreach_ssa_def_cb cb
;
999 nir_ssa_def_visitor(nir_dest
*dest
, void *void_state
)
1001 struct foreach_ssa_def_state
*state
= void_state
;
1004 return state
->cb(&dest
->ssa
, state
->client_state
);
1010 nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
, void *state
)
1012 switch (instr
->type
) {
1013 case nir_instr_type_alu
:
1014 case nir_instr_type_deref
:
1015 case nir_instr_type_tex
:
1016 case nir_instr_type_intrinsic
:
1017 case nir_instr_type_phi
:
1018 case nir_instr_type_parallel_copy
: {
1019 struct foreach_ssa_def_state foreach_state
= {cb
, state
};
1020 return nir_foreach_dest(instr
, nir_ssa_def_visitor
, &foreach_state
);
1023 case nir_instr_type_load_const
:
1024 return cb(&nir_instr_as_load_const(instr
)->def
, state
);
1025 case nir_instr_type_ssa_undef
:
1026 return cb(&nir_instr_as_ssa_undef(instr
)->def
, state
);
1027 case nir_instr_type_call
:
1028 case nir_instr_type_jump
:
1031 unreachable("Invalid instruction type");
1036 visit_src(nir_src
*src
, nir_foreach_src_cb cb
, void *state
)
1038 if (!cb(src
, state
))
1040 if (!src
->is_ssa
&& src
->reg
.indirect
)
1041 return cb(src
->reg
.indirect
, state
);
1046 visit_alu_src(nir_alu_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1048 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1049 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1056 visit_deref_instr_src(nir_deref_instr
*instr
,
1057 nir_foreach_src_cb cb
, void *state
)
1059 if (instr
->deref_type
!= nir_deref_type_var
) {
1060 if (!visit_src(&instr
->parent
, cb
, state
))
1064 if (instr
->deref_type
== nir_deref_type_array
) {
1065 if (!visit_src(&instr
->arr
.index
, cb
, state
))
1073 visit_tex_src(nir_tex_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1075 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
1076 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1084 visit_intrinsic_src(nir_intrinsic_instr
*instr
, nir_foreach_src_cb cb
,
1087 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
1088 for (unsigned i
= 0; i
< num_srcs
; i
++) {
1089 if (!visit_src(&instr
->src
[i
], cb
, state
))
1097 visit_call_src(nir_call_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1099 for (unsigned i
= 0; i
< instr
->num_params
; i
++) {
1100 if (!visit_src(&instr
->params
[i
], cb
, state
))
1108 visit_phi_src(nir_phi_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1110 nir_foreach_phi_src(src
, instr
) {
1111 if (!visit_src(&src
->src
, cb
, state
))
1119 visit_parallel_copy_src(nir_parallel_copy_instr
*instr
,
1120 nir_foreach_src_cb cb
, void *state
)
1122 nir_foreach_parallel_copy_entry(entry
, instr
) {
1123 if (!visit_src(&entry
->src
, cb
, state
))
1132 nir_foreach_src_cb cb
;
1133 } visit_dest_indirect_state
;
1136 visit_dest_indirect(nir_dest
*dest
, void *_state
)
1138 visit_dest_indirect_state
*state
= (visit_dest_indirect_state
*) _state
;
1140 if (!dest
->is_ssa
&& dest
->reg
.indirect
)
1141 return state
->cb(dest
->reg
.indirect
, state
->state
);
1147 nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1149 switch (instr
->type
) {
1150 case nir_instr_type_alu
:
1151 if (!visit_alu_src(nir_instr_as_alu(instr
), cb
, state
))
1154 case nir_instr_type_deref
:
1155 if (!visit_deref_instr_src(nir_instr_as_deref(instr
), cb
, state
))
1158 case nir_instr_type_intrinsic
:
1159 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr
), cb
, state
))
1162 case nir_instr_type_tex
:
1163 if (!visit_tex_src(nir_instr_as_tex(instr
), cb
, state
))
1166 case nir_instr_type_call
:
1167 if (!visit_call_src(nir_instr_as_call(instr
), cb
, state
))
1170 case nir_instr_type_load_const
:
1171 /* Constant load instructions have no regular sources */
1173 case nir_instr_type_phi
:
1174 if (!visit_phi_src(nir_instr_as_phi(instr
), cb
, state
))
1177 case nir_instr_type_parallel_copy
:
1178 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr
),
1182 case nir_instr_type_jump
:
1183 case nir_instr_type_ssa_undef
:
1187 unreachable("Invalid instruction type");
1191 visit_dest_indirect_state dest_state
;
1192 dest_state
.state
= state
;
1194 return nir_foreach_dest(instr
, visit_dest_indirect
, &dest_state
);
1198 nir_src_as_const_value(nir_src src
)
1203 if (src
.ssa
->parent_instr
->type
!= nir_instr_type_load_const
)
1206 nir_load_const_instr
*load
= nir_instr_as_load_const(src
.ssa
->parent_instr
);
1208 return &load
->value
;
1212 * Returns true if the source is known to be dynamically uniform. Otherwise it
1213 * returns false which means it may or may not be dynamically uniform but it
1214 * can't be determined.
1217 nir_src_is_dynamically_uniform(nir_src src
)
1222 /* Constants are trivially dynamically uniform */
1223 if (src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
1226 /* As are uniform variables */
1227 if (src
.ssa
->parent_instr
->type
== nir_instr_type_intrinsic
) {
1228 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(src
.ssa
->parent_instr
);
1230 if (intr
->intrinsic
== nir_intrinsic_load_uniform
)
1234 /* XXX: this could have many more tests, such as when a sampler function is
1235 * called with dynamically uniform arguments.
1241 src_remove_all_uses(nir_src
*src
)
1243 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1244 if (!src_is_valid(src
))
1247 list_del(&src
->use_link
);
1252 src_add_all_uses(nir_src
*src
, nir_instr
*parent_instr
, nir_if
*parent_if
)
1254 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1255 if (!src_is_valid(src
))
1259 src
->parent_instr
= parent_instr
;
1261 list_addtail(&src
->use_link
, &src
->ssa
->uses
);
1263 list_addtail(&src
->use_link
, &src
->reg
.reg
->uses
);
1266 src
->parent_if
= parent_if
;
1268 list_addtail(&src
->use_link
, &src
->ssa
->if_uses
);
1270 list_addtail(&src
->use_link
, &src
->reg
.reg
->if_uses
);
1276 nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
)
1278 assert(!src_is_valid(src
) || src
->parent_instr
== instr
);
1280 src_remove_all_uses(src
);
1282 src_add_all_uses(src
, instr
, NULL
);
1286 nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
)
1288 assert(!src_is_valid(dest
) || dest
->parent_instr
== dest_instr
);
1290 src_remove_all_uses(dest
);
1291 src_remove_all_uses(src
);
1293 *src
= NIR_SRC_INIT
;
1294 src_add_all_uses(dest
, dest_instr
, NULL
);
1298 nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
)
1300 nir_src
*src
= &if_stmt
->condition
;
1301 assert(!src_is_valid(src
) || src
->parent_if
== if_stmt
);
1303 src_remove_all_uses(src
);
1305 src_add_all_uses(src
, NULL
, if_stmt
);
1309 nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
, nir_dest new_dest
)
1312 /* We can only overwrite an SSA destination if it has no uses. */
1313 assert(list_empty(&dest
->ssa
.uses
) && list_empty(&dest
->ssa
.if_uses
));
1315 list_del(&dest
->reg
.def_link
);
1316 if (dest
->reg
.indirect
)
1317 src_remove_all_uses(dest
->reg
.indirect
);
1320 /* We can't re-write with an SSA def */
1321 assert(!new_dest
.is_ssa
);
1323 nir_dest_copy(dest
, &new_dest
, instr
);
1325 dest
->reg
.parent_instr
= instr
;
1326 list_addtail(&dest
->reg
.def_link
, &new_dest
.reg
.reg
->defs
);
1328 if (dest
->reg
.indirect
)
1329 src_add_all_uses(dest
->reg
.indirect
, instr
, NULL
);
1332 /* note: does *not* take ownership of 'name' */
1334 nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
1335 unsigned num_components
,
1336 unsigned bit_size
, const char *name
)
1338 def
->name
= ralloc_strdup(instr
, name
);
1339 def
->parent_instr
= instr
;
1340 list_inithead(&def
->uses
);
1341 list_inithead(&def
->if_uses
);
1342 def
->num_components
= num_components
;
1343 def
->bit_size
= bit_size
;
1346 nir_function_impl
*impl
=
1347 nir_cf_node_get_function(&instr
->block
->cf_node
);
1349 def
->index
= impl
->ssa_alloc
++;
1351 def
->index
= UINT_MAX
;
1355 /* note: does *not* take ownership of 'name' */
1357 nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
1358 unsigned num_components
, unsigned bit_size
,
1361 dest
->is_ssa
= true;
1362 nir_ssa_def_init(instr
, &dest
->ssa
, num_components
, bit_size
, name
);
1366 nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
)
1368 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1370 nir_foreach_use_safe(use_src
, def
)
1371 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1373 nir_foreach_if_use_safe(use_src
, def
)
1374 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1378 is_instr_between(nir_instr
*start
, nir_instr
*end
, nir_instr
*between
)
1380 assert(start
->block
== end
->block
);
1382 if (between
->block
!= start
->block
)
1385 /* Search backwards looking for "between" */
1386 while (start
!= end
) {
1390 end
= nir_instr_prev(end
);
1397 /* Replaces all uses of the given SSA def with the given source but only if
1398 * the use comes after the after_me instruction. This can be useful if you
1399 * are emitting code to fix up the result of some instruction: you can freely
1400 * use the result in that code and then call rewrite_uses_after and pass the
1401 * last fixup instruction as after_me and it will replace all of the uses you
1402 * want without touching the fixup code.
1404 * This function assumes that after_me is in the same block as
1405 * def->parent_instr and that after_me comes after def->parent_instr.
1408 nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
1409 nir_instr
*after_me
)
1411 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1413 nir_foreach_use_safe(use_src
, def
) {
1414 assert(use_src
->parent_instr
!= def
->parent_instr
);
1415 /* Since def already dominates all of its uses, the only way a use can
1416 * not be dominated by after_me is if it is between def and after_me in
1417 * the instruction list.
1419 if (!is_instr_between(def
->parent_instr
, after_me
, use_src
->parent_instr
))
1420 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1423 nir_foreach_if_use_safe(use_src
, def
)
1424 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1427 nir_component_mask_t
1428 nir_ssa_def_components_read(const nir_ssa_def
*def
)
1430 nir_component_mask_t read_mask
= 0;
1431 nir_foreach_use(use
, def
) {
1432 if (use
->parent_instr
->type
== nir_instr_type_alu
) {
1433 nir_alu_instr
*alu
= nir_instr_as_alu(use
->parent_instr
);
1434 nir_alu_src
*alu_src
= exec_node_data(nir_alu_src
, use
, src
);
1435 int src_idx
= alu_src
- &alu
->src
[0];
1436 assert(src_idx
>= 0 && src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
1438 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1439 if (!nir_alu_instr_channel_used(alu
, src_idx
, c
))
1442 read_mask
|= (1 << alu_src
->swizzle
[c
]);
1445 return (1 << def
->num_components
) - 1;
1449 if (!list_empty(&def
->if_uses
))
1456 nir_block_cf_tree_next(nir_block
*block
)
1458 if (block
== NULL
) {
1459 /* nir_foreach_block_safe() will call this function on a NULL block
1460 * after the last iteration, but it won't use the result so just return
1466 nir_cf_node
*cf_next
= nir_cf_node_next(&block
->cf_node
);
1468 return nir_cf_node_cf_tree_first(cf_next
);
1470 nir_cf_node
*parent
= block
->cf_node
.parent
;
1472 switch (parent
->type
) {
1473 case nir_cf_node_if
: {
1474 /* Are we at the end of the if? Go to the beginning of the else */
1475 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1476 if (block
== nir_if_last_then_block(if_stmt
))
1477 return nir_if_first_else_block(if_stmt
);
1479 assert(block
== nir_if_last_else_block(if_stmt
));
1483 case nir_cf_node_loop
:
1484 return nir_cf_node_as_block(nir_cf_node_next(parent
));
1486 case nir_cf_node_function
:
1490 unreachable("unknown cf node type");
1495 nir_block_cf_tree_prev(nir_block
*block
)
1497 if (block
== NULL
) {
1498 /* do this for consistency with nir_block_cf_tree_next() */
1502 nir_cf_node
*cf_prev
= nir_cf_node_prev(&block
->cf_node
);
1504 return nir_cf_node_cf_tree_last(cf_prev
);
1506 nir_cf_node
*parent
= block
->cf_node
.parent
;
1508 switch (parent
->type
) {
1509 case nir_cf_node_if
: {
1510 /* Are we at the beginning of the else? Go to the end of the if */
1511 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1512 if (block
== nir_if_first_else_block(if_stmt
))
1513 return nir_if_last_then_block(if_stmt
);
1515 assert(block
== nir_if_first_then_block(if_stmt
));
1519 case nir_cf_node_loop
:
1520 return nir_cf_node_as_block(nir_cf_node_prev(parent
));
1522 case nir_cf_node_function
:
1526 unreachable("unknown cf node type");
1530 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
)
1532 switch (node
->type
) {
1533 case nir_cf_node_function
: {
1534 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1535 return nir_start_block(impl
);
1538 case nir_cf_node_if
: {
1539 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1540 return nir_if_first_then_block(if_stmt
);
1543 case nir_cf_node_loop
: {
1544 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1545 return nir_loop_first_block(loop
);
1548 case nir_cf_node_block
: {
1549 return nir_cf_node_as_block(node
);
1553 unreachable("unknown node type");
1557 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
)
1559 switch (node
->type
) {
1560 case nir_cf_node_function
: {
1561 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1562 return nir_impl_last_block(impl
);
1565 case nir_cf_node_if
: {
1566 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1567 return nir_if_last_else_block(if_stmt
);
1570 case nir_cf_node_loop
: {
1571 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1572 return nir_loop_last_block(loop
);
1575 case nir_cf_node_block
: {
1576 return nir_cf_node_as_block(node
);
1580 unreachable("unknown node type");
1584 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
)
1586 if (node
->type
== nir_cf_node_block
)
1587 return nir_block_cf_tree_next(nir_cf_node_as_block(node
));
1588 else if (node
->type
== nir_cf_node_function
)
1591 return nir_cf_node_as_block(nir_cf_node_next(node
));
1595 nir_block_get_following_if(nir_block
*block
)
1597 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1600 if (nir_cf_node_is_last(&block
->cf_node
))
1603 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1605 if (next_node
->type
!= nir_cf_node_if
)
1608 return nir_cf_node_as_if(next_node
);
1612 nir_block_get_following_loop(nir_block
*block
)
1614 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1617 if (nir_cf_node_is_last(&block
->cf_node
))
1620 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1622 if (next_node
->type
!= nir_cf_node_loop
)
1625 return nir_cf_node_as_loop(next_node
);
1629 nir_index_blocks(nir_function_impl
*impl
)
1633 if (impl
->valid_metadata
& nir_metadata_block_index
)
1636 nir_foreach_block(block
, impl
) {
1637 block
->index
= index
++;
1640 impl
->num_blocks
= index
;
1644 index_ssa_def_cb(nir_ssa_def
*def
, void *state
)
1646 unsigned *index
= (unsigned *) state
;
1647 def
->index
= (*index
)++;
1653 * The indices are applied top-to-bottom which has the very nice property
1654 * that, if A dominates B, then A->index <= B->index.
1657 nir_index_ssa_defs(nir_function_impl
*impl
)
1661 nir_foreach_block(block
, impl
) {
1662 nir_foreach_instr(instr
, block
)
1663 nir_foreach_ssa_def(instr
, index_ssa_def_cb
, &index
);
1666 impl
->ssa_alloc
= index
;
1670 * The indices are applied top-to-bottom which has the very nice property
1671 * that, if A dominates B, then A->index <= B->index.
1674 nir_index_instrs(nir_function_impl
*impl
)
1678 nir_foreach_block(block
, impl
) {
1679 nir_foreach_instr(instr
, block
)
1680 instr
->index
= index
++;
1687 nir_intrinsic_from_system_value(gl_system_value val
)
1690 case SYSTEM_VALUE_VERTEX_ID
:
1691 return nir_intrinsic_load_vertex_id
;
1692 case SYSTEM_VALUE_INSTANCE_ID
:
1693 return nir_intrinsic_load_instance_id
;
1694 case SYSTEM_VALUE_DRAW_ID
:
1695 return nir_intrinsic_load_draw_id
;
1696 case SYSTEM_VALUE_BASE_INSTANCE
:
1697 return nir_intrinsic_load_base_instance
;
1698 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
:
1699 return nir_intrinsic_load_vertex_id_zero_base
;
1700 case SYSTEM_VALUE_IS_INDEXED_DRAW
:
1701 return nir_intrinsic_load_is_indexed_draw
;
1702 case SYSTEM_VALUE_FIRST_VERTEX
:
1703 return nir_intrinsic_load_first_vertex
;
1704 case SYSTEM_VALUE_BASE_VERTEX
:
1705 return nir_intrinsic_load_base_vertex
;
1706 case SYSTEM_VALUE_INVOCATION_ID
:
1707 return nir_intrinsic_load_invocation_id
;
1708 case SYSTEM_VALUE_FRAG_COORD
:
1709 return nir_intrinsic_load_frag_coord
;
1710 case SYSTEM_VALUE_FRONT_FACE
:
1711 return nir_intrinsic_load_front_face
;
1712 case SYSTEM_VALUE_SAMPLE_ID
:
1713 return nir_intrinsic_load_sample_id
;
1714 case SYSTEM_VALUE_SAMPLE_POS
:
1715 return nir_intrinsic_load_sample_pos
;
1716 case SYSTEM_VALUE_SAMPLE_MASK_IN
:
1717 return nir_intrinsic_load_sample_mask_in
;
1718 case SYSTEM_VALUE_LOCAL_INVOCATION_ID
:
1719 return nir_intrinsic_load_local_invocation_id
;
1720 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
:
1721 return nir_intrinsic_load_local_invocation_index
;
1722 case SYSTEM_VALUE_WORK_GROUP_ID
:
1723 return nir_intrinsic_load_work_group_id
;
1724 case SYSTEM_VALUE_NUM_WORK_GROUPS
:
1725 return nir_intrinsic_load_num_work_groups
;
1726 case SYSTEM_VALUE_PRIMITIVE_ID
:
1727 return nir_intrinsic_load_primitive_id
;
1728 case SYSTEM_VALUE_TESS_COORD
:
1729 return nir_intrinsic_load_tess_coord
;
1730 case SYSTEM_VALUE_TESS_LEVEL_OUTER
:
1731 return nir_intrinsic_load_tess_level_outer
;
1732 case SYSTEM_VALUE_TESS_LEVEL_INNER
:
1733 return nir_intrinsic_load_tess_level_inner
;
1734 case SYSTEM_VALUE_VERTICES_IN
:
1735 return nir_intrinsic_load_patch_vertices_in
;
1736 case SYSTEM_VALUE_HELPER_INVOCATION
:
1737 return nir_intrinsic_load_helper_invocation
;
1738 case SYSTEM_VALUE_VIEW_INDEX
:
1739 return nir_intrinsic_load_view_index
;
1740 case SYSTEM_VALUE_SUBGROUP_SIZE
:
1741 return nir_intrinsic_load_subgroup_size
;
1742 case SYSTEM_VALUE_SUBGROUP_INVOCATION
:
1743 return nir_intrinsic_load_subgroup_invocation
;
1744 case SYSTEM_VALUE_SUBGROUP_EQ_MASK
:
1745 return nir_intrinsic_load_subgroup_eq_mask
;
1746 case SYSTEM_VALUE_SUBGROUP_GE_MASK
:
1747 return nir_intrinsic_load_subgroup_ge_mask
;
1748 case SYSTEM_VALUE_SUBGROUP_GT_MASK
:
1749 return nir_intrinsic_load_subgroup_gt_mask
;
1750 case SYSTEM_VALUE_SUBGROUP_LE_MASK
:
1751 return nir_intrinsic_load_subgroup_le_mask
;
1752 case SYSTEM_VALUE_SUBGROUP_LT_MASK
:
1753 return nir_intrinsic_load_subgroup_lt_mask
;
1754 case SYSTEM_VALUE_NUM_SUBGROUPS
:
1755 return nir_intrinsic_load_num_subgroups
;
1756 case SYSTEM_VALUE_SUBGROUP_ID
:
1757 return nir_intrinsic_load_subgroup_id
;
1758 case SYSTEM_VALUE_LOCAL_GROUP_SIZE
:
1759 return nir_intrinsic_load_local_group_size
;
1760 case SYSTEM_VALUE_GLOBAL_INVOCATION_ID
:
1761 return nir_intrinsic_load_global_invocation_id
;
1762 case SYSTEM_VALUE_WORK_DIM
:
1763 return nir_intrinsic_load_work_dim
;
1765 unreachable("system value does not directly correspond to intrinsic");
1770 nir_system_value_from_intrinsic(nir_intrinsic_op intrin
)
1773 case nir_intrinsic_load_vertex_id
:
1774 return SYSTEM_VALUE_VERTEX_ID
;
1775 case nir_intrinsic_load_instance_id
:
1776 return SYSTEM_VALUE_INSTANCE_ID
;
1777 case nir_intrinsic_load_draw_id
:
1778 return SYSTEM_VALUE_DRAW_ID
;
1779 case nir_intrinsic_load_base_instance
:
1780 return SYSTEM_VALUE_BASE_INSTANCE
;
1781 case nir_intrinsic_load_vertex_id_zero_base
:
1782 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
;
1783 case nir_intrinsic_load_first_vertex
:
1784 return SYSTEM_VALUE_FIRST_VERTEX
;
1785 case nir_intrinsic_load_is_indexed_draw
:
1786 return SYSTEM_VALUE_IS_INDEXED_DRAW
;
1787 case nir_intrinsic_load_base_vertex
:
1788 return SYSTEM_VALUE_BASE_VERTEX
;
1789 case nir_intrinsic_load_invocation_id
:
1790 return SYSTEM_VALUE_INVOCATION_ID
;
1791 case nir_intrinsic_load_frag_coord
:
1792 return SYSTEM_VALUE_FRAG_COORD
;
1793 case nir_intrinsic_load_front_face
:
1794 return SYSTEM_VALUE_FRONT_FACE
;
1795 case nir_intrinsic_load_sample_id
:
1796 return SYSTEM_VALUE_SAMPLE_ID
;
1797 case nir_intrinsic_load_sample_pos
:
1798 return SYSTEM_VALUE_SAMPLE_POS
;
1799 case nir_intrinsic_load_sample_mask_in
:
1800 return SYSTEM_VALUE_SAMPLE_MASK_IN
;
1801 case nir_intrinsic_load_local_invocation_id
:
1802 return SYSTEM_VALUE_LOCAL_INVOCATION_ID
;
1803 case nir_intrinsic_load_local_invocation_index
:
1804 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
;
1805 case nir_intrinsic_load_num_work_groups
:
1806 return SYSTEM_VALUE_NUM_WORK_GROUPS
;
1807 case nir_intrinsic_load_work_group_id
:
1808 return SYSTEM_VALUE_WORK_GROUP_ID
;
1809 case nir_intrinsic_load_primitive_id
:
1810 return SYSTEM_VALUE_PRIMITIVE_ID
;
1811 case nir_intrinsic_load_tess_coord
:
1812 return SYSTEM_VALUE_TESS_COORD
;
1813 case nir_intrinsic_load_tess_level_outer
:
1814 return SYSTEM_VALUE_TESS_LEVEL_OUTER
;
1815 case nir_intrinsic_load_tess_level_inner
:
1816 return SYSTEM_VALUE_TESS_LEVEL_INNER
;
1817 case nir_intrinsic_load_patch_vertices_in
:
1818 return SYSTEM_VALUE_VERTICES_IN
;
1819 case nir_intrinsic_load_helper_invocation
:
1820 return SYSTEM_VALUE_HELPER_INVOCATION
;
1821 case nir_intrinsic_load_view_index
:
1822 return SYSTEM_VALUE_VIEW_INDEX
;
1823 case nir_intrinsic_load_subgroup_size
:
1824 return SYSTEM_VALUE_SUBGROUP_SIZE
;
1825 case nir_intrinsic_load_subgroup_invocation
:
1826 return SYSTEM_VALUE_SUBGROUP_INVOCATION
;
1827 case nir_intrinsic_load_subgroup_eq_mask
:
1828 return SYSTEM_VALUE_SUBGROUP_EQ_MASK
;
1829 case nir_intrinsic_load_subgroup_ge_mask
:
1830 return SYSTEM_VALUE_SUBGROUP_GE_MASK
;
1831 case nir_intrinsic_load_subgroup_gt_mask
:
1832 return SYSTEM_VALUE_SUBGROUP_GT_MASK
;
1833 case nir_intrinsic_load_subgroup_le_mask
:
1834 return SYSTEM_VALUE_SUBGROUP_LE_MASK
;
1835 case nir_intrinsic_load_subgroup_lt_mask
:
1836 return SYSTEM_VALUE_SUBGROUP_LT_MASK
;
1837 case nir_intrinsic_load_num_subgroups
:
1838 return SYSTEM_VALUE_NUM_SUBGROUPS
;
1839 case nir_intrinsic_load_subgroup_id
:
1840 return SYSTEM_VALUE_SUBGROUP_ID
;
1841 case nir_intrinsic_load_local_group_size
:
1842 return SYSTEM_VALUE_LOCAL_GROUP_SIZE
;
1843 case nir_intrinsic_load_global_invocation_id
:
1844 return SYSTEM_VALUE_GLOBAL_INVOCATION_ID
;
1846 unreachable("intrinsic doesn't produce a system value");