b608b2a0d64ccadd02505e50636dbd5af1e60825
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options,
36 shader_info *si)
37 {
38 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
39
40 exec_list_make_empty(&shader->uniforms);
41 exec_list_make_empty(&shader->inputs);
42 exec_list_make_empty(&shader->outputs);
43 exec_list_make_empty(&shader->shared);
44
45 shader->options = options;
46
47 if (si)
48 shader->info = *si;
49
50 exec_list_make_empty(&shader->functions);
51 exec_list_make_empty(&shader->registers);
52 exec_list_make_empty(&shader->globals);
53 exec_list_make_empty(&shader->system_values);
54 shader->reg_alloc = 0;
55
56 shader->num_inputs = 0;
57 shader->num_outputs = 0;
58 shader->num_uniforms = 0;
59 shader->num_shared = 0;
60
61 shader->stage = stage;
62
63 return shader;
64 }
65
66 static nir_register *
67 reg_create(void *mem_ctx, struct exec_list *list)
68 {
69 nir_register *reg = ralloc(mem_ctx, nir_register);
70
71 list_inithead(&reg->uses);
72 list_inithead(&reg->defs);
73 list_inithead(&reg->if_uses);
74
75 reg->num_components = 0;
76 reg->bit_size = 32;
77 reg->num_array_elems = 0;
78 reg->is_packed = false;
79 reg->name = NULL;
80
81 exec_list_push_tail(list, &reg->node);
82
83 return reg;
84 }
85
86 nir_register *
87 nir_global_reg_create(nir_shader *shader)
88 {
89 nir_register *reg = reg_create(shader, &shader->registers);
90 reg->index = shader->reg_alloc++;
91 reg->is_global = true;
92
93 return reg;
94 }
95
96 nir_register *
97 nir_local_reg_create(nir_function_impl *impl)
98 {
99 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
100 reg->index = impl->reg_alloc++;
101 reg->is_global = false;
102
103 return reg;
104 }
105
106 void
107 nir_reg_remove(nir_register *reg)
108 {
109 exec_node_remove(&reg->node);
110 }
111
112 void
113 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
114 {
115 switch (var->data.mode) {
116 case nir_var_all:
117 assert(!"invalid mode");
118 break;
119
120 case nir_var_local:
121 assert(!"nir_shader_add_variable cannot be used for local variables");
122 break;
123
124 case nir_var_param:
125 assert(!"nir_shader_add_variable cannot be used for function parameters");
126 break;
127
128 case nir_var_global:
129 exec_list_push_tail(&shader->globals, &var->node);
130 break;
131
132 case nir_var_shader_in:
133 exec_list_push_tail(&shader->inputs, &var->node);
134 break;
135
136 case nir_var_shader_out:
137 exec_list_push_tail(&shader->outputs, &var->node);
138 break;
139
140 case nir_var_uniform:
141 case nir_var_shader_storage:
142 exec_list_push_tail(&shader->uniforms, &var->node);
143 break;
144
145 case nir_var_shared:
146 assert(shader->stage == MESA_SHADER_COMPUTE);
147 exec_list_push_tail(&shader->shared, &var->node);
148 break;
149
150 case nir_var_system_value:
151 exec_list_push_tail(&shader->system_values, &var->node);
152 break;
153 }
154 }
155
156 nir_variable *
157 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
158 const struct glsl_type *type, const char *name)
159 {
160 nir_variable *var = rzalloc(shader, nir_variable);
161 var->name = ralloc_strdup(var, name);
162 var->type = type;
163 var->data.mode = mode;
164
165 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
166 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
167 var->data.interpolation = INTERP_MODE_SMOOTH;
168
169 if (mode == nir_var_shader_in || mode == nir_var_uniform)
170 var->data.read_only = true;
171
172 nir_shader_add_variable(shader, var);
173
174 return var;
175 }
176
177 nir_variable *
178 nir_local_variable_create(nir_function_impl *impl,
179 const struct glsl_type *type, const char *name)
180 {
181 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
182 var->name = ralloc_strdup(var, name);
183 var->type = type;
184 var->data.mode = nir_var_local;
185
186 nir_function_impl_add_variable(impl, var);
187
188 return var;
189 }
190
191 nir_function *
192 nir_function_create(nir_shader *shader, const char *name)
193 {
194 nir_function *func = ralloc(shader, nir_function);
195
196 exec_list_push_tail(&shader->functions, &func->node);
197
198 func->name = ralloc_strdup(func, name);
199 func->shader = shader;
200 func->num_params = 0;
201 func->params = NULL;
202 func->return_type = glsl_void_type();
203 func->impl = NULL;
204
205 return func;
206 }
207
208 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
209 {
210 dest->is_ssa = src->is_ssa;
211 if (src->is_ssa) {
212 dest->ssa = src->ssa;
213 } else {
214 dest->reg.base_offset = src->reg.base_offset;
215 dest->reg.reg = src->reg.reg;
216 if (src->reg.indirect) {
217 dest->reg.indirect = ralloc(mem_ctx, nir_src);
218 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
219 } else {
220 dest->reg.indirect = NULL;
221 }
222 }
223 }
224
225 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
226 {
227 /* Copying an SSA definition makes no sense whatsoever. */
228 assert(!src->is_ssa);
229
230 dest->is_ssa = false;
231
232 dest->reg.base_offset = src->reg.base_offset;
233 dest->reg.reg = src->reg.reg;
234 if (src->reg.indirect) {
235 dest->reg.indirect = ralloc(instr, nir_src);
236 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
237 } else {
238 dest->reg.indirect = NULL;
239 }
240 }
241
242 void
243 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
244 nir_alu_instr *instr)
245 {
246 nir_src_copy(&dest->src, &src->src, &instr->instr);
247 dest->abs = src->abs;
248 dest->negate = src->negate;
249 for (unsigned i = 0; i < 4; i++)
250 dest->swizzle[i] = src->swizzle[i];
251 }
252
253 void
254 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
255 nir_alu_instr *instr)
256 {
257 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
258 dest->write_mask = src->write_mask;
259 dest->saturate = src->saturate;
260 }
261
262
263 static void
264 cf_init(nir_cf_node *node, nir_cf_node_type type)
265 {
266 exec_node_init(&node->node);
267 node->parent = NULL;
268 node->type = type;
269 }
270
271 nir_function_impl *
272 nir_function_impl_create_bare(nir_shader *shader)
273 {
274 nir_function_impl *impl = ralloc(shader, nir_function_impl);
275
276 impl->function = NULL;
277
278 cf_init(&impl->cf_node, nir_cf_node_function);
279
280 exec_list_make_empty(&impl->body);
281 exec_list_make_empty(&impl->registers);
282 exec_list_make_empty(&impl->locals);
283 impl->num_params = 0;
284 impl->params = NULL;
285 impl->return_var = NULL;
286 impl->reg_alloc = 0;
287 impl->ssa_alloc = 0;
288 impl->valid_metadata = nir_metadata_none;
289
290 /* create start & end blocks */
291 nir_block *start_block = nir_block_create(shader);
292 nir_block *end_block = nir_block_create(shader);
293 start_block->cf_node.parent = &impl->cf_node;
294 end_block->cf_node.parent = &impl->cf_node;
295 impl->end_block = end_block;
296
297 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
298
299 start_block->successors[0] = end_block;
300 _mesa_set_add(end_block->predecessors, start_block);
301 return impl;
302 }
303
304 nir_function_impl *
305 nir_function_impl_create(nir_function *function)
306 {
307 assert(function->impl == NULL);
308
309 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
310
311 function->impl = impl;
312 impl->function = function;
313
314 impl->num_params = function->num_params;
315 impl->params = ralloc_array(function->shader,
316 nir_variable *, impl->num_params);
317
318 for (unsigned i = 0; i < impl->num_params; i++) {
319 impl->params[i] = rzalloc(function->shader, nir_variable);
320 impl->params[i]->type = function->params[i].type;
321 impl->params[i]->data.mode = nir_var_param;
322 impl->params[i]->data.location = i;
323 }
324
325 if (!glsl_type_is_void(function->return_type)) {
326 impl->return_var = rzalloc(function->shader, nir_variable);
327 impl->return_var->type = function->return_type;
328 impl->return_var->data.mode = nir_var_param;
329 impl->return_var->data.location = -1;
330 } else {
331 impl->return_var = NULL;
332 }
333
334 return impl;
335 }
336
337 nir_block *
338 nir_block_create(nir_shader *shader)
339 {
340 nir_block *block = rzalloc(shader, nir_block);
341
342 cf_init(&block->cf_node, nir_cf_node_block);
343
344 block->successors[0] = block->successors[1] = NULL;
345 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
346 _mesa_key_pointer_equal);
347 block->imm_dom = NULL;
348 /* XXX maybe it would be worth it to defer allocation? This
349 * way it doesn't get allocated for shader refs that never run
350 * nir_calc_dominance? For example, state-tracker creates an
351 * initial IR, clones that, runs appropriate lowering pass, passes
352 * to driver which does common lowering/opt, and then stores ref
353 * which is later used to do state specific lowering and futher
354 * opt. Do any of the references not need dominance metadata?
355 */
356 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
357 _mesa_key_pointer_equal);
358
359 exec_list_make_empty(&block->instr_list);
360
361 return block;
362 }
363
364 static inline void
365 src_init(nir_src *src)
366 {
367 src->is_ssa = false;
368 src->reg.reg = NULL;
369 src->reg.indirect = NULL;
370 src->reg.base_offset = 0;
371 }
372
373 nir_if *
374 nir_if_create(nir_shader *shader)
375 {
376 nir_if *if_stmt = ralloc(shader, nir_if);
377
378 cf_init(&if_stmt->cf_node, nir_cf_node_if);
379 src_init(&if_stmt->condition);
380
381 nir_block *then = nir_block_create(shader);
382 exec_list_make_empty(&if_stmt->then_list);
383 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
384 then->cf_node.parent = &if_stmt->cf_node;
385
386 nir_block *else_stmt = nir_block_create(shader);
387 exec_list_make_empty(&if_stmt->else_list);
388 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
389 else_stmt->cf_node.parent = &if_stmt->cf_node;
390
391 return if_stmt;
392 }
393
394 nir_loop *
395 nir_loop_create(nir_shader *shader)
396 {
397 nir_loop *loop = rzalloc(shader, nir_loop);
398
399 cf_init(&loop->cf_node, nir_cf_node_loop);
400
401 nir_block *body = nir_block_create(shader);
402 exec_list_make_empty(&loop->body);
403 exec_list_push_tail(&loop->body, &body->cf_node.node);
404 body->cf_node.parent = &loop->cf_node;
405
406 body->successors[0] = body;
407 _mesa_set_add(body->predecessors, body);
408
409 return loop;
410 }
411
412 static void
413 instr_init(nir_instr *instr, nir_instr_type type)
414 {
415 instr->type = type;
416 instr->block = NULL;
417 exec_node_init(&instr->node);
418 }
419
420 static void
421 dest_init(nir_dest *dest)
422 {
423 dest->is_ssa = false;
424 dest->reg.reg = NULL;
425 dest->reg.indirect = NULL;
426 dest->reg.base_offset = 0;
427 }
428
429 static void
430 alu_dest_init(nir_alu_dest *dest)
431 {
432 dest_init(&dest->dest);
433 dest->saturate = false;
434 dest->write_mask = 0xf;
435 }
436
437 static void
438 alu_src_init(nir_alu_src *src)
439 {
440 src_init(&src->src);
441 src->abs = src->negate = false;
442 src->swizzle[0] = 0;
443 src->swizzle[1] = 1;
444 src->swizzle[2] = 2;
445 src->swizzle[3] = 3;
446 }
447
448 nir_alu_instr *
449 nir_alu_instr_create(nir_shader *shader, nir_op op)
450 {
451 unsigned num_srcs = nir_op_infos[op].num_inputs;
452 /* TODO: don't use rzalloc */
453 nir_alu_instr *instr =
454 rzalloc_size(shader,
455 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
456
457 instr_init(&instr->instr, nir_instr_type_alu);
458 instr->op = op;
459 alu_dest_init(&instr->dest);
460 for (unsigned i = 0; i < num_srcs; i++)
461 alu_src_init(&instr->src[i]);
462
463 return instr;
464 }
465
466 nir_jump_instr *
467 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
468 {
469 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
470 instr_init(&instr->instr, nir_instr_type_jump);
471 instr->type = type;
472 return instr;
473 }
474
475 nir_load_const_instr *
476 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
477 unsigned bit_size)
478 {
479 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
480 instr_init(&instr->instr, nir_instr_type_load_const);
481
482 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
483
484 return instr;
485 }
486
487 nir_intrinsic_instr *
488 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
489 {
490 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
491 /* TODO: don't use rzalloc */
492 nir_intrinsic_instr *instr =
493 rzalloc_size(shader,
494 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
495
496 instr_init(&instr->instr, nir_instr_type_intrinsic);
497 instr->intrinsic = op;
498
499 if (nir_intrinsic_infos[op].has_dest)
500 dest_init(&instr->dest);
501
502 for (unsigned i = 0; i < num_srcs; i++)
503 src_init(&instr->src[i]);
504
505 return instr;
506 }
507
508 nir_call_instr *
509 nir_call_instr_create(nir_shader *shader, nir_function *callee)
510 {
511 nir_call_instr *instr = ralloc(shader, nir_call_instr);
512 instr_init(&instr->instr, nir_instr_type_call);
513
514 instr->callee = callee;
515 instr->num_params = callee->num_params;
516 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
517 instr->return_deref = NULL;
518
519 return instr;
520 }
521
522 nir_tex_instr *
523 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
524 {
525 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
526 instr_init(&instr->instr, nir_instr_type_tex);
527
528 dest_init(&instr->dest);
529
530 instr->num_srcs = num_srcs;
531 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
532 for (unsigned i = 0; i < num_srcs; i++)
533 src_init(&instr->src[i].src);
534
535 instr->texture_index = 0;
536 instr->texture_array_size = 0;
537 instr->texture = NULL;
538 instr->sampler_index = 0;
539 instr->sampler = NULL;
540
541 return instr;
542 }
543
544 void
545 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
546 {
547 assert(src_idx < tex->num_srcs);
548
549 /* First rewrite the source to NIR_SRC_INIT */
550 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
551
552 /* Now, move all of the other sources down */
553 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
554 tex->src[i-1].src_type = tex->src[i].src_type;
555 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
556 }
557 tex->num_srcs--;
558 }
559
560 nir_phi_instr *
561 nir_phi_instr_create(nir_shader *shader)
562 {
563 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
564 instr_init(&instr->instr, nir_instr_type_phi);
565
566 dest_init(&instr->dest);
567 exec_list_make_empty(&instr->srcs);
568 return instr;
569 }
570
571 nir_parallel_copy_instr *
572 nir_parallel_copy_instr_create(nir_shader *shader)
573 {
574 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
575 instr_init(&instr->instr, nir_instr_type_parallel_copy);
576
577 exec_list_make_empty(&instr->entries);
578
579 return instr;
580 }
581
582 nir_ssa_undef_instr *
583 nir_ssa_undef_instr_create(nir_shader *shader,
584 unsigned num_components,
585 unsigned bit_size)
586 {
587 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
588 instr_init(&instr->instr, nir_instr_type_ssa_undef);
589
590 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
591
592 return instr;
593 }
594
595 nir_deref_var *
596 nir_deref_var_create(void *mem_ctx, nir_variable *var)
597 {
598 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
599 deref->deref.deref_type = nir_deref_type_var;
600 deref->deref.child = NULL;
601 deref->deref.type = var->type;
602 deref->var = var;
603 return deref;
604 }
605
606 nir_deref_array *
607 nir_deref_array_create(void *mem_ctx)
608 {
609 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
610 deref->deref.deref_type = nir_deref_type_array;
611 deref->deref.child = NULL;
612 deref->deref_array_type = nir_deref_array_type_direct;
613 src_init(&deref->indirect);
614 deref->base_offset = 0;
615 return deref;
616 }
617
618 nir_deref_struct *
619 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
620 {
621 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
622 deref->deref.deref_type = nir_deref_type_struct;
623 deref->deref.child = NULL;
624 deref->index = field_index;
625 return deref;
626 }
627
628 nir_deref_var *
629 nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx)
630 {
631 if (deref == NULL)
632 return NULL;
633
634 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
635 ret->deref.type = deref->deref.type;
636 if (deref->deref.child)
637 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
638 return ret;
639 }
640
641 static nir_deref_array *
642 deref_array_clone(const nir_deref_array *deref, void *mem_ctx)
643 {
644 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
645 ret->base_offset = deref->base_offset;
646 ret->deref_array_type = deref->deref_array_type;
647 if (deref->deref_array_type == nir_deref_array_type_indirect) {
648 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
649 }
650 ret->deref.type = deref->deref.type;
651 if (deref->deref.child)
652 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
653 return ret;
654 }
655
656 static nir_deref_struct *
657 deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx)
658 {
659 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
660 ret->deref.type = deref->deref.type;
661 if (deref->deref.child)
662 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
663 return ret;
664 }
665
666 nir_deref *
667 nir_deref_clone(const nir_deref *deref, void *mem_ctx)
668 {
669 if (deref == NULL)
670 return NULL;
671
672 switch (deref->deref_type) {
673 case nir_deref_type_var:
674 return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref;
675 case nir_deref_type_array:
676 return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref;
677 case nir_deref_type_struct:
678 return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref;
679 default:
680 unreachable("Invalid dereference type");
681 }
682
683 return NULL;
684 }
685
686 /* This is the second step in the recursion. We've found the tail and made a
687 * copy. Now we need to iterate over all possible leaves and call the
688 * callback on each one.
689 */
690 static bool
691 deref_foreach_leaf_build_recur(nir_deref_var *deref, nir_deref *tail,
692 nir_deref_foreach_leaf_cb cb, void *state)
693 {
694 unsigned length;
695 union {
696 nir_deref_array arr;
697 nir_deref_struct str;
698 } tmp;
699
700 assert(tail->child == NULL);
701 switch (glsl_get_base_type(tail->type)) {
702 case GLSL_TYPE_UINT:
703 case GLSL_TYPE_UINT64:
704 case GLSL_TYPE_INT:
705 case GLSL_TYPE_INT64:
706 case GLSL_TYPE_FLOAT:
707 case GLSL_TYPE_DOUBLE:
708 case GLSL_TYPE_BOOL:
709 if (glsl_type_is_vector_or_scalar(tail->type))
710 return cb(deref, state);
711 /* Fall Through */
712
713 case GLSL_TYPE_ARRAY:
714 tmp.arr.deref.deref_type = nir_deref_type_array;
715 tmp.arr.deref.type = glsl_get_array_element(tail->type);
716 tmp.arr.deref_array_type = nir_deref_array_type_direct;
717 tmp.arr.indirect = NIR_SRC_INIT;
718 tail->child = &tmp.arr.deref;
719
720 length = glsl_get_length(tail->type);
721 for (unsigned i = 0; i < length; i++) {
722 tmp.arr.deref.child = NULL;
723 tmp.arr.base_offset = i;
724 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
725 return false;
726 }
727 return true;
728
729 case GLSL_TYPE_STRUCT:
730 tmp.str.deref.deref_type = nir_deref_type_struct;
731 tail->child = &tmp.str.deref;
732
733 length = glsl_get_length(tail->type);
734 for (unsigned i = 0; i < length; i++) {
735 tmp.arr.deref.child = NULL;
736 tmp.str.deref.type = glsl_get_struct_field(tail->type, i);
737 tmp.str.index = i;
738 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
739 return false;
740 }
741 return true;
742
743 default:
744 unreachable("Invalid type for dereference");
745 }
746 }
747
748 /* This is the first step of the foreach_leaf recursion. In this step we are
749 * walking to the end of the deref chain and making a copy in the stack as we
750 * go. This is because we don't want to mutate the deref chain that was
751 * passed in by the caller. The downside is that this deref chain is on the
752 * stack and , if the caller wants to do anything with it, they will have to
753 * make their own copy because this one will go away.
754 */
755 static bool
756 deref_foreach_leaf_copy_recur(nir_deref_var *deref, nir_deref *tail,
757 nir_deref_foreach_leaf_cb cb, void *state)
758 {
759 union {
760 nir_deref_array arr;
761 nir_deref_struct str;
762 } c;
763
764 if (tail->child) {
765 switch (tail->child->deref_type) {
766 case nir_deref_type_array:
767 c.arr = *nir_deref_as_array(tail->child);
768 tail->child = &c.arr.deref;
769 return deref_foreach_leaf_copy_recur(deref, &c.arr.deref, cb, state);
770
771 case nir_deref_type_struct:
772 c.str = *nir_deref_as_struct(tail->child);
773 tail->child = &c.str.deref;
774 return deref_foreach_leaf_copy_recur(deref, &c.str.deref, cb, state);
775
776 case nir_deref_type_var:
777 default:
778 unreachable("Invalid deref type for a child");
779 }
780 } else {
781 /* We've gotten to the end of the original deref. Time to start
782 * building our own derefs.
783 */
784 return deref_foreach_leaf_build_recur(deref, tail, cb, state);
785 }
786 }
787
788 /**
789 * This function iterates over all of the possible derefs that can be created
790 * with the given deref as the head. It then calls the provided callback with
791 * a full deref for each one.
792 *
793 * The deref passed to the callback will be allocated on the stack. You will
794 * need to make a copy if you want it to hang around.
795 */
796 bool
797 nir_deref_foreach_leaf(nir_deref_var *deref,
798 nir_deref_foreach_leaf_cb cb, void *state)
799 {
800 nir_deref_var copy = *deref;
801 return deref_foreach_leaf_copy_recur(&copy, &copy.deref, cb, state);
802 }
803
804 /* Returns a load_const instruction that represents the constant
805 * initializer for the given deref chain. The caller is responsible for
806 * ensuring that there actually is a constant initializer.
807 */
808 nir_load_const_instr *
809 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
810 {
811 nir_constant *constant = deref->var->constant_initializer;
812 assert(constant);
813
814 const nir_deref *tail = &deref->deref;
815 unsigned matrix_col = 0;
816 while (tail->child) {
817 switch (tail->child->deref_type) {
818 case nir_deref_type_array: {
819 nir_deref_array *arr = nir_deref_as_array(tail->child);
820 assert(arr->deref_array_type == nir_deref_array_type_direct);
821 if (glsl_type_is_matrix(tail->type)) {
822 assert(arr->deref.child == NULL);
823 matrix_col = arr->base_offset;
824 } else {
825 constant = constant->elements[arr->base_offset];
826 }
827 break;
828 }
829
830 case nir_deref_type_struct: {
831 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
832 break;
833 }
834
835 default:
836 unreachable("Invalid deref child type");
837 }
838
839 tail = tail->child;
840 }
841
842 unsigned bit_size = glsl_get_bit_size(tail->type);
843 nir_load_const_instr *load =
844 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
845 bit_size);
846
847 switch (glsl_get_base_type(tail->type)) {
848 case GLSL_TYPE_FLOAT:
849 case GLSL_TYPE_INT:
850 case GLSL_TYPE_UINT:
851 case GLSL_TYPE_DOUBLE:
852 case GLSL_TYPE_UINT64:
853 case GLSL_TYPE_INT64:
854 case GLSL_TYPE_BOOL:
855 load->value = constant->values[matrix_col];
856 break;
857 default:
858 unreachable("Invalid immediate type");
859 }
860
861 return load;
862 }
863
864 nir_function_impl *
865 nir_cf_node_get_function(nir_cf_node *node)
866 {
867 while (node->type != nir_cf_node_function) {
868 node = node->parent;
869 }
870
871 return nir_cf_node_as_function(node);
872 }
873
874 /* Reduces a cursor by trying to convert everything to after and trying to
875 * go up to block granularity when possible.
876 */
877 static nir_cursor
878 reduce_cursor(nir_cursor cursor)
879 {
880 switch (cursor.option) {
881 case nir_cursor_before_block:
882 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
883 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
884 if (exec_list_is_empty(&cursor.block->instr_list)) {
885 /* Empty block. After is as good as before. */
886 cursor.option = nir_cursor_after_block;
887 }
888 return cursor;
889
890 case nir_cursor_after_block:
891 return cursor;
892
893 case nir_cursor_before_instr: {
894 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
895 if (prev_instr) {
896 /* Before this instruction is after the previous */
897 cursor.instr = prev_instr;
898 cursor.option = nir_cursor_after_instr;
899 } else {
900 /* No previous instruction. Switch to before block */
901 cursor.block = cursor.instr->block;
902 cursor.option = nir_cursor_before_block;
903 }
904 return reduce_cursor(cursor);
905 }
906
907 case nir_cursor_after_instr:
908 if (nir_instr_next(cursor.instr) == NULL) {
909 /* This is the last instruction, switch to after block */
910 cursor.option = nir_cursor_after_block;
911 cursor.block = cursor.instr->block;
912 }
913 return cursor;
914
915 default:
916 unreachable("Inavlid cursor option");
917 }
918 }
919
920 bool
921 nir_cursors_equal(nir_cursor a, nir_cursor b)
922 {
923 /* Reduced cursors should be unique */
924 a = reduce_cursor(a);
925 b = reduce_cursor(b);
926
927 return a.block == b.block && a.option == b.option;
928 }
929
930 static bool
931 add_use_cb(nir_src *src, void *state)
932 {
933 nir_instr *instr = state;
934
935 src->parent_instr = instr;
936 list_addtail(&src->use_link,
937 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
938
939 return true;
940 }
941
942 static bool
943 add_ssa_def_cb(nir_ssa_def *def, void *state)
944 {
945 nir_instr *instr = state;
946
947 if (instr->block && def->index == UINT_MAX) {
948 nir_function_impl *impl =
949 nir_cf_node_get_function(&instr->block->cf_node);
950
951 def->index = impl->ssa_alloc++;
952 }
953
954 return true;
955 }
956
957 static bool
958 add_reg_def_cb(nir_dest *dest, void *state)
959 {
960 nir_instr *instr = state;
961
962 if (!dest->is_ssa) {
963 dest->reg.parent_instr = instr;
964 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
965 }
966
967 return true;
968 }
969
970 static void
971 add_defs_uses(nir_instr *instr)
972 {
973 nir_foreach_src(instr, add_use_cb, instr);
974 nir_foreach_dest(instr, add_reg_def_cb, instr);
975 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
976 }
977
978 void
979 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
980 {
981 switch (cursor.option) {
982 case nir_cursor_before_block:
983 /* Only allow inserting jumps into empty blocks. */
984 if (instr->type == nir_instr_type_jump)
985 assert(exec_list_is_empty(&cursor.block->instr_list));
986
987 instr->block = cursor.block;
988 add_defs_uses(instr);
989 exec_list_push_head(&cursor.block->instr_list, &instr->node);
990 break;
991 case nir_cursor_after_block: {
992 /* Inserting instructions after a jump is illegal. */
993 nir_instr *last = nir_block_last_instr(cursor.block);
994 assert(last == NULL || last->type != nir_instr_type_jump);
995 (void) last;
996
997 instr->block = cursor.block;
998 add_defs_uses(instr);
999 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
1000 break;
1001 }
1002 case nir_cursor_before_instr:
1003 assert(instr->type != nir_instr_type_jump);
1004 instr->block = cursor.instr->block;
1005 add_defs_uses(instr);
1006 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
1007 break;
1008 case nir_cursor_after_instr:
1009 /* Inserting instructions after a jump is illegal. */
1010 assert(cursor.instr->type != nir_instr_type_jump);
1011
1012 /* Only allow inserting jumps at the end of the block. */
1013 if (instr->type == nir_instr_type_jump)
1014 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
1015
1016 instr->block = cursor.instr->block;
1017 add_defs_uses(instr);
1018 exec_node_insert_after(&cursor.instr->node, &instr->node);
1019 break;
1020 }
1021
1022 if (instr->type == nir_instr_type_jump)
1023 nir_handle_add_jump(instr->block);
1024 }
1025
1026 static bool
1027 src_is_valid(const nir_src *src)
1028 {
1029 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1030 }
1031
1032 static bool
1033 remove_use_cb(nir_src *src, void *state)
1034 {
1035 (void) state;
1036
1037 if (src_is_valid(src))
1038 list_del(&src->use_link);
1039
1040 return true;
1041 }
1042
1043 static bool
1044 remove_def_cb(nir_dest *dest, void *state)
1045 {
1046 (void) state;
1047
1048 if (!dest->is_ssa)
1049 list_del(&dest->reg.def_link);
1050
1051 return true;
1052 }
1053
1054 static void
1055 remove_defs_uses(nir_instr *instr)
1056 {
1057 nir_foreach_dest(instr, remove_def_cb, instr);
1058 nir_foreach_src(instr, remove_use_cb, instr);
1059 }
1060
1061 void nir_instr_remove(nir_instr *instr)
1062 {
1063 remove_defs_uses(instr);
1064 exec_node_remove(&instr->node);
1065
1066 if (instr->type == nir_instr_type_jump) {
1067 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
1068 nir_handle_remove_jump(instr->block, jump_instr->type);
1069 }
1070 }
1071
1072 /*@}*/
1073
1074 void
1075 nir_index_local_regs(nir_function_impl *impl)
1076 {
1077 unsigned index = 0;
1078 foreach_list_typed(nir_register, reg, node, &impl->registers) {
1079 reg->index = index++;
1080 }
1081 impl->reg_alloc = index;
1082 }
1083
1084 void
1085 nir_index_global_regs(nir_shader *shader)
1086 {
1087 unsigned index = 0;
1088 foreach_list_typed(nir_register, reg, node, &shader->registers) {
1089 reg->index = index++;
1090 }
1091 shader->reg_alloc = index;
1092 }
1093
1094 static bool
1095 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
1096 {
1097 return cb(&instr->dest.dest, state);
1098 }
1099
1100 static bool
1101 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
1102 void *state)
1103 {
1104 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
1105 return cb(&instr->dest, state);
1106
1107 return true;
1108 }
1109
1110 static bool
1111 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
1112 void *state)
1113 {
1114 return cb(&instr->dest, state);
1115 }
1116
1117 static bool
1118 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
1119 {
1120 return cb(&instr->dest, state);
1121 }
1122
1123 static bool
1124 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
1125 nir_foreach_dest_cb cb, void *state)
1126 {
1127 nir_foreach_parallel_copy_entry(entry, instr) {
1128 if (!cb(&entry->dest, state))
1129 return false;
1130 }
1131
1132 return true;
1133 }
1134
1135 bool
1136 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1137 {
1138 switch (instr->type) {
1139 case nir_instr_type_alu:
1140 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1141 case nir_instr_type_intrinsic:
1142 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1143 case nir_instr_type_tex:
1144 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1145 case nir_instr_type_phi:
1146 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1147 case nir_instr_type_parallel_copy:
1148 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1149 cb, state);
1150
1151 case nir_instr_type_load_const:
1152 case nir_instr_type_ssa_undef:
1153 case nir_instr_type_call:
1154 case nir_instr_type_jump:
1155 break;
1156
1157 default:
1158 unreachable("Invalid instruction type");
1159 break;
1160 }
1161
1162 return true;
1163 }
1164
1165 struct foreach_ssa_def_state {
1166 nir_foreach_ssa_def_cb cb;
1167 void *client_state;
1168 };
1169
1170 static inline bool
1171 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1172 {
1173 struct foreach_ssa_def_state *state = void_state;
1174
1175 if (dest->is_ssa)
1176 return state->cb(&dest->ssa, state->client_state);
1177 else
1178 return true;
1179 }
1180
1181 bool
1182 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1183 {
1184 switch (instr->type) {
1185 case nir_instr_type_alu:
1186 case nir_instr_type_tex:
1187 case nir_instr_type_intrinsic:
1188 case nir_instr_type_phi:
1189 case nir_instr_type_parallel_copy: {
1190 struct foreach_ssa_def_state foreach_state = {cb, state};
1191 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1192 }
1193
1194 case nir_instr_type_load_const:
1195 return cb(&nir_instr_as_load_const(instr)->def, state);
1196 case nir_instr_type_ssa_undef:
1197 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1198 case nir_instr_type_call:
1199 case nir_instr_type_jump:
1200 return true;
1201 default:
1202 unreachable("Invalid instruction type");
1203 }
1204 }
1205
1206 static bool
1207 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1208 {
1209 if (!cb(src, state))
1210 return false;
1211 if (!src->is_ssa && src->reg.indirect)
1212 return cb(src->reg.indirect, state);
1213 return true;
1214 }
1215
1216 static bool
1217 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1218 void *state)
1219 {
1220 if (deref->deref_array_type == nir_deref_array_type_indirect)
1221 return visit_src(&deref->indirect, cb, state);
1222 return true;
1223 }
1224
1225 static bool
1226 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1227 {
1228 nir_deref *cur = &deref->deref;
1229 while (cur != NULL) {
1230 if (cur->deref_type == nir_deref_type_array) {
1231 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1232 return false;
1233 }
1234
1235 cur = cur->child;
1236 }
1237
1238 return true;
1239 }
1240
1241 static bool
1242 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1243 {
1244 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1245 if (!visit_src(&instr->src[i].src, cb, state))
1246 return false;
1247
1248 return true;
1249 }
1250
1251 static bool
1252 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1253 {
1254 for (unsigned i = 0; i < instr->num_srcs; i++) {
1255 if (!visit_src(&instr->src[i].src, cb, state))
1256 return false;
1257 }
1258
1259 if (instr->texture != NULL) {
1260 if (!visit_deref_src(instr->texture, cb, state))
1261 return false;
1262 }
1263
1264 if (instr->sampler != NULL) {
1265 if (!visit_deref_src(instr->sampler, cb, state))
1266 return false;
1267 }
1268
1269 return true;
1270 }
1271
1272 static bool
1273 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1274 void *state)
1275 {
1276 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1277 for (unsigned i = 0; i < num_srcs; i++) {
1278 if (!visit_src(&instr->src[i], cb, state))
1279 return false;
1280 }
1281
1282 unsigned num_vars =
1283 nir_intrinsic_infos[instr->intrinsic].num_variables;
1284 for (unsigned i = 0; i < num_vars; i++) {
1285 if (!visit_deref_src(instr->variables[i], cb, state))
1286 return false;
1287 }
1288
1289 return true;
1290 }
1291
1292 static bool
1293 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1294 {
1295 nir_foreach_phi_src(src, instr) {
1296 if (!visit_src(&src->src, cb, state))
1297 return false;
1298 }
1299
1300 return true;
1301 }
1302
1303 static bool
1304 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1305 nir_foreach_src_cb cb, void *state)
1306 {
1307 nir_foreach_parallel_copy_entry(entry, instr) {
1308 if (!visit_src(&entry->src, cb, state))
1309 return false;
1310 }
1311
1312 return true;
1313 }
1314
1315 typedef struct {
1316 void *state;
1317 nir_foreach_src_cb cb;
1318 } visit_dest_indirect_state;
1319
1320 static bool
1321 visit_dest_indirect(nir_dest *dest, void *_state)
1322 {
1323 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1324
1325 if (!dest->is_ssa && dest->reg.indirect)
1326 return state->cb(dest->reg.indirect, state->state);
1327
1328 return true;
1329 }
1330
1331 bool
1332 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1333 {
1334 switch (instr->type) {
1335 case nir_instr_type_alu:
1336 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1337 return false;
1338 break;
1339 case nir_instr_type_intrinsic:
1340 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1341 return false;
1342 break;
1343 case nir_instr_type_tex:
1344 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1345 return false;
1346 break;
1347 case nir_instr_type_call:
1348 /* Call instructions have no regular sources */
1349 break;
1350 case nir_instr_type_load_const:
1351 /* Constant load instructions have no regular sources */
1352 break;
1353 case nir_instr_type_phi:
1354 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1355 return false;
1356 break;
1357 case nir_instr_type_parallel_copy:
1358 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1359 cb, state))
1360 return false;
1361 break;
1362 case nir_instr_type_jump:
1363 case nir_instr_type_ssa_undef:
1364 return true;
1365
1366 default:
1367 unreachable("Invalid instruction type");
1368 break;
1369 }
1370
1371 visit_dest_indirect_state dest_state;
1372 dest_state.state = state;
1373 dest_state.cb = cb;
1374 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1375 }
1376
1377 nir_const_value *
1378 nir_src_as_const_value(nir_src src)
1379 {
1380 if (!src.is_ssa)
1381 return NULL;
1382
1383 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1384 return NULL;
1385
1386 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1387
1388 return &load->value;
1389 }
1390
1391 /**
1392 * Returns true if the source is known to be dynamically uniform. Otherwise it
1393 * returns false which means it may or may not be dynamically uniform but it
1394 * can't be determined.
1395 */
1396 bool
1397 nir_src_is_dynamically_uniform(nir_src src)
1398 {
1399 if (!src.is_ssa)
1400 return false;
1401
1402 /* Constants are trivially dynamically uniform */
1403 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1404 return true;
1405
1406 /* As are uniform variables */
1407 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1408 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1409
1410 if (intr->intrinsic == nir_intrinsic_load_uniform)
1411 return true;
1412 }
1413
1414 /* XXX: this could have many more tests, such as when a sampler function is
1415 * called with dynamically uniform arguments.
1416 */
1417 return false;
1418 }
1419
1420 static void
1421 src_remove_all_uses(nir_src *src)
1422 {
1423 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1424 if (!src_is_valid(src))
1425 continue;
1426
1427 list_del(&src->use_link);
1428 }
1429 }
1430
1431 static void
1432 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1433 {
1434 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1435 if (!src_is_valid(src))
1436 continue;
1437
1438 if (parent_instr) {
1439 src->parent_instr = parent_instr;
1440 if (src->is_ssa)
1441 list_addtail(&src->use_link, &src->ssa->uses);
1442 else
1443 list_addtail(&src->use_link, &src->reg.reg->uses);
1444 } else {
1445 assert(parent_if);
1446 src->parent_if = parent_if;
1447 if (src->is_ssa)
1448 list_addtail(&src->use_link, &src->ssa->if_uses);
1449 else
1450 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1451 }
1452 }
1453 }
1454
1455 void
1456 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1457 {
1458 assert(!src_is_valid(src) || src->parent_instr == instr);
1459
1460 src_remove_all_uses(src);
1461 *src = new_src;
1462 src_add_all_uses(src, instr, NULL);
1463 }
1464
1465 void
1466 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1467 {
1468 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1469
1470 src_remove_all_uses(dest);
1471 src_remove_all_uses(src);
1472 *dest = *src;
1473 *src = NIR_SRC_INIT;
1474 src_add_all_uses(dest, dest_instr, NULL);
1475 }
1476
1477 void
1478 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1479 {
1480 nir_src *src = &if_stmt->condition;
1481 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1482
1483 src_remove_all_uses(src);
1484 *src = new_src;
1485 src_add_all_uses(src, NULL, if_stmt);
1486 }
1487
1488 void
1489 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1490 {
1491 if (dest->is_ssa) {
1492 /* We can only overwrite an SSA destination if it has no uses. */
1493 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1494 } else {
1495 list_del(&dest->reg.def_link);
1496 if (dest->reg.indirect)
1497 src_remove_all_uses(dest->reg.indirect);
1498 }
1499
1500 /* We can't re-write with an SSA def */
1501 assert(!new_dest.is_ssa);
1502
1503 nir_dest_copy(dest, &new_dest, instr);
1504
1505 dest->reg.parent_instr = instr;
1506 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1507
1508 if (dest->reg.indirect)
1509 src_add_all_uses(dest->reg.indirect, instr, NULL);
1510 }
1511
1512 /* note: does *not* take ownership of 'name' */
1513 void
1514 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1515 unsigned num_components,
1516 unsigned bit_size, const char *name)
1517 {
1518 def->name = ralloc_strdup(instr, name);
1519 def->parent_instr = instr;
1520 list_inithead(&def->uses);
1521 list_inithead(&def->if_uses);
1522 def->num_components = num_components;
1523 def->bit_size = bit_size;
1524
1525 if (instr->block) {
1526 nir_function_impl *impl =
1527 nir_cf_node_get_function(&instr->block->cf_node);
1528
1529 def->index = impl->ssa_alloc++;
1530 } else {
1531 def->index = UINT_MAX;
1532 }
1533 }
1534
1535 /* note: does *not* take ownership of 'name' */
1536 void
1537 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1538 unsigned num_components, unsigned bit_size,
1539 const char *name)
1540 {
1541 dest->is_ssa = true;
1542 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1543 }
1544
1545 void
1546 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1547 {
1548 assert(!new_src.is_ssa || def != new_src.ssa);
1549
1550 nir_foreach_use_safe(use_src, def)
1551 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1552
1553 nir_foreach_if_use_safe(use_src, def)
1554 nir_if_rewrite_condition(use_src->parent_if, new_src);
1555 }
1556
1557 static bool
1558 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1559 {
1560 assert(start->block == end->block);
1561
1562 if (between->block != start->block)
1563 return false;
1564
1565 /* Search backwards looking for "between" */
1566 while (start != end) {
1567 if (between == end)
1568 return true;
1569
1570 end = nir_instr_prev(end);
1571 assert(end);
1572 }
1573
1574 return false;
1575 }
1576
1577 /* Replaces all uses of the given SSA def with the given source but only if
1578 * the use comes after the after_me instruction. This can be useful if you
1579 * are emitting code to fix up the result of some instruction: you can freely
1580 * use the result in that code and then call rewrite_uses_after and pass the
1581 * last fixup instruction as after_me and it will replace all of the uses you
1582 * want without touching the fixup code.
1583 *
1584 * This function assumes that after_me is in the same block as
1585 * def->parent_instr and that after_me comes after def->parent_instr.
1586 */
1587 void
1588 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1589 nir_instr *after_me)
1590 {
1591 assert(!new_src.is_ssa || def != new_src.ssa);
1592
1593 nir_foreach_use_safe(use_src, def) {
1594 assert(use_src->parent_instr != def->parent_instr);
1595 /* Since def already dominates all of its uses, the only way a use can
1596 * not be dominated by after_me is if it is between def and after_me in
1597 * the instruction list.
1598 */
1599 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1600 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1601 }
1602
1603 nir_foreach_if_use_safe(use_src, def)
1604 nir_if_rewrite_condition(use_src->parent_if, new_src);
1605 }
1606
1607 uint8_t
1608 nir_ssa_def_components_read(nir_ssa_def *def)
1609 {
1610 uint8_t read_mask = 0;
1611 nir_foreach_use(use, def) {
1612 if (use->parent_instr->type == nir_instr_type_alu) {
1613 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1614 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1615 int src_idx = alu_src - &alu->src[0];
1616 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1617
1618 for (unsigned c = 0; c < 4; c++) {
1619 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1620 continue;
1621
1622 read_mask |= (1 << alu_src->swizzle[c]);
1623 }
1624 } else {
1625 return (1 << def->num_components) - 1;
1626 }
1627 }
1628
1629 return read_mask;
1630 }
1631
1632 nir_block *
1633 nir_block_cf_tree_next(nir_block *block)
1634 {
1635 if (block == NULL) {
1636 /* nir_foreach_block_safe() will call this function on a NULL block
1637 * after the last iteration, but it won't use the result so just return
1638 * NULL here.
1639 */
1640 return NULL;
1641 }
1642
1643 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1644 if (cf_next)
1645 return nir_cf_node_cf_tree_first(cf_next);
1646
1647 nir_cf_node *parent = block->cf_node.parent;
1648
1649 switch (parent->type) {
1650 case nir_cf_node_if: {
1651 /* Are we at the end of the if? Go to the beginning of the else */
1652 nir_if *if_stmt = nir_cf_node_as_if(parent);
1653 if (block == nir_if_last_then_block(if_stmt))
1654 return nir_if_first_else_block(if_stmt);
1655
1656 assert(block == nir_if_last_else_block(if_stmt));
1657 /* fall through */
1658 }
1659
1660 case nir_cf_node_loop:
1661 return nir_cf_node_as_block(nir_cf_node_next(parent));
1662
1663 case nir_cf_node_function:
1664 return NULL;
1665
1666 default:
1667 unreachable("unknown cf node type");
1668 }
1669 }
1670
1671 nir_block *
1672 nir_block_cf_tree_prev(nir_block *block)
1673 {
1674 if (block == NULL) {
1675 /* do this for consistency with nir_block_cf_tree_next() */
1676 return NULL;
1677 }
1678
1679 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1680 if (cf_prev)
1681 return nir_cf_node_cf_tree_last(cf_prev);
1682
1683 nir_cf_node *parent = block->cf_node.parent;
1684
1685 switch (parent->type) {
1686 case nir_cf_node_if: {
1687 /* Are we at the beginning of the else? Go to the end of the if */
1688 nir_if *if_stmt = nir_cf_node_as_if(parent);
1689 if (block == nir_if_first_else_block(if_stmt))
1690 return nir_if_last_then_block(if_stmt);
1691
1692 assert(block == nir_if_first_then_block(if_stmt));
1693 /* fall through */
1694 }
1695
1696 case nir_cf_node_loop:
1697 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1698
1699 case nir_cf_node_function:
1700 return NULL;
1701
1702 default:
1703 unreachable("unknown cf node type");
1704 }
1705 }
1706
1707 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1708 {
1709 switch (node->type) {
1710 case nir_cf_node_function: {
1711 nir_function_impl *impl = nir_cf_node_as_function(node);
1712 return nir_start_block(impl);
1713 }
1714
1715 case nir_cf_node_if: {
1716 nir_if *if_stmt = nir_cf_node_as_if(node);
1717 return nir_if_first_then_block(if_stmt);
1718 }
1719
1720 case nir_cf_node_loop: {
1721 nir_loop *loop = nir_cf_node_as_loop(node);
1722 return nir_loop_first_block(loop);
1723 }
1724
1725 case nir_cf_node_block: {
1726 return nir_cf_node_as_block(node);
1727 }
1728
1729 default:
1730 unreachable("unknown node type");
1731 }
1732 }
1733
1734 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1735 {
1736 switch (node->type) {
1737 case nir_cf_node_function: {
1738 nir_function_impl *impl = nir_cf_node_as_function(node);
1739 return nir_impl_last_block(impl);
1740 }
1741
1742 case nir_cf_node_if: {
1743 nir_if *if_stmt = nir_cf_node_as_if(node);
1744 return nir_if_last_else_block(if_stmt);
1745 }
1746
1747 case nir_cf_node_loop: {
1748 nir_loop *loop = nir_cf_node_as_loop(node);
1749 return nir_loop_last_block(loop);
1750 }
1751
1752 case nir_cf_node_block: {
1753 return nir_cf_node_as_block(node);
1754 }
1755
1756 default:
1757 unreachable("unknown node type");
1758 }
1759 }
1760
1761 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1762 {
1763 if (node->type == nir_cf_node_block)
1764 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1765 else if (node->type == nir_cf_node_function)
1766 return NULL;
1767 else
1768 return nir_cf_node_as_block(nir_cf_node_next(node));
1769 }
1770
1771 nir_if *
1772 nir_block_get_following_if(nir_block *block)
1773 {
1774 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1775 return NULL;
1776
1777 if (nir_cf_node_is_last(&block->cf_node))
1778 return NULL;
1779
1780 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1781
1782 if (next_node->type != nir_cf_node_if)
1783 return NULL;
1784
1785 return nir_cf_node_as_if(next_node);
1786 }
1787
1788 nir_loop *
1789 nir_block_get_following_loop(nir_block *block)
1790 {
1791 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1792 return NULL;
1793
1794 if (nir_cf_node_is_last(&block->cf_node))
1795 return NULL;
1796
1797 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1798
1799 if (next_node->type != nir_cf_node_loop)
1800 return NULL;
1801
1802 return nir_cf_node_as_loop(next_node);
1803 }
1804
1805 void
1806 nir_index_blocks(nir_function_impl *impl)
1807 {
1808 unsigned index = 0;
1809
1810 if (impl->valid_metadata & nir_metadata_block_index)
1811 return;
1812
1813 nir_foreach_block(block, impl) {
1814 block->index = index++;
1815 }
1816
1817 impl->num_blocks = index;
1818 }
1819
1820 static bool
1821 index_ssa_def_cb(nir_ssa_def *def, void *state)
1822 {
1823 unsigned *index = (unsigned *) state;
1824 def->index = (*index)++;
1825
1826 return true;
1827 }
1828
1829 /**
1830 * The indices are applied top-to-bottom which has the very nice property
1831 * that, if A dominates B, then A->index <= B->index.
1832 */
1833 void
1834 nir_index_ssa_defs(nir_function_impl *impl)
1835 {
1836 unsigned index = 0;
1837
1838 nir_foreach_block(block, impl) {
1839 nir_foreach_instr(instr, block)
1840 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1841 }
1842
1843 impl->ssa_alloc = index;
1844 }
1845
1846 /**
1847 * The indices are applied top-to-bottom which has the very nice property
1848 * that, if A dominates B, then A->index <= B->index.
1849 */
1850 unsigned
1851 nir_index_instrs(nir_function_impl *impl)
1852 {
1853 unsigned index = 0;
1854
1855 nir_foreach_block(block, impl) {
1856 nir_foreach_instr(instr, block)
1857 instr->index = index++;
1858 }
1859
1860 return index;
1861 }
1862
1863 nir_intrinsic_op
1864 nir_intrinsic_from_system_value(gl_system_value val)
1865 {
1866 switch (val) {
1867 case SYSTEM_VALUE_VERTEX_ID:
1868 return nir_intrinsic_load_vertex_id;
1869 case SYSTEM_VALUE_INSTANCE_ID:
1870 return nir_intrinsic_load_instance_id;
1871 case SYSTEM_VALUE_DRAW_ID:
1872 return nir_intrinsic_load_draw_id;
1873 case SYSTEM_VALUE_BASE_INSTANCE:
1874 return nir_intrinsic_load_base_instance;
1875 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1876 return nir_intrinsic_load_vertex_id_zero_base;
1877 case SYSTEM_VALUE_BASE_VERTEX:
1878 return nir_intrinsic_load_base_vertex;
1879 case SYSTEM_VALUE_INVOCATION_ID:
1880 return nir_intrinsic_load_invocation_id;
1881 case SYSTEM_VALUE_FRONT_FACE:
1882 return nir_intrinsic_load_front_face;
1883 case SYSTEM_VALUE_SAMPLE_ID:
1884 return nir_intrinsic_load_sample_id;
1885 case SYSTEM_VALUE_SAMPLE_POS:
1886 return nir_intrinsic_load_sample_pos;
1887 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1888 return nir_intrinsic_load_sample_mask_in;
1889 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1890 return nir_intrinsic_load_local_invocation_id;
1891 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1892 return nir_intrinsic_load_local_invocation_index;
1893 case SYSTEM_VALUE_WORK_GROUP_ID:
1894 return nir_intrinsic_load_work_group_id;
1895 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1896 return nir_intrinsic_load_num_work_groups;
1897 case SYSTEM_VALUE_PRIMITIVE_ID:
1898 return nir_intrinsic_load_primitive_id;
1899 case SYSTEM_VALUE_TESS_COORD:
1900 return nir_intrinsic_load_tess_coord;
1901 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1902 return nir_intrinsic_load_tess_level_outer;
1903 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1904 return nir_intrinsic_load_tess_level_inner;
1905 case SYSTEM_VALUE_VERTICES_IN:
1906 return nir_intrinsic_load_patch_vertices_in;
1907 case SYSTEM_VALUE_HELPER_INVOCATION:
1908 return nir_intrinsic_load_helper_invocation;
1909 case SYSTEM_VALUE_VIEW_INDEX:
1910 return nir_intrinsic_load_view_index;
1911 case SYSTEM_VALUE_SUBGROUP_SIZE:
1912 return nir_intrinsic_load_subgroup_size;
1913 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
1914 return nir_intrinsic_load_subgroup_invocation;
1915 case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
1916 return nir_intrinsic_load_subgroup_eq_mask;
1917 case SYSTEM_VALUE_SUBGROUP_GE_MASK:
1918 return nir_intrinsic_load_subgroup_ge_mask;
1919 case SYSTEM_VALUE_SUBGROUP_GT_MASK:
1920 return nir_intrinsic_load_subgroup_gt_mask;
1921 case SYSTEM_VALUE_SUBGROUP_LE_MASK:
1922 return nir_intrinsic_load_subgroup_le_mask;
1923 case SYSTEM_VALUE_SUBGROUP_LT_MASK:
1924 return nir_intrinsic_load_subgroup_lt_mask;
1925 default:
1926 unreachable("system value does not directly correspond to intrinsic");
1927 }
1928 }
1929
1930 gl_system_value
1931 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1932 {
1933 switch (intrin) {
1934 case nir_intrinsic_load_vertex_id:
1935 return SYSTEM_VALUE_VERTEX_ID;
1936 case nir_intrinsic_load_instance_id:
1937 return SYSTEM_VALUE_INSTANCE_ID;
1938 case nir_intrinsic_load_draw_id:
1939 return SYSTEM_VALUE_DRAW_ID;
1940 case nir_intrinsic_load_base_instance:
1941 return SYSTEM_VALUE_BASE_INSTANCE;
1942 case nir_intrinsic_load_vertex_id_zero_base:
1943 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1944 case nir_intrinsic_load_base_vertex:
1945 return SYSTEM_VALUE_BASE_VERTEX;
1946 case nir_intrinsic_load_invocation_id:
1947 return SYSTEM_VALUE_INVOCATION_ID;
1948 case nir_intrinsic_load_front_face:
1949 return SYSTEM_VALUE_FRONT_FACE;
1950 case nir_intrinsic_load_sample_id:
1951 return SYSTEM_VALUE_SAMPLE_ID;
1952 case nir_intrinsic_load_sample_pos:
1953 return SYSTEM_VALUE_SAMPLE_POS;
1954 case nir_intrinsic_load_sample_mask_in:
1955 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1956 case nir_intrinsic_load_local_invocation_id:
1957 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1958 case nir_intrinsic_load_local_invocation_index:
1959 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
1960 case nir_intrinsic_load_num_work_groups:
1961 return SYSTEM_VALUE_NUM_WORK_GROUPS;
1962 case nir_intrinsic_load_work_group_id:
1963 return SYSTEM_VALUE_WORK_GROUP_ID;
1964 case nir_intrinsic_load_primitive_id:
1965 return SYSTEM_VALUE_PRIMITIVE_ID;
1966 case nir_intrinsic_load_tess_coord:
1967 return SYSTEM_VALUE_TESS_COORD;
1968 case nir_intrinsic_load_tess_level_outer:
1969 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1970 case nir_intrinsic_load_tess_level_inner:
1971 return SYSTEM_VALUE_TESS_LEVEL_INNER;
1972 case nir_intrinsic_load_patch_vertices_in:
1973 return SYSTEM_VALUE_VERTICES_IN;
1974 case nir_intrinsic_load_helper_invocation:
1975 return SYSTEM_VALUE_HELPER_INVOCATION;
1976 case nir_intrinsic_load_view_index:
1977 return SYSTEM_VALUE_VIEW_INDEX;
1978 case SYSTEM_VALUE_SUBGROUP_SIZE:
1979 return nir_intrinsic_load_subgroup_size;
1980 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
1981 return nir_intrinsic_load_subgroup_invocation;
1982 case nir_intrinsic_load_subgroup_eq_mask:
1983 return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
1984 case nir_intrinsic_load_subgroup_ge_mask:
1985 return SYSTEM_VALUE_SUBGROUP_GE_MASK;
1986 case nir_intrinsic_load_subgroup_gt_mask:
1987 return SYSTEM_VALUE_SUBGROUP_GT_MASK;
1988 case nir_intrinsic_load_subgroup_le_mask:
1989 return SYSTEM_VALUE_SUBGROUP_LE_MASK;
1990 case nir_intrinsic_load_subgroup_lt_mask:
1991 return SYSTEM_VALUE_SUBGROUP_LT_MASK;
1992 default:
1993 unreachable("intrinsic doesn't produce a system value");
1994 }
1995 }