2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
29 #include "nir_builder.h"
30 #include "nir_control_flow_private.h"
31 #include "util/half_float.h"
35 #include "util/u_math.h"
37 #include "main/menums.h" /* BITFIELD64_MASK */
40 nir_shader_create(void *mem_ctx
,
41 gl_shader_stage stage
,
42 const nir_shader_compiler_options
*options
,
45 nir_shader
*shader
= rzalloc(mem_ctx
, nir_shader
);
47 exec_list_make_empty(&shader
->uniforms
);
48 exec_list_make_empty(&shader
->inputs
);
49 exec_list_make_empty(&shader
->outputs
);
50 exec_list_make_empty(&shader
->shared
);
52 shader
->options
= options
;
55 assert(si
->stage
== stage
);
58 shader
->info
.stage
= stage
;
61 exec_list_make_empty(&shader
->functions
);
62 exec_list_make_empty(&shader
->globals
);
63 exec_list_make_empty(&shader
->system_values
);
65 shader
->num_inputs
= 0;
66 shader
->num_outputs
= 0;
67 shader
->num_uniforms
= 0;
68 shader
->num_shared
= 0;
74 reg_create(void *mem_ctx
, struct exec_list
*list
)
76 nir_register
*reg
= ralloc(mem_ctx
, nir_register
);
78 list_inithead(®
->uses
);
79 list_inithead(®
->defs
);
80 list_inithead(®
->if_uses
);
82 reg
->num_components
= 0;
84 reg
->num_array_elems
= 0;
87 exec_list_push_tail(list
, ®
->node
);
93 nir_local_reg_create(nir_function_impl
*impl
)
95 nir_register
*reg
= reg_create(ralloc_parent(impl
), &impl
->registers
);
96 reg
->index
= impl
->reg_alloc
++;
102 nir_reg_remove(nir_register
*reg
)
104 exec_node_remove(®
->node
);
108 nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
)
110 switch (var
->data
.mode
) {
111 case nir_num_variable_modes
:
113 assert(!"invalid mode");
116 case nir_var_function_temp
:
117 assert(!"nir_shader_add_variable cannot be used for local variables");
120 case nir_var_shader_temp
:
121 exec_list_push_tail(&shader
->globals
, &var
->node
);
124 case nir_var_shader_in
:
125 exec_list_push_tail(&shader
->inputs
, &var
->node
);
128 case nir_var_shader_out
:
129 exec_list_push_tail(&shader
->outputs
, &var
->node
);
132 case nir_var_uniform
:
133 case nir_var_mem_ubo
:
134 case nir_var_mem_ssbo
:
135 exec_list_push_tail(&shader
->uniforms
, &var
->node
);
138 case nir_var_mem_shared
:
139 assert(gl_shader_stage_is_compute(shader
->info
.stage
));
140 exec_list_push_tail(&shader
->shared
, &var
->node
);
143 case nir_var_mem_global
:
144 assert(!"nir_shader_add_variable cannot be used for global memory");
147 case nir_var_system_value
:
148 exec_list_push_tail(&shader
->system_values
, &var
->node
);
151 case nir_var_mem_push_const
:
152 assert(!"nir_var_push_constant is not supposed to be used for variables");
158 nir_variable_create(nir_shader
*shader
, nir_variable_mode mode
,
159 const struct glsl_type
*type
, const char *name
)
161 nir_variable
*var
= rzalloc(shader
, nir_variable
);
162 var
->name
= ralloc_strdup(var
, name
);
164 var
->data
.mode
= mode
;
165 var
->data
.how_declared
= nir_var_declared_normally
;
167 if ((mode
== nir_var_shader_in
&&
168 shader
->info
.stage
!= MESA_SHADER_VERTEX
) ||
169 (mode
== nir_var_shader_out
&&
170 shader
->info
.stage
!= MESA_SHADER_FRAGMENT
))
171 var
->data
.interpolation
= INTERP_MODE_SMOOTH
;
173 if (mode
== nir_var_shader_in
|| mode
== nir_var_uniform
)
174 var
->data
.read_only
= true;
176 nir_shader_add_variable(shader
, var
);
182 nir_local_variable_create(nir_function_impl
*impl
,
183 const struct glsl_type
*type
, const char *name
)
185 nir_variable
*var
= rzalloc(impl
->function
->shader
, nir_variable
);
186 var
->name
= ralloc_strdup(var
, name
);
188 var
->data
.mode
= nir_var_function_temp
;
190 nir_function_impl_add_variable(impl
, var
);
196 nir_function_create(nir_shader
*shader
, const char *name
)
198 nir_function
*func
= ralloc(shader
, nir_function
);
200 exec_list_push_tail(&shader
->functions
, &func
->node
);
202 func
->name
= ralloc_strdup(func
, name
);
203 func
->shader
= shader
;
204 func
->num_params
= 0;
207 func
->is_entrypoint
= false;
212 /* NOTE: if the instruction you are copying a src to is already added
213 * to the IR, use nir_instr_rewrite_src() instead.
215 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *mem_ctx
)
217 dest
->is_ssa
= src
->is_ssa
;
219 dest
->ssa
= src
->ssa
;
221 dest
->reg
.base_offset
= src
->reg
.base_offset
;
222 dest
->reg
.reg
= src
->reg
.reg
;
223 if (src
->reg
.indirect
) {
224 dest
->reg
.indirect
= ralloc(mem_ctx
, nir_src
);
225 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, mem_ctx
);
227 dest
->reg
.indirect
= NULL
;
232 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
)
234 /* Copying an SSA definition makes no sense whatsoever. */
235 assert(!src
->is_ssa
);
237 dest
->is_ssa
= false;
239 dest
->reg
.base_offset
= src
->reg
.base_offset
;
240 dest
->reg
.reg
= src
->reg
.reg
;
241 if (src
->reg
.indirect
) {
242 dest
->reg
.indirect
= ralloc(instr
, nir_src
);
243 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, instr
);
245 dest
->reg
.indirect
= NULL
;
250 nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
251 nir_alu_instr
*instr
)
253 nir_src_copy(&dest
->src
, &src
->src
, &instr
->instr
);
254 dest
->abs
= src
->abs
;
255 dest
->negate
= src
->negate
;
256 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++)
257 dest
->swizzle
[i
] = src
->swizzle
[i
];
261 nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
262 nir_alu_instr
*instr
)
264 nir_dest_copy(&dest
->dest
, &src
->dest
, &instr
->instr
);
265 dest
->write_mask
= src
->write_mask
;
266 dest
->saturate
= src
->saturate
;
271 cf_init(nir_cf_node
*node
, nir_cf_node_type type
)
273 exec_node_init(&node
->node
);
279 nir_function_impl_create_bare(nir_shader
*shader
)
281 nir_function_impl
*impl
= ralloc(shader
, nir_function_impl
);
283 impl
->function
= NULL
;
285 cf_init(&impl
->cf_node
, nir_cf_node_function
);
287 exec_list_make_empty(&impl
->body
);
288 exec_list_make_empty(&impl
->registers
);
289 exec_list_make_empty(&impl
->locals
);
292 impl
->valid_metadata
= nir_metadata_none
;
294 /* create start & end blocks */
295 nir_block
*start_block
= nir_block_create(shader
);
296 nir_block
*end_block
= nir_block_create(shader
);
297 start_block
->cf_node
.parent
= &impl
->cf_node
;
298 end_block
->cf_node
.parent
= &impl
->cf_node
;
299 impl
->end_block
= end_block
;
301 exec_list_push_tail(&impl
->body
, &start_block
->cf_node
.node
);
303 start_block
->successors
[0] = end_block
;
304 _mesa_set_add(end_block
->predecessors
, start_block
);
309 nir_function_impl_create(nir_function
*function
)
311 assert(function
->impl
== NULL
);
313 nir_function_impl
*impl
= nir_function_impl_create_bare(function
->shader
);
315 function
->impl
= impl
;
316 impl
->function
= function
;
322 nir_block_create(nir_shader
*shader
)
324 nir_block
*block
= rzalloc(shader
, nir_block
);
326 cf_init(&block
->cf_node
, nir_cf_node_block
);
328 block
->successors
[0] = block
->successors
[1] = NULL
;
329 block
->predecessors
= _mesa_pointer_set_create(block
);
330 block
->imm_dom
= NULL
;
331 /* XXX maybe it would be worth it to defer allocation? This
332 * way it doesn't get allocated for shader refs that never run
333 * nir_calc_dominance? For example, state-tracker creates an
334 * initial IR, clones that, runs appropriate lowering pass, passes
335 * to driver which does common lowering/opt, and then stores ref
336 * which is later used to do state specific lowering and futher
337 * opt. Do any of the references not need dominance metadata?
339 block
->dom_frontier
= _mesa_pointer_set_create(block
);
341 exec_list_make_empty(&block
->instr_list
);
347 src_init(nir_src
*src
)
351 src
->reg
.indirect
= NULL
;
352 src
->reg
.base_offset
= 0;
356 nir_if_create(nir_shader
*shader
)
358 nir_if
*if_stmt
= ralloc(shader
, nir_if
);
360 if_stmt
->control
= nir_selection_control_none
;
362 cf_init(&if_stmt
->cf_node
, nir_cf_node_if
);
363 src_init(&if_stmt
->condition
);
365 nir_block
*then
= nir_block_create(shader
);
366 exec_list_make_empty(&if_stmt
->then_list
);
367 exec_list_push_tail(&if_stmt
->then_list
, &then
->cf_node
.node
);
368 then
->cf_node
.parent
= &if_stmt
->cf_node
;
370 nir_block
*else_stmt
= nir_block_create(shader
);
371 exec_list_make_empty(&if_stmt
->else_list
);
372 exec_list_push_tail(&if_stmt
->else_list
, &else_stmt
->cf_node
.node
);
373 else_stmt
->cf_node
.parent
= &if_stmt
->cf_node
;
379 nir_loop_create(nir_shader
*shader
)
381 nir_loop
*loop
= rzalloc(shader
, nir_loop
);
383 cf_init(&loop
->cf_node
, nir_cf_node_loop
);
385 nir_block
*body
= nir_block_create(shader
);
386 exec_list_make_empty(&loop
->body
);
387 exec_list_push_tail(&loop
->body
, &body
->cf_node
.node
);
388 body
->cf_node
.parent
= &loop
->cf_node
;
390 body
->successors
[0] = body
;
391 _mesa_set_add(body
->predecessors
, body
);
397 instr_init(nir_instr
*instr
, nir_instr_type type
)
401 exec_node_init(&instr
->node
);
405 dest_init(nir_dest
*dest
)
407 dest
->is_ssa
= false;
408 dest
->reg
.reg
= NULL
;
409 dest
->reg
.indirect
= NULL
;
410 dest
->reg
.base_offset
= 0;
414 alu_dest_init(nir_alu_dest
*dest
)
416 dest_init(&dest
->dest
);
417 dest
->saturate
= false;
418 dest
->write_mask
= 0xf;
422 alu_src_init(nir_alu_src
*src
)
425 src
->abs
= src
->negate
= false;
426 for (int i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; ++i
)
431 nir_alu_instr_create(nir_shader
*shader
, nir_op op
)
433 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
434 /* TODO: don't use rzalloc */
435 nir_alu_instr
*instr
=
437 sizeof(nir_alu_instr
) + num_srcs
* sizeof(nir_alu_src
));
439 instr_init(&instr
->instr
, nir_instr_type_alu
);
441 alu_dest_init(&instr
->dest
);
442 for (unsigned i
= 0; i
< num_srcs
; i
++)
443 alu_src_init(&instr
->src
[i
]);
449 nir_deref_instr_create(nir_shader
*shader
, nir_deref_type deref_type
)
451 nir_deref_instr
*instr
=
452 rzalloc_size(shader
, sizeof(nir_deref_instr
));
454 instr_init(&instr
->instr
, nir_instr_type_deref
);
456 instr
->deref_type
= deref_type
;
457 if (deref_type
!= nir_deref_type_var
)
458 src_init(&instr
->parent
);
460 if (deref_type
== nir_deref_type_array
||
461 deref_type
== nir_deref_type_ptr_as_array
)
462 src_init(&instr
->arr
.index
);
464 dest_init(&instr
->dest
);
470 nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
)
472 nir_jump_instr
*instr
= ralloc(shader
, nir_jump_instr
);
473 instr_init(&instr
->instr
, nir_instr_type_jump
);
478 nir_load_const_instr
*
479 nir_load_const_instr_create(nir_shader
*shader
, unsigned num_components
,
482 nir_load_const_instr
*instr
=
483 rzalloc_size(shader
, sizeof(*instr
) + num_components
* sizeof(*instr
->value
));
484 instr_init(&instr
->instr
, nir_instr_type_load_const
);
486 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
491 nir_intrinsic_instr
*
492 nir_intrinsic_instr_create(nir_shader
*shader
, nir_intrinsic_op op
)
494 unsigned num_srcs
= nir_intrinsic_infos
[op
].num_srcs
;
495 /* TODO: don't use rzalloc */
496 nir_intrinsic_instr
*instr
=
498 sizeof(nir_intrinsic_instr
) + num_srcs
* sizeof(nir_src
));
500 instr_init(&instr
->instr
, nir_instr_type_intrinsic
);
501 instr
->intrinsic
= op
;
503 if (nir_intrinsic_infos
[op
].has_dest
)
504 dest_init(&instr
->dest
);
506 for (unsigned i
= 0; i
< num_srcs
; i
++)
507 src_init(&instr
->src
[i
]);
513 nir_call_instr_create(nir_shader
*shader
, nir_function
*callee
)
515 const unsigned num_params
= callee
->num_params
;
516 nir_call_instr
*instr
=
517 rzalloc_size(shader
, sizeof(*instr
) +
518 num_params
* sizeof(instr
->params
[0]));
520 instr_init(&instr
->instr
, nir_instr_type_call
);
521 instr
->callee
= callee
;
522 instr
->num_params
= num_params
;
523 for (unsigned i
= 0; i
< num_params
; i
++)
524 src_init(&instr
->params
[i
]);
529 static int8_t default_tg4_offsets
[4][2] =
538 nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
)
540 nir_tex_instr
*instr
= rzalloc(shader
, nir_tex_instr
);
541 instr_init(&instr
->instr
, nir_instr_type_tex
);
543 dest_init(&instr
->dest
);
545 instr
->num_srcs
= num_srcs
;
546 instr
->src
= ralloc_array(instr
, nir_tex_src
, num_srcs
);
547 for (unsigned i
= 0; i
< num_srcs
; i
++)
548 src_init(&instr
->src
[i
].src
);
550 instr
->texture_index
= 0;
551 instr
->sampler_index
= 0;
552 memcpy(instr
->tg4_offsets
, default_tg4_offsets
, sizeof(instr
->tg4_offsets
));
558 nir_tex_instr_add_src(nir_tex_instr
*tex
,
559 nir_tex_src_type src_type
,
562 nir_tex_src
*new_srcs
= rzalloc_array(tex
, nir_tex_src
,
565 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
566 new_srcs
[i
].src_type
= tex
->src
[i
].src_type
;
567 nir_instr_move_src(&tex
->instr
, &new_srcs
[i
].src
,
571 ralloc_free(tex
->src
);
574 tex
->src
[tex
->num_srcs
].src_type
= src_type
;
575 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[tex
->num_srcs
].src
, src
);
580 nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
)
582 assert(src_idx
< tex
->num_srcs
);
584 /* First rewrite the source to NIR_SRC_INIT */
585 nir_instr_rewrite_src(&tex
->instr
, &tex
->src
[src_idx
].src
, NIR_SRC_INIT
);
587 /* Now, move all of the other sources down */
588 for (unsigned i
= src_idx
+ 1; i
< tex
->num_srcs
; i
++) {
589 tex
->src
[i
-1].src_type
= tex
->src
[i
].src_type
;
590 nir_instr_move_src(&tex
->instr
, &tex
->src
[i
-1].src
, &tex
->src
[i
].src
);
596 nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr
*tex
)
598 if (tex
->op
!= nir_texop_tg4
)
600 return memcmp(tex
->tg4_offsets
, default_tg4_offsets
,
601 sizeof(tex
->tg4_offsets
)) != 0;
605 nir_phi_instr_create(nir_shader
*shader
)
607 nir_phi_instr
*instr
= ralloc(shader
, nir_phi_instr
);
608 instr_init(&instr
->instr
, nir_instr_type_phi
);
610 dest_init(&instr
->dest
);
611 exec_list_make_empty(&instr
->srcs
);
615 nir_parallel_copy_instr
*
616 nir_parallel_copy_instr_create(nir_shader
*shader
)
618 nir_parallel_copy_instr
*instr
= ralloc(shader
, nir_parallel_copy_instr
);
619 instr_init(&instr
->instr
, nir_instr_type_parallel_copy
);
621 exec_list_make_empty(&instr
->entries
);
626 nir_ssa_undef_instr
*
627 nir_ssa_undef_instr_create(nir_shader
*shader
,
628 unsigned num_components
,
631 nir_ssa_undef_instr
*instr
= ralloc(shader
, nir_ssa_undef_instr
);
632 instr_init(&instr
->instr
, nir_instr_type_ssa_undef
);
634 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, bit_size
, NULL
);
639 static nir_const_value
640 const_value_float(double d
, unsigned bit_size
)
643 memset(&v
, 0, sizeof(v
));
645 case 16: v
.u16
= _mesa_float_to_half(d
); break;
646 case 32: v
.f32
= d
; break;
647 case 64: v
.f64
= d
; break;
649 unreachable("Invalid bit size");
654 static nir_const_value
655 const_value_int(int64_t i
, unsigned bit_size
)
658 memset(&v
, 0, sizeof(v
));
660 case 1: v
.b
= i
& 1; break;
661 case 8: v
.i8
= i
; break;
662 case 16: v
.i16
= i
; break;
663 case 32: v
.i32
= i
; break;
664 case 64: v
.i64
= i
; break;
666 unreachable("Invalid bit size");
672 nir_alu_binop_identity(nir_op binop
, unsigned bit_size
)
674 const int64_t max_int
= (1ull << (bit_size
- 1)) - 1;
675 const int64_t min_int
= -max_int
- 1;
678 return const_value_int(0, bit_size
);
680 return const_value_float(0, bit_size
);
682 return const_value_int(1, bit_size
);
684 return const_value_float(1, bit_size
);
686 return const_value_int(max_int
, bit_size
);
688 return const_value_int(~0ull, bit_size
);
690 return const_value_float(INFINITY
, bit_size
);
692 return const_value_int(min_int
, bit_size
);
694 return const_value_int(0, bit_size
);
696 return const_value_float(-INFINITY
, bit_size
);
698 return const_value_int(~0ull, bit_size
);
700 return const_value_int(0, bit_size
);
702 return const_value_int(0, bit_size
);
704 unreachable("Invalid reduction operation");
709 nir_cf_node_get_function(nir_cf_node
*node
)
711 while (node
->type
!= nir_cf_node_function
) {
715 return nir_cf_node_as_function(node
);
718 /* Reduces a cursor by trying to convert everything to after and trying to
719 * go up to block granularity when possible.
722 reduce_cursor(nir_cursor cursor
)
724 switch (cursor
.option
) {
725 case nir_cursor_before_block
:
726 assert(nir_cf_node_prev(&cursor
.block
->cf_node
) == NULL
||
727 nir_cf_node_prev(&cursor
.block
->cf_node
)->type
!= nir_cf_node_block
);
728 if (exec_list_is_empty(&cursor
.block
->instr_list
)) {
729 /* Empty block. After is as good as before. */
730 cursor
.option
= nir_cursor_after_block
;
734 case nir_cursor_after_block
:
737 case nir_cursor_before_instr
: {
738 nir_instr
*prev_instr
= nir_instr_prev(cursor
.instr
);
740 /* Before this instruction is after the previous */
741 cursor
.instr
= prev_instr
;
742 cursor
.option
= nir_cursor_after_instr
;
744 /* No previous instruction. Switch to before block */
745 cursor
.block
= cursor
.instr
->block
;
746 cursor
.option
= nir_cursor_before_block
;
748 return reduce_cursor(cursor
);
751 case nir_cursor_after_instr
:
752 if (nir_instr_next(cursor
.instr
) == NULL
) {
753 /* This is the last instruction, switch to after block */
754 cursor
.option
= nir_cursor_after_block
;
755 cursor
.block
= cursor
.instr
->block
;
760 unreachable("Inavlid cursor option");
765 nir_cursors_equal(nir_cursor a
, nir_cursor b
)
767 /* Reduced cursors should be unique */
768 a
= reduce_cursor(a
);
769 b
= reduce_cursor(b
);
771 return a
.block
== b
.block
&& a
.option
== b
.option
;
775 add_use_cb(nir_src
*src
, void *state
)
777 nir_instr
*instr
= state
;
779 src
->parent_instr
= instr
;
780 list_addtail(&src
->use_link
,
781 src
->is_ssa
? &src
->ssa
->uses
: &src
->reg
.reg
->uses
);
787 add_ssa_def_cb(nir_ssa_def
*def
, void *state
)
789 nir_instr
*instr
= state
;
791 if (instr
->block
&& def
->index
== UINT_MAX
) {
792 nir_function_impl
*impl
=
793 nir_cf_node_get_function(&instr
->block
->cf_node
);
795 def
->index
= impl
->ssa_alloc
++;
802 add_reg_def_cb(nir_dest
*dest
, void *state
)
804 nir_instr
*instr
= state
;
807 dest
->reg
.parent_instr
= instr
;
808 list_addtail(&dest
->reg
.def_link
, &dest
->reg
.reg
->defs
);
815 add_defs_uses(nir_instr
*instr
)
817 nir_foreach_src(instr
, add_use_cb
, instr
);
818 nir_foreach_dest(instr
, add_reg_def_cb
, instr
);
819 nir_foreach_ssa_def(instr
, add_ssa_def_cb
, instr
);
823 nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
)
825 switch (cursor
.option
) {
826 case nir_cursor_before_block
:
827 /* Only allow inserting jumps into empty blocks. */
828 if (instr
->type
== nir_instr_type_jump
)
829 assert(exec_list_is_empty(&cursor
.block
->instr_list
));
831 instr
->block
= cursor
.block
;
832 add_defs_uses(instr
);
833 exec_list_push_head(&cursor
.block
->instr_list
, &instr
->node
);
835 case nir_cursor_after_block
: {
836 /* Inserting instructions after a jump is illegal. */
837 nir_instr
*last
= nir_block_last_instr(cursor
.block
);
838 assert(last
== NULL
|| last
->type
!= nir_instr_type_jump
);
841 instr
->block
= cursor
.block
;
842 add_defs_uses(instr
);
843 exec_list_push_tail(&cursor
.block
->instr_list
, &instr
->node
);
846 case nir_cursor_before_instr
:
847 assert(instr
->type
!= nir_instr_type_jump
);
848 instr
->block
= cursor
.instr
->block
;
849 add_defs_uses(instr
);
850 exec_node_insert_node_before(&cursor
.instr
->node
, &instr
->node
);
852 case nir_cursor_after_instr
:
853 /* Inserting instructions after a jump is illegal. */
854 assert(cursor
.instr
->type
!= nir_instr_type_jump
);
856 /* Only allow inserting jumps at the end of the block. */
857 if (instr
->type
== nir_instr_type_jump
)
858 assert(cursor
.instr
== nir_block_last_instr(cursor
.instr
->block
));
860 instr
->block
= cursor
.instr
->block
;
861 add_defs_uses(instr
);
862 exec_node_insert_after(&cursor
.instr
->node
, &instr
->node
);
866 if (instr
->type
== nir_instr_type_jump
)
867 nir_handle_add_jump(instr
->block
);
871 src_is_valid(const nir_src
*src
)
873 return src
->is_ssa
? (src
->ssa
!= NULL
) : (src
->reg
.reg
!= NULL
);
877 remove_use_cb(nir_src
*src
, void *state
)
881 if (src_is_valid(src
))
882 list_del(&src
->use_link
);
888 remove_def_cb(nir_dest
*dest
, void *state
)
893 list_del(&dest
->reg
.def_link
);
899 remove_defs_uses(nir_instr
*instr
)
901 nir_foreach_dest(instr
, remove_def_cb
, instr
);
902 nir_foreach_src(instr
, remove_use_cb
, instr
);
905 void nir_instr_remove_v(nir_instr
*instr
)
907 remove_defs_uses(instr
);
908 exec_node_remove(&instr
->node
);
910 if (instr
->type
== nir_instr_type_jump
) {
911 nir_jump_instr
*jump_instr
= nir_instr_as_jump(instr
);
912 nir_handle_remove_jump(instr
->block
, jump_instr
->type
);
919 nir_index_local_regs(nir_function_impl
*impl
)
922 foreach_list_typed(nir_register
, reg
, node
, &impl
->registers
) {
923 reg
->index
= index
++;
925 impl
->reg_alloc
= index
;
929 visit_alu_dest(nir_alu_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
931 return cb(&instr
->dest
.dest
, state
);
935 visit_deref_dest(nir_deref_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
937 return cb(&instr
->dest
, state
);
941 visit_intrinsic_dest(nir_intrinsic_instr
*instr
, nir_foreach_dest_cb cb
,
944 if (nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
945 return cb(&instr
->dest
, state
);
951 visit_texture_dest(nir_tex_instr
*instr
, nir_foreach_dest_cb cb
,
954 return cb(&instr
->dest
, state
);
958 visit_phi_dest(nir_phi_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
960 return cb(&instr
->dest
, state
);
964 visit_parallel_copy_dest(nir_parallel_copy_instr
*instr
,
965 nir_foreach_dest_cb cb
, void *state
)
967 nir_foreach_parallel_copy_entry(entry
, instr
) {
968 if (!cb(&entry
->dest
, state
))
976 nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
978 switch (instr
->type
) {
979 case nir_instr_type_alu
:
980 return visit_alu_dest(nir_instr_as_alu(instr
), cb
, state
);
981 case nir_instr_type_deref
:
982 return visit_deref_dest(nir_instr_as_deref(instr
), cb
, state
);
983 case nir_instr_type_intrinsic
:
984 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr
), cb
, state
);
985 case nir_instr_type_tex
:
986 return visit_texture_dest(nir_instr_as_tex(instr
), cb
, state
);
987 case nir_instr_type_phi
:
988 return visit_phi_dest(nir_instr_as_phi(instr
), cb
, state
);
989 case nir_instr_type_parallel_copy
:
990 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr
),
993 case nir_instr_type_load_const
:
994 case nir_instr_type_ssa_undef
:
995 case nir_instr_type_call
:
996 case nir_instr_type_jump
:
1000 unreachable("Invalid instruction type");
1007 struct foreach_ssa_def_state
{
1008 nir_foreach_ssa_def_cb cb
;
1013 nir_ssa_def_visitor(nir_dest
*dest
, void *void_state
)
1015 struct foreach_ssa_def_state
*state
= void_state
;
1018 return state
->cb(&dest
->ssa
, state
->client_state
);
1024 nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
, void *state
)
1026 switch (instr
->type
) {
1027 case nir_instr_type_alu
:
1028 case nir_instr_type_deref
:
1029 case nir_instr_type_tex
:
1030 case nir_instr_type_intrinsic
:
1031 case nir_instr_type_phi
:
1032 case nir_instr_type_parallel_copy
: {
1033 struct foreach_ssa_def_state foreach_state
= {cb
, state
};
1034 return nir_foreach_dest(instr
, nir_ssa_def_visitor
, &foreach_state
);
1037 case nir_instr_type_load_const
:
1038 return cb(&nir_instr_as_load_const(instr
)->def
, state
);
1039 case nir_instr_type_ssa_undef
:
1040 return cb(&nir_instr_as_ssa_undef(instr
)->def
, state
);
1041 case nir_instr_type_call
:
1042 case nir_instr_type_jump
:
1045 unreachable("Invalid instruction type");
1050 nir_instr_ssa_def(nir_instr
*instr
)
1052 switch (instr
->type
) {
1053 case nir_instr_type_alu
:
1054 assert(nir_instr_as_alu(instr
)->dest
.dest
.is_ssa
);
1055 return &nir_instr_as_alu(instr
)->dest
.dest
.ssa
;
1057 case nir_instr_type_deref
:
1058 assert(nir_instr_as_deref(instr
)->dest
.is_ssa
);
1059 return &nir_instr_as_deref(instr
)->dest
.ssa
;
1061 case nir_instr_type_tex
:
1062 assert(nir_instr_as_tex(instr
)->dest
.is_ssa
);
1063 return &nir_instr_as_tex(instr
)->dest
.ssa
;
1065 case nir_instr_type_intrinsic
: {
1066 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
1067 if (nir_intrinsic_infos
[intrin
->intrinsic
].has_dest
) {
1068 assert(intrin
->dest
.is_ssa
);
1069 return &intrin
->dest
.ssa
;
1075 case nir_instr_type_phi
:
1076 assert(nir_instr_as_phi(instr
)->dest
.is_ssa
);
1077 return &nir_instr_as_phi(instr
)->dest
.ssa
;
1079 case nir_instr_type_parallel_copy
:
1080 unreachable("Parallel copies are unsupported by this function");
1082 case nir_instr_type_load_const
:
1083 return &nir_instr_as_load_const(instr
)->def
;
1085 case nir_instr_type_ssa_undef
:
1086 return &nir_instr_as_ssa_undef(instr
)->def
;
1088 case nir_instr_type_call
:
1089 case nir_instr_type_jump
:
1093 unreachable("Invalid instruction type");
1097 visit_src(nir_src
*src
, nir_foreach_src_cb cb
, void *state
)
1099 if (!cb(src
, state
))
1101 if (!src
->is_ssa
&& src
->reg
.indirect
)
1102 return cb(src
->reg
.indirect
, state
);
1107 visit_alu_src(nir_alu_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1109 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1110 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1117 visit_deref_instr_src(nir_deref_instr
*instr
,
1118 nir_foreach_src_cb cb
, void *state
)
1120 if (instr
->deref_type
!= nir_deref_type_var
) {
1121 if (!visit_src(&instr
->parent
, cb
, state
))
1125 if (instr
->deref_type
== nir_deref_type_array
||
1126 instr
->deref_type
== nir_deref_type_ptr_as_array
) {
1127 if (!visit_src(&instr
->arr
.index
, cb
, state
))
1135 visit_tex_src(nir_tex_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1137 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
1138 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1146 visit_intrinsic_src(nir_intrinsic_instr
*instr
, nir_foreach_src_cb cb
,
1149 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
1150 for (unsigned i
= 0; i
< num_srcs
; i
++) {
1151 if (!visit_src(&instr
->src
[i
], cb
, state
))
1159 visit_call_src(nir_call_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1161 for (unsigned i
= 0; i
< instr
->num_params
; i
++) {
1162 if (!visit_src(&instr
->params
[i
], cb
, state
))
1170 visit_phi_src(nir_phi_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1172 nir_foreach_phi_src(src
, instr
) {
1173 if (!visit_src(&src
->src
, cb
, state
))
1181 visit_parallel_copy_src(nir_parallel_copy_instr
*instr
,
1182 nir_foreach_src_cb cb
, void *state
)
1184 nir_foreach_parallel_copy_entry(entry
, instr
) {
1185 if (!visit_src(&entry
->src
, cb
, state
))
1194 nir_foreach_src_cb cb
;
1195 } visit_dest_indirect_state
;
1198 visit_dest_indirect(nir_dest
*dest
, void *_state
)
1200 visit_dest_indirect_state
*state
= (visit_dest_indirect_state
*) _state
;
1202 if (!dest
->is_ssa
&& dest
->reg
.indirect
)
1203 return state
->cb(dest
->reg
.indirect
, state
->state
);
1209 nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1211 switch (instr
->type
) {
1212 case nir_instr_type_alu
:
1213 if (!visit_alu_src(nir_instr_as_alu(instr
), cb
, state
))
1216 case nir_instr_type_deref
:
1217 if (!visit_deref_instr_src(nir_instr_as_deref(instr
), cb
, state
))
1220 case nir_instr_type_intrinsic
:
1221 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr
), cb
, state
))
1224 case nir_instr_type_tex
:
1225 if (!visit_tex_src(nir_instr_as_tex(instr
), cb
, state
))
1228 case nir_instr_type_call
:
1229 if (!visit_call_src(nir_instr_as_call(instr
), cb
, state
))
1232 case nir_instr_type_load_const
:
1233 /* Constant load instructions have no regular sources */
1235 case nir_instr_type_phi
:
1236 if (!visit_phi_src(nir_instr_as_phi(instr
), cb
, state
))
1239 case nir_instr_type_parallel_copy
:
1240 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr
),
1244 case nir_instr_type_jump
:
1245 case nir_instr_type_ssa_undef
:
1249 unreachable("Invalid instruction type");
1253 visit_dest_indirect_state dest_state
;
1254 dest_state
.state
= state
;
1256 return nir_foreach_dest(instr
, visit_dest_indirect
, &dest_state
);
1260 nir_foreach_phi_src_leaving_block(nir_block
*block
,
1261 nir_foreach_src_cb cb
,
1264 for (unsigned i
= 0; i
< ARRAY_SIZE(block
->successors
); i
++) {
1265 if (block
->successors
[i
] == NULL
)
1268 nir_foreach_instr(instr
, block
->successors
[i
]) {
1269 if (instr
->type
!= nir_instr_type_phi
)
1272 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
1273 nir_foreach_phi_src(phi_src
, phi
) {
1274 if (phi_src
->pred
== block
) {
1275 if (!cb(&phi_src
->src
, state
))
1286 nir_const_value_for_float(double f
, unsigned bit_size
)
1289 memset(&v
, 0, sizeof(v
));
1293 v
.u16
= _mesa_float_to_half(f
);
1302 unreachable("Invalid bit size");
1309 nir_const_value_as_float(nir_const_value value
, unsigned bit_size
)
1312 case 16: return _mesa_half_to_float(value
.u16
);
1313 case 32: return value
.f32
;
1314 case 64: return value
.f64
;
1316 unreachable("Invalid bit size");
1321 nir_src_as_const_value(nir_src src
)
1326 if (src
.ssa
->parent_instr
->type
!= nir_instr_type_load_const
)
1329 nir_load_const_instr
*load
= nir_instr_as_load_const(src
.ssa
->parent_instr
);
1335 * Returns true if the source is known to be dynamically uniform. Otherwise it
1336 * returns false which means it may or may not be dynamically uniform but it
1337 * can't be determined.
1340 nir_src_is_dynamically_uniform(nir_src src
)
1345 /* Constants are trivially dynamically uniform */
1346 if (src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
1349 /* As are uniform variables */
1350 if (src
.ssa
->parent_instr
->type
== nir_instr_type_intrinsic
) {
1351 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(src
.ssa
->parent_instr
);
1353 if (intr
->intrinsic
== nir_intrinsic_load_uniform
)
1357 /* Operating together dynamically uniform expressions produces a
1358 * dynamically uniform result
1360 if (src
.ssa
->parent_instr
->type
== nir_instr_type_alu
) {
1361 nir_alu_instr
*alu
= nir_instr_as_alu(src
.ssa
->parent_instr
);
1362 for (int i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1363 if (!nir_src_is_dynamically_uniform(alu
->src
[i
].src
))
1370 /* XXX: this could have many more tests, such as when a sampler function is
1371 * called with dynamically uniform arguments.
1377 src_remove_all_uses(nir_src
*src
)
1379 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1380 if (!src_is_valid(src
))
1383 list_del(&src
->use_link
);
1388 src_add_all_uses(nir_src
*src
, nir_instr
*parent_instr
, nir_if
*parent_if
)
1390 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1391 if (!src_is_valid(src
))
1395 src
->parent_instr
= parent_instr
;
1397 list_addtail(&src
->use_link
, &src
->ssa
->uses
);
1399 list_addtail(&src
->use_link
, &src
->reg
.reg
->uses
);
1402 src
->parent_if
= parent_if
;
1404 list_addtail(&src
->use_link
, &src
->ssa
->if_uses
);
1406 list_addtail(&src
->use_link
, &src
->reg
.reg
->if_uses
);
1412 nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
)
1414 assert(!src_is_valid(src
) || src
->parent_instr
== instr
);
1416 src_remove_all_uses(src
);
1418 src_add_all_uses(src
, instr
, NULL
);
1422 nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
)
1424 assert(!src_is_valid(dest
) || dest
->parent_instr
== dest_instr
);
1426 src_remove_all_uses(dest
);
1427 src_remove_all_uses(src
);
1429 *src
= NIR_SRC_INIT
;
1430 src_add_all_uses(dest
, dest_instr
, NULL
);
1434 nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
)
1436 nir_src
*src
= &if_stmt
->condition
;
1437 assert(!src_is_valid(src
) || src
->parent_if
== if_stmt
);
1439 src_remove_all_uses(src
);
1441 src_add_all_uses(src
, NULL
, if_stmt
);
1445 nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
, nir_dest new_dest
)
1448 /* We can only overwrite an SSA destination if it has no uses. */
1449 assert(list_is_empty(&dest
->ssa
.uses
) && list_is_empty(&dest
->ssa
.if_uses
));
1451 list_del(&dest
->reg
.def_link
);
1452 if (dest
->reg
.indirect
)
1453 src_remove_all_uses(dest
->reg
.indirect
);
1456 /* We can't re-write with an SSA def */
1457 assert(!new_dest
.is_ssa
);
1459 nir_dest_copy(dest
, &new_dest
, instr
);
1461 dest
->reg
.parent_instr
= instr
;
1462 list_addtail(&dest
->reg
.def_link
, &new_dest
.reg
.reg
->defs
);
1464 if (dest
->reg
.indirect
)
1465 src_add_all_uses(dest
->reg
.indirect
, instr
, NULL
);
1468 /* note: does *not* take ownership of 'name' */
1470 nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
1471 unsigned num_components
,
1472 unsigned bit_size
, const char *name
)
1474 def
->name
= ralloc_strdup(instr
, name
);
1475 def
->parent_instr
= instr
;
1476 list_inithead(&def
->uses
);
1477 list_inithead(&def
->if_uses
);
1478 def
->num_components
= num_components
;
1479 def
->bit_size
= bit_size
;
1480 def
->divergent
= true; /* This is the safer default */
1483 nir_function_impl
*impl
=
1484 nir_cf_node_get_function(&instr
->block
->cf_node
);
1486 def
->index
= impl
->ssa_alloc
++;
1488 def
->index
= UINT_MAX
;
1492 /* note: does *not* take ownership of 'name' */
1494 nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
1495 unsigned num_components
, unsigned bit_size
,
1498 dest
->is_ssa
= true;
1499 nir_ssa_def_init(instr
, &dest
->ssa
, num_components
, bit_size
, name
);
1503 nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
)
1505 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1507 nir_foreach_use_safe(use_src
, def
)
1508 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1510 nir_foreach_if_use_safe(use_src
, def
)
1511 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1515 is_instr_between(nir_instr
*start
, nir_instr
*end
, nir_instr
*between
)
1517 assert(start
->block
== end
->block
);
1519 if (between
->block
!= start
->block
)
1522 /* Search backwards looking for "between" */
1523 while (start
!= end
) {
1527 end
= nir_instr_prev(end
);
1534 /* Replaces all uses of the given SSA def with the given source but only if
1535 * the use comes after the after_me instruction. This can be useful if you
1536 * are emitting code to fix up the result of some instruction: you can freely
1537 * use the result in that code and then call rewrite_uses_after and pass the
1538 * last fixup instruction as after_me and it will replace all of the uses you
1539 * want without touching the fixup code.
1541 * This function assumes that after_me is in the same block as
1542 * def->parent_instr and that after_me comes after def->parent_instr.
1545 nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
1546 nir_instr
*after_me
)
1548 if (new_src
.is_ssa
&& def
== new_src
.ssa
)
1551 nir_foreach_use_safe(use_src
, def
) {
1552 assert(use_src
->parent_instr
!= def
->parent_instr
);
1553 /* Since def already dominates all of its uses, the only way a use can
1554 * not be dominated by after_me is if it is between def and after_me in
1555 * the instruction list.
1557 if (!is_instr_between(def
->parent_instr
, after_me
, use_src
->parent_instr
))
1558 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1561 nir_foreach_if_use_safe(use_src
, def
)
1562 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1565 nir_component_mask_t
1566 nir_ssa_def_components_read(const nir_ssa_def
*def
)
1568 nir_component_mask_t read_mask
= 0;
1569 nir_foreach_use(use
, def
) {
1570 if (use
->parent_instr
->type
== nir_instr_type_alu
) {
1571 nir_alu_instr
*alu
= nir_instr_as_alu(use
->parent_instr
);
1572 nir_alu_src
*alu_src
= exec_node_data(nir_alu_src
, use
, src
);
1573 int src_idx
= alu_src
- &alu
->src
[0];
1574 assert(src_idx
>= 0 && src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
1575 read_mask
|= nir_alu_instr_src_read_mask(alu
, src_idx
);
1577 return (1 << def
->num_components
) - 1;
1581 if (!list_is_empty(&def
->if_uses
))
1588 nir_block_cf_tree_next(nir_block
*block
)
1590 if (block
== NULL
) {
1591 /* nir_foreach_block_safe() will call this function on a NULL block
1592 * after the last iteration, but it won't use the result so just return
1598 nir_cf_node
*cf_next
= nir_cf_node_next(&block
->cf_node
);
1600 return nir_cf_node_cf_tree_first(cf_next
);
1602 nir_cf_node
*parent
= block
->cf_node
.parent
;
1604 switch (parent
->type
) {
1605 case nir_cf_node_if
: {
1606 /* Are we at the end of the if? Go to the beginning of the else */
1607 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1608 if (block
== nir_if_last_then_block(if_stmt
))
1609 return nir_if_first_else_block(if_stmt
);
1611 assert(block
== nir_if_last_else_block(if_stmt
));
1615 case nir_cf_node_loop
:
1616 return nir_cf_node_as_block(nir_cf_node_next(parent
));
1618 case nir_cf_node_function
:
1622 unreachable("unknown cf node type");
1627 nir_block_cf_tree_prev(nir_block
*block
)
1629 if (block
== NULL
) {
1630 /* do this for consistency with nir_block_cf_tree_next() */
1634 nir_cf_node
*cf_prev
= nir_cf_node_prev(&block
->cf_node
);
1636 return nir_cf_node_cf_tree_last(cf_prev
);
1638 nir_cf_node
*parent
= block
->cf_node
.parent
;
1640 switch (parent
->type
) {
1641 case nir_cf_node_if
: {
1642 /* Are we at the beginning of the else? Go to the end of the if */
1643 nir_if
*if_stmt
= nir_cf_node_as_if(parent
);
1644 if (block
== nir_if_first_else_block(if_stmt
))
1645 return nir_if_last_then_block(if_stmt
);
1647 assert(block
== nir_if_first_then_block(if_stmt
));
1651 case nir_cf_node_loop
:
1652 return nir_cf_node_as_block(nir_cf_node_prev(parent
));
1654 case nir_cf_node_function
:
1658 unreachable("unknown cf node type");
1662 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
)
1664 switch (node
->type
) {
1665 case nir_cf_node_function
: {
1666 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1667 return nir_start_block(impl
);
1670 case nir_cf_node_if
: {
1671 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1672 return nir_if_first_then_block(if_stmt
);
1675 case nir_cf_node_loop
: {
1676 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1677 return nir_loop_first_block(loop
);
1680 case nir_cf_node_block
: {
1681 return nir_cf_node_as_block(node
);
1685 unreachable("unknown node type");
1689 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
)
1691 switch (node
->type
) {
1692 case nir_cf_node_function
: {
1693 nir_function_impl
*impl
= nir_cf_node_as_function(node
);
1694 return nir_impl_last_block(impl
);
1697 case nir_cf_node_if
: {
1698 nir_if
*if_stmt
= nir_cf_node_as_if(node
);
1699 return nir_if_last_else_block(if_stmt
);
1702 case nir_cf_node_loop
: {
1703 nir_loop
*loop
= nir_cf_node_as_loop(node
);
1704 return nir_loop_last_block(loop
);
1707 case nir_cf_node_block
: {
1708 return nir_cf_node_as_block(node
);
1712 unreachable("unknown node type");
1716 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
)
1718 if (node
->type
== nir_cf_node_block
)
1719 return nir_block_cf_tree_next(nir_cf_node_as_block(node
));
1720 else if (node
->type
== nir_cf_node_function
)
1723 return nir_cf_node_as_block(nir_cf_node_next(node
));
1727 nir_block_get_following_if(nir_block
*block
)
1729 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1732 if (nir_cf_node_is_last(&block
->cf_node
))
1735 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1737 if (next_node
->type
!= nir_cf_node_if
)
1740 return nir_cf_node_as_if(next_node
);
1744 nir_block_get_following_loop(nir_block
*block
)
1746 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1749 if (nir_cf_node_is_last(&block
->cf_node
))
1752 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1754 if (next_node
->type
!= nir_cf_node_loop
)
1757 return nir_cf_node_as_loop(next_node
);
1761 nir_index_blocks(nir_function_impl
*impl
)
1765 if (impl
->valid_metadata
& nir_metadata_block_index
)
1768 nir_foreach_block(block
, impl
) {
1769 block
->index
= index
++;
1772 /* The end_block isn't really part of the program, which is why its index
1775 impl
->num_blocks
= impl
->end_block
->index
= index
;
1779 index_ssa_def_cb(nir_ssa_def
*def
, void *state
)
1781 unsigned *index
= (unsigned *) state
;
1782 def
->index
= (*index
)++;
1788 * The indices are applied top-to-bottom which has the very nice property
1789 * that, if A dominates B, then A->index <= B->index.
1792 nir_index_ssa_defs(nir_function_impl
*impl
)
1796 nir_foreach_block(block
, impl
) {
1797 nir_foreach_instr(instr
, block
)
1798 nir_foreach_ssa_def(instr
, index_ssa_def_cb
, &index
);
1801 impl
->ssa_alloc
= index
;
1805 * The indices are applied top-to-bottom which has the very nice property
1806 * that, if A dominates B, then A->index <= B->index.
1809 nir_index_instrs(nir_function_impl
*impl
)
1813 nir_foreach_block(block
, impl
) {
1814 nir_foreach_instr(instr
, block
)
1815 instr
->index
= index
++;
1822 index_var_list(struct exec_list
*list
)
1824 unsigned next_index
= 0;
1825 nir_foreach_variable(var
, list
)
1826 var
->index
= next_index
++;
1830 nir_index_vars(nir_shader
*shader
, nir_function_impl
*impl
, nir_variable_mode modes
)
1832 if ((modes
& nir_var_function_temp
) && impl
)
1833 index_var_list(&impl
->locals
);
1835 if (modes
& nir_var_shader_temp
)
1836 index_var_list(&shader
->globals
);
1838 if (modes
& nir_var_shader_in
)
1839 index_var_list(&shader
->inputs
);
1841 if (modes
& nir_var_shader_out
)
1842 index_var_list(&shader
->outputs
);
1844 if (modes
& (nir_var_uniform
| nir_var_mem_ubo
| nir_var_mem_ssbo
))
1845 index_var_list(&shader
->uniforms
);
1847 if (modes
& nir_var_mem_shared
)
1848 index_var_list(&shader
->shared
);
1850 if (modes
& nir_var_system_value
)
1851 index_var_list(&shader
->system_values
);
1855 cursor_next_instr(nir_cursor cursor
)
1857 switch (cursor
.option
) {
1858 case nir_cursor_before_block
:
1859 for (nir_block
*block
= cursor
.block
; block
;
1860 block
= nir_block_cf_tree_next(block
)) {
1861 nir_instr
*instr
= nir_block_first_instr(block
);
1867 case nir_cursor_after_block
:
1868 cursor
.block
= nir_block_cf_tree_next(cursor
.block
);
1869 if (cursor
.block
== NULL
)
1872 cursor
.option
= nir_cursor_before_block
;
1873 return cursor_next_instr(cursor
);
1875 case nir_cursor_before_instr
:
1876 return cursor
.instr
;
1878 case nir_cursor_after_instr
:
1879 if (nir_instr_next(cursor
.instr
))
1880 return nir_instr_next(cursor
.instr
);
1882 cursor
.option
= nir_cursor_after_block
;
1883 cursor
.block
= cursor
.instr
->block
;
1884 return cursor_next_instr(cursor
);
1887 unreachable("Inavlid cursor option");
1890 ASSERTED
static bool
1891 dest_is_ssa(nir_dest
*dest
, void *_state
)
1894 return dest
->is_ssa
;
1898 nir_function_impl_lower_instructions(nir_function_impl
*impl
,
1899 nir_instr_filter_cb filter
,
1900 nir_lower_instr_cb lower
,
1904 nir_builder_init(&b
, impl
);
1906 nir_metadata preserved
= nir_metadata_block_index
|
1907 nir_metadata_dominance
;
1909 bool progress
= false;
1910 nir_cursor iter
= nir_before_cf_list(&impl
->body
);
1912 while ((instr
= cursor_next_instr(iter
)) != NULL
) {
1913 if (filter
&& !filter(instr
, cb_data
)) {
1914 iter
= nir_after_instr(instr
);
1918 assert(nir_foreach_dest(instr
, dest_is_ssa
, NULL
));
1919 nir_ssa_def
*old_def
= nir_instr_ssa_def(instr
);
1920 if (old_def
== NULL
) {
1921 iter
= nir_after_instr(instr
);
1925 /* We're about to ask the callback to generate a replacement for instr.
1926 * Save off the uses from instr's SSA def so we know what uses to
1927 * rewrite later. If we use nir_ssa_def_rewrite_uses, it fails in the
1928 * case where the generated replacement code uses the result of instr
1929 * itself. If we use nir_ssa_def_rewrite_uses_after (which is the
1930 * normal solution to this problem), it doesn't work well if control-
1931 * flow is inserted as part of the replacement, doesn't handle cases
1932 * where the replacement is something consumed by instr, and suffers
1933 * from performance issues. This is the only way to 100% guarantee
1934 * that we rewrite the correct set efficiently.
1936 struct list_head old_uses
, old_if_uses
;
1937 list_replace(&old_def
->uses
, &old_uses
);
1938 list_inithead(&old_def
->uses
);
1939 list_replace(&old_def
->if_uses
, &old_if_uses
);
1940 list_inithead(&old_def
->if_uses
);
1942 b
.cursor
= nir_after_instr(instr
);
1943 nir_ssa_def
*new_def
= lower(&b
, instr
, cb_data
);
1944 if (new_def
&& new_def
!= NIR_LOWER_INSTR_PROGRESS
) {
1945 assert(old_def
!= NULL
);
1946 if (new_def
->parent_instr
->block
!= instr
->block
)
1947 preserved
= nir_metadata_none
;
1949 nir_src new_src
= nir_src_for_ssa(new_def
);
1950 list_for_each_entry_safe(nir_src
, use_src
, &old_uses
, use_link
)
1951 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1953 list_for_each_entry_safe(nir_src
, use_src
, &old_if_uses
, use_link
)
1954 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1956 if (list_is_empty(&old_def
->uses
) && list_is_empty(&old_def
->if_uses
)) {
1957 iter
= nir_instr_remove(instr
);
1959 iter
= nir_after_instr(instr
);
1963 /* We didn't end up lowering after all. Put the uses back */
1965 list_replace(&old_uses
, &old_def
->uses
);
1966 list_replace(&old_if_uses
, &old_def
->if_uses
);
1968 iter
= nir_after_instr(instr
);
1970 if (new_def
== NIR_LOWER_INSTR_PROGRESS
)
1976 nir_metadata_preserve(impl
, preserved
);
1978 nir_metadata_preserve(impl
, nir_metadata_all
);
1985 nir_shader_lower_instructions(nir_shader
*shader
,
1986 nir_instr_filter_cb filter
,
1987 nir_lower_instr_cb lower
,
1990 bool progress
= false;
1992 nir_foreach_function(function
, shader
) {
1993 if (function
->impl
&&
1994 nir_function_impl_lower_instructions(function
->impl
,
1995 filter
, lower
, cb_data
))
2003 nir_intrinsic_from_system_value(gl_system_value val
)
2006 case SYSTEM_VALUE_VERTEX_ID
:
2007 return nir_intrinsic_load_vertex_id
;
2008 case SYSTEM_VALUE_INSTANCE_ID
:
2009 return nir_intrinsic_load_instance_id
;
2010 case SYSTEM_VALUE_DRAW_ID
:
2011 return nir_intrinsic_load_draw_id
;
2012 case SYSTEM_VALUE_BASE_INSTANCE
:
2013 return nir_intrinsic_load_base_instance
;
2014 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
:
2015 return nir_intrinsic_load_vertex_id_zero_base
;
2016 case SYSTEM_VALUE_IS_INDEXED_DRAW
:
2017 return nir_intrinsic_load_is_indexed_draw
;
2018 case SYSTEM_VALUE_FIRST_VERTEX
:
2019 return nir_intrinsic_load_first_vertex
;
2020 case SYSTEM_VALUE_BASE_VERTEX
:
2021 return nir_intrinsic_load_base_vertex
;
2022 case SYSTEM_VALUE_INVOCATION_ID
:
2023 return nir_intrinsic_load_invocation_id
;
2024 case SYSTEM_VALUE_FRAG_COORD
:
2025 return nir_intrinsic_load_frag_coord
;
2026 case SYSTEM_VALUE_POINT_COORD
:
2027 return nir_intrinsic_load_point_coord
;
2028 case SYSTEM_VALUE_FRONT_FACE
:
2029 return nir_intrinsic_load_front_face
;
2030 case SYSTEM_VALUE_SAMPLE_ID
:
2031 return nir_intrinsic_load_sample_id
;
2032 case SYSTEM_VALUE_SAMPLE_POS
:
2033 return nir_intrinsic_load_sample_pos
;
2034 case SYSTEM_VALUE_SAMPLE_MASK_IN
:
2035 return nir_intrinsic_load_sample_mask_in
;
2036 case SYSTEM_VALUE_LOCAL_INVOCATION_ID
:
2037 return nir_intrinsic_load_local_invocation_id
;
2038 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
:
2039 return nir_intrinsic_load_local_invocation_index
;
2040 case SYSTEM_VALUE_WORK_GROUP_ID
:
2041 return nir_intrinsic_load_work_group_id
;
2042 case SYSTEM_VALUE_NUM_WORK_GROUPS
:
2043 return nir_intrinsic_load_num_work_groups
;
2044 case SYSTEM_VALUE_PRIMITIVE_ID
:
2045 return nir_intrinsic_load_primitive_id
;
2046 case SYSTEM_VALUE_TESS_COORD
:
2047 return nir_intrinsic_load_tess_coord
;
2048 case SYSTEM_VALUE_TESS_LEVEL_OUTER
:
2049 return nir_intrinsic_load_tess_level_outer
;
2050 case SYSTEM_VALUE_TESS_LEVEL_INNER
:
2051 return nir_intrinsic_load_tess_level_inner
;
2052 case SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT
:
2053 return nir_intrinsic_load_tess_level_outer_default
;
2054 case SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT
:
2055 return nir_intrinsic_load_tess_level_inner_default
;
2056 case SYSTEM_VALUE_VERTICES_IN
:
2057 return nir_intrinsic_load_patch_vertices_in
;
2058 case SYSTEM_VALUE_HELPER_INVOCATION
:
2059 return nir_intrinsic_load_helper_invocation
;
2060 case SYSTEM_VALUE_COLOR0
:
2061 return nir_intrinsic_load_color0
;
2062 case SYSTEM_VALUE_COLOR1
:
2063 return nir_intrinsic_load_color1
;
2064 case SYSTEM_VALUE_VIEW_INDEX
:
2065 return nir_intrinsic_load_view_index
;
2066 case SYSTEM_VALUE_SUBGROUP_SIZE
:
2067 return nir_intrinsic_load_subgroup_size
;
2068 case SYSTEM_VALUE_SUBGROUP_INVOCATION
:
2069 return nir_intrinsic_load_subgroup_invocation
;
2070 case SYSTEM_VALUE_SUBGROUP_EQ_MASK
:
2071 return nir_intrinsic_load_subgroup_eq_mask
;
2072 case SYSTEM_VALUE_SUBGROUP_GE_MASK
:
2073 return nir_intrinsic_load_subgroup_ge_mask
;
2074 case SYSTEM_VALUE_SUBGROUP_GT_MASK
:
2075 return nir_intrinsic_load_subgroup_gt_mask
;
2076 case SYSTEM_VALUE_SUBGROUP_LE_MASK
:
2077 return nir_intrinsic_load_subgroup_le_mask
;
2078 case SYSTEM_VALUE_SUBGROUP_LT_MASK
:
2079 return nir_intrinsic_load_subgroup_lt_mask
;
2080 case SYSTEM_VALUE_NUM_SUBGROUPS
:
2081 return nir_intrinsic_load_num_subgroups
;
2082 case SYSTEM_VALUE_SUBGROUP_ID
:
2083 return nir_intrinsic_load_subgroup_id
;
2084 case SYSTEM_VALUE_LOCAL_GROUP_SIZE
:
2085 return nir_intrinsic_load_local_group_size
;
2086 case SYSTEM_VALUE_GLOBAL_INVOCATION_ID
:
2087 return nir_intrinsic_load_global_invocation_id
;
2088 case SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX
:
2089 return nir_intrinsic_load_global_invocation_index
;
2090 case SYSTEM_VALUE_WORK_DIM
:
2091 return nir_intrinsic_load_work_dim
;
2092 case SYSTEM_VALUE_USER_DATA_AMD
:
2093 return nir_intrinsic_load_user_data_amd
;
2095 unreachable("system value does not directly correspond to intrinsic");
2100 nir_system_value_from_intrinsic(nir_intrinsic_op intrin
)
2103 case nir_intrinsic_load_vertex_id
:
2104 return SYSTEM_VALUE_VERTEX_ID
;
2105 case nir_intrinsic_load_instance_id
:
2106 return SYSTEM_VALUE_INSTANCE_ID
;
2107 case nir_intrinsic_load_draw_id
:
2108 return SYSTEM_VALUE_DRAW_ID
;
2109 case nir_intrinsic_load_base_instance
:
2110 return SYSTEM_VALUE_BASE_INSTANCE
;
2111 case nir_intrinsic_load_vertex_id_zero_base
:
2112 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
;
2113 case nir_intrinsic_load_first_vertex
:
2114 return SYSTEM_VALUE_FIRST_VERTEX
;
2115 case nir_intrinsic_load_is_indexed_draw
:
2116 return SYSTEM_VALUE_IS_INDEXED_DRAW
;
2117 case nir_intrinsic_load_base_vertex
:
2118 return SYSTEM_VALUE_BASE_VERTEX
;
2119 case nir_intrinsic_load_invocation_id
:
2120 return SYSTEM_VALUE_INVOCATION_ID
;
2121 case nir_intrinsic_load_frag_coord
:
2122 return SYSTEM_VALUE_FRAG_COORD
;
2123 case nir_intrinsic_load_point_coord
:
2124 return SYSTEM_VALUE_POINT_COORD
;
2125 case nir_intrinsic_load_front_face
:
2126 return SYSTEM_VALUE_FRONT_FACE
;
2127 case nir_intrinsic_load_sample_id
:
2128 return SYSTEM_VALUE_SAMPLE_ID
;
2129 case nir_intrinsic_load_sample_pos
:
2130 return SYSTEM_VALUE_SAMPLE_POS
;
2131 case nir_intrinsic_load_sample_mask_in
:
2132 return SYSTEM_VALUE_SAMPLE_MASK_IN
;
2133 case nir_intrinsic_load_local_invocation_id
:
2134 return SYSTEM_VALUE_LOCAL_INVOCATION_ID
;
2135 case nir_intrinsic_load_local_invocation_index
:
2136 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX
;
2137 case nir_intrinsic_load_num_work_groups
:
2138 return SYSTEM_VALUE_NUM_WORK_GROUPS
;
2139 case nir_intrinsic_load_work_group_id
:
2140 return SYSTEM_VALUE_WORK_GROUP_ID
;
2141 case nir_intrinsic_load_primitive_id
:
2142 return SYSTEM_VALUE_PRIMITIVE_ID
;
2143 case nir_intrinsic_load_tess_coord
:
2144 return SYSTEM_VALUE_TESS_COORD
;
2145 case nir_intrinsic_load_tess_level_outer
:
2146 return SYSTEM_VALUE_TESS_LEVEL_OUTER
;
2147 case nir_intrinsic_load_tess_level_inner
:
2148 return SYSTEM_VALUE_TESS_LEVEL_INNER
;
2149 case nir_intrinsic_load_tess_level_outer_default
:
2150 return SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT
;
2151 case nir_intrinsic_load_tess_level_inner_default
:
2152 return SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT
;
2153 case nir_intrinsic_load_patch_vertices_in
:
2154 return SYSTEM_VALUE_VERTICES_IN
;
2155 case nir_intrinsic_load_helper_invocation
:
2156 return SYSTEM_VALUE_HELPER_INVOCATION
;
2157 case nir_intrinsic_load_color0
:
2158 return SYSTEM_VALUE_COLOR0
;
2159 case nir_intrinsic_load_color1
:
2160 return SYSTEM_VALUE_COLOR1
;
2161 case nir_intrinsic_load_view_index
:
2162 return SYSTEM_VALUE_VIEW_INDEX
;
2163 case nir_intrinsic_load_subgroup_size
:
2164 return SYSTEM_VALUE_SUBGROUP_SIZE
;
2165 case nir_intrinsic_load_subgroup_invocation
:
2166 return SYSTEM_VALUE_SUBGROUP_INVOCATION
;
2167 case nir_intrinsic_load_subgroup_eq_mask
:
2168 return SYSTEM_VALUE_SUBGROUP_EQ_MASK
;
2169 case nir_intrinsic_load_subgroup_ge_mask
:
2170 return SYSTEM_VALUE_SUBGROUP_GE_MASK
;
2171 case nir_intrinsic_load_subgroup_gt_mask
:
2172 return SYSTEM_VALUE_SUBGROUP_GT_MASK
;
2173 case nir_intrinsic_load_subgroup_le_mask
:
2174 return SYSTEM_VALUE_SUBGROUP_LE_MASK
;
2175 case nir_intrinsic_load_subgroup_lt_mask
:
2176 return SYSTEM_VALUE_SUBGROUP_LT_MASK
;
2177 case nir_intrinsic_load_num_subgroups
:
2178 return SYSTEM_VALUE_NUM_SUBGROUPS
;
2179 case nir_intrinsic_load_subgroup_id
:
2180 return SYSTEM_VALUE_SUBGROUP_ID
;
2181 case nir_intrinsic_load_local_group_size
:
2182 return SYSTEM_VALUE_LOCAL_GROUP_SIZE
;
2183 case nir_intrinsic_load_global_invocation_id
:
2184 return SYSTEM_VALUE_GLOBAL_INVOCATION_ID
;
2185 case nir_intrinsic_load_user_data_amd
:
2186 return SYSTEM_VALUE_USER_DATA_AMD
;
2188 unreachable("intrinsic doesn't produce a system value");
2192 /* OpenGL utility method that remaps the location attributes if they are
2193 * doubles. Not needed for vulkan due the differences on the input location
2194 * count for doubles on vulkan vs OpenGL
2196 * The bitfield returned in dual_slot is one bit for each double input slot in
2197 * the original OpenGL single-slot input numbering. The mapping from old
2198 * locations to new locations is as follows:
2200 * new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc))
2203 nir_remap_dual_slot_attributes(nir_shader
*shader
, uint64_t *dual_slot
)
2205 assert(shader
->info
.stage
== MESA_SHADER_VERTEX
);
2208 nir_foreach_variable(var
, &shader
->inputs
) {
2209 if (glsl_type_is_dual_slot(glsl_without_array(var
->type
))) {
2210 unsigned slots
= glsl_count_attribute_slots(var
->type
, true);
2211 *dual_slot
|= BITFIELD64_MASK(slots
) << var
->data
.location
;
2215 nir_foreach_variable(var
, &shader
->inputs
) {
2216 var
->data
.location
+=
2217 util_bitcount64(*dual_slot
& BITFIELD64_MASK(var
->data
.location
));
2221 /* Returns an attribute mask that has been re-compacted using the given
2225 nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
)
2228 unsigned loc
= u_bit_scan64(&dual_slot
);
2229 /* mask of all bits up to and including loc */
2230 uint64_t mask
= BITFIELD64_MASK(loc
+ 1);
2231 attribs
= (attribs
& mask
) | ((attribs
& ~mask
) >> 1);
2237 nir_rewrite_image_intrinsic(nir_intrinsic_instr
*intrin
, nir_ssa_def
*src
,
2240 enum gl_access_qualifier access
= nir_intrinsic_access(intrin
);
2242 switch (intrin
->intrinsic
) {
2244 case nir_intrinsic_image_deref_##op: \
2245 intrin->intrinsic = bindless ? nir_intrinsic_bindless_image_##op \
2246 : nir_intrinsic_image_##op; \
2258 CASE(atomic_exchange
)
2259 CASE(atomic_comp_swap
)
2263 CASE(load_raw_intel
)
2264 CASE(store_raw_intel
)
2267 unreachable("Unhanded image intrinsic");
2270 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
2271 nir_variable
*var
= nir_deref_instr_get_variable(deref
);
2273 nir_intrinsic_set_image_dim(intrin
, glsl_get_sampler_dim(deref
->type
));
2274 nir_intrinsic_set_image_array(intrin
, glsl_sampler_type_is_array(deref
->type
));
2275 nir_intrinsic_set_access(intrin
, access
| var
->data
.access
);
2276 nir_intrinsic_set_format(intrin
, var
->data
.image
.format
);
2278 nir_instr_rewrite_src(&intrin
->instr
, &intrin
->src
[0],
2279 nir_src_for_ssa(src
));
2283 nir_image_intrinsic_coord_components(const nir_intrinsic_instr
*instr
)
2285 enum glsl_sampler_dim dim
= nir_intrinsic_image_dim(instr
);
2286 int coords
= glsl_get_sampler_dim_coordinate_components(dim
);
2287 if (dim
== GLSL_SAMPLER_DIM_CUBE
)
2290 return coords
+ nir_intrinsic_image_array(instr
);