src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->bit_size = 32;
  74    reg->num_array_elems = 0;
  75    reg->is_packed = false;
  76    reg->name = NULL;
  77
  78    exec_list_push_tail(list, &reg->node);
  79
  80    return reg;
  81 }
  82
  83 nir_register *
  84 nir_global_reg_create(nir_shader *shader)
  85 {
  86    nir_register *reg = reg_create(shader, &shader->registers);
  87    reg->index = shader->reg_alloc++;
  88    reg->is_global = true;
  89
  90    return reg;
  91 }
  92
  93 nir_register *
  94 nir_local_reg_create(nir_function_impl *impl)
  95 {
  96    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  97    reg->index = impl->reg_alloc++;
  98    reg->is_global = false;
  99
 100    return reg;
 101 }
 102
 103 void
 104 nir_reg_remove(nir_register *reg)
 105 {
 106    exec_node_remove(&reg->node);
 107 }
 108
 109 void
 110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 111 {
 112    switch (var->data.mode) {
 113    case nir_var_all:
 114       assert(!"invalid mode");
 115       break;
 116
 117    case nir_var_local:
 118       assert(!"nir_shader_add_variable cannot be used for local variables");
 119       break;
 120
 121    case nir_var_param:
 122       assert(!"nir_shader_add_variable cannot be used for function parameters");
 123       break;
 124
 125    case nir_var_global:
 126       exec_list_push_tail(&shader->globals, &var->node);
 127       break;
 128
 129    case nir_var_shader_in:
 130       exec_list_push_tail(&shader->inputs, &var->node);
 131       break;
 132
 133    case nir_var_shader_out:
 134       exec_list_push_tail(&shader->outputs, &var->node);
 135       break;
 136
 137    case nir_var_uniform:
 138    case nir_var_shader_storage:
 139       exec_list_push_tail(&shader->uniforms, &var->node);
 140       break;
 141
 142    case nir_var_shared:
 143       assert(shader->stage == MESA_SHADER_COMPUTE);
 144       exec_list_push_tail(&shader->shared, &var->node);
 145       break;
 146
 147    case nir_var_system_value:
 148       exec_list_push_tail(&shader->system_values, &var->node);
 149       break;
 150    }
 151 }
 152
 153 nir_variable *
 154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 155                     const struct glsl_type *type, const char *name)
 156 {
 157    nir_variable *var = rzalloc(shader, nir_variable);
 158    var->name = ralloc_strdup(var, name);
 159    var->type = type;
 160    var->data.mode = mode;
 161
 162    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 163        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 164       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 165
 166    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 167       var->data.read_only = true;
 168
 169    nir_shader_add_variable(shader, var);
 170
 171    return var;
 172 }
 173
 174 nir_variable *
 175 nir_local_variable_create(nir_function_impl *impl,
 176                           const struct glsl_type *type, const char *name)
 177 {
 178    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 179    var->name = ralloc_strdup(var, name);
 180    var->type = type;
 181    var->data.mode = nir_var_local;
 182
 183    nir_function_impl_add_variable(impl, var);
 184
 185    return var;
 186 }
 187
 188 nir_function *
 189 nir_function_create(nir_shader *shader, const char *name)
 190 {
 191    nir_function *func = ralloc(shader, nir_function);
 192
 193    exec_list_push_tail(&shader->functions, &func->node);
 194
 195    func->name = ralloc_strdup(func, name);
 196    func->shader = shader;
 197    func->num_params = 0;
 198    func->params = NULL;
 199    func->return_type = glsl_void_type();
 200    func->impl = NULL;
 201
 202    return func;
 203 }
 204
 205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 206 {
 207    dest->is_ssa = src->is_ssa;
 208    if (src->is_ssa) {
 209       dest->ssa = src->ssa;
 210    } else {
 211       dest->reg.base_offset = src->reg.base_offset;
 212       dest->reg.reg = src->reg.reg;
 213       if (src->reg.indirect) {
 214          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 215          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 216       } else {
 217          dest->reg.indirect = NULL;
 218       }
 219    }
 220 }
 221
 222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 223 {
 224    /* Copying an SSA definition makes no sense whatsoever. */
 225    assert(!src->is_ssa);
 226
 227    dest->is_ssa = false;
 228
 229    dest->reg.base_offset = src->reg.base_offset;
 230    dest->reg.reg = src->reg.reg;
 231    if (src->reg.indirect) {
 232       dest->reg.indirect = ralloc(instr, nir_src);
 233       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 234    } else {
 235       dest->reg.indirect = NULL;
 236    }
 237 }
 238
 239 void
 240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 241                  nir_alu_instr *instr)
 242 {
 243    nir_src_copy(&dest->src, &src->src, &instr->instr);
 244    dest->abs = src->abs;
 245    dest->negate = src->negate;
 246    for (unsigned i = 0; i < 4; i++)
 247       dest->swizzle[i] = src->swizzle[i];
 248 }
 249
 250 void
 251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 252                   nir_alu_instr *instr)
 253 {
 254    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 255    dest->write_mask = src->write_mask;
 256    dest->saturate = src->saturate;
 257 }
 258
 259
 260 static void
 261 cf_init(nir_cf_node *node, nir_cf_node_type type)
 262 {
 263    exec_node_init(&node->node);
 264    node->parent = NULL;
 265    node->type = type;
 266 }
 267
 268 nir_function_impl *
 269 nir_function_impl_create_bare(nir_shader *shader)
 270 {
 271    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 272
 273    impl->function = NULL;
 274
 275    cf_init(&impl->cf_node, nir_cf_node_function);
 276
 277    exec_list_make_empty(&impl->body);
 278    exec_list_make_empty(&impl->registers);
 279    exec_list_make_empty(&impl->locals);
 280    impl->num_params = 0;
 281    impl->params = NULL;
 282    impl->return_var = NULL;
 283    impl->reg_alloc = 0;
 284    impl->ssa_alloc = 0;
 285    impl->valid_metadata = nir_metadata_none;
 286
 287    /* create start & end blocks */
 288    nir_block *start_block = nir_block_create(shader);
 289    nir_block *end_block = nir_block_create(shader);
 290    start_block->cf_node.parent = &impl->cf_node;
 291    end_block->cf_node.parent = &impl->cf_node;
 292    impl->end_block = end_block;
 293
 294    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 295
 296    start_block->successors[0] = end_block;
 297    _mesa_set_add(end_block->predecessors, start_block);
 298    return impl;
 299 }
 300
 301 nir_function_impl *
 302 nir_function_impl_create(nir_function *function)
 303 {
 304    assert(function->impl == NULL);
 305
 306    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 307
 308    function->impl = impl;
 309    impl->function = function;
 310
 311    impl->num_params = function->num_params;
 312    impl->params = ralloc_array(function->shader,
 313                                nir_variable *, impl->num_params);
 314
 315    for (unsigned i = 0; i < impl->num_params; i++) {
 316       impl->params[i] = rzalloc(function->shader, nir_variable);
 317       impl->params[i]->type = function->params[i].type;
 318       impl->params[i]->data.mode = nir_var_param;
 319       impl->params[i]->data.location = i;
 320    }
 321
 322    if (!glsl_type_is_void(function->return_type)) {
 323       impl->return_var = rzalloc(function->shader, nir_variable);
 324       impl->return_var->type = function->return_type;
 325       impl->return_var->data.mode = nir_var_param;
 326       impl->return_var->data.location = -1;
 327    } else {
 328       impl->return_var = NULL;
 329    }
 330
 331    return impl;
 332 }
 333
 334 nir_block *
 335 nir_block_create(nir_shader *shader)
 336 {
 337    nir_block *block = ralloc(shader, nir_block);
 338
 339    cf_init(&block->cf_node, nir_cf_node_block);
 340
 341    block->successors[0] = block->successors[1] = NULL;
 342    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 343                                           _mesa_key_pointer_equal);
 344    block->imm_dom = NULL;
 345    /* XXX maybe it would be worth it to defer allocation?  This
 346     * way it doesn't get allocated for shader ref's that never run
 347     * nir_calc_dominance?  For example, state-tracker creates an
 348     * initial IR, clones that, runs appropriate lowering pass, passes
 349     * to driver which does common lowering/opt, and then stores ref
 350     * which is later used to do state specific lowering and futher
 351     * opt.  Do any of the references not need dominance metadata?
 352     */
 353    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 354                                           _mesa_key_pointer_equal);
 355
 356    exec_list_make_empty(&block->instr_list);
 357
 358    return block;
 359 }
 360
 361 static inline void
 362 src_init(nir_src *src)
 363 {
 364    src->is_ssa = false;
 365    src->reg.reg = NULL;
 366    src->reg.indirect = NULL;
 367    src->reg.base_offset = 0;
 368 }
 369
 370 nir_if *
 371 nir_if_create(nir_shader *shader)
 372 {
 373    nir_if *if_stmt = ralloc(shader, nir_if);
 374
 375    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 376    src_init(&if_stmt->condition);
 377
 378    nir_block *then = nir_block_create(shader);
 379    exec_list_make_empty(&if_stmt->then_list);
 380    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 381    then->cf_node.parent = &if_stmt->cf_node;
 382
 383    nir_block *else_stmt = nir_block_create(shader);
 384    exec_list_make_empty(&if_stmt->else_list);
 385    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 386    else_stmt->cf_node.parent = &if_stmt->cf_node;
 387
 388    return if_stmt;
 389 }
 390
 391 nir_loop *
 392 nir_loop_create(nir_shader *shader)
 393 {
 394    nir_loop *loop = ralloc(shader, nir_loop);
 395
 396    cf_init(&loop->cf_node, nir_cf_node_loop);
 397
 398    nir_block *body = nir_block_create(shader);
 399    exec_list_make_empty(&loop->body);
 400    exec_list_push_tail(&loop->body, &body->cf_node.node);
 401    body->cf_node.parent = &loop->cf_node;
 402
 403    body->successors[0] = body;
 404    _mesa_set_add(body->predecessors, body);
 405
 406    return loop;
 407 }
 408
 409 static void
 410 instr_init(nir_instr *instr, nir_instr_type type)
 411 {
 412    instr->type = type;
 413    instr->block = NULL;
 414    exec_node_init(&instr->node);
 415 }
 416
 417 static void
 418 dest_init(nir_dest *dest)
 419 {
 420    dest->is_ssa = false;
 421    dest->reg.reg = NULL;
 422    dest->reg.indirect = NULL;
 423    dest->reg.base_offset = 0;
 424 }
 425
 426 static void
 427 alu_dest_init(nir_alu_dest *dest)
 428 {
 429    dest_init(&dest->dest);
 430    dest->saturate = false;
 431    dest->write_mask = 0xf;
 432 }
 433
 434 static void
 435 alu_src_init(nir_alu_src *src)
 436 {
 437    src_init(&src->src);
 438    src->abs = src->negate = false;
 439    src->swizzle[0] = 0;
 440    src->swizzle[1] = 1;
 441    src->swizzle[2] = 2;
 442    src->swizzle[3] = 3;
 443 }
 444
 445 nir_alu_instr *
 446 nir_alu_instr_create(nir_shader *shader, nir_op op)
 447 {
 448    unsigned num_srcs = nir_op_infos[op].num_inputs;
 449    nir_alu_instr *instr =
 450       ralloc_size(shader,
 451                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 452
 453    instr_init(&instr->instr, nir_instr_type_alu);
 454    instr->op = op;
 455    alu_dest_init(&instr->dest);
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       alu_src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_jump_instr *
 463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 464 {
 465    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 466    instr_init(&instr->instr, nir_instr_type_jump);
 467    instr->type = type;
 468    return instr;
 469 }
 470
 471 nir_load_const_instr *
 472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
 473                             unsigned bit_size)
 474 {
 475    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 476    instr_init(&instr->instr, nir_instr_type_load_const);
 477
 478    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 479
 480    return instr;
 481 }
 482
 483 nir_intrinsic_instr *
 484 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 485 {
 486    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 487    nir_intrinsic_instr *instr =
 488       ralloc_size(shader,
 489                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 490
 491    instr_init(&instr->instr, nir_instr_type_intrinsic);
 492    instr->intrinsic = op;
 493
 494    if (nir_intrinsic_infos[op].has_dest)
 495       dest_init(&instr->dest);
 496
 497    for (unsigned i = 0; i < num_srcs; i++)
 498       src_init(&instr->src[i]);
 499
 500    return instr;
 501 }
 502
 503 nir_call_instr *
 504 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 505 {
 506    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 507    instr_init(&instr->instr, nir_instr_type_call);
 508
 509    instr->callee = callee;
 510    instr->num_params = callee->num_params;
 511    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 512    instr->return_deref = NULL;
 513
 514    return instr;
 515 }
 516
 517 nir_tex_instr *
 518 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 519 {
 520    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 521    instr_init(&instr->instr, nir_instr_type_tex);
 522
 523    dest_init(&instr->dest);
 524
 525    instr->num_srcs = num_srcs;
 526    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 527    for (unsigned i = 0; i < num_srcs; i++)
 528       src_init(&instr->src[i].src);
 529
 530    instr->texture_index = 0;
 531    instr->texture_array_size = 0;
 532    instr->texture = NULL;
 533    instr->sampler_index = 0;
 534    instr->sampler = NULL;
 535
 536    return instr;
 537 }
 538
 539 nir_phi_instr *
 540 nir_phi_instr_create(nir_shader *shader)
 541 {
 542    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 543    instr_init(&instr->instr, nir_instr_type_phi);
 544
 545    dest_init(&instr->dest);
 546    exec_list_make_empty(&instr->srcs);
 547    return instr;
 548 }
 549
 550 nir_parallel_copy_instr *
 551 nir_parallel_copy_instr_create(nir_shader *shader)
 552 {
 553    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 554    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 555
 556    exec_list_make_empty(&instr->entries);
 557
 558    return instr;
 559 }
 560
 561 nir_ssa_undef_instr *
 562 nir_ssa_undef_instr_create(nir_shader *shader,
 563                            unsigned num_components,
 564                            unsigned bit_size)
 565 {
 566    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 567    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 568
 569    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 570
 571    return instr;
 572 }
 573
 574 nir_deref_var *
 575 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 576 {
 577    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 578    deref->deref.deref_type = nir_deref_type_var;
 579    deref->deref.child = NULL;
 580    deref->deref.type = var->type;
 581    deref->var = var;
 582    return deref;
 583 }
 584
 585 nir_deref_array *
 586 nir_deref_array_create(void *mem_ctx)
 587 {
 588    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 589    deref->deref.deref_type = nir_deref_type_array;
 590    deref->deref.child = NULL;
 591    deref->deref_array_type = nir_deref_array_type_direct;
 592    src_init(&deref->indirect);
 593    deref->base_offset = 0;
 594    return deref;
 595 }
 596
 597 nir_deref_struct *
 598 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 599 {
 600    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 601    deref->deref.deref_type = nir_deref_type_struct;
 602    deref->deref.child = NULL;
 603    deref->index = field_index;
 604    return deref;
 605 }
 606
 607 static nir_deref_var *
 608 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 609 {
 610    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 611    ret->deref.type = deref->deref.type;
 612    if (deref->deref.child)
 613       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 614    return ret;
 615 }
 616
 617 static nir_deref_array *
 618 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 619 {
 620    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 621    ret->base_offset = deref->base_offset;
 622    ret->deref_array_type = deref->deref_array_type;
 623    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 624       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 625    }
 626    ret->deref.type = deref->deref.type;
 627    if (deref->deref.child)
 628       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 629    return ret;
 630 }
 631
 632 static nir_deref_struct *
 633 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 634 {
 635    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 636    ret->deref.type = deref->deref.type;
 637    if (deref->deref.child)
 638       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 639    return ret;
 640 }
 641
 642 nir_deref *
 643 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 644 {
 645    switch (deref->deref_type) {
 646    case nir_deref_type_var:
 647       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 648    case nir_deref_type_array:
 649       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 650    case nir_deref_type_struct:
 651       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 652    default:
 653       unreachable("Invalid dereference type");
 654    }
 655
 656    return NULL;
 657 }
 658
 659 /* Returns a load_const instruction that represents the constant
 660  * initializer for the given deref chain.  The caller is responsible for
 661  * ensuring that there actually is a constant initializer.
 662  */
 663 nir_load_const_instr *
 664 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 665 {
 666    nir_constant *constant = deref->var->constant_initializer;
 667    assert(constant);
 668
 669    const nir_deref *tail = &deref->deref;
 670    unsigned matrix_offset = 0;
 671    while (tail->child) {
 672       switch (tail->child->deref_type) {
 673       case nir_deref_type_array: {
 674          nir_deref_array *arr = nir_deref_as_array(tail->child);
 675          assert(arr->deref_array_type == nir_deref_array_type_direct);
 676          if (glsl_type_is_matrix(tail->type)) {
 677             assert(arr->deref.child == NULL);
 678             matrix_offset = arr->base_offset;
 679          } else {
 680             constant = constant->elements[arr->base_offset];
 681          }
 682          break;
 683       }
 684
 685       case nir_deref_type_struct: {
 686          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 687          break;
 688       }
 689
 690       default:
 691          unreachable("Invalid deref child type");
 692       }
 693
 694       tail = tail->child;
 695    }
 696
 697    unsigned bit_size = glsl_get_bit_size(tail->type);
 698    nir_load_const_instr *load =
 699       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
 700                                   bit_size);
 701
 702    matrix_offset *= load->def.num_components;
 703    for (unsigned i = 0; i < load->def.num_components; i++) {
 704       switch (glsl_get_base_type(tail->type)) {
 705       case GLSL_TYPE_FLOAT:
 706       case GLSL_TYPE_INT:
 707       case GLSL_TYPE_UINT:
 708          load->value.u32[i] = constant->value.u[matrix_offset + i];
 709          break;
 710       case GLSL_TYPE_DOUBLE:
 711          load->value.f64[i] = constant->value.d[matrix_offset + i];
 712          break;
 713       case GLSL_TYPE_BOOL:
 714          load->value.u32[i] = constant->value.b[matrix_offset + i] ?
 715                              NIR_TRUE : NIR_FALSE;
 716          break;
 717       default:
 718          unreachable("Invalid immediate type");
 719       }
 720    }
 721
 722    return load;
 723 }
 724
 725 nir_function_impl *
 726 nir_cf_node_get_function(nir_cf_node *node)
 727 {
 728    while (node->type != nir_cf_node_function) {
 729       node = node->parent;
 730    }
 731
 732    return nir_cf_node_as_function(node);
 733 }
 734
 735 /* Reduces a cursor by trying to convert everything to after and trying to
 736  * go up to block granularity when possible.
 737  */
 738 static nir_cursor
 739 reduce_cursor(nir_cursor cursor)
 740 {
 741    switch (cursor.option) {
 742    case nir_cursor_before_block:
 743       assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
 744              nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
 745       if (exec_list_is_empty(&cursor.block->instr_list)) {
 746          /* Empty block.  After is as good as before. */
 747          cursor.option = nir_cursor_after_block;
 748       }
 749       return cursor;
 750
 751    case nir_cursor_after_block:
 752       return cursor;
 753
 754    case nir_cursor_before_instr: {
 755       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 756       if (prev_instr) {
 757          /* Before this instruction is after the previous */
 758          cursor.instr = prev_instr;
 759          cursor.option = nir_cursor_after_instr;
 760       } else {
 761          /* No previous instruction.  Switch to before block */
 762          cursor.block = cursor.instr->block;
 763          cursor.option = nir_cursor_before_block;
 764       }
 765       return reduce_cursor(cursor);
 766    }
 767
 768    case nir_cursor_after_instr:
 769       if (nir_instr_next(cursor.instr) == NULL) {
 770          /* This is the last instruction, switch to after block */
 771          cursor.option = nir_cursor_after_block;
 772          cursor.block = cursor.instr->block;
 773       }
 774       return cursor;
 775
 776    default:
 777       unreachable("Inavlid cursor option");
 778    }
 779 }
 780
 781 bool
 782 nir_cursors_equal(nir_cursor a, nir_cursor b)
 783 {
 784    /* Reduced cursors should be unique */
 785    a = reduce_cursor(a);
 786    b = reduce_cursor(b);
 787
 788    return a.block == b.block && a.option == b.option;
 789 }
 790
 791 static bool
 792 add_use_cb(nir_src *src, void *state)
 793 {
 794    nir_instr *instr = state;
 795
 796    src->parent_instr = instr;
 797    list_addtail(&src->use_link,
 798                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 799
 800    return true;
 801 }
 802
 803 static bool
 804 add_ssa_def_cb(nir_ssa_def *def, void *state)
 805 {
 806    nir_instr *instr = state;
 807
 808    if (instr->block && def->index == UINT_MAX) {
 809       nir_function_impl *impl =
 810          nir_cf_node_get_function(&instr->block->cf_node);
 811
 812       def->index = impl->ssa_alloc++;
 813    }
 814
 815    return true;
 816 }
 817
 818 static bool
 819 add_reg_def_cb(nir_dest *dest, void *state)
 820 {
 821    nir_instr *instr = state;
 822
 823    if (!dest->is_ssa) {
 824       dest->reg.parent_instr = instr;
 825       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 826    }
 827
 828    return true;
 829 }
 830
 831 static void
 832 add_defs_uses(nir_instr *instr)
 833 {
 834    nir_foreach_src(instr, add_use_cb, instr);
 835    nir_foreach_dest(instr, add_reg_def_cb, instr);
 836    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 837 }
 838
 839 void
 840 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 841 {
 842    switch (cursor.option) {
 843    case nir_cursor_before_block:
 844       /* Only allow inserting jumps into empty blocks. */
 845       if (instr->type == nir_instr_type_jump)
 846          assert(exec_list_is_empty(&cursor.block->instr_list));
 847
 848       instr->block = cursor.block;
 849       add_defs_uses(instr);
 850       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 851       break;
 852    case nir_cursor_after_block: {
 853       /* Inserting instructions after a jump is illegal. */
 854       nir_instr *last = nir_block_last_instr(cursor.block);
 855       assert(last == NULL || last->type != nir_instr_type_jump);
 856       (void) last;
 857
 858       instr->block = cursor.block;
 859       add_defs_uses(instr);
 860       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 861       break;
 862    }
 863    case nir_cursor_before_instr:
 864       assert(instr->type != nir_instr_type_jump);
 865       instr->block = cursor.instr->block;
 866       add_defs_uses(instr);
 867       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 868       break;
 869    case nir_cursor_after_instr:
 870       /* Inserting instructions after a jump is illegal. */
 871       assert(cursor.instr->type != nir_instr_type_jump);
 872
 873       /* Only allow inserting jumps at the end of the block. */
 874       if (instr->type == nir_instr_type_jump)
 875          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 876
 877       instr->block = cursor.instr->block;
 878       add_defs_uses(instr);
 879       exec_node_insert_after(&cursor.instr->node, &instr->node);
 880       break;
 881    }
 882
 883    if (instr->type == nir_instr_type_jump)
 884       nir_handle_add_jump(instr->block);
 885 }
 886
 887 static bool
 888 src_is_valid(const nir_src *src)
 889 {
 890    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 891 }
 892
 893 static bool
 894 remove_use_cb(nir_src *src, void *state)
 895 {
 896    (void) state;
 897
 898    if (src_is_valid(src))
 899       list_del(&src->use_link);
 900
 901    return true;
 902 }
 903
 904 static bool
 905 remove_def_cb(nir_dest *dest, void *state)
 906 {
 907    (void) state;
 908
 909    if (!dest->is_ssa)
 910       list_del(&dest->reg.def_link);
 911
 912    return true;
 913 }
 914
 915 static void
 916 remove_defs_uses(nir_instr *instr)
 917 {
 918    nir_foreach_dest(instr, remove_def_cb, instr);
 919    nir_foreach_src(instr, remove_use_cb, instr);
 920 }
 921
 922 void nir_instr_remove(nir_instr *instr)
 923 {
 924    remove_defs_uses(instr);
 925    exec_node_remove(&instr->node);
 926
 927    if (instr->type == nir_instr_type_jump) {
 928       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 929       nir_handle_remove_jump(instr->block, jump_instr->type);
 930    }
 931 }
 932
 933 /*@}*/
 934
 935 void
 936 nir_index_local_regs(nir_function_impl *impl)
 937 {
 938    unsigned index = 0;
 939    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 940       reg->index = index++;
 941    }
 942    impl->reg_alloc = index;
 943 }
 944
 945 void
 946 nir_index_global_regs(nir_shader *shader)
 947 {
 948    unsigned index = 0;
 949    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 950       reg->index = index++;
 951    }
 952    shader->reg_alloc = index;
 953 }
 954
 955 static bool
 956 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 957 {
 958    return cb(&instr->dest.dest, state);
 959 }
 960
 961 static bool
 962 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 963                      void *state)
 964 {
 965    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 966       return cb(&instr->dest, state);
 967
 968    return true;
 969 }
 970
 971 static bool
 972 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 973                    void *state)
 974 {
 975    return cb(&instr->dest, state);
 976 }
 977
 978 static bool
 979 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 980 {
 981    return cb(&instr->dest, state);
 982 }
 983
 984 static bool
 985 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 986                          nir_foreach_dest_cb cb, void *state)
 987 {
 988    nir_foreach_parallel_copy_entry(entry, instr) {
 989       if (!cb(&entry->dest, state))
 990          return false;
 991    }
 992
 993    return true;
 994 }
 995
 996 bool
 997 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 998 {
 999    switch (instr->type) {
1000    case nir_instr_type_alu:
1001       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1002    case nir_instr_type_intrinsic:
1003       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1004    case nir_instr_type_tex:
1005       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1006    case nir_instr_type_phi:
1007       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1008    case nir_instr_type_parallel_copy:
1009       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1010                                       cb, state);
1011
1012    case nir_instr_type_load_const:
1013    case nir_instr_type_ssa_undef:
1014    case nir_instr_type_call:
1015    case nir_instr_type_jump:
1016       break;
1017
1018    default:
1019       unreachable("Invalid instruction type");
1020       break;
1021    }
1022
1023    return true;
1024 }
1025
1026 struct foreach_ssa_def_state {
1027    nir_foreach_ssa_def_cb cb;
1028    void *client_state;
1029 };
1030
1031 static inline bool
1032 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1033 {
1034    struct foreach_ssa_def_state *state = void_state;
1035
1036    if (dest->is_ssa)
1037       return state->cb(&dest->ssa, state->client_state);
1038    else
1039       return true;
1040 }
1041
1042 bool
1043 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1044 {
1045    switch (instr->type) {
1046    case nir_instr_type_alu:
1047    case nir_instr_type_tex:
1048    case nir_instr_type_intrinsic:
1049    case nir_instr_type_phi:
1050    case nir_instr_type_parallel_copy: {
1051       struct foreach_ssa_def_state foreach_state = {cb, state};
1052       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1053    }
1054
1055    case nir_instr_type_load_const:
1056       return cb(&nir_instr_as_load_const(instr)->def, state);
1057    case nir_instr_type_ssa_undef:
1058       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1059    case nir_instr_type_call:
1060    case nir_instr_type_jump:
1061       return true;
1062    default:
1063       unreachable("Invalid instruction type");
1064    }
1065 }
1066
1067 static bool
1068 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1069 {
1070    if (!cb(src, state))
1071       return false;
1072    if (!src->is_ssa && src->reg.indirect)
1073       return cb(src->reg.indirect, state);
1074    return true;
1075 }
1076
1077 static bool
1078 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1079                       void *state)
1080 {
1081    if (deref->deref_array_type == nir_deref_array_type_indirect)
1082       return visit_src(&deref->indirect, cb, state);
1083    return true;
1084 }
1085
1086 static bool
1087 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1088 {
1089    nir_deref *cur = &deref->deref;
1090    while (cur != NULL) {
1091       if (cur->deref_type == nir_deref_type_array) {
1092          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1093             return false;
1094       }
1095
1096       cur = cur->child;
1097    }
1098
1099    return true;
1100 }
1101
1102 static bool
1103 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1104 {
1105    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1106       if (!visit_src(&instr->src[i].src, cb, state))
1107          return false;
1108
1109    return true;
1110 }
1111
1112 static bool
1113 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1114 {
1115    for (unsigned i = 0; i < instr->num_srcs; i++) {
1116       if (!visit_src(&instr->src[i].src, cb, state))
1117          return false;
1118    }
1119
1120    if (instr->texture != NULL) {
1121       if (!visit_deref_src(instr->texture, cb, state))
1122          return false;
1123    }
1124
1125    if (instr->sampler != NULL) {
1126       if (!visit_deref_src(instr->sampler, cb, state))
1127          return false;
1128    }
1129
1130    return true;
1131 }
1132
1133 static bool
1134 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1135                     void *state)
1136 {
1137    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1138    for (unsigned i = 0; i < num_srcs; i++) {
1139       if (!visit_src(&instr->src[i], cb, state))
1140          return false;
1141    }
1142
1143    unsigned num_vars =
1144       nir_intrinsic_infos[instr->intrinsic].num_variables;
1145    for (unsigned i = 0; i < num_vars; i++) {
1146       if (!visit_deref_src(instr->variables[i], cb, state))
1147          return false;
1148    }
1149
1150    return true;
1151 }
1152
1153 static bool
1154 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1155 {
1156    return true;
1157 }
1158
1159 static bool
1160 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1161                      void *state)
1162 {
1163    return true;
1164 }
1165
1166 static bool
1167 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1168 {
1169    nir_foreach_phi_src(src, instr) {
1170       if (!visit_src(&src->src, cb, state))
1171          return false;
1172    }
1173
1174    return true;
1175 }
1176
1177 static bool
1178 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1179                         nir_foreach_src_cb cb, void *state)
1180 {
1181    nir_foreach_parallel_copy_entry(entry, instr) {
1182       if (!visit_src(&entry->src, cb, state))
1183          return false;
1184    }
1185
1186    return true;
1187 }
1188
1189 typedef struct {
1190    void *state;
1191    nir_foreach_src_cb cb;
1192 } visit_dest_indirect_state;
1193
1194 static bool
1195 visit_dest_indirect(nir_dest *dest, void *_state)
1196 {
1197    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1198
1199    if (!dest->is_ssa && dest->reg.indirect)
1200       return state->cb(dest->reg.indirect, state->state);
1201
1202    return true;
1203 }
1204
1205 bool
1206 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1207 {
1208    switch (instr->type) {
1209    case nir_instr_type_alu:
1210       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1211          return false;
1212       break;
1213    case nir_instr_type_intrinsic:
1214       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1215          return false;
1216       break;
1217    case nir_instr_type_tex:
1218       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1219          return false;
1220       break;
1221    case nir_instr_type_call:
1222       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1223          return false;
1224       break;
1225    case nir_instr_type_load_const:
1226       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1227          return false;
1228       break;
1229    case nir_instr_type_phi:
1230       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1231          return false;
1232       break;
1233    case nir_instr_type_parallel_copy:
1234       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1235                                    cb, state))
1236          return false;
1237       break;
1238    case nir_instr_type_jump:
1239    case nir_instr_type_ssa_undef:
1240       return true;
1241
1242    default:
1243       unreachable("Invalid instruction type");
1244       break;
1245    }
1246
1247    visit_dest_indirect_state dest_state;
1248    dest_state.state = state;
1249    dest_state.cb = cb;
1250    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1251 }
1252
1253 nir_const_value *
1254 nir_src_as_const_value(nir_src src)
1255 {
1256    if (!src.is_ssa)
1257       return NULL;
1258
1259    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1260       return NULL;
1261
1262    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1263
1264    return &load->value;
1265 }
1266
1267 /**
1268  * Returns true if the source is known to be dynamically uniform. Otherwise it
1269  * returns false which means it may or may not be dynamically uniform but it
1270  * can't be determined.
1271  */
1272 bool
1273 nir_src_is_dynamically_uniform(nir_src src)
1274 {
1275    if (!src.is_ssa)
1276       return false;
1277
1278    /* Constants are trivially dynamically uniform */
1279    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1280       return true;
1281
1282    /* As are uniform variables */
1283    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1284       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1285
1286       if (intr->intrinsic == nir_intrinsic_load_uniform)
1287          return true;
1288    }
1289
1290    /* XXX: this could have many more tests, such as when a sampler function is
1291     * called with dynamically uniform arguments.
1292     */
1293    return false;
1294 }
1295
1296 static void
1297 src_remove_all_uses(nir_src *src)
1298 {
1299    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1300       if (!src_is_valid(src))
1301          continue;
1302
1303       list_del(&src->use_link);
1304    }
1305 }
1306
1307 static void
1308 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1309 {
1310    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1311       if (!src_is_valid(src))
1312          continue;
1313
1314       if (parent_instr) {
1315          src->parent_instr = parent_instr;
1316          if (src->is_ssa)
1317             list_addtail(&src->use_link, &src->ssa->uses);
1318          else
1319             list_addtail(&src->use_link, &src->reg.reg->uses);
1320       } else {
1321          assert(parent_if);
1322          src->parent_if = parent_if;
1323          if (src->is_ssa)
1324             list_addtail(&src->use_link, &src->ssa->if_uses);
1325          else
1326             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1327       }
1328    }
1329 }
1330
1331 void
1332 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1333 {
1334    assert(!src_is_valid(src) || src->parent_instr == instr);
1335
1336    src_remove_all_uses(src);
1337    *src = new_src;
1338    src_add_all_uses(src, instr, NULL);
1339 }
1340
1341 void
1342 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1343 {
1344    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1345
1346    src_remove_all_uses(dest);
1347    src_remove_all_uses(src);
1348    *dest = *src;
1349    *src = NIR_SRC_INIT;
1350    src_add_all_uses(dest, dest_instr, NULL);
1351 }
1352
1353 void
1354 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1355 {
1356    nir_src *src = &if_stmt->condition;
1357    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1358
1359    src_remove_all_uses(src);
1360    *src = new_src;
1361    src_add_all_uses(src, NULL, if_stmt);
1362 }
1363
1364 void
1365 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1366 {
1367    if (dest->is_ssa) {
1368       /* We can only overwrite an SSA destination if it has no uses. */
1369       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1370    } else {
1371       list_del(&dest->reg.def_link);
1372       if (dest->reg.indirect)
1373          src_remove_all_uses(dest->reg.indirect);
1374    }
1375
1376    /* We can't re-write with an SSA def */
1377    assert(!new_dest.is_ssa);
1378
1379    nir_dest_copy(dest, &new_dest, instr);
1380
1381    dest->reg.parent_instr = instr;
1382    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1383
1384    if (dest->reg.indirect)
1385       src_add_all_uses(dest->reg.indirect, instr, NULL);
1386 }
1387
1388 /* note: does *not* take ownership of 'name' */
1389 void
1390 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1391                  unsigned num_components,
1392                  unsigned bit_size, const char *name)
1393 {
1394    def->name = ralloc_strdup(instr, name);
1395    def->parent_instr = instr;
1396    list_inithead(&def->uses);
1397    list_inithead(&def->if_uses);
1398    def->num_components = num_components;
1399    def->bit_size = bit_size;
1400
1401    if (instr->block) {
1402       nir_function_impl *impl =
1403          nir_cf_node_get_function(&instr->block->cf_node);
1404
1405       def->index = impl->ssa_alloc++;
1406    } else {
1407       def->index = UINT_MAX;
1408    }
1409 }
1410
1411 /* note: does *not* take ownership of 'name' */
1412 void
1413 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1414                  unsigned num_components, unsigned bit_size,
1415                  const char *name)
1416 {
1417    dest->is_ssa = true;
1418    nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1419 }
1420
1421 void
1422 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1423 {
1424    assert(!new_src.is_ssa || def != new_src.ssa);
1425
1426    nir_foreach_use_safe(use_src, def)
1427       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1428
1429    nir_foreach_if_use_safe(use_src, def)
1430       nir_if_rewrite_condition(use_src->parent_if, new_src);
1431 }
1432
1433 static bool
1434 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1435 {
1436    assert(start->block == end->block);
1437
1438    if (between->block != start->block)
1439       return false;
1440
1441    /* Search backwards looking for "between" */
1442    while (start != end) {
1443       if (between == end)
1444          return true;
1445
1446       end = nir_instr_prev(end);
1447       assert(end);
1448    }
1449
1450    return false;
1451 }
1452
1453 /* Replaces all uses of the given SSA def with the given source but only if
1454  * the use comes after the after_me instruction.  This can be useful if you
1455  * are emitting code to fix up the result of some instruction: you can freely
1456  * use the result in that code and then call rewrite_uses_after and pass the
1457  * last fixup instruction as after_me and it will replace all of the uses you
1458  * want without touching the fixup code.
1459  *
1460  * This function assumes that after_me is in the same block as
1461  * def->parent_instr and that after_me comes after def->parent_instr.
1462  */
1463 void
1464 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1465                                nir_instr *after_me)
1466 {
1467    assert(!new_src.is_ssa || def != new_src.ssa);
1468
1469    nir_foreach_use_safe(use_src, def) {
1470       assert(use_src->parent_instr != def->parent_instr);
1471       /* Since def already dominates all of its uses, the only way a use can
1472        * not be dominated by after_me is if it is between def and after_me in
1473        * the instruction list.
1474        */
1475       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1476          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1477    }
1478
1479    nir_foreach_if_use_safe(use_src, def)
1480       nir_if_rewrite_condition(use_src->parent_if, new_src);
1481 }
1482
1483 uint8_t
1484 nir_ssa_def_components_read(nir_ssa_def *def)
1485 {
1486    uint8_t read_mask = 0;
1487    nir_foreach_use(use, def) {
1488       if (use->parent_instr->type == nir_instr_type_alu) {
1489          nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1490          nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1491          int src_idx = alu_src - &alu->src[0];
1492          assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1493
1494          for (unsigned c = 0; c < 4; c++) {
1495             if (!nir_alu_instr_channel_used(alu, src_idx, c))
1496                continue;
1497
1498             read_mask |= (1 << alu_src->swizzle[c]);
1499          }
1500       } else {
1501          return (1 << def->num_components) - 1;
1502       }
1503    }
1504
1505    return read_mask;
1506 }
1507
1508 nir_block *
1509 nir_block_cf_tree_next(nir_block *block)
1510 {
1511    if (block == NULL) {
1512       /* nir_foreach_block_safe() will call this function on a NULL block
1513        * after the last iteration, but it won't use the result so just return
1514        * NULL here.
1515        */
1516       return NULL;
1517    }
1518
1519    nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1520    if (cf_next)
1521       return nir_cf_node_cf_tree_first(cf_next);
1522
1523    nir_cf_node *parent = block->cf_node.parent;
1524
1525    switch (parent->type) {
1526    case nir_cf_node_if: {
1527       /* Are we at the end of the if? Go to the beginning of the else */
1528       nir_if *if_stmt = nir_cf_node_as_if(parent);
1529       if (&block->cf_node == nir_if_last_then_node(if_stmt))
1530          return nir_cf_node_as_block(nir_if_first_else_node(if_stmt));
1531
1532       assert(&block->cf_node == nir_if_last_else_node(if_stmt));
1533       /* fall through */
1534    }
1535
1536    case nir_cf_node_loop:
1537       return nir_cf_node_as_block(nir_cf_node_next(parent));
1538
1539    case nir_cf_node_function:
1540       return NULL;
1541
1542    default:
1543       unreachable("unknown cf node type");
1544    }
1545 }
1546
1547 nir_block *
1548 nir_block_cf_tree_prev(nir_block *block)
1549 {
1550    if (block == NULL) {
1551       /* do this for consistency with nir_block_cf_tree_next() */
1552       return NULL;
1553    }
1554
1555    nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1556    if (cf_prev)
1557       return nir_cf_node_cf_tree_last(cf_prev);
1558
1559    nir_cf_node *parent = block->cf_node.parent;
1560
1561    switch (parent->type) {
1562    case nir_cf_node_if: {
1563       /* Are we at the beginning of the else? Go to the end of the if */
1564       nir_if *if_stmt = nir_cf_node_as_if(parent);
1565       if (&block->cf_node == nir_if_first_else_node(if_stmt))
1566          return nir_cf_node_as_block(nir_if_last_then_node(if_stmt));
1567
1568       assert(&block->cf_node == nir_if_first_then_node(if_stmt));
1569       /* fall through */
1570    }
1571
1572    case nir_cf_node_loop:
1573       return nir_cf_node_as_block(nir_cf_node_prev(parent));
1574
1575    case nir_cf_node_function:
1576       return NULL;
1577
1578    default:
1579       unreachable("unknown cf node type");
1580    }
1581 }
1582
1583 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1584 {
1585    switch (node->type) {
1586    case nir_cf_node_function: {
1587       nir_function_impl *impl = nir_cf_node_as_function(node);
1588       return nir_start_block(impl);
1589    }
1590
1591    case nir_cf_node_if: {
1592       nir_if *if_stmt = nir_cf_node_as_if(node);
1593       return nir_cf_node_as_block(nir_if_first_then_node(if_stmt));
1594    }
1595
1596    case nir_cf_node_loop: {
1597       nir_loop *loop = nir_cf_node_as_loop(node);
1598       return nir_cf_node_as_block(nir_loop_first_cf_node(loop));
1599    }
1600
1601    case nir_cf_node_block: {
1602       return nir_cf_node_as_block(node);
1603    }
1604
1605    default:
1606       unreachable("unknown node type");
1607    }
1608 }
1609
1610 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1611 {
1612    switch (node->type) {
1613    case nir_cf_node_function: {
1614       nir_function_impl *impl = nir_cf_node_as_function(node);
1615       return nir_impl_last_block(impl);
1616    }
1617
1618    case nir_cf_node_if: {
1619       nir_if *if_stmt = nir_cf_node_as_if(node);
1620       return nir_cf_node_as_block(nir_if_last_else_node(if_stmt));
1621    }
1622
1623    case nir_cf_node_loop: {
1624       nir_loop *loop = nir_cf_node_as_loop(node);
1625       return nir_cf_node_as_block(nir_loop_last_cf_node(loop));
1626    }
1627
1628    case nir_cf_node_block: {
1629       return nir_cf_node_as_block(node);
1630    }
1631
1632    default:
1633       unreachable("unknown node type");
1634    }
1635 }
1636
1637 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1638 {
1639    if (node->type == nir_cf_node_block)
1640       return nir_cf_node_cf_tree_first(nir_cf_node_next(node));
1641    else if (node->type == nir_cf_node_function)
1642       return NULL;
1643    else
1644       return nir_cf_node_as_block(nir_cf_node_next(node));
1645 }
1646
1647 nir_if *
1648 nir_block_get_following_if(nir_block *block)
1649 {
1650    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1651       return NULL;
1652
1653    if (nir_cf_node_is_last(&block->cf_node))
1654       return NULL;
1655
1656    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1657
1658    if (next_node->type != nir_cf_node_if)
1659       return NULL;
1660
1661    return nir_cf_node_as_if(next_node);
1662 }
1663
1664 nir_loop *
1665 nir_block_get_following_loop(nir_block *block)
1666 {
1667    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1668       return NULL;
1669
1670    if (nir_cf_node_is_last(&block->cf_node))
1671       return NULL;
1672
1673    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1674
1675    if (next_node->type != nir_cf_node_loop)
1676       return NULL;
1677
1678    return nir_cf_node_as_loop(next_node);
1679 }
1680
1681 void
1682 nir_index_blocks(nir_function_impl *impl)
1683 {
1684    unsigned index = 0;
1685
1686    if (impl->valid_metadata & nir_metadata_block_index)
1687       return;
1688
1689    nir_foreach_block(block, impl) {
1690       block->index = index++;
1691    }
1692
1693    impl->num_blocks = index;
1694 }
1695
1696 static bool
1697 index_ssa_def_cb(nir_ssa_def *def, void *state)
1698 {
1699    unsigned *index = (unsigned *) state;
1700    def->index = (*index)++;
1701
1702    return true;
1703 }
1704
1705 /**
1706  * The indices are applied top-to-bottom which has the very nice property
1707  * that, if A dominates B, then A->index <= B->index.
1708  */
1709 void
1710 nir_index_ssa_defs(nir_function_impl *impl)
1711 {
1712    unsigned index = 0;
1713
1714    nir_foreach_block(block, impl) {
1715       nir_foreach_instr(instr, block)
1716          nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1717    }
1718
1719    impl->ssa_alloc = index;
1720 }
1721
1722 /**
1723  * The indices are applied top-to-bottom which has the very nice property
1724  * that, if A dominates B, then A->index <= B->index.
1725  */
1726 unsigned
1727 nir_index_instrs(nir_function_impl *impl)
1728 {
1729    unsigned index = 0;
1730
1731    nir_foreach_block(block, impl) {
1732       nir_foreach_instr(instr, block)
1733          instr->index = index++;
1734    }
1735
1736    return index;
1737 }
1738
1739 nir_intrinsic_op
1740 nir_intrinsic_from_system_value(gl_system_value val)
1741 {
1742    switch (val) {
1743    case SYSTEM_VALUE_VERTEX_ID:
1744       return nir_intrinsic_load_vertex_id;
1745    case SYSTEM_VALUE_INSTANCE_ID:
1746       return nir_intrinsic_load_instance_id;
1747    case SYSTEM_VALUE_DRAW_ID:
1748       return nir_intrinsic_load_draw_id;
1749    case SYSTEM_VALUE_BASE_INSTANCE:
1750       return nir_intrinsic_load_base_instance;
1751    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1752       return nir_intrinsic_load_vertex_id_zero_base;
1753    case SYSTEM_VALUE_BASE_VERTEX:
1754       return nir_intrinsic_load_base_vertex;
1755    case SYSTEM_VALUE_INVOCATION_ID:
1756       return nir_intrinsic_load_invocation_id;
1757    case SYSTEM_VALUE_FRONT_FACE:
1758       return nir_intrinsic_load_front_face;
1759    case SYSTEM_VALUE_SAMPLE_ID:
1760       return nir_intrinsic_load_sample_id;
1761    case SYSTEM_VALUE_SAMPLE_POS:
1762       return nir_intrinsic_load_sample_pos;
1763    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1764       return nir_intrinsic_load_sample_mask_in;
1765    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1766       return nir_intrinsic_load_local_invocation_id;
1767    case SYSTEM_VALUE_WORK_GROUP_ID:
1768       return nir_intrinsic_load_work_group_id;
1769    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1770       return nir_intrinsic_load_num_work_groups;
1771    case SYSTEM_VALUE_PRIMITIVE_ID:
1772       return nir_intrinsic_load_primitive_id;
1773    case SYSTEM_VALUE_TESS_COORD:
1774       return nir_intrinsic_load_tess_coord;
1775    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1776       return nir_intrinsic_load_tess_level_outer;
1777    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1778       return nir_intrinsic_load_tess_level_inner;
1779    case SYSTEM_VALUE_VERTICES_IN:
1780       return nir_intrinsic_load_patch_vertices_in;
1781    case SYSTEM_VALUE_HELPER_INVOCATION:
1782       return nir_intrinsic_load_helper_invocation;
1783    default:
1784       unreachable("system value does not directly correspond to intrinsic");
1785    }
1786 }
1787
1788 gl_system_value
1789 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1790 {
1791    switch (intrin) {
1792    case nir_intrinsic_load_vertex_id:
1793       return SYSTEM_VALUE_VERTEX_ID;
1794    case nir_intrinsic_load_instance_id:
1795       return SYSTEM_VALUE_INSTANCE_ID;
1796    case nir_intrinsic_load_draw_id:
1797       return SYSTEM_VALUE_DRAW_ID;
1798    case nir_intrinsic_load_base_instance:
1799       return SYSTEM_VALUE_BASE_INSTANCE;
1800    case nir_intrinsic_load_vertex_id_zero_base:
1801       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1802    case nir_intrinsic_load_base_vertex:
1803       return SYSTEM_VALUE_BASE_VERTEX;
1804    case nir_intrinsic_load_invocation_id:
1805       return SYSTEM_VALUE_INVOCATION_ID;
1806    case nir_intrinsic_load_front_face:
1807       return SYSTEM_VALUE_FRONT_FACE;
1808    case nir_intrinsic_load_sample_id:
1809       return SYSTEM_VALUE_SAMPLE_ID;
1810    case nir_intrinsic_load_sample_pos:
1811       return SYSTEM_VALUE_SAMPLE_POS;
1812    case nir_intrinsic_load_sample_mask_in:
1813       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1814    case nir_intrinsic_load_local_invocation_id:
1815       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1816    case nir_intrinsic_load_num_work_groups:
1817       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1818    case nir_intrinsic_load_work_group_id:
1819       return SYSTEM_VALUE_WORK_GROUP_ID;
1820    case nir_intrinsic_load_primitive_id:
1821       return SYSTEM_VALUE_PRIMITIVE_ID;
1822    case nir_intrinsic_load_tess_coord:
1823       return SYSTEM_VALUE_TESS_COORD;
1824    case nir_intrinsic_load_tess_level_outer:
1825       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1826    case nir_intrinsic_load_tess_level_inner:
1827       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1828    case nir_intrinsic_load_patch_vertices_in:
1829       return SYSTEM_VALUE_VERTICES_IN;
1830    case nir_intrinsic_load_helper_invocation:
1831       return SYSTEM_VALUE_HELPER_INVOCATION;
1832    default:
1833       unreachable("intrinsic doesn't produce a system value");
1834    }
1835 }