src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->bit_size = 32;
  74    reg->num_array_elems = 0;
  75    reg->is_packed = false;
  76    reg->name = NULL;
  77
  78    exec_list_push_tail(list, &reg->node);
  79
  80    return reg;
  81 }
  82
  83 nir_register *
  84 nir_global_reg_create(nir_shader *shader)
  85 {
  86    nir_register *reg = reg_create(shader, &shader->registers);
  87    reg->index = shader->reg_alloc++;
  88    reg->is_global = true;
  89
  90    return reg;
  91 }
  92
  93 nir_register *
  94 nir_local_reg_create(nir_function_impl *impl)
  95 {
  96    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  97    reg->index = impl->reg_alloc++;
  98    reg->is_global = false;
  99
 100    return reg;
 101 }
 102
 103 void
 104 nir_reg_remove(nir_register *reg)
 105 {
 106    exec_node_remove(&reg->node);
 107 }
 108
 109 void
 110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 111 {
 112    switch (var->data.mode) {
 113    case nir_var_all:
 114       assert(!"invalid mode");
 115       break;
 116
 117    case nir_var_local:
 118       assert(!"nir_shader_add_variable cannot be used for local variables");
 119       break;
 120
 121    case nir_var_param:
 122       assert(!"nir_shader_add_variable cannot be used for function parameters");
 123       break;
 124
 125    case nir_var_global:
 126       exec_list_push_tail(&shader->globals, &var->node);
 127       break;
 128
 129    case nir_var_shader_in:
 130       exec_list_push_tail(&shader->inputs, &var->node);
 131       break;
 132
 133    case nir_var_shader_out:
 134       exec_list_push_tail(&shader->outputs, &var->node);
 135       break;
 136
 137    case nir_var_uniform:
 138    case nir_var_shader_storage:
 139       exec_list_push_tail(&shader->uniforms, &var->node);
 140       break;
 141
 142    case nir_var_shared:
 143       assert(shader->stage == MESA_SHADER_COMPUTE);
 144       exec_list_push_tail(&shader->shared, &var->node);
 145       break;
 146
 147    case nir_var_system_value:
 148       exec_list_push_tail(&shader->system_values, &var->node);
 149       break;
 150    }
 151 }
 152
 153 nir_variable *
 154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 155                     const struct glsl_type *type, const char *name)
 156 {
 157    nir_variable *var = rzalloc(shader, nir_variable);
 158    var->name = ralloc_strdup(var, name);
 159    var->type = type;
 160    var->data.mode = mode;
 161
 162    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 163        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 164       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 165
 166    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 167       var->data.read_only = true;
 168
 169    nir_shader_add_variable(shader, var);
 170
 171    return var;
 172 }
 173
 174 nir_variable *
 175 nir_local_variable_create(nir_function_impl *impl,
 176                           const struct glsl_type *type, const char *name)
 177 {
 178    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 179    var->name = ralloc_strdup(var, name);
 180    var->type = type;
 181    var->data.mode = nir_var_local;
 182
 183    nir_function_impl_add_variable(impl, var);
 184
 185    return var;
 186 }
 187
 188 nir_function *
 189 nir_function_create(nir_shader *shader, const char *name)
 190 {
 191    nir_function *func = ralloc(shader, nir_function);
 192
 193    exec_list_push_tail(&shader->functions, &func->node);
 194
 195    func->name = ralloc_strdup(func, name);
 196    func->shader = shader;
 197    func->num_params = 0;
 198    func->params = NULL;
 199    func->return_type = glsl_void_type();
 200    func->impl = NULL;
 201
 202    return func;
 203 }
 204
 205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 206 {
 207    dest->is_ssa = src->is_ssa;
 208    if (src->is_ssa) {
 209       dest->ssa = src->ssa;
 210    } else {
 211       dest->reg.base_offset = src->reg.base_offset;
 212       dest->reg.reg = src->reg.reg;
 213       if (src->reg.indirect) {
 214          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 215          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 216       } else {
 217          dest->reg.indirect = NULL;
 218       }
 219    }
 220 }
 221
 222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 223 {
 224    /* Copying an SSA definition makes no sense whatsoever. */
 225    assert(!src->is_ssa);
 226
 227    dest->is_ssa = false;
 228
 229    dest->reg.base_offset = src->reg.base_offset;
 230    dest->reg.reg = src->reg.reg;
 231    if (src->reg.indirect) {
 232       dest->reg.indirect = ralloc(instr, nir_src);
 233       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 234    } else {
 235       dest->reg.indirect = NULL;
 236    }
 237 }
 238
 239 void
 240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 241                  nir_alu_instr *instr)
 242 {
 243    nir_src_copy(&dest->src, &src->src, &instr->instr);
 244    dest->abs = src->abs;
 245    dest->negate = src->negate;
 246    for (unsigned i = 0; i < 4; i++)
 247       dest->swizzle[i] = src->swizzle[i];
 248 }
 249
 250 void
 251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 252                   nir_alu_instr *instr)
 253 {
 254    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 255    dest->write_mask = src->write_mask;
 256    dest->saturate = src->saturate;
 257 }
 258
 259
 260 static void
 261 cf_init(nir_cf_node *node, nir_cf_node_type type)
 262 {
 263    exec_node_init(&node->node);
 264    node->parent = NULL;
 265    node->type = type;
 266 }
 267
 268 nir_function_impl *
 269 nir_function_impl_create_bare(nir_shader *shader)
 270 {
 271    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 272
 273    impl->function = NULL;
 274
 275    cf_init(&impl->cf_node, nir_cf_node_function);
 276
 277    exec_list_make_empty(&impl->body);
 278    exec_list_make_empty(&impl->registers);
 279    exec_list_make_empty(&impl->locals);
 280    impl->num_params = 0;
 281    impl->params = NULL;
 282    impl->return_var = NULL;
 283    impl->reg_alloc = 0;
 284    impl->ssa_alloc = 0;
 285    impl->valid_metadata = nir_metadata_none;
 286
 287    /* create start & end blocks */
 288    nir_block *start_block = nir_block_create(shader);
 289    nir_block *end_block = nir_block_create(shader);
 290    start_block->cf_node.parent = &impl->cf_node;
 291    end_block->cf_node.parent = &impl->cf_node;
 292    impl->end_block = end_block;
 293
 294    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 295
 296    start_block->successors[0] = end_block;
 297    _mesa_set_add(end_block->predecessors, start_block);
 298    return impl;
 299 }
 300
 301 nir_function_impl *
 302 nir_function_impl_create(nir_function *function)
 303 {
 304    assert(function->impl == NULL);
 305
 306    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 307
 308    function->impl = impl;
 309    impl->function = function;
 310
 311    impl->num_params = function->num_params;
 312    impl->params = ralloc_array(function->shader,
 313                                nir_variable *, impl->num_params);
 314
 315    for (unsigned i = 0; i < impl->num_params; i++) {
 316       impl->params[i] = rzalloc(function->shader, nir_variable);
 317       impl->params[i]->type = function->params[i].type;
 318       impl->params[i]->data.mode = nir_var_param;
 319       impl->params[i]->data.location = i;
 320    }
 321
 322    if (!glsl_type_is_void(function->return_type)) {
 323       impl->return_var = rzalloc(function->shader, nir_variable);
 324       impl->return_var->type = function->return_type;
 325       impl->return_var->data.mode = nir_var_param;
 326       impl->return_var->data.location = -1;
 327    } else {
 328       impl->return_var = NULL;
 329    }
 330
 331    return impl;
 332 }
 333
 334 nir_block *
 335 nir_block_create(nir_shader *shader)
 336 {
 337    nir_block *block = ralloc(shader, nir_block);
 338
 339    cf_init(&block->cf_node, nir_cf_node_block);
 340
 341    block->successors[0] = block->successors[1] = NULL;
 342    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 343                                           _mesa_key_pointer_equal);
 344    block->imm_dom = NULL;
 345    /* XXX maybe it would be worth it to defer allocation?  This
 346     * way it doesn't get allocated for shader ref's that never run
 347     * nir_calc_dominance?  For example, state-tracker creates an
 348     * initial IR, clones that, runs appropriate lowering pass, passes
 349     * to driver which does common lowering/opt, and then stores ref
 350     * which is later used to do state specific lowering and futher
 351     * opt.  Do any of the references not need dominance metadata?
 352     */
 353    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 354                                           _mesa_key_pointer_equal);
 355
 356    exec_list_make_empty(&block->instr_list);
 357
 358    return block;
 359 }
 360
 361 static inline void
 362 src_init(nir_src *src)
 363 {
 364    src->is_ssa = false;
 365    src->reg.reg = NULL;
 366    src->reg.indirect = NULL;
 367    src->reg.base_offset = 0;
 368 }
 369
 370 nir_if *
 371 nir_if_create(nir_shader *shader)
 372 {
 373    nir_if *if_stmt = ralloc(shader, nir_if);
 374
 375    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 376    src_init(&if_stmt->condition);
 377
 378    nir_block *then = nir_block_create(shader);
 379    exec_list_make_empty(&if_stmt->then_list);
 380    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 381    then->cf_node.parent = &if_stmt->cf_node;
 382
 383    nir_block *else_stmt = nir_block_create(shader);
 384    exec_list_make_empty(&if_stmt->else_list);
 385    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 386    else_stmt->cf_node.parent = &if_stmt->cf_node;
 387
 388    return if_stmt;
 389 }
 390
 391 nir_loop *
 392 nir_loop_create(nir_shader *shader)
 393 {
 394    nir_loop *loop = ralloc(shader, nir_loop);
 395
 396    cf_init(&loop->cf_node, nir_cf_node_loop);
 397
 398    nir_block *body = nir_block_create(shader);
 399    exec_list_make_empty(&loop->body);
 400    exec_list_push_tail(&loop->body, &body->cf_node.node);
 401    body->cf_node.parent = &loop->cf_node;
 402
 403    body->successors[0] = body;
 404    _mesa_set_add(body->predecessors, body);
 405
 406    return loop;
 407 }
 408
 409 static void
 410 instr_init(nir_instr *instr, nir_instr_type type)
 411 {
 412    instr->type = type;
 413    instr->block = NULL;
 414    exec_node_init(&instr->node);
 415 }
 416
 417 static void
 418 dest_init(nir_dest *dest)
 419 {
 420    dest->is_ssa = false;
 421    dest->reg.reg = NULL;
 422    dest->reg.indirect = NULL;
 423    dest->reg.base_offset = 0;
 424 }
 425
 426 static void
 427 alu_dest_init(nir_alu_dest *dest)
 428 {
 429    dest_init(&dest->dest);
 430    dest->saturate = false;
 431    dest->write_mask = 0xf;
 432 }
 433
 434 static void
 435 alu_src_init(nir_alu_src *src)
 436 {
 437    src_init(&src->src);
 438    src->abs = src->negate = false;
 439    src->swizzle[0] = 0;
 440    src->swizzle[1] = 1;
 441    src->swizzle[2] = 2;
 442    src->swizzle[3] = 3;
 443 }
 444
 445 nir_alu_instr *
 446 nir_alu_instr_create(nir_shader *shader, nir_op op)
 447 {
 448    unsigned num_srcs = nir_op_infos[op].num_inputs;
 449    nir_alu_instr *instr =
 450       ralloc_size(shader,
 451                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 452
 453    instr_init(&instr->instr, nir_instr_type_alu);
 454    instr->op = op;
 455    alu_dest_init(&instr->dest);
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       alu_src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_jump_instr *
 463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 464 {
 465    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 466    instr_init(&instr->instr, nir_instr_type_jump);
 467    instr->type = type;
 468    return instr;
 469 }
 470
 471 nir_load_const_instr *
 472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 473 {
 474    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 475    instr_init(&instr->instr, nir_instr_type_load_const);
 476
 477    nir_ssa_def_init(&instr->instr, &instr->def, num_components, 32, NULL);
 478
 479    return instr;
 480 }
 481
 482 nir_intrinsic_instr *
 483 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 484 {
 485    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 486    nir_intrinsic_instr *instr =
 487       ralloc_size(shader,
 488                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 489
 490    instr_init(&instr->instr, nir_instr_type_intrinsic);
 491    instr->intrinsic = op;
 492
 493    if (nir_intrinsic_infos[op].has_dest)
 494       dest_init(&instr->dest);
 495
 496    for (unsigned i = 0; i < num_srcs; i++)
 497       src_init(&instr->src[i]);
 498
 499    return instr;
 500 }
 501
 502 nir_call_instr *
 503 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 504 {
 505    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 506    instr_init(&instr->instr, nir_instr_type_call);
 507
 508    instr->callee = callee;
 509    instr->num_params = callee->num_params;
 510    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 511    instr->return_deref = NULL;
 512
 513    return instr;
 514 }
 515
 516 nir_tex_instr *
 517 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 518 {
 519    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 520    instr_init(&instr->instr, nir_instr_type_tex);
 521
 522    dest_init(&instr->dest);
 523
 524    instr->num_srcs = num_srcs;
 525    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 526    for (unsigned i = 0; i < num_srcs; i++)
 527       src_init(&instr->src[i].src);
 528
 529    instr->texture_index = 0;
 530    instr->texture_array_size = 0;
 531    instr->texture = NULL;
 532    instr->sampler_index = 0;
 533    instr->sampler = NULL;
 534
 535    return instr;
 536 }
 537
 538 nir_phi_instr *
 539 nir_phi_instr_create(nir_shader *shader)
 540 {
 541    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 542    instr_init(&instr->instr, nir_instr_type_phi);
 543
 544    dest_init(&instr->dest);
 545    exec_list_make_empty(&instr->srcs);
 546    return instr;
 547 }
 548
 549 nir_parallel_copy_instr *
 550 nir_parallel_copy_instr_create(nir_shader *shader)
 551 {
 552    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 553    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 554
 555    exec_list_make_empty(&instr->entries);
 556
 557    return instr;
 558 }
 559
 560 nir_ssa_undef_instr *
 561 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 562 {
 563    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 564    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 565
 566    nir_ssa_def_init(&instr->instr, &instr->def, num_components, 32, NULL);
 567
 568    return instr;
 569 }
 570
 571 nir_deref_var *
 572 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 573 {
 574    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 575    deref->deref.deref_type = nir_deref_type_var;
 576    deref->deref.child = NULL;
 577    deref->deref.type = var->type;
 578    deref->var = var;
 579    return deref;
 580 }
 581
 582 nir_deref_array *
 583 nir_deref_array_create(void *mem_ctx)
 584 {
 585    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 586    deref->deref.deref_type = nir_deref_type_array;
 587    deref->deref.child = NULL;
 588    deref->deref_array_type = nir_deref_array_type_direct;
 589    src_init(&deref->indirect);
 590    deref->base_offset = 0;
 591    return deref;
 592 }
 593
 594 nir_deref_struct *
 595 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 596 {
 597    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 598    deref->deref.deref_type = nir_deref_type_struct;
 599    deref->deref.child = NULL;
 600    deref->index = field_index;
 601    return deref;
 602 }
 603
 604 static nir_deref_var *
 605 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 606 {
 607    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 608    ret->deref.type = deref->deref.type;
 609    if (deref->deref.child)
 610       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 611    return ret;
 612 }
 613
 614 static nir_deref_array *
 615 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 616 {
 617    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 618    ret->base_offset = deref->base_offset;
 619    ret->deref_array_type = deref->deref_array_type;
 620    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 621       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 622    }
 623    ret->deref.type = deref->deref.type;
 624    if (deref->deref.child)
 625       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 626    return ret;
 627 }
 628
 629 static nir_deref_struct *
 630 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 631 {
 632    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 633    ret->deref.type = deref->deref.type;
 634    if (deref->deref.child)
 635       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 636    return ret;
 637 }
 638
 639 nir_deref *
 640 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 641 {
 642    switch (deref->deref_type) {
 643    case nir_deref_type_var:
 644       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 645    case nir_deref_type_array:
 646       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 647    case nir_deref_type_struct:
 648       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 649    default:
 650       unreachable("Invalid dereference type");
 651    }
 652
 653    return NULL;
 654 }
 655
 656 /* Returns a load_const instruction that represents the constant
 657  * initializer for the given deref chain.  The caller is responsible for
 658  * ensuring that there actually is a constant initializer.
 659  */
 660 nir_load_const_instr *
 661 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 662 {
 663    nir_constant *constant = deref->var->constant_initializer;
 664    assert(constant);
 665
 666    const nir_deref *tail = &deref->deref;
 667    unsigned matrix_offset = 0;
 668    while (tail->child) {
 669       switch (tail->child->deref_type) {
 670       case nir_deref_type_array: {
 671          nir_deref_array *arr = nir_deref_as_array(tail->child);
 672          assert(arr->deref_array_type == nir_deref_array_type_direct);
 673          if (glsl_type_is_matrix(tail->type)) {
 674             assert(arr->deref.child == NULL);
 675             matrix_offset = arr->base_offset;
 676          } else {
 677             constant = constant->elements[arr->base_offset];
 678          }
 679          break;
 680       }
 681
 682       case nir_deref_type_struct: {
 683          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 684          break;
 685       }
 686
 687       default:
 688          unreachable("Invalid deref child type");
 689       }
 690
 691       tail = tail->child;
 692    }
 693
 694    nir_load_const_instr *load =
 695       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 696
 697    matrix_offset *= load->def.num_components;
 698    for (unsigned i = 0; i < load->def.num_components; i++) {
 699       switch (glsl_get_base_type(tail->type)) {
 700       case GLSL_TYPE_FLOAT:
 701       case GLSL_TYPE_INT:
 702       case GLSL_TYPE_UINT:
 703          load->value.u32[i] = constant->value.u[matrix_offset + i];
 704          break;
 705       case GLSL_TYPE_BOOL:
 706          load->value.u32[i] = constant->value.b[matrix_offset + i] ?
 707                              NIR_TRUE : NIR_FALSE;
 708          break;
 709       default:
 710          unreachable("Invalid immediate type");
 711       }
 712    }
 713
 714    return load;
 715 }
 716
 717 nir_function_impl *
 718 nir_cf_node_get_function(nir_cf_node *node)
 719 {
 720    while (node->type != nir_cf_node_function) {
 721       node = node->parent;
 722    }
 723
 724    return nir_cf_node_as_function(node);
 725 }
 726
 727 /* Reduces a cursor by trying to convert everything to after and trying to
 728  * go up to block granularity when possible.
 729  */
 730 static nir_cursor
 731 reduce_cursor(nir_cursor cursor)
 732 {
 733    switch (cursor.option) {
 734    case nir_cursor_before_block:
 735       assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
 736              nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
 737       if (exec_list_is_empty(&cursor.block->instr_list)) {
 738          /* Empty block.  After is as good as before. */
 739          cursor.option = nir_cursor_after_block;
 740       }
 741       return cursor;
 742
 743    case nir_cursor_after_block:
 744       return cursor;
 745
 746    case nir_cursor_before_instr: {
 747       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 748       if (prev_instr) {
 749          /* Before this instruction is after the previous */
 750          cursor.instr = prev_instr;
 751          cursor.option = nir_cursor_after_instr;
 752       } else {
 753          /* No previous instruction.  Switch to before block */
 754          cursor.block = cursor.instr->block;
 755          cursor.option = nir_cursor_before_block;
 756       }
 757       return reduce_cursor(cursor);
 758    }
 759
 760    case nir_cursor_after_instr:
 761       if (nir_instr_next(cursor.instr) == NULL) {
 762          /* This is the last instruction, switch to after block */
 763          cursor.option = nir_cursor_after_block;
 764          cursor.block = cursor.instr->block;
 765       }
 766       return cursor;
 767
 768    default:
 769       unreachable("Inavlid cursor option");
 770    }
 771 }
 772
 773 bool
 774 nir_cursors_equal(nir_cursor a, nir_cursor b)
 775 {
 776    /* Reduced cursors should be unique */
 777    a = reduce_cursor(a);
 778    b = reduce_cursor(b);
 779
 780    return a.block == b.block && a.option == b.option;
 781 }
 782
 783 static bool
 784 add_use_cb(nir_src *src, void *state)
 785 {
 786    nir_instr *instr = state;
 787
 788    src->parent_instr = instr;
 789    list_addtail(&src->use_link,
 790                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 791
 792    return true;
 793 }
 794
 795 static bool
 796 add_ssa_def_cb(nir_ssa_def *def, void *state)
 797 {
 798    nir_instr *instr = state;
 799
 800    if (instr->block && def->index == UINT_MAX) {
 801       nir_function_impl *impl =
 802          nir_cf_node_get_function(&instr->block->cf_node);
 803
 804       def->index = impl->ssa_alloc++;
 805    }
 806
 807    return true;
 808 }
 809
 810 static bool
 811 add_reg_def_cb(nir_dest *dest, void *state)
 812 {
 813    nir_instr *instr = state;
 814
 815    if (!dest->is_ssa) {
 816       dest->reg.parent_instr = instr;
 817       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 818    }
 819
 820    return true;
 821 }
 822
 823 static void
 824 add_defs_uses(nir_instr *instr)
 825 {
 826    nir_foreach_src(instr, add_use_cb, instr);
 827    nir_foreach_dest(instr, add_reg_def_cb, instr);
 828    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 829 }
 830
 831 void
 832 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 833 {
 834    switch (cursor.option) {
 835    case nir_cursor_before_block:
 836       /* Only allow inserting jumps into empty blocks. */
 837       if (instr->type == nir_instr_type_jump)
 838          assert(exec_list_is_empty(&cursor.block->instr_list));
 839
 840       instr->block = cursor.block;
 841       add_defs_uses(instr);
 842       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 843       break;
 844    case nir_cursor_after_block: {
 845       /* Inserting instructions after a jump is illegal. */
 846       nir_instr *last = nir_block_last_instr(cursor.block);
 847       assert(last == NULL || last->type != nir_instr_type_jump);
 848       (void) last;
 849
 850       instr->block = cursor.block;
 851       add_defs_uses(instr);
 852       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 853       break;
 854    }
 855    case nir_cursor_before_instr:
 856       assert(instr->type != nir_instr_type_jump);
 857       instr->block = cursor.instr->block;
 858       add_defs_uses(instr);
 859       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 860       break;
 861    case nir_cursor_after_instr:
 862       /* Inserting instructions after a jump is illegal. */
 863       assert(cursor.instr->type != nir_instr_type_jump);
 864
 865       /* Only allow inserting jumps at the end of the block. */
 866       if (instr->type == nir_instr_type_jump)
 867          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 868
 869       instr->block = cursor.instr->block;
 870       add_defs_uses(instr);
 871       exec_node_insert_after(&cursor.instr->node, &instr->node);
 872       break;
 873    }
 874
 875    if (instr->type == nir_instr_type_jump)
 876       nir_handle_add_jump(instr->block);
 877 }
 878
 879 static bool
 880 src_is_valid(const nir_src *src)
 881 {
 882    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 883 }
 884
 885 static bool
 886 remove_use_cb(nir_src *src, void *state)
 887 {
 888    if (src_is_valid(src))
 889       list_del(&src->use_link);
 890
 891    return true;
 892 }
 893
 894 static bool
 895 remove_def_cb(nir_dest *dest, void *state)
 896 {
 897    if (!dest->is_ssa)
 898       list_del(&dest->reg.def_link);
 899
 900    return true;
 901 }
 902
 903 static void
 904 remove_defs_uses(nir_instr *instr)
 905 {
 906    nir_foreach_dest(instr, remove_def_cb, instr);
 907    nir_foreach_src(instr, remove_use_cb, instr);
 908 }
 909
 910 void nir_instr_remove(nir_instr *instr)
 911 {
 912    remove_defs_uses(instr);
 913    exec_node_remove(&instr->node);
 914
 915    if (instr->type == nir_instr_type_jump) {
 916       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 917       nir_handle_remove_jump(instr->block, jump_instr->type);
 918    }
 919 }
 920
 921 /*@}*/
 922
 923 void
 924 nir_index_local_regs(nir_function_impl *impl)
 925 {
 926    unsigned index = 0;
 927    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 928       reg->index = index++;
 929    }
 930    impl->reg_alloc = index;
 931 }
 932
 933 void
 934 nir_index_global_regs(nir_shader *shader)
 935 {
 936    unsigned index = 0;
 937    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 938       reg->index = index++;
 939    }
 940    shader->reg_alloc = index;
 941 }
 942
 943 static bool
 944 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 945 {
 946    return cb(&instr->dest.dest, state);
 947 }
 948
 949 static bool
 950 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 951                      void *state)
 952 {
 953    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 954       return cb(&instr->dest, state);
 955
 956    return true;
 957 }
 958
 959 static bool
 960 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 961                    void *state)
 962 {
 963    return cb(&instr->dest, state);
 964 }
 965
 966 static bool
 967 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 968 {
 969    return cb(&instr->dest, state);
 970 }
 971
 972 static bool
 973 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 974                          nir_foreach_dest_cb cb, void *state)
 975 {
 976    nir_foreach_parallel_copy_entry(instr, entry) {
 977       if (!cb(&entry->dest, state))
 978          return false;
 979    }
 980
 981    return true;
 982 }
 983
 984 bool
 985 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 986 {
 987    switch (instr->type) {
 988    case nir_instr_type_alu:
 989       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 990    case nir_instr_type_intrinsic:
 991       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 992    case nir_instr_type_tex:
 993       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 994    case nir_instr_type_phi:
 995       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 996    case nir_instr_type_parallel_copy:
 997       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 998                                       cb, state);
 999
1000    case nir_instr_type_load_const:
1001    case nir_instr_type_ssa_undef:
1002    case nir_instr_type_call:
1003    case nir_instr_type_jump:
1004       break;
1005
1006    default:
1007       unreachable("Invalid instruction type");
1008       break;
1009    }
1010
1011    return true;
1012 }
1013
1014 struct foreach_ssa_def_state {
1015    nir_foreach_ssa_def_cb cb;
1016    void *client_state;
1017 };
1018
1019 static inline bool
1020 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1021 {
1022    struct foreach_ssa_def_state *state = void_state;
1023
1024    if (dest->is_ssa)
1025       return state->cb(&dest->ssa, state->client_state);
1026    else
1027       return true;
1028 }
1029
1030 bool
1031 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1032 {
1033    switch (instr->type) {
1034    case nir_instr_type_alu:
1035    case nir_instr_type_tex:
1036    case nir_instr_type_intrinsic:
1037    case nir_instr_type_phi:
1038    case nir_instr_type_parallel_copy: {
1039       struct foreach_ssa_def_state foreach_state = {cb, state};
1040       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1041    }
1042
1043    case nir_instr_type_load_const:
1044       return cb(&nir_instr_as_load_const(instr)->def, state);
1045    case nir_instr_type_ssa_undef:
1046       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1047    case nir_instr_type_call:
1048    case nir_instr_type_jump:
1049       return true;
1050    default:
1051       unreachable("Invalid instruction type");
1052    }
1053 }
1054
1055 static bool
1056 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1057 {
1058    if (!cb(src, state))
1059       return false;
1060    if (!src->is_ssa && src->reg.indirect)
1061       return cb(src->reg.indirect, state);
1062    return true;
1063 }
1064
1065 static bool
1066 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1067                       void *state)
1068 {
1069    if (deref->deref_array_type == nir_deref_array_type_indirect)
1070       return visit_src(&deref->indirect, cb, state);
1071    return true;
1072 }
1073
1074 static bool
1075 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1076 {
1077    nir_deref *cur = &deref->deref;
1078    while (cur != NULL) {
1079       if (cur->deref_type == nir_deref_type_array) {
1080          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1081             return false;
1082       }
1083
1084       cur = cur->child;
1085    }
1086
1087    return true;
1088 }
1089
1090 static bool
1091 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1092 {
1093    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1094       if (!visit_src(&instr->src[i].src, cb, state))
1095          return false;
1096
1097    return true;
1098 }
1099
1100 static bool
1101 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1102 {
1103    for (unsigned i = 0; i < instr->num_srcs; i++) {
1104       if (!visit_src(&instr->src[i].src, cb, state))
1105          return false;
1106    }
1107
1108    if (instr->texture != NULL) {
1109       if (!visit_deref_src(instr->texture, cb, state))
1110          return false;
1111    }
1112
1113    if (instr->sampler != NULL) {
1114       if (!visit_deref_src(instr->sampler, cb, state))
1115          return false;
1116    }
1117
1118    return true;
1119 }
1120
1121 static bool
1122 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1123                     void *state)
1124 {
1125    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1126    for (unsigned i = 0; i < num_srcs; i++) {
1127       if (!visit_src(&instr->src[i], cb, state))
1128          return false;
1129    }
1130
1131    unsigned num_vars =
1132       nir_intrinsic_infos[instr->intrinsic].num_variables;
1133    for (unsigned i = 0; i < num_vars; i++) {
1134       if (!visit_deref_src(instr->variables[i], cb, state))
1135          return false;
1136    }
1137
1138    return true;
1139 }
1140
1141 static bool
1142 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1143 {
1144    return true;
1145 }
1146
1147 static bool
1148 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1149                      void *state)
1150 {
1151    return true;
1152 }
1153
1154 static bool
1155 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1156 {
1157    nir_foreach_phi_src(instr, src) {
1158       if (!visit_src(&src->src, cb, state))
1159          return false;
1160    }
1161
1162    return true;
1163 }
1164
1165 static bool
1166 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1167                         nir_foreach_src_cb cb, void *state)
1168 {
1169    nir_foreach_parallel_copy_entry(instr, entry) {
1170       if (!visit_src(&entry->src, cb, state))
1171          return false;
1172    }
1173
1174    return true;
1175 }
1176
1177 typedef struct {
1178    void *state;
1179    nir_foreach_src_cb cb;
1180 } visit_dest_indirect_state;
1181
1182 static bool
1183 visit_dest_indirect(nir_dest *dest, void *_state)
1184 {
1185    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1186
1187    if (!dest->is_ssa && dest->reg.indirect)
1188       return state->cb(dest->reg.indirect, state->state);
1189
1190    return true;
1191 }
1192
1193 bool
1194 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1195 {
1196    switch (instr->type) {
1197    case nir_instr_type_alu:
1198       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1199          return false;
1200       break;
1201    case nir_instr_type_intrinsic:
1202       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1203          return false;
1204       break;
1205    case nir_instr_type_tex:
1206       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1207          return false;
1208       break;
1209    case nir_instr_type_call:
1210       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1211          return false;
1212       break;
1213    case nir_instr_type_load_const:
1214       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1215          return false;
1216       break;
1217    case nir_instr_type_phi:
1218       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1219          return false;
1220       break;
1221    case nir_instr_type_parallel_copy:
1222       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1223                                    cb, state))
1224          return false;
1225       break;
1226    case nir_instr_type_jump:
1227    case nir_instr_type_ssa_undef:
1228       return true;
1229
1230    default:
1231       unreachable("Invalid instruction type");
1232       break;
1233    }
1234
1235    visit_dest_indirect_state dest_state;
1236    dest_state.state = state;
1237    dest_state.cb = cb;
1238    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1239 }
1240
1241 nir_const_value *
1242 nir_src_as_const_value(nir_src src)
1243 {
1244    if (!src.is_ssa)
1245       return NULL;
1246
1247    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1248       return NULL;
1249
1250    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1251
1252    return &load->value;
1253 }
1254
1255 /**
1256  * Returns true if the source is known to be dynamically uniform. Otherwise it
1257  * returns false which means it may or may not be dynamically uniform but it
1258  * can't be determined.
1259  */
1260 bool
1261 nir_src_is_dynamically_uniform(nir_src src)
1262 {
1263    if (!src.is_ssa)
1264       return false;
1265
1266    /* Constants are trivially dynamically uniform */
1267    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1268       return true;
1269
1270    /* As are uniform variables */
1271    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1272       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1273
1274       if (intr->intrinsic == nir_intrinsic_load_uniform)
1275          return true;
1276    }
1277
1278    /* XXX: this could have many more tests, such as when a sampler function is
1279     * called with dynamically uniform arguments.
1280     */
1281    return false;
1282 }
1283
1284 static void
1285 src_remove_all_uses(nir_src *src)
1286 {
1287    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1288       if (!src_is_valid(src))
1289          continue;
1290
1291       list_del(&src->use_link);
1292    }
1293 }
1294
1295 static void
1296 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1297 {
1298    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1299       if (!src_is_valid(src))
1300          continue;
1301
1302       if (parent_instr) {
1303          src->parent_instr = parent_instr;
1304          if (src->is_ssa)
1305             list_addtail(&src->use_link, &src->ssa->uses);
1306          else
1307             list_addtail(&src->use_link, &src->reg.reg->uses);
1308       } else {
1309          assert(parent_if);
1310          src->parent_if = parent_if;
1311          if (src->is_ssa)
1312             list_addtail(&src->use_link, &src->ssa->if_uses);
1313          else
1314             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1315       }
1316    }
1317 }
1318
1319 void
1320 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1321 {
1322    assert(!src_is_valid(src) || src->parent_instr == instr);
1323
1324    src_remove_all_uses(src);
1325    *src = new_src;
1326    src_add_all_uses(src, instr, NULL);
1327 }
1328
1329 void
1330 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1331 {
1332    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1333
1334    src_remove_all_uses(dest);
1335    src_remove_all_uses(src);
1336    *dest = *src;
1337    *src = NIR_SRC_INIT;
1338    src_add_all_uses(dest, dest_instr, NULL);
1339 }
1340
1341 void
1342 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1343 {
1344    nir_src *src = &if_stmt->condition;
1345    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1346
1347    src_remove_all_uses(src);
1348    *src = new_src;
1349    src_add_all_uses(src, NULL, if_stmt);
1350 }
1351
1352 void
1353 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1354 {
1355    if (dest->is_ssa) {
1356       /* We can only overwrite an SSA destination if it has no uses. */
1357       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1358    } else {
1359       list_del(&dest->reg.def_link);
1360       if (dest->reg.indirect)
1361          src_remove_all_uses(dest->reg.indirect);
1362    }
1363
1364    /* We can't re-write with an SSA def */
1365    assert(!new_dest.is_ssa);
1366
1367    nir_dest_copy(dest, &new_dest, instr);
1368
1369    dest->reg.parent_instr = instr;
1370    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1371
1372    if (dest->reg.indirect)
1373       src_add_all_uses(dest->reg.indirect, instr, NULL);
1374 }
1375
1376 /* note: does *not* take ownership of 'name' */
1377 void
1378 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1379                  unsigned num_components,
1380                  unsigned bit_size, const char *name)
1381 {
1382    def->name = ralloc_strdup(instr, name);
1383    def->parent_instr = instr;
1384    list_inithead(&def->uses);
1385    list_inithead(&def->if_uses);
1386    def->num_components = num_components;
1387    def->bit_size = bit_size;
1388
1389    if (instr->block) {
1390       nir_function_impl *impl =
1391          nir_cf_node_get_function(&instr->block->cf_node);
1392
1393       def->index = impl->ssa_alloc++;
1394    } else {
1395       def->index = UINT_MAX;
1396    }
1397 }
1398
1399 /* note: does *not* take ownership of 'name' */
1400 void
1401 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1402                  unsigned num_components, unsigned bit_size,
1403                  const char *name)
1404 {
1405    dest->is_ssa = true;
1406    nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1407 }
1408
1409 void
1410 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1411 {
1412    assert(!new_src.is_ssa || def != new_src.ssa);
1413
1414    nir_foreach_use_safe(def, use_src)
1415       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1416
1417    nir_foreach_if_use_safe(def, use_src)
1418       nir_if_rewrite_condition(use_src->parent_if, new_src);
1419 }
1420
1421 static bool
1422 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1423 {
1424    assert(start->block == end->block);
1425
1426    if (between->block != start->block)
1427       return false;
1428
1429    /* Search backwards looking for "between" */
1430    while (start != end) {
1431       if (between == end)
1432          return true;
1433
1434       end = nir_instr_prev(end);
1435       assert(end);
1436    }
1437
1438    return false;
1439 }
1440
1441 /* Replaces all uses of the given SSA def with the given source but only if
1442  * the use comes after the after_me instruction.  This can be useful if you
1443  * are emitting code to fix up the result of some instruction: you can freely
1444  * use the result in that code and then call rewrite_uses_after and pass the
1445  * last fixup instruction as after_me and it will replace all of the uses you
1446  * want without touching the fixup code.
1447  *
1448  * This function assumes that after_me is in the same block as
1449  * def->parent_instr and that after_me comes after def->parent_instr.
1450  */
1451 void
1452 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1453                                nir_instr *after_me)
1454 {
1455    assert(!new_src.is_ssa || def != new_src.ssa);
1456
1457    nir_foreach_use_safe(def, use_src) {
1458       assert(use_src->parent_instr != def->parent_instr);
1459       /* Since def already dominates all of its uses, the only way a use can
1460        * not be dominated by after_me is if it is between def and after_me in
1461        * the instruction list.
1462        */
1463       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1464          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1465    }
1466
1467    nir_foreach_if_use_safe(def, use_src)
1468       nir_if_rewrite_condition(use_src->parent_if, new_src);
1469 }
1470
1471 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1472                             bool reverse, void *state);
1473
1474 static inline bool
1475 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1476 {
1477    if (reverse) {
1478       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1479                                       &if_stmt->else_list) {
1480          if (!foreach_cf_node(node, cb, reverse, state))
1481             return false;
1482       }
1483
1484       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1485                                       &if_stmt->then_list) {
1486          if (!foreach_cf_node(node, cb, reverse, state))
1487             return false;
1488       }
1489    } else {
1490       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1491          if (!foreach_cf_node(node, cb, reverse, state))
1492             return false;
1493       }
1494
1495       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1496          if (!foreach_cf_node(node, cb, reverse, state))
1497             return false;
1498       }
1499    }
1500
1501    return true;
1502 }
1503
1504 static inline bool
1505 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1506 {
1507    if (reverse) {
1508       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1509          if (!foreach_cf_node(node, cb, reverse, state))
1510             return false;
1511       }
1512    } else {
1513       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1514          if (!foreach_cf_node(node, cb, reverse, state))
1515             return false;
1516       }
1517    }
1518
1519    return true;
1520 }
1521
1522 static bool
1523 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1524                 bool reverse, void *state)
1525 {
1526    switch (node->type) {
1527    case nir_cf_node_block:
1528       return cb(nir_cf_node_as_block(node), state);
1529    case nir_cf_node_if:
1530       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1531    case nir_cf_node_loop:
1532       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1533       break;
1534
1535    default:
1536       unreachable("Invalid CFG node type");
1537       break;
1538    }
1539
1540    return false;
1541 }
1542
1543 bool
1544 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1545                              void *state)
1546 {
1547    return foreach_cf_node(node, cb, false, state);
1548 }
1549
1550 bool
1551 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1552 {
1553    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1554       if (!foreach_cf_node(node, cb, false, state))
1555          return false;
1556    }
1557
1558    return cb(impl->end_block, state);
1559 }
1560
1561 bool
1562 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1563                           void *state)
1564 {
1565    if (!cb(impl->end_block, state))
1566       return false;
1567
1568    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1569       if (!foreach_cf_node(node, cb, true, state))
1570          return false;
1571    }
1572
1573    return true;
1574 }
1575
1576 nir_if *
1577 nir_block_get_following_if(nir_block *block)
1578 {
1579    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1580       return NULL;
1581
1582    if (nir_cf_node_is_last(&block->cf_node))
1583       return NULL;
1584
1585    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1586
1587    if (next_node->type != nir_cf_node_if)
1588       return NULL;
1589
1590    return nir_cf_node_as_if(next_node);
1591 }
1592
1593 nir_loop *
1594 nir_block_get_following_loop(nir_block *block)
1595 {
1596    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1597       return NULL;
1598
1599    if (nir_cf_node_is_last(&block->cf_node))
1600       return NULL;
1601
1602    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1603
1604    if (next_node->type != nir_cf_node_loop)
1605       return NULL;
1606
1607    return nir_cf_node_as_loop(next_node);
1608 }
1609 static bool
1610 index_block(nir_block *block, void *state)
1611 {
1612    unsigned *index = state;
1613    block->index = (*index)++;
1614    return true;
1615 }
1616
1617 void
1618 nir_index_blocks(nir_function_impl *impl)
1619 {
1620    unsigned index = 0;
1621
1622    if (impl->valid_metadata & nir_metadata_block_index)
1623       return;
1624
1625    nir_foreach_block(impl, index_block, &index);
1626
1627    impl->num_blocks = index;
1628 }
1629
1630 static bool
1631 index_ssa_def_cb(nir_ssa_def *def, void *state)
1632 {
1633    unsigned *index = (unsigned *) state;
1634    def->index = (*index)++;
1635
1636    return true;
1637 }
1638
1639 static bool
1640 index_ssa_block(nir_block *block, void *state)
1641 {
1642    nir_foreach_instr(block, instr)
1643       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1644
1645    return true;
1646 }
1647
1648 /**
1649  * The indices are applied top-to-bottom which has the very nice property
1650  * that, if A dominates B, then A->index <= B->index.
1651  */
1652 void
1653 nir_index_ssa_defs(nir_function_impl *impl)
1654 {
1655    unsigned index = 0;
1656    nir_foreach_block(impl, index_ssa_block, &index);
1657    impl->ssa_alloc = index;
1658 }
1659
1660 static bool
1661 index_instrs_block(nir_block *block, void *state)
1662 {
1663    unsigned *index = state;
1664    nir_foreach_instr(block, instr)
1665       instr->index = (*index)++;
1666
1667    return true;
1668 }
1669
1670 /**
1671  * The indices are applied top-to-bottom which has the very nice property
1672  * that, if A dominates B, then A->index <= B->index.
1673  */
1674 unsigned
1675 nir_index_instrs(nir_function_impl *impl)
1676 {
1677    unsigned index = 0;
1678    nir_foreach_block(impl, index_instrs_block, &index);
1679    return index;
1680 }
1681
1682 nir_intrinsic_op
1683 nir_intrinsic_from_system_value(gl_system_value val)
1684 {
1685    switch (val) {
1686    case SYSTEM_VALUE_VERTEX_ID:
1687       return nir_intrinsic_load_vertex_id;
1688    case SYSTEM_VALUE_INSTANCE_ID:
1689       return nir_intrinsic_load_instance_id;
1690    case SYSTEM_VALUE_DRAW_ID:
1691       return nir_intrinsic_load_draw_id;
1692    case SYSTEM_VALUE_BASE_INSTANCE:
1693       return nir_intrinsic_load_base_instance;
1694    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1695       return nir_intrinsic_load_vertex_id_zero_base;
1696    case SYSTEM_VALUE_BASE_VERTEX:
1697       return nir_intrinsic_load_base_vertex;
1698    case SYSTEM_VALUE_INVOCATION_ID:
1699       return nir_intrinsic_load_invocation_id;
1700    case SYSTEM_VALUE_FRONT_FACE:
1701       return nir_intrinsic_load_front_face;
1702    case SYSTEM_VALUE_SAMPLE_ID:
1703       return nir_intrinsic_load_sample_id;
1704    case SYSTEM_VALUE_SAMPLE_POS:
1705       return nir_intrinsic_load_sample_pos;
1706    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1707       return nir_intrinsic_load_sample_mask_in;
1708    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1709       return nir_intrinsic_load_local_invocation_id;
1710    case SYSTEM_VALUE_WORK_GROUP_ID:
1711       return nir_intrinsic_load_work_group_id;
1712    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1713       return nir_intrinsic_load_num_work_groups;
1714    case SYSTEM_VALUE_PRIMITIVE_ID:
1715       return nir_intrinsic_load_primitive_id;
1716    case SYSTEM_VALUE_TESS_COORD:
1717       return nir_intrinsic_load_tess_coord;
1718    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1719       return nir_intrinsic_load_tess_level_outer;
1720    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1721       return nir_intrinsic_load_tess_level_inner;
1722    case SYSTEM_VALUE_VERTICES_IN:
1723       return nir_intrinsic_load_patch_vertices_in;
1724    case SYSTEM_VALUE_HELPER_INVOCATION:
1725       return nir_intrinsic_load_helper_invocation;
1726    default:
1727       unreachable("system value does not directly correspond to intrinsic");
1728    }
1729 }
1730
1731 gl_system_value
1732 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1733 {
1734    switch (intrin) {
1735    case nir_intrinsic_load_vertex_id:
1736       return SYSTEM_VALUE_VERTEX_ID;
1737    case nir_intrinsic_load_instance_id:
1738       return SYSTEM_VALUE_INSTANCE_ID;
1739    case nir_intrinsic_load_draw_id:
1740       return SYSTEM_VALUE_DRAW_ID;
1741    case nir_intrinsic_load_base_instance:
1742       return SYSTEM_VALUE_BASE_INSTANCE;
1743    case nir_intrinsic_load_vertex_id_zero_base:
1744       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1745    case nir_intrinsic_load_base_vertex:
1746       return SYSTEM_VALUE_BASE_VERTEX;
1747    case nir_intrinsic_load_invocation_id:
1748       return SYSTEM_VALUE_INVOCATION_ID;
1749    case nir_intrinsic_load_front_face:
1750       return SYSTEM_VALUE_FRONT_FACE;
1751    case nir_intrinsic_load_sample_id:
1752       return SYSTEM_VALUE_SAMPLE_ID;
1753    case nir_intrinsic_load_sample_pos:
1754       return SYSTEM_VALUE_SAMPLE_POS;
1755    case nir_intrinsic_load_sample_mask_in:
1756       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1757    case nir_intrinsic_load_local_invocation_id:
1758       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1759    case nir_intrinsic_load_num_work_groups:
1760       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1761    case nir_intrinsic_load_work_group_id:
1762       return SYSTEM_VALUE_WORK_GROUP_ID;
1763    case nir_intrinsic_load_primitive_id:
1764       return SYSTEM_VALUE_PRIMITIVE_ID;
1765    case nir_intrinsic_load_tess_coord:
1766       return SYSTEM_VALUE_TESS_COORD;
1767    case nir_intrinsic_load_tess_level_outer:
1768       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1769    case nir_intrinsic_load_tess_level_inner:
1770       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1771    case nir_intrinsic_load_patch_vertices_in:
1772       return SYSTEM_VALUE_VERTICES_IN;
1773    case nir_intrinsic_load_helper_invocation:
1774       return SYSTEM_VALUE_HELPER_INVOCATION;
1775    default:
1776       unreachable("intrinsic doesn't produce a system value");
1777    }
1778 }