src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->bit_size = 32;
  74    reg->num_array_elems = 0;
  75    reg->is_packed = false;
  76    reg->name = NULL;
  77
  78    exec_list_push_tail(list, &reg->node);
  79
  80    return reg;
  81 }
  82
  83 nir_register *
  84 nir_global_reg_create(nir_shader *shader)
  85 {
  86    nir_register *reg = reg_create(shader, &shader->registers);
  87    reg->index = shader->reg_alloc++;
  88    reg->is_global = true;
  89
  90    return reg;
  91 }
  92
  93 nir_register *
  94 nir_local_reg_create(nir_function_impl *impl)
  95 {
  96    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  97    reg->index = impl->reg_alloc++;
  98    reg->is_global = false;
  99
 100    return reg;
 101 }
 102
 103 void
 104 nir_reg_remove(nir_register *reg)
 105 {
 106    exec_node_remove(&reg->node);
 107 }
 108
 109 void
 110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 111 {
 112    switch (var->data.mode) {
 113    case nir_var_all:
 114       assert(!"invalid mode");
 115       break;
 116
 117    case nir_var_local:
 118       assert(!"nir_shader_add_variable cannot be used for local variables");
 119       break;
 120
 121    case nir_var_param:
 122       assert(!"nir_shader_add_variable cannot be used for function parameters");
 123       break;
 124
 125    case nir_var_global:
 126       exec_list_push_tail(&shader->globals, &var->node);
 127       break;
 128
 129    case nir_var_shader_in:
 130       exec_list_push_tail(&shader->inputs, &var->node);
 131       break;
 132
 133    case nir_var_shader_out:
 134       exec_list_push_tail(&shader->outputs, &var->node);
 135       break;
 136
 137    case nir_var_uniform:
 138    case nir_var_shader_storage:
 139       exec_list_push_tail(&shader->uniforms, &var->node);
 140       break;
 141
 142    case nir_var_shared:
 143       assert(shader->stage == MESA_SHADER_COMPUTE);
 144       exec_list_push_tail(&shader->shared, &var->node);
 145       break;
 146
 147    case nir_var_system_value:
 148       exec_list_push_tail(&shader->system_values, &var->node);
 149       break;
 150    }
 151 }
 152
 153 nir_variable *
 154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 155                     const struct glsl_type *type, const char *name)
 156 {
 157    nir_variable *var = rzalloc(shader, nir_variable);
 158    var->name = ralloc_strdup(var, name);
 159    var->type = type;
 160    var->data.mode = mode;
 161
 162    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 163        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 164       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 165
 166    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 167       var->data.read_only = true;
 168
 169    nir_shader_add_variable(shader, var);
 170
 171    return var;
 172 }
 173
 174 nir_variable *
 175 nir_local_variable_create(nir_function_impl *impl,
 176                           const struct glsl_type *type, const char *name)
 177 {
 178    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 179    var->name = ralloc_strdup(var, name);
 180    var->type = type;
 181    var->data.mode = nir_var_local;
 182
 183    nir_function_impl_add_variable(impl, var);
 184
 185    return var;
 186 }
 187
 188 nir_function *
 189 nir_function_create(nir_shader *shader, const char *name)
 190 {
 191    nir_function *func = ralloc(shader, nir_function);
 192
 193    exec_list_push_tail(&shader->functions, &func->node);
 194
 195    func->name = ralloc_strdup(func, name);
 196    func->shader = shader;
 197    func->num_params = 0;
 198    func->params = NULL;
 199    func->return_type = glsl_void_type();
 200    func->impl = NULL;
 201
 202    return func;
 203 }
 204
 205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 206 {
 207    dest->is_ssa = src->is_ssa;
 208    if (src->is_ssa) {
 209       dest->ssa = src->ssa;
 210    } else {
 211       dest->reg.base_offset = src->reg.base_offset;
 212       dest->reg.reg = src->reg.reg;
 213       if (src->reg.indirect) {
 214          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 215          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 216       } else {
 217          dest->reg.indirect = NULL;
 218       }
 219    }
 220 }
 221
 222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 223 {
 224    /* Copying an SSA definition makes no sense whatsoever. */
 225    assert(!src->is_ssa);
 226
 227    dest->is_ssa = false;
 228
 229    dest->reg.base_offset = src->reg.base_offset;
 230    dest->reg.reg = src->reg.reg;
 231    if (src->reg.indirect) {
 232       dest->reg.indirect = ralloc(instr, nir_src);
 233       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 234    } else {
 235       dest->reg.indirect = NULL;
 236    }
 237 }
 238
 239 void
 240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 241                  nir_alu_instr *instr)
 242 {
 243    nir_src_copy(&dest->src, &src->src, &instr->instr);
 244    dest->abs = src->abs;
 245    dest->negate = src->negate;
 246    for (unsigned i = 0; i < 4; i++)
 247       dest->swizzle[i] = src->swizzle[i];
 248 }
 249
 250 void
 251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 252                   nir_alu_instr *instr)
 253 {
 254    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 255    dest->write_mask = src->write_mask;
 256    dest->saturate = src->saturate;
 257 }
 258
 259
 260 static void
 261 cf_init(nir_cf_node *node, nir_cf_node_type type)
 262 {
 263    exec_node_init(&node->node);
 264    node->parent = NULL;
 265    node->type = type;
 266 }
 267
 268 nir_function_impl *
 269 nir_function_impl_create_bare(nir_shader *shader)
 270 {
 271    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 272
 273    impl->function = NULL;
 274
 275    cf_init(&impl->cf_node, nir_cf_node_function);
 276
 277    exec_list_make_empty(&impl->body);
 278    exec_list_make_empty(&impl->registers);
 279    exec_list_make_empty(&impl->locals);
 280    impl->num_params = 0;
 281    impl->params = NULL;
 282    impl->return_var = NULL;
 283    impl->reg_alloc = 0;
 284    impl->ssa_alloc = 0;
 285    impl->valid_metadata = nir_metadata_none;
 286
 287    /* create start & end blocks */
 288    nir_block *start_block = nir_block_create(shader);
 289    nir_block *end_block = nir_block_create(shader);
 290    start_block->cf_node.parent = &impl->cf_node;
 291    end_block->cf_node.parent = &impl->cf_node;
 292    impl->end_block = end_block;
 293
 294    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 295
 296    start_block->successors[0] = end_block;
 297    _mesa_set_add(end_block->predecessors, start_block);
 298    return impl;
 299 }
 300
 301 nir_function_impl *
 302 nir_function_impl_create(nir_function *function)
 303 {
 304    assert(function->impl == NULL);
 305
 306    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 307
 308    function->impl = impl;
 309    impl->function = function;
 310
 311    impl->num_params = function->num_params;
 312    impl->params = ralloc_array(function->shader,
 313                                nir_variable *, impl->num_params);
 314
 315    for (unsigned i = 0; i < impl->num_params; i++) {
 316       impl->params[i] = rzalloc(function->shader, nir_variable);
 317       impl->params[i]->type = function->params[i].type;
 318       impl->params[i]->data.mode = nir_var_param;
 319       impl->params[i]->data.location = i;
 320    }
 321
 322    if (!glsl_type_is_void(function->return_type)) {
 323       impl->return_var = rzalloc(function->shader, nir_variable);
 324       impl->return_var->type = function->return_type;
 325       impl->return_var->data.mode = nir_var_param;
 326       impl->return_var->data.location = -1;
 327    } else {
 328       impl->return_var = NULL;
 329    }
 330
 331    return impl;
 332 }
 333
 334 nir_block *
 335 nir_block_create(nir_shader *shader)
 336 {
 337    nir_block *block = ralloc(shader, nir_block);
 338
 339    cf_init(&block->cf_node, nir_cf_node_block);
 340
 341    block->successors[0] = block->successors[1] = NULL;
 342    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 343                                           _mesa_key_pointer_equal);
 344    block->imm_dom = NULL;
 345    /* XXX maybe it would be worth it to defer allocation?  This
 346     * way it doesn't get allocated for shader ref's that never run
 347     * nir_calc_dominance?  For example, state-tracker creates an
 348     * initial IR, clones that, runs appropriate lowering pass, passes
 349     * to driver which does common lowering/opt, and then stores ref
 350     * which is later used to do state specific lowering and futher
 351     * opt.  Do any of the references not need dominance metadata?
 352     */
 353    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 354                                           _mesa_key_pointer_equal);
 355
 356    exec_list_make_empty(&block->instr_list);
 357
 358    return block;
 359 }
 360
 361 static inline void
 362 src_init(nir_src *src)
 363 {
 364    src->is_ssa = false;
 365    src->reg.reg = NULL;
 366    src->reg.indirect = NULL;
 367    src->reg.base_offset = 0;
 368 }
 369
 370 nir_if *
 371 nir_if_create(nir_shader *shader)
 372 {
 373    nir_if *if_stmt = ralloc(shader, nir_if);
 374
 375    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 376    src_init(&if_stmt->condition);
 377
 378    nir_block *then = nir_block_create(shader);
 379    exec_list_make_empty(&if_stmt->then_list);
 380    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 381    then->cf_node.parent = &if_stmt->cf_node;
 382
 383    nir_block *else_stmt = nir_block_create(shader);
 384    exec_list_make_empty(&if_stmt->else_list);
 385    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 386    else_stmt->cf_node.parent = &if_stmt->cf_node;
 387
 388    return if_stmt;
 389 }
 390
 391 nir_loop *
 392 nir_loop_create(nir_shader *shader)
 393 {
 394    nir_loop *loop = ralloc(shader, nir_loop);
 395
 396    cf_init(&loop->cf_node, nir_cf_node_loop);
 397
 398    nir_block *body = nir_block_create(shader);
 399    exec_list_make_empty(&loop->body);
 400    exec_list_push_tail(&loop->body, &body->cf_node.node);
 401    body->cf_node.parent = &loop->cf_node;
 402
 403    body->successors[0] = body;
 404    _mesa_set_add(body->predecessors, body);
 405
 406    return loop;
 407 }
 408
 409 static void
 410 instr_init(nir_instr *instr, nir_instr_type type)
 411 {
 412    instr->type = type;
 413    instr->block = NULL;
 414    exec_node_init(&instr->node);
 415 }
 416
 417 static void
 418 dest_init(nir_dest *dest)
 419 {
 420    dest->is_ssa = false;
 421    dest->reg.reg = NULL;
 422    dest->reg.indirect = NULL;
 423    dest->reg.base_offset = 0;
 424 }
 425
 426 static void
 427 alu_dest_init(nir_alu_dest *dest)
 428 {
 429    dest_init(&dest->dest);
 430    dest->saturate = false;
 431    dest->write_mask = 0xf;
 432 }
 433
 434 static void
 435 alu_src_init(nir_alu_src *src)
 436 {
 437    src_init(&src->src);
 438    src->abs = src->negate = false;
 439    src->swizzle[0] = 0;
 440    src->swizzle[1] = 1;
 441    src->swizzle[2] = 2;
 442    src->swizzle[3] = 3;
 443 }
 444
 445 nir_alu_instr *
 446 nir_alu_instr_create(nir_shader *shader, nir_op op)
 447 {
 448    unsigned num_srcs = nir_op_infos[op].num_inputs;
 449    nir_alu_instr *instr =
 450       ralloc_size(shader,
 451                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 452
 453    instr_init(&instr->instr, nir_instr_type_alu);
 454    instr->op = op;
 455    alu_dest_init(&instr->dest);
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       alu_src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_jump_instr *
 463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 464 {
 465    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 466    instr_init(&instr->instr, nir_instr_type_jump);
 467    instr->type = type;
 468    return instr;
 469 }
 470
 471 nir_load_const_instr *
 472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
 473                             unsigned bit_size)
 474 {
 475    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 476    instr_init(&instr->instr, nir_instr_type_load_const);
 477
 478    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 479
 480    return instr;
 481 }
 482
 483 nir_intrinsic_instr *
 484 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 485 {
 486    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 487    nir_intrinsic_instr *instr =
 488       ralloc_size(shader,
 489                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 490
 491    instr_init(&instr->instr, nir_instr_type_intrinsic);
 492    instr->intrinsic = op;
 493
 494    if (nir_intrinsic_infos[op].has_dest)
 495       dest_init(&instr->dest);
 496
 497    for (unsigned i = 0; i < num_srcs; i++)
 498       src_init(&instr->src[i]);
 499
 500    return instr;
 501 }
 502
 503 nir_call_instr *
 504 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 505 {
 506    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 507    instr_init(&instr->instr, nir_instr_type_call);
 508
 509    instr->callee = callee;
 510    instr->num_params = callee->num_params;
 511    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 512    instr->return_deref = NULL;
 513
 514    return instr;
 515 }
 516
 517 nir_tex_instr *
 518 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 519 {
 520    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 521    instr_init(&instr->instr, nir_instr_type_tex);
 522
 523    dest_init(&instr->dest);
 524
 525    instr->num_srcs = num_srcs;
 526    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 527    for (unsigned i = 0; i < num_srcs; i++)
 528       src_init(&instr->src[i].src);
 529
 530    instr->texture_index = 0;
 531    instr->texture_array_size = 0;
 532    instr->texture = NULL;
 533    instr->sampler_index = 0;
 534    instr->sampler = NULL;
 535
 536    return instr;
 537 }
 538
 539 nir_phi_instr *
 540 nir_phi_instr_create(nir_shader *shader)
 541 {
 542    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 543    instr_init(&instr->instr, nir_instr_type_phi);
 544
 545    dest_init(&instr->dest);
 546    exec_list_make_empty(&instr->srcs);
 547    return instr;
 548 }
 549
 550 nir_parallel_copy_instr *
 551 nir_parallel_copy_instr_create(nir_shader *shader)
 552 {
 553    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 554    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 555
 556    exec_list_make_empty(&instr->entries);
 557
 558    return instr;
 559 }
 560
 561 nir_ssa_undef_instr *
 562 nir_ssa_undef_instr_create(nir_shader *shader,
 563                            unsigned num_components,
 564                            unsigned bit_size)
 565 {
 566    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 567    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 568
 569    nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
 570
 571    return instr;
 572 }
 573
 574 nir_deref_var *
 575 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 576 {
 577    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 578    deref->deref.deref_type = nir_deref_type_var;
 579    deref->deref.child = NULL;
 580    deref->deref.type = var->type;
 581    deref->var = var;
 582    return deref;
 583 }
 584
 585 nir_deref_array *
 586 nir_deref_array_create(void *mem_ctx)
 587 {
 588    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 589    deref->deref.deref_type = nir_deref_type_array;
 590    deref->deref.child = NULL;
 591    deref->deref_array_type = nir_deref_array_type_direct;
 592    src_init(&deref->indirect);
 593    deref->base_offset = 0;
 594    return deref;
 595 }
 596
 597 nir_deref_struct *
 598 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 599 {
 600    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 601    deref->deref.deref_type = nir_deref_type_struct;
 602    deref->deref.child = NULL;
 603    deref->index = field_index;
 604    return deref;
 605 }
 606
 607 static nir_deref_var *
 608 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 609 {
 610    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 611    ret->deref.type = deref->deref.type;
 612    if (deref->deref.child)
 613       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 614    return ret;
 615 }
 616
 617 static nir_deref_array *
 618 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 619 {
 620    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 621    ret->base_offset = deref->base_offset;
 622    ret->deref_array_type = deref->deref_array_type;
 623    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 624       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 625    }
 626    ret->deref.type = deref->deref.type;
 627    if (deref->deref.child)
 628       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 629    return ret;
 630 }
 631
 632 static nir_deref_struct *
 633 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 634 {
 635    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 636    ret->deref.type = deref->deref.type;
 637    if (deref->deref.child)
 638       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 639    return ret;
 640 }
 641
 642 nir_deref *
 643 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 644 {
 645    switch (deref->deref_type) {
 646    case nir_deref_type_var:
 647       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 648    case nir_deref_type_array:
 649       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 650    case nir_deref_type_struct:
 651       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 652    default:
 653       unreachable("Invalid dereference type");
 654    }
 655
 656    return NULL;
 657 }
 658
 659 /* Returns a load_const instruction that represents the constant
 660  * initializer for the given deref chain.  The caller is responsible for
 661  * ensuring that there actually is a constant initializer.
 662  */
 663 nir_load_const_instr *
 664 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 665 {
 666    nir_constant *constant = deref->var->constant_initializer;
 667    assert(constant);
 668
 669    const nir_deref *tail = &deref->deref;
 670    unsigned matrix_offset = 0;
 671    while (tail->child) {
 672       switch (tail->child->deref_type) {
 673       case nir_deref_type_array: {
 674          nir_deref_array *arr = nir_deref_as_array(tail->child);
 675          assert(arr->deref_array_type == nir_deref_array_type_direct);
 676          if (glsl_type_is_matrix(tail->type)) {
 677             assert(arr->deref.child == NULL);
 678             matrix_offset = arr->base_offset;
 679          } else {
 680             constant = constant->elements[arr->base_offset];
 681          }
 682          break;
 683       }
 684
 685       case nir_deref_type_struct: {
 686          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 687          break;
 688       }
 689
 690       default:
 691          unreachable("Invalid deref child type");
 692       }
 693
 694       tail = tail->child;
 695    }
 696
 697    nir_load_const_instr *load =
 698       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
 699                                   32);
 700
 701    matrix_offset *= load->def.num_components;
 702    for (unsigned i = 0; i < load->def.num_components; i++) {
 703       switch (glsl_get_base_type(tail->type)) {
 704       case GLSL_TYPE_FLOAT:
 705       case GLSL_TYPE_INT:
 706       case GLSL_TYPE_UINT:
 707          load->value.u32[i] = constant->value.u[matrix_offset + i];
 708          break;
 709       case GLSL_TYPE_BOOL:
 710          load->value.u32[i] = constant->value.b[matrix_offset + i] ?
 711                              NIR_TRUE : NIR_FALSE;
 712          break;
 713       default:
 714          unreachable("Invalid immediate type");
 715       }
 716    }
 717
 718    return load;
 719 }
 720
 721 nir_function_impl *
 722 nir_cf_node_get_function(nir_cf_node *node)
 723 {
 724    while (node->type != nir_cf_node_function) {
 725       node = node->parent;
 726    }
 727
 728    return nir_cf_node_as_function(node);
 729 }
 730
 731 /* Reduces a cursor by trying to convert everything to after and trying to
 732  * go up to block granularity when possible.
 733  */
 734 static nir_cursor
 735 reduce_cursor(nir_cursor cursor)
 736 {
 737    switch (cursor.option) {
 738    case nir_cursor_before_block:
 739       assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
 740              nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
 741       if (exec_list_is_empty(&cursor.block->instr_list)) {
 742          /* Empty block.  After is as good as before. */
 743          cursor.option = nir_cursor_after_block;
 744       }
 745       return cursor;
 746
 747    case nir_cursor_after_block:
 748       return cursor;
 749
 750    case nir_cursor_before_instr: {
 751       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 752       if (prev_instr) {
 753          /* Before this instruction is after the previous */
 754          cursor.instr = prev_instr;
 755          cursor.option = nir_cursor_after_instr;
 756       } else {
 757          /* No previous instruction.  Switch to before block */
 758          cursor.block = cursor.instr->block;
 759          cursor.option = nir_cursor_before_block;
 760       }
 761       return reduce_cursor(cursor);
 762    }
 763
 764    case nir_cursor_after_instr:
 765       if (nir_instr_next(cursor.instr) == NULL) {
 766          /* This is the last instruction, switch to after block */
 767          cursor.option = nir_cursor_after_block;
 768          cursor.block = cursor.instr->block;
 769       }
 770       return cursor;
 771
 772    default:
 773       unreachable("Inavlid cursor option");
 774    }
 775 }
 776
 777 bool
 778 nir_cursors_equal(nir_cursor a, nir_cursor b)
 779 {
 780    /* Reduced cursors should be unique */
 781    a = reduce_cursor(a);
 782    b = reduce_cursor(b);
 783
 784    return a.block == b.block && a.option == b.option;
 785 }
 786
 787 static bool
 788 add_use_cb(nir_src *src, void *state)
 789 {
 790    nir_instr *instr = state;
 791
 792    src->parent_instr = instr;
 793    list_addtail(&src->use_link,
 794                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 795
 796    return true;
 797 }
 798
 799 static bool
 800 add_ssa_def_cb(nir_ssa_def *def, void *state)
 801 {
 802    nir_instr *instr = state;
 803
 804    if (instr->block && def->index == UINT_MAX) {
 805       nir_function_impl *impl =
 806          nir_cf_node_get_function(&instr->block->cf_node);
 807
 808       def->index = impl->ssa_alloc++;
 809    }
 810
 811    return true;
 812 }
 813
 814 static bool
 815 add_reg_def_cb(nir_dest *dest, void *state)
 816 {
 817    nir_instr *instr = state;
 818
 819    if (!dest->is_ssa) {
 820       dest->reg.parent_instr = instr;
 821       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 822    }
 823
 824    return true;
 825 }
 826
 827 static void
 828 add_defs_uses(nir_instr *instr)
 829 {
 830    nir_foreach_src(instr, add_use_cb, instr);
 831    nir_foreach_dest(instr, add_reg_def_cb, instr);
 832    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 833 }
 834
 835 void
 836 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 837 {
 838    switch (cursor.option) {
 839    case nir_cursor_before_block:
 840       /* Only allow inserting jumps into empty blocks. */
 841       if (instr->type == nir_instr_type_jump)
 842          assert(exec_list_is_empty(&cursor.block->instr_list));
 843
 844       instr->block = cursor.block;
 845       add_defs_uses(instr);
 846       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 847       break;
 848    case nir_cursor_after_block: {
 849       /* Inserting instructions after a jump is illegal. */
 850       nir_instr *last = nir_block_last_instr(cursor.block);
 851       assert(last == NULL || last->type != nir_instr_type_jump);
 852       (void) last;
 853
 854       instr->block = cursor.block;
 855       add_defs_uses(instr);
 856       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 857       break;
 858    }
 859    case nir_cursor_before_instr:
 860       assert(instr->type != nir_instr_type_jump);
 861       instr->block = cursor.instr->block;
 862       add_defs_uses(instr);
 863       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 864       break;
 865    case nir_cursor_after_instr:
 866       /* Inserting instructions after a jump is illegal. */
 867       assert(cursor.instr->type != nir_instr_type_jump);
 868
 869       /* Only allow inserting jumps at the end of the block. */
 870       if (instr->type == nir_instr_type_jump)
 871          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 872
 873       instr->block = cursor.instr->block;
 874       add_defs_uses(instr);
 875       exec_node_insert_after(&cursor.instr->node, &instr->node);
 876       break;
 877    }
 878
 879    if (instr->type == nir_instr_type_jump)
 880       nir_handle_add_jump(instr->block);
 881 }
 882
 883 static bool
 884 src_is_valid(const nir_src *src)
 885 {
 886    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 887 }
 888
 889 static bool
 890 remove_use_cb(nir_src *src, void *state)
 891 {
 892    if (src_is_valid(src))
 893       list_del(&src->use_link);
 894
 895    return true;
 896 }
 897
 898 static bool
 899 remove_def_cb(nir_dest *dest, void *state)
 900 {
 901    if (!dest->is_ssa)
 902       list_del(&dest->reg.def_link);
 903
 904    return true;
 905 }
 906
 907 static void
 908 remove_defs_uses(nir_instr *instr)
 909 {
 910    nir_foreach_dest(instr, remove_def_cb, instr);
 911    nir_foreach_src(instr, remove_use_cb, instr);
 912 }
 913
 914 void nir_instr_remove(nir_instr *instr)
 915 {
 916    remove_defs_uses(instr);
 917    exec_node_remove(&instr->node);
 918
 919    if (instr->type == nir_instr_type_jump) {
 920       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 921       nir_handle_remove_jump(instr->block, jump_instr->type);
 922    }
 923 }
 924
 925 /*@}*/
 926
 927 void
 928 nir_index_local_regs(nir_function_impl *impl)
 929 {
 930    unsigned index = 0;
 931    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 932       reg->index = index++;
 933    }
 934    impl->reg_alloc = index;
 935 }
 936
 937 void
 938 nir_index_global_regs(nir_shader *shader)
 939 {
 940    unsigned index = 0;
 941    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 942       reg->index = index++;
 943    }
 944    shader->reg_alloc = index;
 945 }
 946
 947 static bool
 948 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 949 {
 950    return cb(&instr->dest.dest, state);
 951 }
 952
 953 static bool
 954 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 955                      void *state)
 956 {
 957    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 958       return cb(&instr->dest, state);
 959
 960    return true;
 961 }
 962
 963 static bool
 964 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 965                    void *state)
 966 {
 967    return cb(&instr->dest, state);
 968 }
 969
 970 static bool
 971 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 972 {
 973    return cb(&instr->dest, state);
 974 }
 975
 976 static bool
 977 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 978                          nir_foreach_dest_cb cb, void *state)
 979 {
 980    nir_foreach_parallel_copy_entry(instr, entry) {
 981       if (!cb(&entry->dest, state))
 982          return false;
 983    }
 984
 985    return true;
 986 }
 987
 988 bool
 989 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 990 {
 991    switch (instr->type) {
 992    case nir_instr_type_alu:
 993       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 994    case nir_instr_type_intrinsic:
 995       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 996    case nir_instr_type_tex:
 997       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 998    case nir_instr_type_phi:
 999       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1000    case nir_instr_type_parallel_copy:
1001       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1002                                       cb, state);
1003
1004    case nir_instr_type_load_const:
1005    case nir_instr_type_ssa_undef:
1006    case nir_instr_type_call:
1007    case nir_instr_type_jump:
1008       break;
1009
1010    default:
1011       unreachable("Invalid instruction type");
1012       break;
1013    }
1014
1015    return true;
1016 }
1017
1018 struct foreach_ssa_def_state {
1019    nir_foreach_ssa_def_cb cb;
1020    void *client_state;
1021 };
1022
1023 static inline bool
1024 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1025 {
1026    struct foreach_ssa_def_state *state = void_state;
1027
1028    if (dest->is_ssa)
1029       return state->cb(&dest->ssa, state->client_state);
1030    else
1031       return true;
1032 }
1033
1034 bool
1035 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1036 {
1037    switch (instr->type) {
1038    case nir_instr_type_alu:
1039    case nir_instr_type_tex:
1040    case nir_instr_type_intrinsic:
1041    case nir_instr_type_phi:
1042    case nir_instr_type_parallel_copy: {
1043       struct foreach_ssa_def_state foreach_state = {cb, state};
1044       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1045    }
1046
1047    case nir_instr_type_load_const:
1048       return cb(&nir_instr_as_load_const(instr)->def, state);
1049    case nir_instr_type_ssa_undef:
1050       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1051    case nir_instr_type_call:
1052    case nir_instr_type_jump:
1053       return true;
1054    default:
1055       unreachable("Invalid instruction type");
1056    }
1057 }
1058
1059 static bool
1060 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1061 {
1062    if (!cb(src, state))
1063       return false;
1064    if (!src->is_ssa && src->reg.indirect)
1065       return cb(src->reg.indirect, state);
1066    return true;
1067 }
1068
1069 static bool
1070 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1071                       void *state)
1072 {
1073    if (deref->deref_array_type == nir_deref_array_type_indirect)
1074       return visit_src(&deref->indirect, cb, state);
1075    return true;
1076 }
1077
1078 static bool
1079 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1080 {
1081    nir_deref *cur = &deref->deref;
1082    while (cur != NULL) {
1083       if (cur->deref_type == nir_deref_type_array) {
1084          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1085             return false;
1086       }
1087
1088       cur = cur->child;
1089    }
1090
1091    return true;
1092 }
1093
1094 static bool
1095 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1096 {
1097    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1098       if (!visit_src(&instr->src[i].src, cb, state))
1099          return false;
1100
1101    return true;
1102 }
1103
1104 static bool
1105 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1106 {
1107    for (unsigned i = 0; i < instr->num_srcs; i++) {
1108       if (!visit_src(&instr->src[i].src, cb, state))
1109          return false;
1110    }
1111
1112    if (instr->texture != NULL) {
1113       if (!visit_deref_src(instr->texture, cb, state))
1114          return false;
1115    }
1116
1117    if (instr->sampler != NULL) {
1118       if (!visit_deref_src(instr->sampler, cb, state))
1119          return false;
1120    }
1121
1122    return true;
1123 }
1124
1125 static bool
1126 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1127                     void *state)
1128 {
1129    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1130    for (unsigned i = 0; i < num_srcs; i++) {
1131       if (!visit_src(&instr->src[i], cb, state))
1132          return false;
1133    }
1134
1135    unsigned num_vars =
1136       nir_intrinsic_infos[instr->intrinsic].num_variables;
1137    for (unsigned i = 0; i < num_vars; i++) {
1138       if (!visit_deref_src(instr->variables[i], cb, state))
1139          return false;
1140    }
1141
1142    return true;
1143 }
1144
1145 static bool
1146 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1147 {
1148    return true;
1149 }
1150
1151 static bool
1152 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1153                      void *state)
1154 {
1155    return true;
1156 }
1157
1158 static bool
1159 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1160 {
1161    nir_foreach_phi_src(instr, src) {
1162       if (!visit_src(&src->src, cb, state))
1163          return false;
1164    }
1165
1166    return true;
1167 }
1168
1169 static bool
1170 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1171                         nir_foreach_src_cb cb, void *state)
1172 {
1173    nir_foreach_parallel_copy_entry(instr, entry) {
1174       if (!visit_src(&entry->src, cb, state))
1175          return false;
1176    }
1177
1178    return true;
1179 }
1180
1181 typedef struct {
1182    void *state;
1183    nir_foreach_src_cb cb;
1184 } visit_dest_indirect_state;
1185
1186 static bool
1187 visit_dest_indirect(nir_dest *dest, void *_state)
1188 {
1189    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1190
1191    if (!dest->is_ssa && dest->reg.indirect)
1192       return state->cb(dest->reg.indirect, state->state);
1193
1194    return true;
1195 }
1196
1197 bool
1198 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1199 {
1200    switch (instr->type) {
1201    case nir_instr_type_alu:
1202       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1203          return false;
1204       break;
1205    case nir_instr_type_intrinsic:
1206       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1207          return false;
1208       break;
1209    case nir_instr_type_tex:
1210       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1211          return false;
1212       break;
1213    case nir_instr_type_call:
1214       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1215          return false;
1216       break;
1217    case nir_instr_type_load_const:
1218       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1219          return false;
1220       break;
1221    case nir_instr_type_phi:
1222       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1223          return false;
1224       break;
1225    case nir_instr_type_parallel_copy:
1226       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1227                                    cb, state))
1228          return false;
1229       break;
1230    case nir_instr_type_jump:
1231    case nir_instr_type_ssa_undef:
1232       return true;
1233
1234    default:
1235       unreachable("Invalid instruction type");
1236       break;
1237    }
1238
1239    visit_dest_indirect_state dest_state;
1240    dest_state.state = state;
1241    dest_state.cb = cb;
1242    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1243 }
1244
1245 nir_const_value *
1246 nir_src_as_const_value(nir_src src)
1247 {
1248    if (!src.is_ssa)
1249       return NULL;
1250
1251    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1252       return NULL;
1253
1254    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1255
1256    return &load->value;
1257 }
1258
1259 /**
1260  * Returns true if the source is known to be dynamically uniform. Otherwise it
1261  * returns false which means it may or may not be dynamically uniform but it
1262  * can't be determined.
1263  */
1264 bool
1265 nir_src_is_dynamically_uniform(nir_src src)
1266 {
1267    if (!src.is_ssa)
1268       return false;
1269
1270    /* Constants are trivially dynamically uniform */
1271    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1272       return true;
1273
1274    /* As are uniform variables */
1275    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1276       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1277
1278       if (intr->intrinsic == nir_intrinsic_load_uniform)
1279          return true;
1280    }
1281
1282    /* XXX: this could have many more tests, such as when a sampler function is
1283     * called with dynamically uniform arguments.
1284     */
1285    return false;
1286 }
1287
1288 static void
1289 src_remove_all_uses(nir_src *src)
1290 {
1291    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1292       if (!src_is_valid(src))
1293          continue;
1294
1295       list_del(&src->use_link);
1296    }
1297 }
1298
1299 static void
1300 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1301 {
1302    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1303       if (!src_is_valid(src))
1304          continue;
1305
1306       if (parent_instr) {
1307          src->parent_instr = parent_instr;
1308          if (src->is_ssa)
1309             list_addtail(&src->use_link, &src->ssa->uses);
1310          else
1311             list_addtail(&src->use_link, &src->reg.reg->uses);
1312       } else {
1313          assert(parent_if);
1314          src->parent_if = parent_if;
1315          if (src->is_ssa)
1316             list_addtail(&src->use_link, &src->ssa->if_uses);
1317          else
1318             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1319       }
1320    }
1321 }
1322
1323 void
1324 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1325 {
1326    assert(!src_is_valid(src) || src->parent_instr == instr);
1327
1328    src_remove_all_uses(src);
1329    *src = new_src;
1330    src_add_all_uses(src, instr, NULL);
1331 }
1332
1333 void
1334 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1335 {
1336    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1337
1338    src_remove_all_uses(dest);
1339    src_remove_all_uses(src);
1340    *dest = *src;
1341    *src = NIR_SRC_INIT;
1342    src_add_all_uses(dest, dest_instr, NULL);
1343 }
1344
1345 void
1346 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1347 {
1348    nir_src *src = &if_stmt->condition;
1349    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1350
1351    src_remove_all_uses(src);
1352    *src = new_src;
1353    src_add_all_uses(src, NULL, if_stmt);
1354 }
1355
1356 void
1357 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1358 {
1359    if (dest->is_ssa) {
1360       /* We can only overwrite an SSA destination if it has no uses. */
1361       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1362    } else {
1363       list_del(&dest->reg.def_link);
1364       if (dest->reg.indirect)
1365          src_remove_all_uses(dest->reg.indirect);
1366    }
1367
1368    /* We can't re-write with an SSA def */
1369    assert(!new_dest.is_ssa);
1370
1371    nir_dest_copy(dest, &new_dest, instr);
1372
1373    dest->reg.parent_instr = instr;
1374    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1375
1376    if (dest->reg.indirect)
1377       src_add_all_uses(dest->reg.indirect, instr, NULL);
1378 }
1379
1380 /* note: does *not* take ownership of 'name' */
1381 void
1382 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1383                  unsigned num_components,
1384                  unsigned bit_size, const char *name)
1385 {
1386    def->name = ralloc_strdup(instr, name);
1387    def->parent_instr = instr;
1388    list_inithead(&def->uses);
1389    list_inithead(&def->if_uses);
1390    def->num_components = num_components;
1391    def->bit_size = bit_size;
1392
1393    if (instr->block) {
1394       nir_function_impl *impl =
1395          nir_cf_node_get_function(&instr->block->cf_node);
1396
1397       def->index = impl->ssa_alloc++;
1398    } else {
1399       def->index = UINT_MAX;
1400    }
1401 }
1402
1403 /* note: does *not* take ownership of 'name' */
1404 void
1405 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1406                  unsigned num_components, unsigned bit_size,
1407                  const char *name)
1408 {
1409    dest->is_ssa = true;
1410    nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1411 }
1412
1413 void
1414 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1415 {
1416    assert(!new_src.is_ssa || def != new_src.ssa);
1417
1418    nir_foreach_use_safe(def, use_src)
1419       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1420
1421    nir_foreach_if_use_safe(def, use_src)
1422       nir_if_rewrite_condition(use_src->parent_if, new_src);
1423 }
1424
1425 static bool
1426 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1427 {
1428    assert(start->block == end->block);
1429
1430    if (between->block != start->block)
1431       return false;
1432
1433    /* Search backwards looking for "between" */
1434    while (start != end) {
1435       if (between == end)
1436          return true;
1437
1438       end = nir_instr_prev(end);
1439       assert(end);
1440    }
1441
1442    return false;
1443 }
1444
1445 /* Replaces all uses of the given SSA def with the given source but only if
1446  * the use comes after the after_me instruction.  This can be useful if you
1447  * are emitting code to fix up the result of some instruction: you can freely
1448  * use the result in that code and then call rewrite_uses_after and pass the
1449  * last fixup instruction as after_me and it will replace all of the uses you
1450  * want without touching the fixup code.
1451  *
1452  * This function assumes that after_me is in the same block as
1453  * def->parent_instr and that after_me comes after def->parent_instr.
1454  */
1455 void
1456 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1457                                nir_instr *after_me)
1458 {
1459    assert(!new_src.is_ssa || def != new_src.ssa);
1460
1461    nir_foreach_use_safe(def, use_src) {
1462       assert(use_src->parent_instr != def->parent_instr);
1463       /* Since def already dominates all of its uses, the only way a use can
1464        * not be dominated by after_me is if it is between def and after_me in
1465        * the instruction list.
1466        */
1467       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1468          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1469    }
1470
1471    nir_foreach_if_use_safe(def, use_src)
1472       nir_if_rewrite_condition(use_src->parent_if, new_src);
1473 }
1474
1475 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1476                             bool reverse, void *state);
1477
1478 static inline bool
1479 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1480 {
1481    if (reverse) {
1482       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1483                                       &if_stmt->else_list) {
1484          if (!foreach_cf_node(node, cb, reverse, state))
1485             return false;
1486       }
1487
1488       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1489                                       &if_stmt->then_list) {
1490          if (!foreach_cf_node(node, cb, reverse, state))
1491             return false;
1492       }
1493    } else {
1494       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1495          if (!foreach_cf_node(node, cb, reverse, state))
1496             return false;
1497       }
1498
1499       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1500          if (!foreach_cf_node(node, cb, reverse, state))
1501             return false;
1502       }
1503    }
1504
1505    return true;
1506 }
1507
1508 static inline bool
1509 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1510 {
1511    if (reverse) {
1512       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1513          if (!foreach_cf_node(node, cb, reverse, state))
1514             return false;
1515       }
1516    } else {
1517       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1518          if (!foreach_cf_node(node, cb, reverse, state))
1519             return false;
1520       }
1521    }
1522
1523    return true;
1524 }
1525
1526 static bool
1527 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1528                 bool reverse, void *state)
1529 {
1530    switch (node->type) {
1531    case nir_cf_node_block:
1532       return cb(nir_cf_node_as_block(node), state);
1533    case nir_cf_node_if:
1534       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1535    case nir_cf_node_loop:
1536       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1537       break;
1538
1539    default:
1540       unreachable("Invalid CFG node type");
1541       break;
1542    }
1543
1544    return false;
1545 }
1546
1547 bool
1548 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1549                              void *state)
1550 {
1551    return foreach_cf_node(node, cb, false, state);
1552 }
1553
1554 bool
1555 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1556 {
1557    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1558       if (!foreach_cf_node(node, cb, false, state))
1559          return false;
1560    }
1561
1562    return cb(impl->end_block, state);
1563 }
1564
1565 bool
1566 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1567                           void *state)
1568 {
1569    if (!cb(impl->end_block, state))
1570       return false;
1571
1572    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1573       if (!foreach_cf_node(node, cb, true, state))
1574          return false;
1575    }
1576
1577    return true;
1578 }
1579
1580 nir_if *
1581 nir_block_get_following_if(nir_block *block)
1582 {
1583    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1584       return NULL;
1585
1586    if (nir_cf_node_is_last(&block->cf_node))
1587       return NULL;
1588
1589    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1590
1591    if (next_node->type != nir_cf_node_if)
1592       return NULL;
1593
1594    return nir_cf_node_as_if(next_node);
1595 }
1596
1597 nir_loop *
1598 nir_block_get_following_loop(nir_block *block)
1599 {
1600    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1601       return NULL;
1602
1603    if (nir_cf_node_is_last(&block->cf_node))
1604       return NULL;
1605
1606    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1607
1608    if (next_node->type != nir_cf_node_loop)
1609       return NULL;
1610
1611    return nir_cf_node_as_loop(next_node);
1612 }
1613 static bool
1614 index_block(nir_block *block, void *state)
1615 {
1616    unsigned *index = state;
1617    block->index = (*index)++;
1618    return true;
1619 }
1620
1621 void
1622 nir_index_blocks(nir_function_impl *impl)
1623 {
1624    unsigned index = 0;
1625
1626    if (impl->valid_metadata & nir_metadata_block_index)
1627       return;
1628
1629    nir_foreach_block(impl, index_block, &index);
1630
1631    impl->num_blocks = index;
1632 }
1633
1634 static bool
1635 index_ssa_def_cb(nir_ssa_def *def, void *state)
1636 {
1637    unsigned *index = (unsigned *) state;
1638    def->index = (*index)++;
1639
1640    return true;
1641 }
1642
1643 static bool
1644 index_ssa_block(nir_block *block, void *state)
1645 {
1646    nir_foreach_instr(block, instr)
1647       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1648
1649    return true;
1650 }
1651
1652 /**
1653  * The indices are applied top-to-bottom which has the very nice property
1654  * that, if A dominates B, then A->index <= B->index.
1655  */
1656 void
1657 nir_index_ssa_defs(nir_function_impl *impl)
1658 {
1659    unsigned index = 0;
1660    nir_foreach_block(impl, index_ssa_block, &index);
1661    impl->ssa_alloc = index;
1662 }
1663
1664 static bool
1665 index_instrs_block(nir_block *block, void *state)
1666 {
1667    unsigned *index = state;
1668    nir_foreach_instr(block, instr)
1669       instr->index = (*index)++;
1670
1671    return true;
1672 }
1673
1674 /**
1675  * The indices are applied top-to-bottom which has the very nice property
1676  * that, if A dominates B, then A->index <= B->index.
1677  */
1678 unsigned
1679 nir_index_instrs(nir_function_impl *impl)
1680 {
1681    unsigned index = 0;
1682    nir_foreach_block(impl, index_instrs_block, &index);
1683    return index;
1684 }
1685
1686 nir_intrinsic_op
1687 nir_intrinsic_from_system_value(gl_system_value val)
1688 {
1689    switch (val) {
1690    case SYSTEM_VALUE_VERTEX_ID:
1691       return nir_intrinsic_load_vertex_id;
1692    case SYSTEM_VALUE_INSTANCE_ID:
1693       return nir_intrinsic_load_instance_id;
1694    case SYSTEM_VALUE_DRAW_ID:
1695       return nir_intrinsic_load_draw_id;
1696    case SYSTEM_VALUE_BASE_INSTANCE:
1697       return nir_intrinsic_load_base_instance;
1698    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1699       return nir_intrinsic_load_vertex_id_zero_base;
1700    case SYSTEM_VALUE_BASE_VERTEX:
1701       return nir_intrinsic_load_base_vertex;
1702    case SYSTEM_VALUE_INVOCATION_ID:
1703       return nir_intrinsic_load_invocation_id;
1704    case SYSTEM_VALUE_FRONT_FACE:
1705       return nir_intrinsic_load_front_face;
1706    case SYSTEM_VALUE_SAMPLE_ID:
1707       return nir_intrinsic_load_sample_id;
1708    case SYSTEM_VALUE_SAMPLE_POS:
1709       return nir_intrinsic_load_sample_pos;
1710    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1711       return nir_intrinsic_load_sample_mask_in;
1712    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1713       return nir_intrinsic_load_local_invocation_id;
1714    case SYSTEM_VALUE_WORK_GROUP_ID:
1715       return nir_intrinsic_load_work_group_id;
1716    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1717       return nir_intrinsic_load_num_work_groups;
1718    case SYSTEM_VALUE_PRIMITIVE_ID:
1719       return nir_intrinsic_load_primitive_id;
1720    case SYSTEM_VALUE_TESS_COORD:
1721       return nir_intrinsic_load_tess_coord;
1722    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1723       return nir_intrinsic_load_tess_level_outer;
1724    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1725       return nir_intrinsic_load_tess_level_inner;
1726    case SYSTEM_VALUE_VERTICES_IN:
1727       return nir_intrinsic_load_patch_vertices_in;
1728    case SYSTEM_VALUE_HELPER_INVOCATION:
1729       return nir_intrinsic_load_helper_invocation;
1730    default:
1731       unreachable("system value does not directly correspond to intrinsic");
1732    }
1733 }
1734
1735 gl_system_value
1736 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1737 {
1738    switch (intrin) {
1739    case nir_intrinsic_load_vertex_id:
1740       return SYSTEM_VALUE_VERTEX_ID;
1741    case nir_intrinsic_load_instance_id:
1742       return SYSTEM_VALUE_INSTANCE_ID;
1743    case nir_intrinsic_load_draw_id:
1744       return SYSTEM_VALUE_DRAW_ID;
1745    case nir_intrinsic_load_base_instance:
1746       return SYSTEM_VALUE_BASE_INSTANCE;
1747    case nir_intrinsic_load_vertex_id_zero_base:
1748       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1749    case nir_intrinsic_load_base_vertex:
1750       return SYSTEM_VALUE_BASE_VERTEX;
1751    case nir_intrinsic_load_invocation_id:
1752       return SYSTEM_VALUE_INVOCATION_ID;
1753    case nir_intrinsic_load_front_face:
1754       return SYSTEM_VALUE_FRONT_FACE;
1755    case nir_intrinsic_load_sample_id:
1756       return SYSTEM_VALUE_SAMPLE_ID;
1757    case nir_intrinsic_load_sample_pos:
1758       return SYSTEM_VALUE_SAMPLE_POS;
1759    case nir_intrinsic_load_sample_mask_in:
1760       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1761    case nir_intrinsic_load_local_invocation_id:
1762       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1763    case nir_intrinsic_load_num_work_groups:
1764       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1765    case nir_intrinsic_load_work_group_id:
1766       return SYSTEM_VALUE_WORK_GROUP_ID;
1767    case nir_intrinsic_load_primitive_id:
1768       return SYSTEM_VALUE_PRIMITIVE_ID;
1769    case nir_intrinsic_load_tess_coord:
1770       return SYSTEM_VALUE_TESS_COORD;
1771    case nir_intrinsic_load_tess_level_outer:
1772       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1773    case nir_intrinsic_load_tess_level_inner:
1774       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1775    case nir_intrinsic_load_patch_vertices_in:
1776       return SYSTEM_VALUE_VERTICES_IN;
1777    case nir_intrinsic_load_helper_invocation:
1778       return SYSTEM_VALUE_HELPER_INVOCATION;
1779    default:
1780       unreachable("intrinsic doesn't produce a system value");
1781    }
1782 }