nir: Make lowering gl_LocalInvocationIndex optional
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options)
36 {
37 nir_shader *shader = ralloc(mem_ctx, nir_shader);
38
39 exec_list_make_empty(&shader->uniforms);
40 exec_list_make_empty(&shader->inputs);
41 exec_list_make_empty(&shader->outputs);
42 exec_list_make_empty(&shader->shared);
43
44 shader->options = options;
45 memset(&shader->info, 0, sizeof(shader->info));
46
47 exec_list_make_empty(&shader->functions);
48 exec_list_make_empty(&shader->registers);
49 exec_list_make_empty(&shader->globals);
50 exec_list_make_empty(&shader->system_values);
51 shader->reg_alloc = 0;
52
53 shader->num_inputs = 0;
54 shader->num_outputs = 0;
55 shader->num_uniforms = 0;
56 shader->num_shared = 0;
57
58 shader->stage = stage;
59
60 return shader;
61 }
62
63 static nir_register *
64 reg_create(void *mem_ctx, struct exec_list *list)
65 {
66 nir_register *reg = ralloc(mem_ctx, nir_register);
67
68 list_inithead(&reg->uses);
69 list_inithead(&reg->defs);
70 list_inithead(&reg->if_uses);
71
72 reg->num_components = 0;
73 reg->bit_size = 32;
74 reg->num_array_elems = 0;
75 reg->is_packed = false;
76 reg->name = NULL;
77
78 exec_list_push_tail(list, &reg->node);
79
80 return reg;
81 }
82
83 nir_register *
84 nir_global_reg_create(nir_shader *shader)
85 {
86 nir_register *reg = reg_create(shader, &shader->registers);
87 reg->index = shader->reg_alloc++;
88 reg->is_global = true;
89
90 return reg;
91 }
92
93 nir_register *
94 nir_local_reg_create(nir_function_impl *impl)
95 {
96 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
97 reg->index = impl->reg_alloc++;
98 reg->is_global = false;
99
100 return reg;
101 }
102
103 void
104 nir_reg_remove(nir_register *reg)
105 {
106 exec_node_remove(&reg->node);
107 }
108
109 void
110 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
111 {
112 switch (var->data.mode) {
113 case nir_var_all:
114 assert(!"invalid mode");
115 break;
116
117 case nir_var_local:
118 assert(!"nir_shader_add_variable cannot be used for local variables");
119 break;
120
121 case nir_var_param:
122 assert(!"nir_shader_add_variable cannot be used for function parameters");
123 break;
124
125 case nir_var_global:
126 exec_list_push_tail(&shader->globals, &var->node);
127 break;
128
129 case nir_var_shader_in:
130 exec_list_push_tail(&shader->inputs, &var->node);
131 break;
132
133 case nir_var_shader_out:
134 exec_list_push_tail(&shader->outputs, &var->node);
135 break;
136
137 case nir_var_uniform:
138 case nir_var_shader_storage:
139 exec_list_push_tail(&shader->uniforms, &var->node);
140 break;
141
142 case nir_var_shared:
143 assert(shader->stage == MESA_SHADER_COMPUTE);
144 exec_list_push_tail(&shader->shared, &var->node);
145 break;
146
147 case nir_var_system_value:
148 exec_list_push_tail(&shader->system_values, &var->node);
149 break;
150 }
151 }
152
153 nir_variable *
154 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
155 const struct glsl_type *type, const char *name)
156 {
157 nir_variable *var = rzalloc(shader, nir_variable);
158 var->name = ralloc_strdup(var, name);
159 var->type = type;
160 var->data.mode = mode;
161
162 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
163 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
164 var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
165
166 if (mode == nir_var_shader_in || mode == nir_var_uniform)
167 var->data.read_only = true;
168
169 nir_shader_add_variable(shader, var);
170
171 return var;
172 }
173
174 nir_variable *
175 nir_local_variable_create(nir_function_impl *impl,
176 const struct glsl_type *type, const char *name)
177 {
178 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
179 var->name = ralloc_strdup(var, name);
180 var->type = type;
181 var->data.mode = nir_var_local;
182
183 nir_function_impl_add_variable(impl, var);
184
185 return var;
186 }
187
188 nir_function *
189 nir_function_create(nir_shader *shader, const char *name)
190 {
191 nir_function *func = ralloc(shader, nir_function);
192
193 exec_list_push_tail(&shader->functions, &func->node);
194
195 func->name = ralloc_strdup(func, name);
196 func->shader = shader;
197 func->num_params = 0;
198 func->params = NULL;
199 func->return_type = glsl_void_type();
200 func->impl = NULL;
201
202 return func;
203 }
204
205 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
206 {
207 dest->is_ssa = src->is_ssa;
208 if (src->is_ssa) {
209 dest->ssa = src->ssa;
210 } else {
211 dest->reg.base_offset = src->reg.base_offset;
212 dest->reg.reg = src->reg.reg;
213 if (src->reg.indirect) {
214 dest->reg.indirect = ralloc(mem_ctx, nir_src);
215 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
216 } else {
217 dest->reg.indirect = NULL;
218 }
219 }
220 }
221
222 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
223 {
224 /* Copying an SSA definition makes no sense whatsoever. */
225 assert(!src->is_ssa);
226
227 dest->is_ssa = false;
228
229 dest->reg.base_offset = src->reg.base_offset;
230 dest->reg.reg = src->reg.reg;
231 if (src->reg.indirect) {
232 dest->reg.indirect = ralloc(instr, nir_src);
233 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
234 } else {
235 dest->reg.indirect = NULL;
236 }
237 }
238
239 void
240 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
241 nir_alu_instr *instr)
242 {
243 nir_src_copy(&dest->src, &src->src, &instr->instr);
244 dest->abs = src->abs;
245 dest->negate = src->negate;
246 for (unsigned i = 0; i < 4; i++)
247 dest->swizzle[i] = src->swizzle[i];
248 }
249
250 void
251 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
252 nir_alu_instr *instr)
253 {
254 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
255 dest->write_mask = src->write_mask;
256 dest->saturate = src->saturate;
257 }
258
259
260 static void
261 cf_init(nir_cf_node *node, nir_cf_node_type type)
262 {
263 exec_node_init(&node->node);
264 node->parent = NULL;
265 node->type = type;
266 }
267
268 nir_function_impl *
269 nir_function_impl_create_bare(nir_shader *shader)
270 {
271 nir_function_impl *impl = ralloc(shader, nir_function_impl);
272
273 impl->function = NULL;
274
275 cf_init(&impl->cf_node, nir_cf_node_function);
276
277 exec_list_make_empty(&impl->body);
278 exec_list_make_empty(&impl->registers);
279 exec_list_make_empty(&impl->locals);
280 impl->num_params = 0;
281 impl->params = NULL;
282 impl->return_var = NULL;
283 impl->reg_alloc = 0;
284 impl->ssa_alloc = 0;
285 impl->valid_metadata = nir_metadata_none;
286
287 /* create start & end blocks */
288 nir_block *start_block = nir_block_create(shader);
289 nir_block *end_block = nir_block_create(shader);
290 start_block->cf_node.parent = &impl->cf_node;
291 end_block->cf_node.parent = &impl->cf_node;
292 impl->end_block = end_block;
293
294 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
295
296 start_block->successors[0] = end_block;
297 _mesa_set_add(end_block->predecessors, start_block);
298 return impl;
299 }
300
301 nir_function_impl *
302 nir_function_impl_create(nir_function *function)
303 {
304 assert(function->impl == NULL);
305
306 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
307
308 function->impl = impl;
309 impl->function = function;
310
311 impl->num_params = function->num_params;
312 impl->params = ralloc_array(function->shader,
313 nir_variable *, impl->num_params);
314
315 for (unsigned i = 0; i < impl->num_params; i++) {
316 impl->params[i] = rzalloc(function->shader, nir_variable);
317 impl->params[i]->type = function->params[i].type;
318 impl->params[i]->data.mode = nir_var_param;
319 impl->params[i]->data.location = i;
320 }
321
322 if (!glsl_type_is_void(function->return_type)) {
323 impl->return_var = rzalloc(function->shader, nir_variable);
324 impl->return_var->type = function->return_type;
325 impl->return_var->data.mode = nir_var_param;
326 impl->return_var->data.location = -1;
327 } else {
328 impl->return_var = NULL;
329 }
330
331 return impl;
332 }
333
334 nir_block *
335 nir_block_create(nir_shader *shader)
336 {
337 nir_block *block = ralloc(shader, nir_block);
338
339 cf_init(&block->cf_node, nir_cf_node_block);
340
341 block->successors[0] = block->successors[1] = NULL;
342 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
343 _mesa_key_pointer_equal);
344 block->imm_dom = NULL;
345 /* XXX maybe it would be worth it to defer allocation? This
346 * way it doesn't get allocated for shader ref's that never run
347 * nir_calc_dominance? For example, state-tracker creates an
348 * initial IR, clones that, runs appropriate lowering pass, passes
349 * to driver which does common lowering/opt, and then stores ref
350 * which is later used to do state specific lowering and futher
351 * opt. Do any of the references not need dominance metadata?
352 */
353 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
354 _mesa_key_pointer_equal);
355
356 exec_list_make_empty(&block->instr_list);
357
358 return block;
359 }
360
361 static inline void
362 src_init(nir_src *src)
363 {
364 src->is_ssa = false;
365 src->reg.reg = NULL;
366 src->reg.indirect = NULL;
367 src->reg.base_offset = 0;
368 }
369
370 nir_if *
371 nir_if_create(nir_shader *shader)
372 {
373 nir_if *if_stmt = ralloc(shader, nir_if);
374
375 cf_init(&if_stmt->cf_node, nir_cf_node_if);
376 src_init(&if_stmt->condition);
377
378 nir_block *then = nir_block_create(shader);
379 exec_list_make_empty(&if_stmt->then_list);
380 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
381 then->cf_node.parent = &if_stmt->cf_node;
382
383 nir_block *else_stmt = nir_block_create(shader);
384 exec_list_make_empty(&if_stmt->else_list);
385 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
386 else_stmt->cf_node.parent = &if_stmt->cf_node;
387
388 return if_stmt;
389 }
390
391 nir_loop *
392 nir_loop_create(nir_shader *shader)
393 {
394 nir_loop *loop = ralloc(shader, nir_loop);
395
396 cf_init(&loop->cf_node, nir_cf_node_loop);
397
398 nir_block *body = nir_block_create(shader);
399 exec_list_make_empty(&loop->body);
400 exec_list_push_tail(&loop->body, &body->cf_node.node);
401 body->cf_node.parent = &loop->cf_node;
402
403 body->successors[0] = body;
404 _mesa_set_add(body->predecessors, body);
405
406 return loop;
407 }
408
409 static void
410 instr_init(nir_instr *instr, nir_instr_type type)
411 {
412 instr->type = type;
413 instr->block = NULL;
414 exec_node_init(&instr->node);
415 }
416
417 static void
418 dest_init(nir_dest *dest)
419 {
420 dest->is_ssa = false;
421 dest->reg.reg = NULL;
422 dest->reg.indirect = NULL;
423 dest->reg.base_offset = 0;
424 }
425
426 static void
427 alu_dest_init(nir_alu_dest *dest)
428 {
429 dest_init(&dest->dest);
430 dest->saturate = false;
431 dest->write_mask = 0xf;
432 }
433
434 static void
435 alu_src_init(nir_alu_src *src)
436 {
437 src_init(&src->src);
438 src->abs = src->negate = false;
439 src->swizzle[0] = 0;
440 src->swizzle[1] = 1;
441 src->swizzle[2] = 2;
442 src->swizzle[3] = 3;
443 }
444
445 nir_alu_instr *
446 nir_alu_instr_create(nir_shader *shader, nir_op op)
447 {
448 unsigned num_srcs = nir_op_infos[op].num_inputs;
449 nir_alu_instr *instr =
450 ralloc_size(shader,
451 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
452
453 instr_init(&instr->instr, nir_instr_type_alu);
454 instr->op = op;
455 alu_dest_init(&instr->dest);
456 for (unsigned i = 0; i < num_srcs; i++)
457 alu_src_init(&instr->src[i]);
458
459 return instr;
460 }
461
462 nir_jump_instr *
463 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
464 {
465 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
466 instr_init(&instr->instr, nir_instr_type_jump);
467 instr->type = type;
468 return instr;
469 }
470
471 nir_load_const_instr *
472 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
473 unsigned bit_size)
474 {
475 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
476 instr_init(&instr->instr, nir_instr_type_load_const);
477
478 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
479
480 return instr;
481 }
482
483 nir_intrinsic_instr *
484 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
485 {
486 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
487 nir_intrinsic_instr *instr =
488 ralloc_size(shader,
489 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
490
491 instr_init(&instr->instr, nir_instr_type_intrinsic);
492 instr->intrinsic = op;
493
494 if (nir_intrinsic_infos[op].has_dest)
495 dest_init(&instr->dest);
496
497 for (unsigned i = 0; i < num_srcs; i++)
498 src_init(&instr->src[i]);
499
500 return instr;
501 }
502
503 nir_call_instr *
504 nir_call_instr_create(nir_shader *shader, nir_function *callee)
505 {
506 nir_call_instr *instr = ralloc(shader, nir_call_instr);
507 instr_init(&instr->instr, nir_instr_type_call);
508
509 instr->callee = callee;
510 instr->num_params = callee->num_params;
511 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
512 instr->return_deref = NULL;
513
514 return instr;
515 }
516
517 nir_tex_instr *
518 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
519 {
520 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
521 instr_init(&instr->instr, nir_instr_type_tex);
522
523 dest_init(&instr->dest);
524
525 instr->num_srcs = num_srcs;
526 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
527 for (unsigned i = 0; i < num_srcs; i++)
528 src_init(&instr->src[i].src);
529
530 instr->texture_index = 0;
531 instr->texture_array_size = 0;
532 instr->texture = NULL;
533 instr->sampler_index = 0;
534 instr->sampler = NULL;
535
536 return instr;
537 }
538
539 nir_phi_instr *
540 nir_phi_instr_create(nir_shader *shader)
541 {
542 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
543 instr_init(&instr->instr, nir_instr_type_phi);
544
545 dest_init(&instr->dest);
546 exec_list_make_empty(&instr->srcs);
547 return instr;
548 }
549
550 nir_parallel_copy_instr *
551 nir_parallel_copy_instr_create(nir_shader *shader)
552 {
553 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
554 instr_init(&instr->instr, nir_instr_type_parallel_copy);
555
556 exec_list_make_empty(&instr->entries);
557
558 return instr;
559 }
560
561 nir_ssa_undef_instr *
562 nir_ssa_undef_instr_create(nir_shader *shader,
563 unsigned num_components,
564 unsigned bit_size)
565 {
566 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
567 instr_init(&instr->instr, nir_instr_type_ssa_undef);
568
569 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
570
571 return instr;
572 }
573
574 nir_deref_var *
575 nir_deref_var_create(void *mem_ctx, nir_variable *var)
576 {
577 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
578 deref->deref.deref_type = nir_deref_type_var;
579 deref->deref.child = NULL;
580 deref->deref.type = var->type;
581 deref->var = var;
582 return deref;
583 }
584
585 nir_deref_array *
586 nir_deref_array_create(void *mem_ctx)
587 {
588 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
589 deref->deref.deref_type = nir_deref_type_array;
590 deref->deref.child = NULL;
591 deref->deref_array_type = nir_deref_array_type_direct;
592 src_init(&deref->indirect);
593 deref->base_offset = 0;
594 return deref;
595 }
596
597 nir_deref_struct *
598 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
599 {
600 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
601 deref->deref.deref_type = nir_deref_type_struct;
602 deref->deref.child = NULL;
603 deref->index = field_index;
604 return deref;
605 }
606
607 static nir_deref_var *
608 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
609 {
610 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
611 ret->deref.type = deref->deref.type;
612 if (deref->deref.child)
613 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
614 return ret;
615 }
616
617 static nir_deref_array *
618 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
619 {
620 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
621 ret->base_offset = deref->base_offset;
622 ret->deref_array_type = deref->deref_array_type;
623 if (deref->deref_array_type == nir_deref_array_type_indirect) {
624 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
625 }
626 ret->deref.type = deref->deref.type;
627 if (deref->deref.child)
628 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
629 return ret;
630 }
631
632 static nir_deref_struct *
633 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
634 {
635 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
636 ret->deref.type = deref->deref.type;
637 if (deref->deref.child)
638 ret->deref.child = nir_copy_deref(ret, deref->deref.child);
639 return ret;
640 }
641
642 nir_deref *
643 nir_copy_deref(void *mem_ctx, nir_deref *deref)
644 {
645 if (deref == NULL)
646 return NULL;
647
648 switch (deref->deref_type) {
649 case nir_deref_type_var:
650 return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
651 case nir_deref_type_array:
652 return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
653 case nir_deref_type_struct:
654 return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
655 default:
656 unreachable("Invalid dereference type");
657 }
658
659 return NULL;
660 }
661
662 /* Returns a load_const instruction that represents the constant
663 * initializer for the given deref chain. The caller is responsible for
664 * ensuring that there actually is a constant initializer.
665 */
666 nir_load_const_instr *
667 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
668 {
669 nir_constant *constant = deref->var->constant_initializer;
670 assert(constant);
671
672 const nir_deref *tail = &deref->deref;
673 unsigned matrix_offset = 0;
674 while (tail->child) {
675 switch (tail->child->deref_type) {
676 case nir_deref_type_array: {
677 nir_deref_array *arr = nir_deref_as_array(tail->child);
678 assert(arr->deref_array_type == nir_deref_array_type_direct);
679 if (glsl_type_is_matrix(tail->type)) {
680 assert(arr->deref.child == NULL);
681 matrix_offset = arr->base_offset;
682 } else {
683 constant = constant->elements[arr->base_offset];
684 }
685 break;
686 }
687
688 case nir_deref_type_struct: {
689 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
690 break;
691 }
692
693 default:
694 unreachable("Invalid deref child type");
695 }
696
697 tail = tail->child;
698 }
699
700 unsigned bit_size = glsl_get_bit_size(tail->type);
701 nir_load_const_instr *load =
702 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
703 bit_size);
704
705 matrix_offset *= load->def.num_components;
706 for (unsigned i = 0; i < load->def.num_components; i++) {
707 switch (glsl_get_base_type(tail->type)) {
708 case GLSL_TYPE_FLOAT:
709 case GLSL_TYPE_INT:
710 case GLSL_TYPE_UINT:
711 load->value.u32[i] = constant->value.u[matrix_offset + i];
712 break;
713 case GLSL_TYPE_DOUBLE:
714 load->value.f64[i] = constant->value.d[matrix_offset + i];
715 break;
716 case GLSL_TYPE_BOOL:
717 load->value.u32[i] = constant->value.b[matrix_offset + i] ?
718 NIR_TRUE : NIR_FALSE;
719 break;
720 default:
721 unreachable("Invalid immediate type");
722 }
723 }
724
725 return load;
726 }
727
728 nir_function_impl *
729 nir_cf_node_get_function(nir_cf_node *node)
730 {
731 while (node->type != nir_cf_node_function) {
732 node = node->parent;
733 }
734
735 return nir_cf_node_as_function(node);
736 }
737
738 /* Reduces a cursor by trying to convert everything to after and trying to
739 * go up to block granularity when possible.
740 */
741 static nir_cursor
742 reduce_cursor(nir_cursor cursor)
743 {
744 switch (cursor.option) {
745 case nir_cursor_before_block:
746 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
747 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
748 if (exec_list_is_empty(&cursor.block->instr_list)) {
749 /* Empty block. After is as good as before. */
750 cursor.option = nir_cursor_after_block;
751 }
752 return cursor;
753
754 case nir_cursor_after_block:
755 return cursor;
756
757 case nir_cursor_before_instr: {
758 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
759 if (prev_instr) {
760 /* Before this instruction is after the previous */
761 cursor.instr = prev_instr;
762 cursor.option = nir_cursor_after_instr;
763 } else {
764 /* No previous instruction. Switch to before block */
765 cursor.block = cursor.instr->block;
766 cursor.option = nir_cursor_before_block;
767 }
768 return reduce_cursor(cursor);
769 }
770
771 case nir_cursor_after_instr:
772 if (nir_instr_next(cursor.instr) == NULL) {
773 /* This is the last instruction, switch to after block */
774 cursor.option = nir_cursor_after_block;
775 cursor.block = cursor.instr->block;
776 }
777 return cursor;
778
779 default:
780 unreachable("Inavlid cursor option");
781 }
782 }
783
784 bool
785 nir_cursors_equal(nir_cursor a, nir_cursor b)
786 {
787 /* Reduced cursors should be unique */
788 a = reduce_cursor(a);
789 b = reduce_cursor(b);
790
791 return a.block == b.block && a.option == b.option;
792 }
793
794 static bool
795 add_use_cb(nir_src *src, void *state)
796 {
797 nir_instr *instr = state;
798
799 src->parent_instr = instr;
800 list_addtail(&src->use_link,
801 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
802
803 return true;
804 }
805
806 static bool
807 add_ssa_def_cb(nir_ssa_def *def, void *state)
808 {
809 nir_instr *instr = state;
810
811 if (instr->block && def->index == UINT_MAX) {
812 nir_function_impl *impl =
813 nir_cf_node_get_function(&instr->block->cf_node);
814
815 def->index = impl->ssa_alloc++;
816 }
817
818 return true;
819 }
820
821 static bool
822 add_reg_def_cb(nir_dest *dest, void *state)
823 {
824 nir_instr *instr = state;
825
826 if (!dest->is_ssa) {
827 dest->reg.parent_instr = instr;
828 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
829 }
830
831 return true;
832 }
833
834 static void
835 add_defs_uses(nir_instr *instr)
836 {
837 nir_foreach_src(instr, add_use_cb, instr);
838 nir_foreach_dest(instr, add_reg_def_cb, instr);
839 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
840 }
841
842 void
843 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
844 {
845 switch (cursor.option) {
846 case nir_cursor_before_block:
847 /* Only allow inserting jumps into empty blocks. */
848 if (instr->type == nir_instr_type_jump)
849 assert(exec_list_is_empty(&cursor.block->instr_list));
850
851 instr->block = cursor.block;
852 add_defs_uses(instr);
853 exec_list_push_head(&cursor.block->instr_list, &instr->node);
854 break;
855 case nir_cursor_after_block: {
856 /* Inserting instructions after a jump is illegal. */
857 nir_instr *last = nir_block_last_instr(cursor.block);
858 assert(last == NULL || last->type != nir_instr_type_jump);
859 (void) last;
860
861 instr->block = cursor.block;
862 add_defs_uses(instr);
863 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
864 break;
865 }
866 case nir_cursor_before_instr:
867 assert(instr->type != nir_instr_type_jump);
868 instr->block = cursor.instr->block;
869 add_defs_uses(instr);
870 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
871 break;
872 case nir_cursor_after_instr:
873 /* Inserting instructions after a jump is illegal. */
874 assert(cursor.instr->type != nir_instr_type_jump);
875
876 /* Only allow inserting jumps at the end of the block. */
877 if (instr->type == nir_instr_type_jump)
878 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
879
880 instr->block = cursor.instr->block;
881 add_defs_uses(instr);
882 exec_node_insert_after(&cursor.instr->node, &instr->node);
883 break;
884 }
885
886 if (instr->type == nir_instr_type_jump)
887 nir_handle_add_jump(instr->block);
888 }
889
890 static bool
891 src_is_valid(const nir_src *src)
892 {
893 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
894 }
895
896 static bool
897 remove_use_cb(nir_src *src, void *state)
898 {
899 (void) state;
900
901 if (src_is_valid(src))
902 list_del(&src->use_link);
903
904 return true;
905 }
906
907 static bool
908 remove_def_cb(nir_dest *dest, void *state)
909 {
910 (void) state;
911
912 if (!dest->is_ssa)
913 list_del(&dest->reg.def_link);
914
915 return true;
916 }
917
918 static void
919 remove_defs_uses(nir_instr *instr)
920 {
921 nir_foreach_dest(instr, remove_def_cb, instr);
922 nir_foreach_src(instr, remove_use_cb, instr);
923 }
924
925 void nir_instr_remove(nir_instr *instr)
926 {
927 remove_defs_uses(instr);
928 exec_node_remove(&instr->node);
929
930 if (instr->type == nir_instr_type_jump) {
931 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
932 nir_handle_remove_jump(instr->block, jump_instr->type);
933 }
934 }
935
936 /*@}*/
937
938 void
939 nir_index_local_regs(nir_function_impl *impl)
940 {
941 unsigned index = 0;
942 foreach_list_typed(nir_register, reg, node, &impl->registers) {
943 reg->index = index++;
944 }
945 impl->reg_alloc = index;
946 }
947
948 void
949 nir_index_global_regs(nir_shader *shader)
950 {
951 unsigned index = 0;
952 foreach_list_typed(nir_register, reg, node, &shader->registers) {
953 reg->index = index++;
954 }
955 shader->reg_alloc = index;
956 }
957
958 static bool
959 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
960 {
961 return cb(&instr->dest.dest, state);
962 }
963
964 static bool
965 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
966 void *state)
967 {
968 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
969 return cb(&instr->dest, state);
970
971 return true;
972 }
973
974 static bool
975 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
976 void *state)
977 {
978 return cb(&instr->dest, state);
979 }
980
981 static bool
982 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
983 {
984 return cb(&instr->dest, state);
985 }
986
987 static bool
988 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
989 nir_foreach_dest_cb cb, void *state)
990 {
991 nir_foreach_parallel_copy_entry(entry, instr) {
992 if (!cb(&entry->dest, state))
993 return false;
994 }
995
996 return true;
997 }
998
999 bool
1000 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1001 {
1002 switch (instr->type) {
1003 case nir_instr_type_alu:
1004 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1005 case nir_instr_type_intrinsic:
1006 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1007 case nir_instr_type_tex:
1008 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1009 case nir_instr_type_phi:
1010 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1011 case nir_instr_type_parallel_copy:
1012 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1013 cb, state);
1014
1015 case nir_instr_type_load_const:
1016 case nir_instr_type_ssa_undef:
1017 case nir_instr_type_call:
1018 case nir_instr_type_jump:
1019 break;
1020
1021 default:
1022 unreachable("Invalid instruction type");
1023 break;
1024 }
1025
1026 return true;
1027 }
1028
1029 struct foreach_ssa_def_state {
1030 nir_foreach_ssa_def_cb cb;
1031 void *client_state;
1032 };
1033
1034 static inline bool
1035 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1036 {
1037 struct foreach_ssa_def_state *state = void_state;
1038
1039 if (dest->is_ssa)
1040 return state->cb(&dest->ssa, state->client_state);
1041 else
1042 return true;
1043 }
1044
1045 bool
1046 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1047 {
1048 switch (instr->type) {
1049 case nir_instr_type_alu:
1050 case nir_instr_type_tex:
1051 case nir_instr_type_intrinsic:
1052 case nir_instr_type_phi:
1053 case nir_instr_type_parallel_copy: {
1054 struct foreach_ssa_def_state foreach_state = {cb, state};
1055 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1056 }
1057
1058 case nir_instr_type_load_const:
1059 return cb(&nir_instr_as_load_const(instr)->def, state);
1060 case nir_instr_type_ssa_undef:
1061 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1062 case nir_instr_type_call:
1063 case nir_instr_type_jump:
1064 return true;
1065 default:
1066 unreachable("Invalid instruction type");
1067 }
1068 }
1069
1070 static bool
1071 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1072 {
1073 if (!cb(src, state))
1074 return false;
1075 if (!src->is_ssa && src->reg.indirect)
1076 return cb(src->reg.indirect, state);
1077 return true;
1078 }
1079
1080 static bool
1081 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1082 void *state)
1083 {
1084 if (deref->deref_array_type == nir_deref_array_type_indirect)
1085 return visit_src(&deref->indirect, cb, state);
1086 return true;
1087 }
1088
1089 static bool
1090 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1091 {
1092 nir_deref *cur = &deref->deref;
1093 while (cur != NULL) {
1094 if (cur->deref_type == nir_deref_type_array) {
1095 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1096 return false;
1097 }
1098
1099 cur = cur->child;
1100 }
1101
1102 return true;
1103 }
1104
1105 static bool
1106 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1107 {
1108 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1109 if (!visit_src(&instr->src[i].src, cb, state))
1110 return false;
1111
1112 return true;
1113 }
1114
1115 static bool
1116 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1117 {
1118 for (unsigned i = 0; i < instr->num_srcs; i++) {
1119 if (!visit_src(&instr->src[i].src, cb, state))
1120 return false;
1121 }
1122
1123 if (instr->texture != NULL) {
1124 if (!visit_deref_src(instr->texture, cb, state))
1125 return false;
1126 }
1127
1128 if (instr->sampler != NULL) {
1129 if (!visit_deref_src(instr->sampler, cb, state))
1130 return false;
1131 }
1132
1133 return true;
1134 }
1135
1136 static bool
1137 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1138 void *state)
1139 {
1140 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1141 for (unsigned i = 0; i < num_srcs; i++) {
1142 if (!visit_src(&instr->src[i], cb, state))
1143 return false;
1144 }
1145
1146 unsigned num_vars =
1147 nir_intrinsic_infos[instr->intrinsic].num_variables;
1148 for (unsigned i = 0; i < num_vars; i++) {
1149 if (!visit_deref_src(instr->variables[i], cb, state))
1150 return false;
1151 }
1152
1153 return true;
1154 }
1155
1156 static bool
1157 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1158 {
1159 nir_foreach_phi_src(src, instr) {
1160 if (!visit_src(&src->src, cb, state))
1161 return false;
1162 }
1163
1164 return true;
1165 }
1166
1167 static bool
1168 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1169 nir_foreach_src_cb cb, void *state)
1170 {
1171 nir_foreach_parallel_copy_entry(entry, instr) {
1172 if (!visit_src(&entry->src, cb, state))
1173 return false;
1174 }
1175
1176 return true;
1177 }
1178
1179 typedef struct {
1180 void *state;
1181 nir_foreach_src_cb cb;
1182 } visit_dest_indirect_state;
1183
1184 static bool
1185 visit_dest_indirect(nir_dest *dest, void *_state)
1186 {
1187 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1188
1189 if (!dest->is_ssa && dest->reg.indirect)
1190 return state->cb(dest->reg.indirect, state->state);
1191
1192 return true;
1193 }
1194
1195 bool
1196 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1197 {
1198 switch (instr->type) {
1199 case nir_instr_type_alu:
1200 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1201 return false;
1202 break;
1203 case nir_instr_type_intrinsic:
1204 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1205 return false;
1206 break;
1207 case nir_instr_type_tex:
1208 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1209 return false;
1210 break;
1211 case nir_instr_type_call:
1212 /* Call instructions have no regular sources */
1213 break;
1214 case nir_instr_type_load_const:
1215 /* Constant load instructions have no regular sources */
1216 break;
1217 case nir_instr_type_phi:
1218 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1219 return false;
1220 break;
1221 case nir_instr_type_parallel_copy:
1222 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1223 cb, state))
1224 return false;
1225 break;
1226 case nir_instr_type_jump:
1227 case nir_instr_type_ssa_undef:
1228 return true;
1229
1230 default:
1231 unreachable("Invalid instruction type");
1232 break;
1233 }
1234
1235 visit_dest_indirect_state dest_state;
1236 dest_state.state = state;
1237 dest_state.cb = cb;
1238 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1239 }
1240
1241 nir_const_value *
1242 nir_src_as_const_value(nir_src src)
1243 {
1244 if (!src.is_ssa)
1245 return NULL;
1246
1247 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1248 return NULL;
1249
1250 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1251
1252 return &load->value;
1253 }
1254
1255 /**
1256 * Returns true if the source is known to be dynamically uniform. Otherwise it
1257 * returns false which means it may or may not be dynamically uniform but it
1258 * can't be determined.
1259 */
1260 bool
1261 nir_src_is_dynamically_uniform(nir_src src)
1262 {
1263 if (!src.is_ssa)
1264 return false;
1265
1266 /* Constants are trivially dynamically uniform */
1267 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1268 return true;
1269
1270 /* As are uniform variables */
1271 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1272 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1273
1274 if (intr->intrinsic == nir_intrinsic_load_uniform)
1275 return true;
1276 }
1277
1278 /* XXX: this could have many more tests, such as when a sampler function is
1279 * called with dynamically uniform arguments.
1280 */
1281 return false;
1282 }
1283
1284 static void
1285 src_remove_all_uses(nir_src *src)
1286 {
1287 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1288 if (!src_is_valid(src))
1289 continue;
1290
1291 list_del(&src->use_link);
1292 }
1293 }
1294
1295 static void
1296 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1297 {
1298 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1299 if (!src_is_valid(src))
1300 continue;
1301
1302 if (parent_instr) {
1303 src->parent_instr = parent_instr;
1304 if (src->is_ssa)
1305 list_addtail(&src->use_link, &src->ssa->uses);
1306 else
1307 list_addtail(&src->use_link, &src->reg.reg->uses);
1308 } else {
1309 assert(parent_if);
1310 src->parent_if = parent_if;
1311 if (src->is_ssa)
1312 list_addtail(&src->use_link, &src->ssa->if_uses);
1313 else
1314 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1315 }
1316 }
1317 }
1318
1319 void
1320 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1321 {
1322 assert(!src_is_valid(src) || src->parent_instr == instr);
1323
1324 src_remove_all_uses(src);
1325 *src = new_src;
1326 src_add_all_uses(src, instr, NULL);
1327 }
1328
1329 void
1330 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1331 {
1332 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1333
1334 src_remove_all_uses(dest);
1335 src_remove_all_uses(src);
1336 *dest = *src;
1337 *src = NIR_SRC_INIT;
1338 src_add_all_uses(dest, dest_instr, NULL);
1339 }
1340
1341 void
1342 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1343 {
1344 nir_src *src = &if_stmt->condition;
1345 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1346
1347 src_remove_all_uses(src);
1348 *src = new_src;
1349 src_add_all_uses(src, NULL, if_stmt);
1350 }
1351
1352 void
1353 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1354 {
1355 if (dest->is_ssa) {
1356 /* We can only overwrite an SSA destination if it has no uses. */
1357 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1358 } else {
1359 list_del(&dest->reg.def_link);
1360 if (dest->reg.indirect)
1361 src_remove_all_uses(dest->reg.indirect);
1362 }
1363
1364 /* We can't re-write with an SSA def */
1365 assert(!new_dest.is_ssa);
1366
1367 nir_dest_copy(dest, &new_dest, instr);
1368
1369 dest->reg.parent_instr = instr;
1370 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1371
1372 if (dest->reg.indirect)
1373 src_add_all_uses(dest->reg.indirect, instr, NULL);
1374 }
1375
1376 /* note: does *not* take ownership of 'name' */
1377 void
1378 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1379 unsigned num_components,
1380 unsigned bit_size, const char *name)
1381 {
1382 def->name = ralloc_strdup(instr, name);
1383 def->parent_instr = instr;
1384 list_inithead(&def->uses);
1385 list_inithead(&def->if_uses);
1386 def->num_components = num_components;
1387 def->bit_size = bit_size;
1388
1389 if (instr->block) {
1390 nir_function_impl *impl =
1391 nir_cf_node_get_function(&instr->block->cf_node);
1392
1393 def->index = impl->ssa_alloc++;
1394 } else {
1395 def->index = UINT_MAX;
1396 }
1397 }
1398
1399 /* note: does *not* take ownership of 'name' */
1400 void
1401 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1402 unsigned num_components, unsigned bit_size,
1403 const char *name)
1404 {
1405 dest->is_ssa = true;
1406 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1407 }
1408
1409 void
1410 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1411 {
1412 assert(!new_src.is_ssa || def != new_src.ssa);
1413
1414 nir_foreach_use_safe(use_src, def)
1415 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1416
1417 nir_foreach_if_use_safe(use_src, def)
1418 nir_if_rewrite_condition(use_src->parent_if, new_src);
1419 }
1420
1421 static bool
1422 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1423 {
1424 assert(start->block == end->block);
1425
1426 if (between->block != start->block)
1427 return false;
1428
1429 /* Search backwards looking for "between" */
1430 while (start != end) {
1431 if (between == end)
1432 return true;
1433
1434 end = nir_instr_prev(end);
1435 assert(end);
1436 }
1437
1438 return false;
1439 }
1440
1441 /* Replaces all uses of the given SSA def with the given source but only if
1442 * the use comes after the after_me instruction. This can be useful if you
1443 * are emitting code to fix up the result of some instruction: you can freely
1444 * use the result in that code and then call rewrite_uses_after and pass the
1445 * last fixup instruction as after_me and it will replace all of the uses you
1446 * want without touching the fixup code.
1447 *
1448 * This function assumes that after_me is in the same block as
1449 * def->parent_instr and that after_me comes after def->parent_instr.
1450 */
1451 void
1452 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1453 nir_instr *after_me)
1454 {
1455 assert(!new_src.is_ssa || def != new_src.ssa);
1456
1457 nir_foreach_use_safe(use_src, def) {
1458 assert(use_src->parent_instr != def->parent_instr);
1459 /* Since def already dominates all of its uses, the only way a use can
1460 * not be dominated by after_me is if it is between def and after_me in
1461 * the instruction list.
1462 */
1463 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1464 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1465 }
1466
1467 nir_foreach_if_use_safe(use_src, def)
1468 nir_if_rewrite_condition(use_src->parent_if, new_src);
1469 }
1470
1471 uint8_t
1472 nir_ssa_def_components_read(nir_ssa_def *def)
1473 {
1474 uint8_t read_mask = 0;
1475 nir_foreach_use(use, def) {
1476 if (use->parent_instr->type == nir_instr_type_alu) {
1477 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1478 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1479 int src_idx = alu_src - &alu->src[0];
1480 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1481
1482 for (unsigned c = 0; c < 4; c++) {
1483 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1484 continue;
1485
1486 read_mask |= (1 << alu_src->swizzle[c]);
1487 }
1488 } else {
1489 return (1 << def->num_components) - 1;
1490 }
1491 }
1492
1493 return read_mask;
1494 }
1495
1496 nir_block *
1497 nir_block_cf_tree_next(nir_block *block)
1498 {
1499 if (block == NULL) {
1500 /* nir_foreach_block_safe() will call this function on a NULL block
1501 * after the last iteration, but it won't use the result so just return
1502 * NULL here.
1503 */
1504 return NULL;
1505 }
1506
1507 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1508 if (cf_next)
1509 return nir_cf_node_cf_tree_first(cf_next);
1510
1511 nir_cf_node *parent = block->cf_node.parent;
1512
1513 switch (parent->type) {
1514 case nir_cf_node_if: {
1515 /* Are we at the end of the if? Go to the beginning of the else */
1516 nir_if *if_stmt = nir_cf_node_as_if(parent);
1517 if (&block->cf_node == nir_if_last_then_node(if_stmt))
1518 return nir_cf_node_as_block(nir_if_first_else_node(if_stmt));
1519
1520 assert(&block->cf_node == nir_if_last_else_node(if_stmt));
1521 /* fall through */
1522 }
1523
1524 case nir_cf_node_loop:
1525 return nir_cf_node_as_block(nir_cf_node_next(parent));
1526
1527 case nir_cf_node_function:
1528 return NULL;
1529
1530 default:
1531 unreachable("unknown cf node type");
1532 }
1533 }
1534
1535 nir_block *
1536 nir_block_cf_tree_prev(nir_block *block)
1537 {
1538 if (block == NULL) {
1539 /* do this for consistency with nir_block_cf_tree_next() */
1540 return NULL;
1541 }
1542
1543 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1544 if (cf_prev)
1545 return nir_cf_node_cf_tree_last(cf_prev);
1546
1547 nir_cf_node *parent = block->cf_node.parent;
1548
1549 switch (parent->type) {
1550 case nir_cf_node_if: {
1551 /* Are we at the beginning of the else? Go to the end of the if */
1552 nir_if *if_stmt = nir_cf_node_as_if(parent);
1553 if (&block->cf_node == nir_if_first_else_node(if_stmt))
1554 return nir_cf_node_as_block(nir_if_last_then_node(if_stmt));
1555
1556 assert(&block->cf_node == nir_if_first_then_node(if_stmt));
1557 /* fall through */
1558 }
1559
1560 case nir_cf_node_loop:
1561 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1562
1563 case nir_cf_node_function:
1564 return NULL;
1565
1566 default:
1567 unreachable("unknown cf node type");
1568 }
1569 }
1570
1571 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1572 {
1573 switch (node->type) {
1574 case nir_cf_node_function: {
1575 nir_function_impl *impl = nir_cf_node_as_function(node);
1576 return nir_start_block(impl);
1577 }
1578
1579 case nir_cf_node_if: {
1580 nir_if *if_stmt = nir_cf_node_as_if(node);
1581 return nir_cf_node_as_block(nir_if_first_then_node(if_stmt));
1582 }
1583
1584 case nir_cf_node_loop: {
1585 nir_loop *loop = nir_cf_node_as_loop(node);
1586 return nir_cf_node_as_block(nir_loop_first_cf_node(loop));
1587 }
1588
1589 case nir_cf_node_block: {
1590 return nir_cf_node_as_block(node);
1591 }
1592
1593 default:
1594 unreachable("unknown node type");
1595 }
1596 }
1597
1598 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1599 {
1600 switch (node->type) {
1601 case nir_cf_node_function: {
1602 nir_function_impl *impl = nir_cf_node_as_function(node);
1603 return nir_impl_last_block(impl);
1604 }
1605
1606 case nir_cf_node_if: {
1607 nir_if *if_stmt = nir_cf_node_as_if(node);
1608 return nir_cf_node_as_block(nir_if_last_else_node(if_stmt));
1609 }
1610
1611 case nir_cf_node_loop: {
1612 nir_loop *loop = nir_cf_node_as_loop(node);
1613 return nir_cf_node_as_block(nir_loop_last_cf_node(loop));
1614 }
1615
1616 case nir_cf_node_block: {
1617 return nir_cf_node_as_block(node);
1618 }
1619
1620 default:
1621 unreachable("unknown node type");
1622 }
1623 }
1624
1625 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1626 {
1627 if (node->type == nir_cf_node_block)
1628 return nir_cf_node_cf_tree_first(nir_cf_node_next(node));
1629 else if (node->type == nir_cf_node_function)
1630 return NULL;
1631 else
1632 return nir_cf_node_as_block(nir_cf_node_next(node));
1633 }
1634
1635 nir_if *
1636 nir_block_get_following_if(nir_block *block)
1637 {
1638 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1639 return NULL;
1640
1641 if (nir_cf_node_is_last(&block->cf_node))
1642 return NULL;
1643
1644 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1645
1646 if (next_node->type != nir_cf_node_if)
1647 return NULL;
1648
1649 return nir_cf_node_as_if(next_node);
1650 }
1651
1652 nir_loop *
1653 nir_block_get_following_loop(nir_block *block)
1654 {
1655 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1656 return NULL;
1657
1658 if (nir_cf_node_is_last(&block->cf_node))
1659 return NULL;
1660
1661 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1662
1663 if (next_node->type != nir_cf_node_loop)
1664 return NULL;
1665
1666 return nir_cf_node_as_loop(next_node);
1667 }
1668
1669 void
1670 nir_index_blocks(nir_function_impl *impl)
1671 {
1672 unsigned index = 0;
1673
1674 if (impl->valid_metadata & nir_metadata_block_index)
1675 return;
1676
1677 nir_foreach_block(block, impl) {
1678 block->index = index++;
1679 }
1680
1681 impl->num_blocks = index;
1682 }
1683
1684 static bool
1685 index_ssa_def_cb(nir_ssa_def *def, void *state)
1686 {
1687 unsigned *index = (unsigned *) state;
1688 def->index = (*index)++;
1689
1690 return true;
1691 }
1692
1693 /**
1694 * The indices are applied top-to-bottom which has the very nice property
1695 * that, if A dominates B, then A->index <= B->index.
1696 */
1697 void
1698 nir_index_ssa_defs(nir_function_impl *impl)
1699 {
1700 unsigned index = 0;
1701
1702 nir_foreach_block(block, impl) {
1703 nir_foreach_instr(instr, block)
1704 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1705 }
1706
1707 impl->ssa_alloc = index;
1708 }
1709
1710 /**
1711 * The indices are applied top-to-bottom which has the very nice property
1712 * that, if A dominates B, then A->index <= B->index.
1713 */
1714 unsigned
1715 nir_index_instrs(nir_function_impl *impl)
1716 {
1717 unsigned index = 0;
1718
1719 nir_foreach_block(block, impl) {
1720 nir_foreach_instr(instr, block)
1721 instr->index = index++;
1722 }
1723
1724 return index;
1725 }
1726
1727 nir_intrinsic_op
1728 nir_intrinsic_from_system_value(gl_system_value val)
1729 {
1730 switch (val) {
1731 case SYSTEM_VALUE_VERTEX_ID:
1732 return nir_intrinsic_load_vertex_id;
1733 case SYSTEM_VALUE_INSTANCE_ID:
1734 return nir_intrinsic_load_instance_id;
1735 case SYSTEM_VALUE_DRAW_ID:
1736 return nir_intrinsic_load_draw_id;
1737 case SYSTEM_VALUE_BASE_INSTANCE:
1738 return nir_intrinsic_load_base_instance;
1739 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1740 return nir_intrinsic_load_vertex_id_zero_base;
1741 case SYSTEM_VALUE_BASE_VERTEX:
1742 return nir_intrinsic_load_base_vertex;
1743 case SYSTEM_VALUE_INVOCATION_ID:
1744 return nir_intrinsic_load_invocation_id;
1745 case SYSTEM_VALUE_FRONT_FACE:
1746 return nir_intrinsic_load_front_face;
1747 case SYSTEM_VALUE_SAMPLE_ID:
1748 return nir_intrinsic_load_sample_id;
1749 case SYSTEM_VALUE_SAMPLE_POS:
1750 return nir_intrinsic_load_sample_pos;
1751 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1752 return nir_intrinsic_load_sample_mask_in;
1753 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1754 return nir_intrinsic_load_local_invocation_id;
1755 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1756 return nir_intrinsic_load_local_invocation_index;
1757 case SYSTEM_VALUE_WORK_GROUP_ID:
1758 return nir_intrinsic_load_work_group_id;
1759 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1760 return nir_intrinsic_load_num_work_groups;
1761 case SYSTEM_VALUE_PRIMITIVE_ID:
1762 return nir_intrinsic_load_primitive_id;
1763 case SYSTEM_VALUE_TESS_COORD:
1764 return nir_intrinsic_load_tess_coord;
1765 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1766 return nir_intrinsic_load_tess_level_outer;
1767 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1768 return nir_intrinsic_load_tess_level_inner;
1769 case SYSTEM_VALUE_VERTICES_IN:
1770 return nir_intrinsic_load_patch_vertices_in;
1771 case SYSTEM_VALUE_HELPER_INVOCATION:
1772 return nir_intrinsic_load_helper_invocation;
1773 default:
1774 unreachable("system value does not directly correspond to intrinsic");
1775 }
1776 }
1777
1778 gl_system_value
1779 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1780 {
1781 switch (intrin) {
1782 case nir_intrinsic_load_vertex_id:
1783 return SYSTEM_VALUE_VERTEX_ID;
1784 case nir_intrinsic_load_instance_id:
1785 return SYSTEM_VALUE_INSTANCE_ID;
1786 case nir_intrinsic_load_draw_id:
1787 return SYSTEM_VALUE_DRAW_ID;
1788 case nir_intrinsic_load_base_instance:
1789 return SYSTEM_VALUE_BASE_INSTANCE;
1790 case nir_intrinsic_load_vertex_id_zero_base:
1791 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1792 case nir_intrinsic_load_base_vertex:
1793 return SYSTEM_VALUE_BASE_VERTEX;
1794 case nir_intrinsic_load_invocation_id:
1795 return SYSTEM_VALUE_INVOCATION_ID;
1796 case nir_intrinsic_load_front_face:
1797 return SYSTEM_VALUE_FRONT_FACE;
1798 case nir_intrinsic_load_sample_id:
1799 return SYSTEM_VALUE_SAMPLE_ID;
1800 case nir_intrinsic_load_sample_pos:
1801 return SYSTEM_VALUE_SAMPLE_POS;
1802 case nir_intrinsic_load_sample_mask_in:
1803 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1804 case nir_intrinsic_load_local_invocation_id:
1805 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1806 case nir_intrinsic_load_local_invocation_index:
1807 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
1808 case nir_intrinsic_load_num_work_groups:
1809 return SYSTEM_VALUE_NUM_WORK_GROUPS;
1810 case nir_intrinsic_load_work_group_id:
1811 return SYSTEM_VALUE_WORK_GROUP_ID;
1812 case nir_intrinsic_load_primitive_id:
1813 return SYSTEM_VALUE_PRIMITIVE_ID;
1814 case nir_intrinsic_load_tess_coord:
1815 return SYSTEM_VALUE_TESS_COORD;
1816 case nir_intrinsic_load_tess_level_outer:
1817 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1818 case nir_intrinsic_load_tess_level_inner:
1819 return SYSTEM_VALUE_TESS_LEVEL_INNER;
1820 case nir_intrinsic_load_patch_vertices_in:
1821 return SYSTEM_VALUE_VERTICES_IN;
1822 case nir_intrinsic_load_helper_invocation:
1823 return SYSTEM_VALUE_HELPER_INVOCATION;
1824 default:
1825 unreachable("intrinsic doesn't produce a system value");
1826 }
1827 }