src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->num_array_elems = 0;
  74    reg->is_packed = false;
  75    reg->name = NULL;
  76
  77    exec_list_push_tail(list, &reg->node);
  78
  79    return reg;
  80 }
  81
  82 nir_register *
  83 nir_global_reg_create(nir_shader *shader)
  84 {
  85    nir_register *reg = reg_create(shader, &shader->registers);
  86    reg->index = shader->reg_alloc++;
  87    reg->is_global = true;
  88
  89    return reg;
  90 }
  91
  92 nir_register *
  93 nir_local_reg_create(nir_function_impl *impl)
  94 {
  95    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  96    reg->index = impl->reg_alloc++;
  97    reg->is_global = false;
  98
  99    return reg;
 100 }
 101
 102 void
 103 nir_reg_remove(nir_register *reg)
 104 {
 105    exec_node_remove(&reg->node);
 106 }
 107
 108 void
 109 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 110 {
 111    switch (var->data.mode) {
 112    case nir_var_all:
 113       assert(!"invalid mode");
 114       break;
 115
 116    case nir_var_local:
 117       assert(!"nir_shader_add_variable cannot be used for local variables");
 118       break;
 119
 120    case nir_var_param:
 121       assert(!"nir_shader_add_variable cannot be used for function parameters");
 122       break;
 123
 124    case nir_var_global:
 125       exec_list_push_tail(&shader->globals, &var->node);
 126       break;
 127
 128    case nir_var_shader_in:
 129       exec_list_push_tail(&shader->inputs, &var->node);
 130       break;
 131
 132    case nir_var_shader_out:
 133       exec_list_push_tail(&shader->outputs, &var->node);
 134       break;
 135
 136    case nir_var_uniform:
 137    case nir_var_shader_storage:
 138       exec_list_push_tail(&shader->uniforms, &var->node);
 139       break;
 140
 141    case nir_var_shared:
 142       assert(shader->stage == MESA_SHADER_COMPUTE);
 143       exec_list_push_tail(&shader->shared, &var->node);
 144       break;
 145
 146    case nir_var_system_value:
 147       exec_list_push_tail(&shader->system_values, &var->node);
 148       break;
 149    }
 150 }
 151
 152 nir_variable *
 153 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 154                     const struct glsl_type *type, const char *name)
 155 {
 156    nir_variable *var = rzalloc(shader, nir_variable);
 157    var->name = ralloc_strdup(var, name);
 158    var->type = type;
 159    var->data.mode = mode;
 160
 161    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 162        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 163       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 164
 165    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 166       var->data.read_only = true;
 167
 168    nir_shader_add_variable(shader, var);
 169
 170    return var;
 171 }
 172
 173 nir_variable *
 174 nir_local_variable_create(nir_function_impl *impl,
 175                           const struct glsl_type *type, const char *name)
 176 {
 177    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 178    var->name = ralloc_strdup(var, name);
 179    var->type = type;
 180    var->data.mode = nir_var_local;
 181
 182    nir_function_impl_add_variable(impl, var);
 183
 184    return var;
 185 }
 186
 187 nir_function *
 188 nir_function_create(nir_shader *shader, const char *name)
 189 {
 190    nir_function *func = ralloc(shader, nir_function);
 191
 192    exec_list_push_tail(&shader->functions, &func->node);
 193
 194    func->name = ralloc_strdup(func, name);
 195    func->shader = shader;
 196    func->num_params = 0;
 197    func->params = NULL;
 198    func->return_type = glsl_void_type();
 199    func->impl = NULL;
 200
 201    return func;
 202 }
 203
 204 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 205 {
 206    dest->is_ssa = src->is_ssa;
 207    if (src->is_ssa) {
 208       dest->ssa = src->ssa;
 209    } else {
 210       dest->reg.base_offset = src->reg.base_offset;
 211       dest->reg.reg = src->reg.reg;
 212       if (src->reg.indirect) {
 213          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 214          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 215       } else {
 216          dest->reg.indirect = NULL;
 217       }
 218    }
 219 }
 220
 221 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 222 {
 223    /* Copying an SSA definition makes no sense whatsoever. */
 224    assert(!src->is_ssa);
 225
 226    dest->is_ssa = false;
 227
 228    dest->reg.base_offset = src->reg.base_offset;
 229    dest->reg.reg = src->reg.reg;
 230    if (src->reg.indirect) {
 231       dest->reg.indirect = ralloc(instr, nir_src);
 232       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 233    } else {
 234       dest->reg.indirect = NULL;
 235    }
 236 }
 237
 238 void
 239 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 240                  nir_alu_instr *instr)
 241 {
 242    nir_src_copy(&dest->src, &src->src, &instr->instr);
 243    dest->abs = src->abs;
 244    dest->negate = src->negate;
 245    for (unsigned i = 0; i < 4; i++)
 246       dest->swizzle[i] = src->swizzle[i];
 247 }
 248
 249 void
 250 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 251                   nir_alu_instr *instr)
 252 {
 253    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 254    dest->write_mask = src->write_mask;
 255    dest->saturate = src->saturate;
 256 }
 257
 258
 259 static void
 260 cf_init(nir_cf_node *node, nir_cf_node_type type)
 261 {
 262    exec_node_init(&node->node);
 263    node->parent = NULL;
 264    node->type = type;
 265 }
 266
 267 nir_function_impl *
 268 nir_function_impl_create_bare(nir_shader *shader)
 269 {
 270    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 271
 272    impl->function = NULL;
 273
 274    cf_init(&impl->cf_node, nir_cf_node_function);
 275
 276    exec_list_make_empty(&impl->body);
 277    exec_list_make_empty(&impl->registers);
 278    exec_list_make_empty(&impl->locals);
 279    impl->num_params = 0;
 280    impl->params = NULL;
 281    impl->return_var = NULL;
 282    impl->reg_alloc = 0;
 283    impl->ssa_alloc = 0;
 284    impl->valid_metadata = nir_metadata_none;
 285
 286    /* create start & end blocks */
 287    nir_block *start_block = nir_block_create(shader);
 288    nir_block *end_block = nir_block_create(shader);
 289    start_block->cf_node.parent = &impl->cf_node;
 290    end_block->cf_node.parent = &impl->cf_node;
 291    impl->end_block = end_block;
 292
 293    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 294
 295    start_block->successors[0] = end_block;
 296    _mesa_set_add(end_block->predecessors, start_block);
 297    return impl;
 298 }
 299
 300 nir_function_impl *
 301 nir_function_impl_create(nir_function *function)
 302 {
 303    assert(function->impl == NULL);
 304
 305    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 306
 307    function->impl = impl;
 308    impl->function = function;
 309
 310    impl->num_params = function->num_params;
 311    impl->params = ralloc_array(function->shader,
 312                                nir_variable *, impl->num_params);
 313
 314    for (unsigned i = 0; i < impl->num_params; i++) {
 315       impl->params[i] = rzalloc(function->shader, nir_variable);
 316       impl->params[i]->type = function->params[i].type;
 317       impl->params[i]->data.mode = nir_var_param;
 318       impl->params[i]->data.location = i;
 319    }
 320
 321    if (!glsl_type_is_void(function->return_type)) {
 322       impl->return_var = rzalloc(function->shader, nir_variable);
 323       impl->return_var->type = function->return_type;
 324       impl->return_var->data.mode = nir_var_param;
 325       impl->return_var->data.location = -1;
 326    } else {
 327       impl->return_var = NULL;
 328    }
 329
 330    return impl;
 331 }
 332
 333 nir_block *
 334 nir_block_create(nir_shader *shader)
 335 {
 336    nir_block *block = ralloc(shader, nir_block);
 337
 338    cf_init(&block->cf_node, nir_cf_node_block);
 339
 340    block->successors[0] = block->successors[1] = NULL;
 341    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 342                                           _mesa_key_pointer_equal);
 343    block->imm_dom = NULL;
 344    /* XXX maybe it would be worth it to defer allocation?  This
 345     * way it doesn't get allocated for shader ref's that never run
 346     * nir_calc_dominance?  For example, state-tracker creates an
 347     * initial IR, clones that, runs appropriate lowering pass, passes
 348     * to driver which does common lowering/opt, and then stores ref
 349     * which is later used to do state specific lowering and futher
 350     * opt.  Do any of the references not need dominance metadata?
 351     */
 352    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 353                                           _mesa_key_pointer_equal);
 354
 355    exec_list_make_empty(&block->instr_list);
 356
 357    return block;
 358 }
 359
 360 static inline void
 361 src_init(nir_src *src)
 362 {
 363    src->is_ssa = false;
 364    src->reg.reg = NULL;
 365    src->reg.indirect = NULL;
 366    src->reg.base_offset = 0;
 367 }
 368
 369 nir_if *
 370 nir_if_create(nir_shader *shader)
 371 {
 372    nir_if *if_stmt = ralloc(shader, nir_if);
 373
 374    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 375    src_init(&if_stmt->condition);
 376
 377    nir_block *then = nir_block_create(shader);
 378    exec_list_make_empty(&if_stmt->then_list);
 379    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 380    then->cf_node.parent = &if_stmt->cf_node;
 381
 382    nir_block *else_stmt = nir_block_create(shader);
 383    exec_list_make_empty(&if_stmt->else_list);
 384    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 385    else_stmt->cf_node.parent = &if_stmt->cf_node;
 386
 387    return if_stmt;
 388 }
 389
 390 nir_loop *
 391 nir_loop_create(nir_shader *shader)
 392 {
 393    nir_loop *loop = ralloc(shader, nir_loop);
 394
 395    cf_init(&loop->cf_node, nir_cf_node_loop);
 396
 397    nir_block *body = nir_block_create(shader);
 398    exec_list_make_empty(&loop->body);
 399    exec_list_push_tail(&loop->body, &body->cf_node.node);
 400    body->cf_node.parent = &loop->cf_node;
 401
 402    body->successors[0] = body;
 403    _mesa_set_add(body->predecessors, body);
 404
 405    return loop;
 406 }
 407
 408 static void
 409 instr_init(nir_instr *instr, nir_instr_type type)
 410 {
 411    instr->type = type;
 412    instr->block = NULL;
 413    exec_node_init(&instr->node);
 414 }
 415
 416 static void
 417 dest_init(nir_dest *dest)
 418 {
 419    dest->is_ssa = false;
 420    dest->reg.reg = NULL;
 421    dest->reg.indirect = NULL;
 422    dest->reg.base_offset = 0;
 423 }
 424
 425 static void
 426 alu_dest_init(nir_alu_dest *dest)
 427 {
 428    dest_init(&dest->dest);
 429    dest->saturate = false;
 430    dest->write_mask = 0xf;
 431 }
 432
 433 static void
 434 alu_src_init(nir_alu_src *src)
 435 {
 436    src_init(&src->src);
 437    src->abs = src->negate = false;
 438    src->swizzle[0] = 0;
 439    src->swizzle[1] = 1;
 440    src->swizzle[2] = 2;
 441    src->swizzle[3] = 3;
 442 }
 443
 444 nir_alu_instr *
 445 nir_alu_instr_create(nir_shader *shader, nir_op op)
 446 {
 447    unsigned num_srcs = nir_op_infos[op].num_inputs;
 448    nir_alu_instr *instr =
 449       ralloc_size(shader,
 450                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 451
 452    instr_init(&instr->instr, nir_instr_type_alu);
 453    instr->op = op;
 454    alu_dest_init(&instr->dest);
 455    for (unsigned i = 0; i < num_srcs; i++)
 456       alu_src_init(&instr->src[i]);
 457
 458    return instr;
 459 }
 460
 461 nir_jump_instr *
 462 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 463 {
 464    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 465    instr_init(&instr->instr, nir_instr_type_jump);
 466    instr->type = type;
 467    return instr;
 468 }
 469
 470 nir_load_const_instr *
 471 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 472 {
 473    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 474    instr_init(&instr->instr, nir_instr_type_load_const);
 475
 476    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 477
 478    return instr;
 479 }
 480
 481 nir_intrinsic_instr *
 482 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 483 {
 484    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 485    nir_intrinsic_instr *instr =
 486       ralloc_size(shader,
 487                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 488
 489    instr_init(&instr->instr, nir_instr_type_intrinsic);
 490    instr->intrinsic = op;
 491
 492    if (nir_intrinsic_infos[op].has_dest)
 493       dest_init(&instr->dest);
 494
 495    for (unsigned i = 0; i < num_srcs; i++)
 496       src_init(&instr->src[i]);
 497
 498    return instr;
 499 }
 500
 501 nir_call_instr *
 502 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 503 {
 504    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 505    instr_init(&instr->instr, nir_instr_type_call);
 506
 507    instr->callee = callee;
 508    instr->num_params = callee->num_params;
 509    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 510    instr->return_deref = NULL;
 511
 512    return instr;
 513 }
 514
 515 nir_tex_instr *
 516 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 517 {
 518    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 519    instr_init(&instr->instr, nir_instr_type_tex);
 520
 521    dest_init(&instr->dest);
 522
 523    instr->num_srcs = num_srcs;
 524    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 525    for (unsigned i = 0; i < num_srcs; i++)
 526       src_init(&instr->src[i].src);
 527
 528    instr->texture_index = 0;
 529    instr->texture_array_size = 0;
 530    instr->texture = NULL;
 531    instr->sampler_index = 0;
 532    instr->sampler = NULL;
 533
 534    return instr;
 535 }
 536
 537 nir_phi_instr *
 538 nir_phi_instr_create(nir_shader *shader)
 539 {
 540    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 541    instr_init(&instr->instr, nir_instr_type_phi);
 542
 543    dest_init(&instr->dest);
 544    exec_list_make_empty(&instr->srcs);
 545    return instr;
 546 }
 547
 548 nir_parallel_copy_instr *
 549 nir_parallel_copy_instr_create(nir_shader *shader)
 550 {
 551    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 552    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 553
 554    exec_list_make_empty(&instr->entries);
 555
 556    return instr;
 557 }
 558
 559 nir_ssa_undef_instr *
 560 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 561 {
 562    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 563    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 564
 565    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 566
 567    return instr;
 568 }
 569
 570 nir_deref_var *
 571 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 572 {
 573    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 574    deref->deref.deref_type = nir_deref_type_var;
 575    deref->deref.child = NULL;
 576    deref->deref.type = var->type;
 577    deref->var = var;
 578    return deref;
 579 }
 580
 581 nir_deref_array *
 582 nir_deref_array_create(void *mem_ctx)
 583 {
 584    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 585    deref->deref.deref_type = nir_deref_type_array;
 586    deref->deref.child = NULL;
 587    deref->deref_array_type = nir_deref_array_type_direct;
 588    src_init(&deref->indirect);
 589    deref->base_offset = 0;
 590    return deref;
 591 }
 592
 593 nir_deref_struct *
 594 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 595 {
 596    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 597    deref->deref.deref_type = nir_deref_type_struct;
 598    deref->deref.child = NULL;
 599    deref->index = field_index;
 600    return deref;
 601 }
 602
 603 static nir_deref_var *
 604 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 605 {
 606    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 607    ret->deref.type = deref->deref.type;
 608    if (deref->deref.child)
 609       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 610    return ret;
 611 }
 612
 613 static nir_deref_array *
 614 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 615 {
 616    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 617    ret->base_offset = deref->base_offset;
 618    ret->deref_array_type = deref->deref_array_type;
 619    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 620       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 621    }
 622    ret->deref.type = deref->deref.type;
 623    if (deref->deref.child)
 624       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 625    return ret;
 626 }
 627
 628 static nir_deref_struct *
 629 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 630 {
 631    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 632    ret->deref.type = deref->deref.type;
 633    if (deref->deref.child)
 634       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 635    return ret;
 636 }
 637
 638 nir_deref *
 639 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 640 {
 641    switch (deref->deref_type) {
 642    case nir_deref_type_var:
 643       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 644    case nir_deref_type_array:
 645       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 646    case nir_deref_type_struct:
 647       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 648    default:
 649       unreachable("Invalid dereference type");
 650    }
 651
 652    return NULL;
 653 }
 654
 655 /* Returns a load_const instruction that represents the constant
 656  * initializer for the given deref chain.  The caller is responsible for
 657  * ensuring that there actually is a constant initializer.
 658  */
 659 nir_load_const_instr *
 660 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 661 {
 662    nir_constant *constant = deref->var->constant_initializer;
 663    assert(constant);
 664
 665    const nir_deref *tail = &deref->deref;
 666    unsigned matrix_offset = 0;
 667    while (tail->child) {
 668       switch (tail->child->deref_type) {
 669       case nir_deref_type_array: {
 670          nir_deref_array *arr = nir_deref_as_array(tail->child);
 671          assert(arr->deref_array_type == nir_deref_array_type_direct);
 672          if (glsl_type_is_matrix(tail->type)) {
 673             assert(arr->deref.child == NULL);
 674             matrix_offset = arr->base_offset;
 675          } else {
 676             constant = constant->elements[arr->base_offset];
 677          }
 678          break;
 679       }
 680
 681       case nir_deref_type_struct: {
 682          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 683          break;
 684       }
 685
 686       default:
 687          unreachable("Invalid deref child type");
 688       }
 689
 690       tail = tail->child;
 691    }
 692
 693    nir_load_const_instr *load =
 694       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 695
 696    matrix_offset *= load->def.num_components;
 697    for (unsigned i = 0; i < load->def.num_components; i++) {
 698       switch (glsl_get_base_type(tail->type)) {
 699       case GLSL_TYPE_FLOAT:
 700       case GLSL_TYPE_INT:
 701       case GLSL_TYPE_UINT:
 702          load->value.u[i] = constant->value.u[matrix_offset + i];
 703          break;
 704       case GLSL_TYPE_BOOL:
 705          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 706                              NIR_TRUE : NIR_FALSE;
 707          break;
 708       default:
 709          unreachable("Invalid immediate type");
 710       }
 711    }
 712
 713    return load;
 714 }
 715
 716 nir_function_impl *
 717 nir_cf_node_get_function(nir_cf_node *node)
 718 {
 719    while (node->type != nir_cf_node_function) {
 720       node = node->parent;
 721    }
 722
 723    return nir_cf_node_as_function(node);
 724 }
 725
 726 /* Reduces a cursor by trying to convert everything to after and trying to
 727  * go up to block granularity when possible.
 728  */
 729 static nir_cursor
 730 reduce_cursor(nir_cursor cursor)
 731 {
 732    switch (cursor.option) {
 733    case nir_cursor_before_block:
 734       if (exec_list_is_empty(&cursor.block->instr_list)) {
 735          /* Empty block.  After is as good as before. */
 736          cursor.option = nir_cursor_after_block;
 737       } else {
 738          /* Try to switch to after the previous block if there is one.
 739           * (This isn't likely, but it can happen.)
 740           */
 741          nir_cf_node *prev_node = nir_cf_node_prev(&cursor.block->cf_node);
 742          if (prev_node && prev_node->type == nir_cf_node_block) {
 743             cursor.block = nir_cf_node_as_block(prev_node);
 744             cursor.option = nir_cursor_after_block;
 745          }
 746       }
 747       return cursor;
 748
 749    case nir_cursor_after_block:
 750       return cursor;
 751
 752    case nir_cursor_before_instr: {
 753       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 754       if (prev_instr) {
 755          /* Before this instruction is after the previous */
 756          cursor.instr = prev_instr;
 757          cursor.option = nir_cursor_after_instr;
 758       } else {
 759          /* No previous instruction.  Switch to before block */
 760          cursor.block = cursor.instr->block;
 761          cursor.option = nir_cursor_before_block;
 762       }
 763       return reduce_cursor(cursor);
 764    }
 765
 766    case nir_cursor_after_instr:
 767       if (nir_instr_next(cursor.instr) == NULL) {
 768          /* This is the last instruction, switch to after block */
 769          cursor.option = nir_cursor_after_block;
 770          cursor.block = cursor.instr->block;
 771       }
 772       return cursor;
 773
 774    default:
 775       unreachable("Inavlid cursor option");
 776    }
 777 }
 778
 779 bool
 780 nir_cursors_equal(nir_cursor a, nir_cursor b)
 781 {
 782    /* Reduced cursors should be unique */
 783    a = reduce_cursor(a);
 784    b = reduce_cursor(b);
 785
 786    return a.block == b.block && a.option == b.option;
 787 }
 788
 789 static bool
 790 add_use_cb(nir_src *src, void *state)
 791 {
 792    nir_instr *instr = state;
 793
 794    src->parent_instr = instr;
 795    list_addtail(&src->use_link,
 796                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 797
 798    return true;
 799 }
 800
 801 static bool
 802 add_ssa_def_cb(nir_ssa_def *def, void *state)
 803 {
 804    nir_instr *instr = state;
 805
 806    if (instr->block && def->index == UINT_MAX) {
 807       nir_function_impl *impl =
 808          nir_cf_node_get_function(&instr->block->cf_node);
 809
 810       def->index = impl->ssa_alloc++;
 811    }
 812
 813    return true;
 814 }
 815
 816 static bool
 817 add_reg_def_cb(nir_dest *dest, void *state)
 818 {
 819    nir_instr *instr = state;
 820
 821    if (!dest->is_ssa) {
 822       dest->reg.parent_instr = instr;
 823       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 824    }
 825
 826    return true;
 827 }
 828
 829 static void
 830 add_defs_uses(nir_instr *instr)
 831 {
 832    nir_foreach_src(instr, add_use_cb, instr);
 833    nir_foreach_dest(instr, add_reg_def_cb, instr);
 834    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 835 }
 836
 837 void
 838 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 839 {
 840    switch (cursor.option) {
 841    case nir_cursor_before_block:
 842       /* Only allow inserting jumps into empty blocks. */
 843       if (instr->type == nir_instr_type_jump)
 844          assert(exec_list_is_empty(&cursor.block->instr_list));
 845
 846       instr->block = cursor.block;
 847       add_defs_uses(instr);
 848       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 849       break;
 850    case nir_cursor_after_block: {
 851       /* Inserting instructions after a jump is illegal. */
 852       nir_instr *last = nir_block_last_instr(cursor.block);
 853       assert(last == NULL || last->type != nir_instr_type_jump);
 854       (void) last;
 855
 856       instr->block = cursor.block;
 857       add_defs_uses(instr);
 858       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 859       break;
 860    }
 861    case nir_cursor_before_instr:
 862       assert(instr->type != nir_instr_type_jump);
 863       instr->block = cursor.instr->block;
 864       add_defs_uses(instr);
 865       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 866       break;
 867    case nir_cursor_after_instr:
 868       /* Inserting instructions after a jump is illegal. */
 869       assert(cursor.instr->type != nir_instr_type_jump);
 870
 871       /* Only allow inserting jumps at the end of the block. */
 872       if (instr->type == nir_instr_type_jump)
 873          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 874
 875       instr->block = cursor.instr->block;
 876       add_defs_uses(instr);
 877       exec_node_insert_after(&cursor.instr->node, &instr->node);
 878       break;
 879    }
 880
 881    if (instr->type == nir_instr_type_jump)
 882       nir_handle_add_jump(instr->block);
 883 }
 884
 885 static bool
 886 src_is_valid(const nir_src *src)
 887 {
 888    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 889 }
 890
 891 static bool
 892 remove_use_cb(nir_src *src, void *state)
 893 {
 894    if (src_is_valid(src))
 895       list_del(&src->use_link);
 896
 897    return true;
 898 }
 899
 900 static bool
 901 remove_def_cb(nir_dest *dest, void *state)
 902 {
 903    if (!dest->is_ssa)
 904       list_del(&dest->reg.def_link);
 905
 906    return true;
 907 }
 908
 909 static void
 910 remove_defs_uses(nir_instr *instr)
 911 {
 912    nir_foreach_dest(instr, remove_def_cb, instr);
 913    nir_foreach_src(instr, remove_use_cb, instr);
 914 }
 915
 916 void nir_instr_remove(nir_instr *instr)
 917 {
 918    remove_defs_uses(instr);
 919    exec_node_remove(&instr->node);
 920
 921    if (instr->type == nir_instr_type_jump) {
 922       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 923       nir_handle_remove_jump(instr->block, jump_instr->type);
 924    }
 925 }
 926
 927 /*@}*/
 928
 929 void
 930 nir_index_local_regs(nir_function_impl *impl)
 931 {
 932    unsigned index = 0;
 933    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 934       reg->index = index++;
 935    }
 936    impl->reg_alloc = index;
 937 }
 938
 939 void
 940 nir_index_global_regs(nir_shader *shader)
 941 {
 942    unsigned index = 0;
 943    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 944       reg->index = index++;
 945    }
 946    shader->reg_alloc = index;
 947 }
 948
 949 static bool
 950 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 951 {
 952    return cb(&instr->dest.dest, state);
 953 }
 954
 955 static bool
 956 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 957                      void *state)
 958 {
 959    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 960       return cb(&instr->dest, state);
 961
 962    return true;
 963 }
 964
 965 static bool
 966 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 967                    void *state)
 968 {
 969    return cb(&instr->dest, state);
 970 }
 971
 972 static bool
 973 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 974 {
 975    return cb(&instr->dest, state);
 976 }
 977
 978 static bool
 979 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 980                          nir_foreach_dest_cb cb, void *state)
 981 {
 982    nir_foreach_parallel_copy_entry(instr, entry) {
 983       if (!cb(&entry->dest, state))
 984          return false;
 985    }
 986
 987    return true;
 988 }
 989
 990 bool
 991 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 992 {
 993    switch (instr->type) {
 994    case nir_instr_type_alu:
 995       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 996    case nir_instr_type_intrinsic:
 997       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 998    case nir_instr_type_tex:
 999       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1000    case nir_instr_type_phi:
1001       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1002    case nir_instr_type_parallel_copy:
1003       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1004                                       cb, state);
1005
1006    case nir_instr_type_load_const:
1007    case nir_instr_type_ssa_undef:
1008    case nir_instr_type_call:
1009    case nir_instr_type_jump:
1010       break;
1011
1012    default:
1013       unreachable("Invalid instruction type");
1014       break;
1015    }
1016
1017    return true;
1018 }
1019
1020 struct foreach_ssa_def_state {
1021    nir_foreach_ssa_def_cb cb;
1022    void *client_state;
1023 };
1024
1025 static inline bool
1026 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1027 {
1028    struct foreach_ssa_def_state *state = void_state;
1029
1030    if (dest->is_ssa)
1031       return state->cb(&dest->ssa, state->client_state);
1032    else
1033       return true;
1034 }
1035
1036 bool
1037 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1038 {
1039    switch (instr->type) {
1040    case nir_instr_type_alu:
1041    case nir_instr_type_tex:
1042    case nir_instr_type_intrinsic:
1043    case nir_instr_type_phi:
1044    case nir_instr_type_parallel_copy: {
1045       struct foreach_ssa_def_state foreach_state = {cb, state};
1046       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1047    }
1048
1049    case nir_instr_type_load_const:
1050       return cb(&nir_instr_as_load_const(instr)->def, state);
1051    case nir_instr_type_ssa_undef:
1052       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1053    case nir_instr_type_call:
1054    case nir_instr_type_jump:
1055       return true;
1056    default:
1057       unreachable("Invalid instruction type");
1058    }
1059 }
1060
1061 static bool
1062 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1063 {
1064    if (!cb(src, state))
1065       return false;
1066    if (!src->is_ssa && src->reg.indirect)
1067       return cb(src->reg.indirect, state);
1068    return true;
1069 }
1070
1071 static bool
1072 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1073                       void *state)
1074 {
1075    if (deref->deref_array_type == nir_deref_array_type_indirect)
1076       return visit_src(&deref->indirect, cb, state);
1077    return true;
1078 }
1079
1080 static bool
1081 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1082 {
1083    nir_deref *cur = &deref->deref;
1084    while (cur != NULL) {
1085       if (cur->deref_type == nir_deref_type_array) {
1086          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1087             return false;
1088       }
1089
1090       cur = cur->child;
1091    }
1092
1093    return true;
1094 }
1095
1096 static bool
1097 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1098 {
1099    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1100       if (!visit_src(&instr->src[i].src, cb, state))
1101          return false;
1102
1103    return true;
1104 }
1105
1106 static bool
1107 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1108 {
1109    for (unsigned i = 0; i < instr->num_srcs; i++) {
1110       if (!visit_src(&instr->src[i].src, cb, state))
1111          return false;
1112    }
1113
1114    if (instr->texture != NULL) {
1115       if (!visit_deref_src(instr->texture, cb, state))
1116          return false;
1117    }
1118
1119    if (instr->sampler != NULL) {
1120       if (!visit_deref_src(instr->sampler, cb, state))
1121          return false;
1122    }
1123
1124    return true;
1125 }
1126
1127 static bool
1128 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1129                     void *state)
1130 {
1131    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1132    for (unsigned i = 0; i < num_srcs; i++) {
1133       if (!visit_src(&instr->src[i], cb, state))
1134          return false;
1135    }
1136
1137    unsigned num_vars =
1138       nir_intrinsic_infos[instr->intrinsic].num_variables;
1139    for (unsigned i = 0; i < num_vars; i++) {
1140       if (!visit_deref_src(instr->variables[i], cb, state))
1141          return false;
1142    }
1143
1144    return true;
1145 }
1146
1147 static bool
1148 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1149 {
1150    return true;
1151 }
1152
1153 static bool
1154 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1155                      void *state)
1156 {
1157    return true;
1158 }
1159
1160 static bool
1161 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1162 {
1163    nir_foreach_phi_src(instr, src) {
1164       if (!visit_src(&src->src, cb, state))
1165          return false;
1166    }
1167
1168    return true;
1169 }
1170
1171 static bool
1172 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1173                         nir_foreach_src_cb cb, void *state)
1174 {
1175    nir_foreach_parallel_copy_entry(instr, entry) {
1176       if (!visit_src(&entry->src, cb, state))
1177          return false;
1178    }
1179
1180    return true;
1181 }
1182
1183 typedef struct {
1184    void *state;
1185    nir_foreach_src_cb cb;
1186 } visit_dest_indirect_state;
1187
1188 static bool
1189 visit_dest_indirect(nir_dest *dest, void *_state)
1190 {
1191    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1192
1193    if (!dest->is_ssa && dest->reg.indirect)
1194       return state->cb(dest->reg.indirect, state->state);
1195
1196    return true;
1197 }
1198
1199 bool
1200 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1201 {
1202    switch (instr->type) {
1203    case nir_instr_type_alu:
1204       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1205          return false;
1206       break;
1207    case nir_instr_type_intrinsic:
1208       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1209          return false;
1210       break;
1211    case nir_instr_type_tex:
1212       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1213          return false;
1214       break;
1215    case nir_instr_type_call:
1216       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1217          return false;
1218       break;
1219    case nir_instr_type_load_const:
1220       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1221          return false;
1222       break;
1223    case nir_instr_type_phi:
1224       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1225          return false;
1226       break;
1227    case nir_instr_type_parallel_copy:
1228       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1229                                    cb, state))
1230          return false;
1231       break;
1232    case nir_instr_type_jump:
1233    case nir_instr_type_ssa_undef:
1234       return true;
1235
1236    default:
1237       unreachable("Invalid instruction type");
1238       break;
1239    }
1240
1241    visit_dest_indirect_state dest_state;
1242    dest_state.state = state;
1243    dest_state.cb = cb;
1244    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1245 }
1246
1247 nir_const_value *
1248 nir_src_as_const_value(nir_src src)
1249 {
1250    if (!src.is_ssa)
1251       return NULL;
1252
1253    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1254       return NULL;
1255
1256    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1257
1258    return &load->value;
1259 }
1260
1261 /**
1262  * Returns true if the source is known to be dynamically uniform. Otherwise it
1263  * returns false which means it may or may not be dynamically uniform but it
1264  * can't be determined.
1265  */
1266 bool
1267 nir_src_is_dynamically_uniform(nir_src src)
1268 {
1269    if (!src.is_ssa)
1270       return false;
1271
1272    /* Constants are trivially dynamically uniform */
1273    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1274       return true;
1275
1276    /* As are uniform variables */
1277    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1278       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1279
1280       if (intr->intrinsic == nir_intrinsic_load_uniform)
1281          return true;
1282    }
1283
1284    /* XXX: this could have many more tests, such as when a sampler function is
1285     * called with dynamically uniform arguments.
1286     */
1287    return false;
1288 }
1289
1290 static void
1291 src_remove_all_uses(nir_src *src)
1292 {
1293    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1294       if (!src_is_valid(src))
1295          continue;
1296
1297       list_del(&src->use_link);
1298    }
1299 }
1300
1301 static void
1302 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1303 {
1304    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1305       if (!src_is_valid(src))
1306          continue;
1307
1308       if (parent_instr) {
1309          src->parent_instr = parent_instr;
1310          if (src->is_ssa)
1311             list_addtail(&src->use_link, &src->ssa->uses);
1312          else
1313             list_addtail(&src->use_link, &src->reg.reg->uses);
1314       } else {
1315          assert(parent_if);
1316          src->parent_if = parent_if;
1317          if (src->is_ssa)
1318             list_addtail(&src->use_link, &src->ssa->if_uses);
1319          else
1320             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1321       }
1322    }
1323 }
1324
1325 void
1326 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1327 {
1328    assert(!src_is_valid(src) || src->parent_instr == instr);
1329
1330    src_remove_all_uses(src);
1331    *src = new_src;
1332    src_add_all_uses(src, instr, NULL);
1333 }
1334
1335 void
1336 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1337 {
1338    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1339
1340    src_remove_all_uses(dest);
1341    src_remove_all_uses(src);
1342    *dest = *src;
1343    *src = NIR_SRC_INIT;
1344    src_add_all_uses(dest, dest_instr, NULL);
1345 }
1346
1347 void
1348 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1349 {
1350    nir_src *src = &if_stmt->condition;
1351    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1352
1353    src_remove_all_uses(src);
1354    *src = new_src;
1355    src_add_all_uses(src, NULL, if_stmt);
1356 }
1357
1358 void
1359 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1360 {
1361    if (dest->is_ssa) {
1362       /* We can only overwrite an SSA destination if it has no uses. */
1363       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1364    } else {
1365       list_del(&dest->reg.def_link);
1366       if (dest->reg.indirect)
1367          src_remove_all_uses(dest->reg.indirect);
1368    }
1369
1370    /* We can't re-write with an SSA def */
1371    assert(!new_dest.is_ssa);
1372
1373    nir_dest_copy(dest, &new_dest, instr);
1374
1375    dest->reg.parent_instr = instr;
1376    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1377
1378    if (dest->reg.indirect)
1379       src_add_all_uses(dest->reg.indirect, instr, NULL);
1380 }
1381
1382 void
1383 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1384                  unsigned num_components, const char *name)
1385 {
1386    def->name = name;
1387    def->parent_instr = instr;
1388    list_inithead(&def->uses);
1389    list_inithead(&def->if_uses);
1390    def->num_components = num_components;
1391
1392    if (instr->block) {
1393       nir_function_impl *impl =
1394          nir_cf_node_get_function(&instr->block->cf_node);
1395
1396       def->index = impl->ssa_alloc++;
1397    } else {
1398       def->index = UINT_MAX;
1399    }
1400 }
1401
1402 void
1403 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1404                  unsigned num_components, const char *name)
1405 {
1406    dest->is_ssa = true;
1407    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1408 }
1409
1410 void
1411 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1412 {
1413    assert(!new_src.is_ssa || def != new_src.ssa);
1414
1415    nir_foreach_use_safe(def, use_src)
1416       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1417
1418    nir_foreach_if_use_safe(def, use_src)
1419       nir_if_rewrite_condition(use_src->parent_if, new_src);
1420 }
1421
1422 static bool
1423 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1424 {
1425    assert(start->block == end->block);
1426
1427    if (between->block != start->block)
1428       return false;
1429
1430    /* Search backwards looking for "between" */
1431    while (start != end) {
1432       if (between == end)
1433          return true;
1434
1435       end = nir_instr_prev(end);
1436       assert(end);
1437    }
1438
1439    return false;
1440 }
1441
1442 /* Replaces all uses of the given SSA def with the given source but only if
1443  * the use comes after the after_me instruction.  This can be useful if you
1444  * are emitting code to fix up the result of some instruction: you can freely
1445  * use the result in that code and then call rewrite_uses_after and pass the
1446  * last fixup instruction as after_me and it will replace all of the uses you
1447  * want without touching the fixup code.
1448  *
1449  * This function assumes that after_me is in the same block as
1450  * def->parent_instr and that after_me comes after def->parent_instr.
1451  */
1452 void
1453 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1454                                nir_instr *after_me)
1455 {
1456    assert(!new_src.is_ssa || def != new_src.ssa);
1457
1458    nir_foreach_use_safe(def, use_src) {
1459       assert(use_src->parent_instr != def->parent_instr);
1460       /* Since def already dominates all of its uses, the only way a use can
1461        * not be dominated by after_me is if it is between def and after_me in
1462        * the instruction list.
1463        */
1464       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1465          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1466    }
1467
1468    nir_foreach_if_use_safe(def, use_src)
1469       nir_if_rewrite_condition(use_src->parent_if, new_src);
1470 }
1471
1472 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1473                             bool reverse, void *state);
1474
1475 static inline bool
1476 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1477 {
1478    if (reverse) {
1479       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1480                                       &if_stmt->else_list) {
1481          if (!foreach_cf_node(node, cb, reverse, state))
1482             return false;
1483       }
1484
1485       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1486                                       &if_stmt->then_list) {
1487          if (!foreach_cf_node(node, cb, reverse, state))
1488             return false;
1489       }
1490    } else {
1491       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1492          if (!foreach_cf_node(node, cb, reverse, state))
1493             return false;
1494       }
1495
1496       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1497          if (!foreach_cf_node(node, cb, reverse, state))
1498             return false;
1499       }
1500    }
1501
1502    return true;
1503 }
1504
1505 static inline bool
1506 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1507 {
1508    if (reverse) {
1509       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1510          if (!foreach_cf_node(node, cb, reverse, state))
1511             return false;
1512       }
1513    } else {
1514       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1515          if (!foreach_cf_node(node, cb, reverse, state))
1516             return false;
1517       }
1518    }
1519
1520    return true;
1521 }
1522
1523 static bool
1524 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1525                 bool reverse, void *state)
1526 {
1527    switch (node->type) {
1528    case nir_cf_node_block:
1529       return cb(nir_cf_node_as_block(node), state);
1530    case nir_cf_node_if:
1531       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1532    case nir_cf_node_loop:
1533       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1534       break;
1535
1536    default:
1537       unreachable("Invalid CFG node type");
1538       break;
1539    }
1540
1541    return false;
1542 }
1543
1544 bool
1545 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1546                              void *state)
1547 {
1548    return foreach_cf_node(node, cb, false, state);
1549 }
1550
1551 bool
1552 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1553 {
1554    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1555       if (!foreach_cf_node(node, cb, false, state))
1556          return false;
1557    }
1558
1559    return cb(impl->end_block, state);
1560 }
1561
1562 bool
1563 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1564                           void *state)
1565 {
1566    if (!cb(impl->end_block, state))
1567       return false;
1568
1569    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1570       if (!foreach_cf_node(node, cb, true, state))
1571          return false;
1572    }
1573
1574    return true;
1575 }
1576
1577 nir_if *
1578 nir_block_get_following_if(nir_block *block)
1579 {
1580    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1581       return NULL;
1582
1583    if (nir_cf_node_is_last(&block->cf_node))
1584       return NULL;
1585
1586    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1587
1588    if (next_node->type != nir_cf_node_if)
1589       return NULL;
1590
1591    return nir_cf_node_as_if(next_node);
1592 }
1593
1594 nir_loop *
1595 nir_block_get_following_loop(nir_block *block)
1596 {
1597    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1598       return NULL;
1599
1600    if (nir_cf_node_is_last(&block->cf_node))
1601       return NULL;
1602
1603    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1604
1605    if (next_node->type != nir_cf_node_loop)
1606       return NULL;
1607
1608    return nir_cf_node_as_loop(next_node);
1609 }
1610 static bool
1611 index_block(nir_block *block, void *state)
1612 {
1613    unsigned *index = state;
1614    block->index = (*index)++;
1615    return true;
1616 }
1617
1618 void
1619 nir_index_blocks(nir_function_impl *impl)
1620 {
1621    unsigned index = 0;
1622
1623    if (impl->valid_metadata & nir_metadata_block_index)
1624       return;
1625
1626    nir_foreach_block(impl, index_block, &index);
1627
1628    impl->num_blocks = index;
1629 }
1630
1631 static bool
1632 index_ssa_def_cb(nir_ssa_def *def, void *state)
1633 {
1634    unsigned *index = (unsigned *) state;
1635    def->index = (*index)++;
1636
1637    return true;
1638 }
1639
1640 static bool
1641 index_ssa_block(nir_block *block, void *state)
1642 {
1643    nir_foreach_instr(block, instr)
1644       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1645
1646    return true;
1647 }
1648
1649 /**
1650  * The indices are applied top-to-bottom which has the very nice property
1651  * that, if A dominates B, then A->index <= B->index.
1652  */
1653 void
1654 nir_index_ssa_defs(nir_function_impl *impl)
1655 {
1656    unsigned index = 0;
1657    nir_foreach_block(impl, index_ssa_block, &index);
1658    impl->ssa_alloc = index;
1659 }
1660
1661 static bool
1662 index_instrs_block(nir_block *block, void *state)
1663 {
1664    unsigned *index = state;
1665    nir_foreach_instr(block, instr)
1666       instr->index = (*index)++;
1667
1668    return true;
1669 }
1670
1671 /**
1672  * The indices are applied top-to-bottom which has the very nice property
1673  * that, if A dominates B, then A->index <= B->index.
1674  */
1675 unsigned
1676 nir_index_instrs(nir_function_impl *impl)
1677 {
1678    unsigned index = 0;
1679    nir_foreach_block(impl, index_instrs_block, &index);
1680    return index;
1681 }
1682
1683 nir_intrinsic_op
1684 nir_intrinsic_from_system_value(gl_system_value val)
1685 {
1686    switch (val) {
1687    case SYSTEM_VALUE_VERTEX_ID:
1688       return nir_intrinsic_load_vertex_id;
1689    case SYSTEM_VALUE_INSTANCE_ID:
1690       return nir_intrinsic_load_instance_id;
1691    case SYSTEM_VALUE_DRAW_ID:
1692       return nir_intrinsic_load_draw_id;
1693    case SYSTEM_VALUE_BASE_INSTANCE:
1694       return nir_intrinsic_load_base_instance;
1695    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1696       return nir_intrinsic_load_vertex_id_zero_base;
1697    case SYSTEM_VALUE_BASE_VERTEX:
1698       return nir_intrinsic_load_base_vertex;
1699    case SYSTEM_VALUE_INVOCATION_ID:
1700       return nir_intrinsic_load_invocation_id;
1701    case SYSTEM_VALUE_FRONT_FACE:
1702       return nir_intrinsic_load_front_face;
1703    case SYSTEM_VALUE_SAMPLE_ID:
1704       return nir_intrinsic_load_sample_id;
1705    case SYSTEM_VALUE_SAMPLE_POS:
1706       return nir_intrinsic_load_sample_pos;
1707    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1708       return nir_intrinsic_load_sample_mask_in;
1709    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1710       return nir_intrinsic_load_local_invocation_id;
1711    case SYSTEM_VALUE_WORK_GROUP_ID:
1712       return nir_intrinsic_load_work_group_id;
1713    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1714       return nir_intrinsic_load_num_work_groups;
1715    case SYSTEM_VALUE_PRIMITIVE_ID:
1716       return nir_intrinsic_load_primitive_id;
1717    case SYSTEM_VALUE_TESS_COORD:
1718       return nir_intrinsic_load_tess_coord;
1719    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1720       return nir_intrinsic_load_tess_level_outer;
1721    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1722       return nir_intrinsic_load_tess_level_inner;
1723    case SYSTEM_VALUE_VERTICES_IN:
1724       return nir_intrinsic_load_patch_vertices_in;
1725    case SYSTEM_VALUE_HELPER_INVOCATION:
1726       return nir_intrinsic_load_helper_invocation;
1727    default:
1728       unreachable("system value does not directly correspond to intrinsic");
1729    }
1730 }
1731
1732 gl_system_value
1733 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1734 {
1735    switch (intrin) {
1736    case nir_intrinsic_load_vertex_id:
1737       return SYSTEM_VALUE_VERTEX_ID;
1738    case nir_intrinsic_load_instance_id:
1739       return SYSTEM_VALUE_INSTANCE_ID;
1740    case nir_intrinsic_load_draw_id:
1741       return SYSTEM_VALUE_DRAW_ID;
1742    case nir_intrinsic_load_base_instance:
1743       return SYSTEM_VALUE_BASE_INSTANCE;
1744    case nir_intrinsic_load_vertex_id_zero_base:
1745       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1746    case nir_intrinsic_load_base_vertex:
1747       return SYSTEM_VALUE_BASE_VERTEX;
1748    case nir_intrinsic_load_invocation_id:
1749       return SYSTEM_VALUE_INVOCATION_ID;
1750    case nir_intrinsic_load_front_face:
1751       return SYSTEM_VALUE_FRONT_FACE;
1752    case nir_intrinsic_load_sample_id:
1753       return SYSTEM_VALUE_SAMPLE_ID;
1754    case nir_intrinsic_load_sample_pos:
1755       return SYSTEM_VALUE_SAMPLE_POS;
1756    case nir_intrinsic_load_sample_mask_in:
1757       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1758    case nir_intrinsic_load_local_invocation_id:
1759       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1760    case nir_intrinsic_load_num_work_groups:
1761       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1762    case nir_intrinsic_load_work_group_id:
1763       return SYSTEM_VALUE_WORK_GROUP_ID;
1764    case nir_intrinsic_load_primitive_id:
1765       return SYSTEM_VALUE_PRIMITIVE_ID;
1766    case nir_intrinsic_load_tess_coord:
1767       return SYSTEM_VALUE_TESS_COORD;
1768    case nir_intrinsic_load_tess_level_outer:
1769       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1770    case nir_intrinsic_load_tess_level_inner:
1771       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1772    case nir_intrinsic_load_patch_vertices_in:
1773       return SYSTEM_VALUE_VERTICES_IN;
1774    case nir_intrinsic_load_helper_invocation:
1775       return SYSTEM_VALUE_HELPER_INVOCATION;
1776    default:
1777       unreachable("intrinsic doesn't produce a system value");
1778    }
1779 }