nir: Return a cursor from nir_instr_remove
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include "util/half_float.h"
31 #include <limits.h>
32 #include <assert.h>
33 #include <math.h>
34
35 nir_shader *
36 nir_shader_create(void *mem_ctx,
37 gl_shader_stage stage,
38 const nir_shader_compiler_options *options,
39 shader_info *si)
40 {
41 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
42
43 exec_list_make_empty(&shader->uniforms);
44 exec_list_make_empty(&shader->inputs);
45 exec_list_make_empty(&shader->outputs);
46 exec_list_make_empty(&shader->shared);
47
48 shader->options = options;
49
50 if (si) {
51 assert(si->stage == stage);
52 shader->info = *si;
53 } else {
54 shader->info.stage = stage;
55 }
56
57 exec_list_make_empty(&shader->functions);
58 exec_list_make_empty(&shader->registers);
59 exec_list_make_empty(&shader->globals);
60 exec_list_make_empty(&shader->system_values);
61 shader->reg_alloc = 0;
62
63 shader->num_inputs = 0;
64 shader->num_outputs = 0;
65 shader->num_uniforms = 0;
66 shader->num_shared = 0;
67
68 return shader;
69 }
70
71 static nir_register *
72 reg_create(void *mem_ctx, struct exec_list *list)
73 {
74 nir_register *reg = ralloc(mem_ctx, nir_register);
75
76 list_inithead(&reg->uses);
77 list_inithead(&reg->defs);
78 list_inithead(&reg->if_uses);
79
80 reg->num_components = 0;
81 reg->bit_size = 32;
82 reg->num_array_elems = 0;
83 reg->is_packed = false;
84 reg->name = NULL;
85
86 exec_list_push_tail(list, &reg->node);
87
88 return reg;
89 }
90
91 nir_register *
92 nir_global_reg_create(nir_shader *shader)
93 {
94 nir_register *reg = reg_create(shader, &shader->registers);
95 reg->index = shader->reg_alloc++;
96 reg->is_global = true;
97
98 return reg;
99 }
100
101 nir_register *
102 nir_local_reg_create(nir_function_impl *impl)
103 {
104 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
105 reg->index = impl->reg_alloc++;
106 reg->is_global = false;
107
108 return reg;
109 }
110
111 void
112 nir_reg_remove(nir_register *reg)
113 {
114 exec_node_remove(&reg->node);
115 }
116
117 void
118 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
119 {
120 switch (var->data.mode) {
121 case nir_var_all:
122 assert(!"invalid mode");
123 break;
124
125 case nir_var_local:
126 assert(!"nir_shader_add_variable cannot be used for local variables");
127 break;
128
129 case nir_var_param:
130 assert(!"nir_shader_add_variable cannot be used for function parameters");
131 break;
132
133 case nir_var_global:
134 exec_list_push_tail(&shader->globals, &var->node);
135 break;
136
137 case nir_var_shader_in:
138 exec_list_push_tail(&shader->inputs, &var->node);
139 break;
140
141 case nir_var_shader_out:
142 exec_list_push_tail(&shader->outputs, &var->node);
143 break;
144
145 case nir_var_uniform:
146 case nir_var_shader_storage:
147 exec_list_push_tail(&shader->uniforms, &var->node);
148 break;
149
150 case nir_var_shared:
151 assert(shader->info.stage == MESA_SHADER_COMPUTE);
152 exec_list_push_tail(&shader->shared, &var->node);
153 break;
154
155 case nir_var_system_value:
156 exec_list_push_tail(&shader->system_values, &var->node);
157 break;
158 }
159 }
160
161 nir_variable *
162 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
163 const struct glsl_type *type, const char *name)
164 {
165 nir_variable *var = rzalloc(shader, nir_variable);
166 var->name = ralloc_strdup(var, name);
167 var->type = type;
168 var->data.mode = mode;
169
170 if ((mode == nir_var_shader_in &&
171 shader->info.stage != MESA_SHADER_VERTEX) ||
172 (mode == nir_var_shader_out &&
173 shader->info.stage != MESA_SHADER_FRAGMENT))
174 var->data.interpolation = INTERP_MODE_SMOOTH;
175
176 if (mode == nir_var_shader_in || mode == nir_var_uniform)
177 var->data.read_only = true;
178
179 nir_shader_add_variable(shader, var);
180
181 return var;
182 }
183
184 nir_variable *
185 nir_local_variable_create(nir_function_impl *impl,
186 const struct glsl_type *type, const char *name)
187 {
188 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
189 var->name = ralloc_strdup(var, name);
190 var->type = type;
191 var->data.mode = nir_var_local;
192
193 nir_function_impl_add_variable(impl, var);
194
195 return var;
196 }
197
198 nir_function *
199 nir_function_create(nir_shader *shader, const char *name)
200 {
201 nir_function *func = ralloc(shader, nir_function);
202
203 exec_list_push_tail(&shader->functions, &func->node);
204
205 func->name = ralloc_strdup(func, name);
206 func->shader = shader;
207 func->num_params = 0;
208 func->params = NULL;
209 func->return_type = glsl_void_type();
210 func->impl = NULL;
211
212 return func;
213 }
214
215 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
216 {
217 dest->is_ssa = src->is_ssa;
218 if (src->is_ssa) {
219 dest->ssa = src->ssa;
220 } else {
221 dest->reg.base_offset = src->reg.base_offset;
222 dest->reg.reg = src->reg.reg;
223 if (src->reg.indirect) {
224 dest->reg.indirect = ralloc(mem_ctx, nir_src);
225 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
226 } else {
227 dest->reg.indirect = NULL;
228 }
229 }
230 }
231
232 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
233 {
234 /* Copying an SSA definition makes no sense whatsoever. */
235 assert(!src->is_ssa);
236
237 dest->is_ssa = false;
238
239 dest->reg.base_offset = src->reg.base_offset;
240 dest->reg.reg = src->reg.reg;
241 if (src->reg.indirect) {
242 dest->reg.indirect = ralloc(instr, nir_src);
243 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
244 } else {
245 dest->reg.indirect = NULL;
246 }
247 }
248
249 void
250 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
251 nir_alu_instr *instr)
252 {
253 nir_src_copy(&dest->src, &src->src, &instr->instr);
254 dest->abs = src->abs;
255 dest->negate = src->negate;
256 for (unsigned i = 0; i < 4; i++)
257 dest->swizzle[i] = src->swizzle[i];
258 }
259
260 void
261 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
262 nir_alu_instr *instr)
263 {
264 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
265 dest->write_mask = src->write_mask;
266 dest->saturate = src->saturate;
267 }
268
269
270 static void
271 cf_init(nir_cf_node *node, nir_cf_node_type type)
272 {
273 exec_node_init(&node->node);
274 node->parent = NULL;
275 node->type = type;
276 }
277
278 nir_function_impl *
279 nir_function_impl_create_bare(nir_shader *shader)
280 {
281 nir_function_impl *impl = ralloc(shader, nir_function_impl);
282
283 impl->function = NULL;
284
285 cf_init(&impl->cf_node, nir_cf_node_function);
286
287 exec_list_make_empty(&impl->body);
288 exec_list_make_empty(&impl->registers);
289 exec_list_make_empty(&impl->locals);
290 impl->num_params = 0;
291 impl->params = NULL;
292 impl->return_var = NULL;
293 impl->reg_alloc = 0;
294 impl->ssa_alloc = 0;
295 impl->valid_metadata = nir_metadata_none;
296
297 /* create start & end blocks */
298 nir_block *start_block = nir_block_create(shader);
299 nir_block *end_block = nir_block_create(shader);
300 start_block->cf_node.parent = &impl->cf_node;
301 end_block->cf_node.parent = &impl->cf_node;
302 impl->end_block = end_block;
303
304 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
305
306 start_block->successors[0] = end_block;
307 _mesa_set_add(end_block->predecessors, start_block);
308 return impl;
309 }
310
311 nir_function_impl *
312 nir_function_impl_create(nir_function *function)
313 {
314 assert(function->impl == NULL);
315
316 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
317
318 function->impl = impl;
319 impl->function = function;
320
321 impl->num_params = function->num_params;
322 impl->params = ralloc_array(function->shader,
323 nir_variable *, impl->num_params);
324
325 for (unsigned i = 0; i < impl->num_params; i++) {
326 impl->params[i] = rzalloc(function->shader, nir_variable);
327 impl->params[i]->type = function->params[i].type;
328 impl->params[i]->data.mode = nir_var_param;
329 impl->params[i]->data.location = i;
330 }
331
332 if (!glsl_type_is_void(function->return_type)) {
333 impl->return_var = rzalloc(function->shader, nir_variable);
334 impl->return_var->type = function->return_type;
335 impl->return_var->data.mode = nir_var_param;
336 impl->return_var->data.location = -1;
337 } else {
338 impl->return_var = NULL;
339 }
340
341 return impl;
342 }
343
344 nir_block *
345 nir_block_create(nir_shader *shader)
346 {
347 nir_block *block = rzalloc(shader, nir_block);
348
349 cf_init(&block->cf_node, nir_cf_node_block);
350
351 block->successors[0] = block->successors[1] = NULL;
352 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
353 _mesa_key_pointer_equal);
354 block->imm_dom = NULL;
355 /* XXX maybe it would be worth it to defer allocation? This
356 * way it doesn't get allocated for shader refs that never run
357 * nir_calc_dominance? For example, state-tracker creates an
358 * initial IR, clones that, runs appropriate lowering pass, passes
359 * to driver which does common lowering/opt, and then stores ref
360 * which is later used to do state specific lowering and futher
361 * opt. Do any of the references not need dominance metadata?
362 */
363 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
364 _mesa_key_pointer_equal);
365
366 exec_list_make_empty(&block->instr_list);
367
368 return block;
369 }
370
371 static inline void
372 src_init(nir_src *src)
373 {
374 src->is_ssa = false;
375 src->reg.reg = NULL;
376 src->reg.indirect = NULL;
377 src->reg.base_offset = 0;
378 }
379
380 nir_if *
381 nir_if_create(nir_shader *shader)
382 {
383 nir_if *if_stmt = ralloc(shader, nir_if);
384
385 cf_init(&if_stmt->cf_node, nir_cf_node_if);
386 src_init(&if_stmt->condition);
387
388 nir_block *then = nir_block_create(shader);
389 exec_list_make_empty(&if_stmt->then_list);
390 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
391 then->cf_node.parent = &if_stmt->cf_node;
392
393 nir_block *else_stmt = nir_block_create(shader);
394 exec_list_make_empty(&if_stmt->else_list);
395 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
396 else_stmt->cf_node.parent = &if_stmt->cf_node;
397
398 return if_stmt;
399 }
400
401 nir_loop *
402 nir_loop_create(nir_shader *shader)
403 {
404 nir_loop *loop = rzalloc(shader, nir_loop);
405
406 cf_init(&loop->cf_node, nir_cf_node_loop);
407
408 nir_block *body = nir_block_create(shader);
409 exec_list_make_empty(&loop->body);
410 exec_list_push_tail(&loop->body, &body->cf_node.node);
411 body->cf_node.parent = &loop->cf_node;
412
413 body->successors[0] = body;
414 _mesa_set_add(body->predecessors, body);
415
416 return loop;
417 }
418
419 static void
420 instr_init(nir_instr *instr, nir_instr_type type)
421 {
422 instr->type = type;
423 instr->block = NULL;
424 exec_node_init(&instr->node);
425 }
426
427 static void
428 dest_init(nir_dest *dest)
429 {
430 dest->is_ssa = false;
431 dest->reg.reg = NULL;
432 dest->reg.indirect = NULL;
433 dest->reg.base_offset = 0;
434 }
435
436 static void
437 alu_dest_init(nir_alu_dest *dest)
438 {
439 dest_init(&dest->dest);
440 dest->saturate = false;
441 dest->write_mask = 0xf;
442 }
443
444 static void
445 alu_src_init(nir_alu_src *src)
446 {
447 src_init(&src->src);
448 src->abs = src->negate = false;
449 src->swizzle[0] = 0;
450 src->swizzle[1] = 1;
451 src->swizzle[2] = 2;
452 src->swizzle[3] = 3;
453 }
454
455 nir_alu_instr *
456 nir_alu_instr_create(nir_shader *shader, nir_op op)
457 {
458 unsigned num_srcs = nir_op_infos[op].num_inputs;
459 /* TODO: don't use rzalloc */
460 nir_alu_instr *instr =
461 rzalloc_size(shader,
462 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
463
464 instr_init(&instr->instr, nir_instr_type_alu);
465 instr->op = op;
466 alu_dest_init(&instr->dest);
467 for (unsigned i = 0; i < num_srcs; i++)
468 alu_src_init(&instr->src[i]);
469
470 return instr;
471 }
472
473 nir_jump_instr *
474 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
475 {
476 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
477 instr_init(&instr->instr, nir_instr_type_jump);
478 instr->type = type;
479 return instr;
480 }
481
482 nir_load_const_instr *
483 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
484 unsigned bit_size)
485 {
486 nir_load_const_instr *instr = rzalloc(shader, nir_load_const_instr);
487 instr_init(&instr->instr, nir_instr_type_load_const);
488
489 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
490
491 return instr;
492 }
493
494 nir_intrinsic_instr *
495 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
496 {
497 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
498 /* TODO: don't use rzalloc */
499 nir_intrinsic_instr *instr =
500 rzalloc_size(shader,
501 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
502
503 instr_init(&instr->instr, nir_instr_type_intrinsic);
504 instr->intrinsic = op;
505
506 if (nir_intrinsic_infos[op].has_dest)
507 dest_init(&instr->dest);
508
509 for (unsigned i = 0; i < num_srcs; i++)
510 src_init(&instr->src[i]);
511
512 return instr;
513 }
514
515 nir_call_instr *
516 nir_call_instr_create(nir_shader *shader, nir_function *callee)
517 {
518 nir_call_instr *instr = ralloc(shader, nir_call_instr);
519 instr_init(&instr->instr, nir_instr_type_call);
520
521 instr->callee = callee;
522 instr->num_params = callee->num_params;
523 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
524 instr->return_deref = NULL;
525
526 return instr;
527 }
528
529 nir_tex_instr *
530 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
531 {
532 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
533 instr_init(&instr->instr, nir_instr_type_tex);
534
535 dest_init(&instr->dest);
536
537 instr->num_srcs = num_srcs;
538 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
539 for (unsigned i = 0; i < num_srcs; i++)
540 src_init(&instr->src[i].src);
541
542 instr->texture_index = 0;
543 instr->texture_array_size = 0;
544 instr->texture = NULL;
545 instr->sampler_index = 0;
546 instr->sampler = NULL;
547
548 return instr;
549 }
550
551 void
552 nir_tex_instr_add_src(nir_tex_instr *tex,
553 nir_tex_src_type src_type,
554 nir_src src)
555 {
556 nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
557 tex->num_srcs + 1);
558
559 for (unsigned i = 0; i < tex->num_srcs; i++) {
560 new_srcs[i].src_type = tex->src[i].src_type;
561 nir_instr_move_src(&tex->instr, &new_srcs[i].src,
562 &tex->src[i].src);
563 }
564
565 ralloc_free(tex->src);
566 tex->src = new_srcs;
567
568 tex->src[tex->num_srcs].src_type = src_type;
569 nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs].src, src);
570 tex->num_srcs++;
571 }
572
573 void
574 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
575 {
576 assert(src_idx < tex->num_srcs);
577
578 /* First rewrite the source to NIR_SRC_INIT */
579 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
580
581 /* Now, move all of the other sources down */
582 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
583 tex->src[i-1].src_type = tex->src[i].src_type;
584 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
585 }
586 tex->num_srcs--;
587 }
588
589 nir_phi_instr *
590 nir_phi_instr_create(nir_shader *shader)
591 {
592 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
593 instr_init(&instr->instr, nir_instr_type_phi);
594
595 dest_init(&instr->dest);
596 exec_list_make_empty(&instr->srcs);
597 return instr;
598 }
599
600 nir_parallel_copy_instr *
601 nir_parallel_copy_instr_create(nir_shader *shader)
602 {
603 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
604 instr_init(&instr->instr, nir_instr_type_parallel_copy);
605
606 exec_list_make_empty(&instr->entries);
607
608 return instr;
609 }
610
611 nir_ssa_undef_instr *
612 nir_ssa_undef_instr_create(nir_shader *shader,
613 unsigned num_components,
614 unsigned bit_size)
615 {
616 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
617 instr_init(&instr->instr, nir_instr_type_ssa_undef);
618
619 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
620
621 return instr;
622 }
623
624 nir_deref_var *
625 nir_deref_var_create(void *mem_ctx, nir_variable *var)
626 {
627 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
628 deref->deref.deref_type = nir_deref_type_var;
629 deref->deref.child = NULL;
630 deref->deref.type = var->type;
631 deref->var = var;
632 return deref;
633 }
634
635 nir_deref_array *
636 nir_deref_array_create(void *mem_ctx)
637 {
638 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
639 deref->deref.deref_type = nir_deref_type_array;
640 deref->deref.child = NULL;
641 deref->deref_array_type = nir_deref_array_type_direct;
642 src_init(&deref->indirect);
643 deref->base_offset = 0;
644 return deref;
645 }
646
647 nir_deref_struct *
648 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
649 {
650 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
651 deref->deref.deref_type = nir_deref_type_struct;
652 deref->deref.child = NULL;
653 deref->index = field_index;
654 return deref;
655 }
656
657 nir_deref_var *
658 nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx)
659 {
660 if (deref == NULL)
661 return NULL;
662
663 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
664 ret->deref.type = deref->deref.type;
665 if (deref->deref.child)
666 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
667 return ret;
668 }
669
670 static nir_deref_array *
671 deref_array_clone(const nir_deref_array *deref, void *mem_ctx)
672 {
673 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
674 ret->base_offset = deref->base_offset;
675 ret->deref_array_type = deref->deref_array_type;
676 if (deref->deref_array_type == nir_deref_array_type_indirect) {
677 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
678 }
679 ret->deref.type = deref->deref.type;
680 if (deref->deref.child)
681 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
682 return ret;
683 }
684
685 static nir_deref_struct *
686 deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx)
687 {
688 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
689 ret->deref.type = deref->deref.type;
690 if (deref->deref.child)
691 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
692 return ret;
693 }
694
695 nir_deref *
696 nir_deref_clone(const nir_deref *deref, void *mem_ctx)
697 {
698 if (deref == NULL)
699 return NULL;
700
701 switch (deref->deref_type) {
702 case nir_deref_type_var:
703 return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref;
704 case nir_deref_type_array:
705 return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref;
706 case nir_deref_type_struct:
707 return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref;
708 default:
709 unreachable("Invalid dereference type");
710 }
711
712 return NULL;
713 }
714
715 /* This is the second step in the recursion. We've found the tail and made a
716 * copy. Now we need to iterate over all possible leaves and call the
717 * callback on each one.
718 */
719 static bool
720 deref_foreach_leaf_build_recur(nir_deref_var *deref, nir_deref *tail,
721 nir_deref_foreach_leaf_cb cb, void *state)
722 {
723 unsigned length;
724 union {
725 nir_deref_array arr;
726 nir_deref_struct str;
727 } tmp;
728
729 assert(tail->child == NULL);
730 switch (glsl_get_base_type(tail->type)) {
731 case GLSL_TYPE_UINT:
732 case GLSL_TYPE_UINT16:
733 case GLSL_TYPE_UINT64:
734 case GLSL_TYPE_INT:
735 case GLSL_TYPE_INT16:
736 case GLSL_TYPE_INT64:
737 case GLSL_TYPE_FLOAT:
738 case GLSL_TYPE_FLOAT16:
739 case GLSL_TYPE_DOUBLE:
740 case GLSL_TYPE_BOOL:
741 if (glsl_type_is_vector_or_scalar(tail->type))
742 return cb(deref, state);
743 /* Fall Through */
744
745 case GLSL_TYPE_ARRAY:
746 tmp.arr.deref.deref_type = nir_deref_type_array;
747 tmp.arr.deref.type = glsl_get_array_element(tail->type);
748 tmp.arr.deref_array_type = nir_deref_array_type_direct;
749 tmp.arr.indirect = NIR_SRC_INIT;
750 tail->child = &tmp.arr.deref;
751
752 length = glsl_get_length(tail->type);
753 for (unsigned i = 0; i < length; i++) {
754 tmp.arr.deref.child = NULL;
755 tmp.arr.base_offset = i;
756 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
757 return false;
758 }
759 return true;
760
761 case GLSL_TYPE_STRUCT:
762 tmp.str.deref.deref_type = nir_deref_type_struct;
763 tail->child = &tmp.str.deref;
764
765 length = glsl_get_length(tail->type);
766 for (unsigned i = 0; i < length; i++) {
767 tmp.arr.deref.child = NULL;
768 tmp.str.deref.type = glsl_get_struct_field(tail->type, i);
769 tmp.str.index = i;
770 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
771 return false;
772 }
773 return true;
774
775 default:
776 unreachable("Invalid type for dereference");
777 }
778 }
779
780 /* This is the first step of the foreach_leaf recursion. In this step we are
781 * walking to the end of the deref chain and making a copy in the stack as we
782 * go. This is because we don't want to mutate the deref chain that was
783 * passed in by the caller. The downside is that this deref chain is on the
784 * stack and , if the caller wants to do anything with it, they will have to
785 * make their own copy because this one will go away.
786 */
787 static bool
788 deref_foreach_leaf_copy_recur(nir_deref_var *deref, nir_deref *tail,
789 nir_deref_foreach_leaf_cb cb, void *state)
790 {
791 union {
792 nir_deref_array arr;
793 nir_deref_struct str;
794 } c;
795
796 if (tail->child) {
797 switch (tail->child->deref_type) {
798 case nir_deref_type_array:
799 c.arr = *nir_deref_as_array(tail->child);
800 tail->child = &c.arr.deref;
801 return deref_foreach_leaf_copy_recur(deref, &c.arr.deref, cb, state);
802
803 case nir_deref_type_struct:
804 c.str = *nir_deref_as_struct(tail->child);
805 tail->child = &c.str.deref;
806 return deref_foreach_leaf_copy_recur(deref, &c.str.deref, cb, state);
807
808 case nir_deref_type_var:
809 default:
810 unreachable("Invalid deref type for a child");
811 }
812 } else {
813 /* We've gotten to the end of the original deref. Time to start
814 * building our own derefs.
815 */
816 return deref_foreach_leaf_build_recur(deref, tail, cb, state);
817 }
818 }
819
820 /**
821 * This function iterates over all of the possible derefs that can be created
822 * with the given deref as the head. It then calls the provided callback with
823 * a full deref for each one.
824 *
825 * The deref passed to the callback will be allocated on the stack. You will
826 * need to make a copy if you want it to hang around.
827 */
828 bool
829 nir_deref_foreach_leaf(nir_deref_var *deref,
830 nir_deref_foreach_leaf_cb cb, void *state)
831 {
832 nir_deref_var copy = *deref;
833 return deref_foreach_leaf_copy_recur(&copy, &copy.deref, cb, state);
834 }
835
836 /* Returns a load_const instruction that represents the constant
837 * initializer for the given deref chain. The caller is responsible for
838 * ensuring that there actually is a constant initializer.
839 */
840 nir_load_const_instr *
841 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
842 {
843 nir_constant *constant = deref->var->constant_initializer;
844 assert(constant);
845
846 const nir_deref *tail = &deref->deref;
847 unsigned matrix_col = 0;
848 while (tail->child) {
849 switch (tail->child->deref_type) {
850 case nir_deref_type_array: {
851 nir_deref_array *arr = nir_deref_as_array(tail->child);
852 assert(arr->deref_array_type == nir_deref_array_type_direct);
853 if (glsl_type_is_matrix(tail->type)) {
854 assert(arr->deref.child == NULL);
855 matrix_col = arr->base_offset;
856 } else {
857 constant = constant->elements[arr->base_offset];
858 }
859 break;
860 }
861
862 case nir_deref_type_struct: {
863 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
864 break;
865 }
866
867 default:
868 unreachable("Invalid deref child type");
869 }
870
871 tail = tail->child;
872 }
873
874 unsigned bit_size = glsl_get_bit_size(tail->type);
875 nir_load_const_instr *load =
876 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
877 bit_size);
878
879 switch (glsl_get_base_type(tail->type)) {
880 case GLSL_TYPE_FLOAT:
881 case GLSL_TYPE_INT:
882 case GLSL_TYPE_UINT:
883 case GLSL_TYPE_FLOAT16:
884 case GLSL_TYPE_DOUBLE:
885 case GLSL_TYPE_INT16:
886 case GLSL_TYPE_UINT16:
887 case GLSL_TYPE_UINT64:
888 case GLSL_TYPE_INT64:
889 case GLSL_TYPE_BOOL:
890 load->value = constant->values[matrix_col];
891 break;
892 default:
893 unreachable("Invalid immediate type");
894 }
895
896 return load;
897 }
898
899 static nir_const_value
900 const_value_float(double d, unsigned bit_size)
901 {
902 nir_const_value v;
903 switch (bit_size) {
904 case 16: v.u16[0] = _mesa_float_to_half(d); break;
905 case 32: v.f32[0] = d; break;
906 case 64: v.f64[0] = d; break;
907 default:
908 unreachable("Invalid bit size");
909 }
910 return v;
911 }
912
913 static nir_const_value
914 const_value_int(int64_t i, unsigned bit_size)
915 {
916 nir_const_value v;
917 switch (bit_size) {
918 case 8: v.i8[0] = i; break;
919 case 16: v.i16[0] = i; break;
920 case 32: v.i32[0] = i; break;
921 case 64: v.i64[0] = i; break;
922 default:
923 unreachable("Invalid bit size");
924 }
925 return v;
926 }
927
928 nir_const_value
929 nir_alu_binop_identity(nir_op binop, unsigned bit_size)
930 {
931 const int64_t max_int = (1ull << (bit_size - 1)) - 1;
932 const int64_t min_int = -max_int - 1;
933 switch (binop) {
934 case nir_op_iadd:
935 return const_value_int(0, bit_size);
936 case nir_op_fadd:
937 return const_value_float(0, bit_size);
938 case nir_op_imul:
939 return const_value_int(1, bit_size);
940 case nir_op_fmul:
941 return const_value_float(1, bit_size);
942 case nir_op_imin:
943 return const_value_int(max_int, bit_size);
944 case nir_op_umin:
945 return const_value_int(~0ull, bit_size);
946 case nir_op_fmin:
947 return const_value_float(INFINITY, bit_size);
948 case nir_op_imax:
949 return const_value_int(min_int, bit_size);
950 case nir_op_umax:
951 return const_value_int(0, bit_size);
952 case nir_op_fmax:
953 return const_value_float(-INFINITY, bit_size);
954 case nir_op_iand:
955 return const_value_int(~0ull, bit_size);
956 case nir_op_ior:
957 return const_value_int(0, bit_size);
958 case nir_op_ixor:
959 return const_value_int(0, bit_size);
960 default:
961 unreachable("Invalid reduction operation");
962 }
963 }
964
965 nir_function_impl *
966 nir_cf_node_get_function(nir_cf_node *node)
967 {
968 while (node->type != nir_cf_node_function) {
969 node = node->parent;
970 }
971
972 return nir_cf_node_as_function(node);
973 }
974
975 /* Reduces a cursor by trying to convert everything to after and trying to
976 * go up to block granularity when possible.
977 */
978 static nir_cursor
979 reduce_cursor(nir_cursor cursor)
980 {
981 switch (cursor.option) {
982 case nir_cursor_before_block:
983 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
984 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
985 if (exec_list_is_empty(&cursor.block->instr_list)) {
986 /* Empty block. After is as good as before. */
987 cursor.option = nir_cursor_after_block;
988 }
989 return cursor;
990
991 case nir_cursor_after_block:
992 return cursor;
993
994 case nir_cursor_before_instr: {
995 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
996 if (prev_instr) {
997 /* Before this instruction is after the previous */
998 cursor.instr = prev_instr;
999 cursor.option = nir_cursor_after_instr;
1000 } else {
1001 /* No previous instruction. Switch to before block */
1002 cursor.block = cursor.instr->block;
1003 cursor.option = nir_cursor_before_block;
1004 }
1005 return reduce_cursor(cursor);
1006 }
1007
1008 case nir_cursor_after_instr:
1009 if (nir_instr_next(cursor.instr) == NULL) {
1010 /* This is the last instruction, switch to after block */
1011 cursor.option = nir_cursor_after_block;
1012 cursor.block = cursor.instr->block;
1013 }
1014 return cursor;
1015
1016 default:
1017 unreachable("Inavlid cursor option");
1018 }
1019 }
1020
1021 bool
1022 nir_cursors_equal(nir_cursor a, nir_cursor b)
1023 {
1024 /* Reduced cursors should be unique */
1025 a = reduce_cursor(a);
1026 b = reduce_cursor(b);
1027
1028 return a.block == b.block && a.option == b.option;
1029 }
1030
1031 static bool
1032 add_use_cb(nir_src *src, void *state)
1033 {
1034 nir_instr *instr = state;
1035
1036 src->parent_instr = instr;
1037 list_addtail(&src->use_link,
1038 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
1039
1040 return true;
1041 }
1042
1043 static bool
1044 add_ssa_def_cb(nir_ssa_def *def, void *state)
1045 {
1046 nir_instr *instr = state;
1047
1048 if (instr->block && def->index == UINT_MAX) {
1049 nir_function_impl *impl =
1050 nir_cf_node_get_function(&instr->block->cf_node);
1051
1052 def->index = impl->ssa_alloc++;
1053 }
1054
1055 return true;
1056 }
1057
1058 static bool
1059 add_reg_def_cb(nir_dest *dest, void *state)
1060 {
1061 nir_instr *instr = state;
1062
1063 if (!dest->is_ssa) {
1064 dest->reg.parent_instr = instr;
1065 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
1066 }
1067
1068 return true;
1069 }
1070
1071 static void
1072 add_defs_uses(nir_instr *instr)
1073 {
1074 nir_foreach_src(instr, add_use_cb, instr);
1075 nir_foreach_dest(instr, add_reg_def_cb, instr);
1076 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
1077 }
1078
1079 void
1080 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
1081 {
1082 switch (cursor.option) {
1083 case nir_cursor_before_block:
1084 /* Only allow inserting jumps into empty blocks. */
1085 if (instr->type == nir_instr_type_jump)
1086 assert(exec_list_is_empty(&cursor.block->instr_list));
1087
1088 instr->block = cursor.block;
1089 add_defs_uses(instr);
1090 exec_list_push_head(&cursor.block->instr_list, &instr->node);
1091 break;
1092 case nir_cursor_after_block: {
1093 /* Inserting instructions after a jump is illegal. */
1094 nir_instr *last = nir_block_last_instr(cursor.block);
1095 assert(last == NULL || last->type != nir_instr_type_jump);
1096 (void) last;
1097
1098 instr->block = cursor.block;
1099 add_defs_uses(instr);
1100 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
1101 break;
1102 }
1103 case nir_cursor_before_instr:
1104 assert(instr->type != nir_instr_type_jump);
1105 instr->block = cursor.instr->block;
1106 add_defs_uses(instr);
1107 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
1108 break;
1109 case nir_cursor_after_instr:
1110 /* Inserting instructions after a jump is illegal. */
1111 assert(cursor.instr->type != nir_instr_type_jump);
1112
1113 /* Only allow inserting jumps at the end of the block. */
1114 if (instr->type == nir_instr_type_jump)
1115 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
1116
1117 instr->block = cursor.instr->block;
1118 add_defs_uses(instr);
1119 exec_node_insert_after(&cursor.instr->node, &instr->node);
1120 break;
1121 }
1122
1123 if (instr->type == nir_instr_type_jump)
1124 nir_handle_add_jump(instr->block);
1125 }
1126
1127 static bool
1128 src_is_valid(const nir_src *src)
1129 {
1130 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1131 }
1132
1133 static bool
1134 remove_use_cb(nir_src *src, void *state)
1135 {
1136 (void) state;
1137
1138 if (src_is_valid(src))
1139 list_del(&src->use_link);
1140
1141 return true;
1142 }
1143
1144 static bool
1145 remove_def_cb(nir_dest *dest, void *state)
1146 {
1147 (void) state;
1148
1149 if (!dest->is_ssa)
1150 list_del(&dest->reg.def_link);
1151
1152 return true;
1153 }
1154
1155 static void
1156 remove_defs_uses(nir_instr *instr)
1157 {
1158 nir_foreach_dest(instr, remove_def_cb, instr);
1159 nir_foreach_src(instr, remove_use_cb, instr);
1160 }
1161
1162 void nir_instr_remove_v(nir_instr *instr)
1163 {
1164 remove_defs_uses(instr);
1165 exec_node_remove(&instr->node);
1166
1167 if (instr->type == nir_instr_type_jump) {
1168 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
1169 nir_handle_remove_jump(instr->block, jump_instr->type);
1170 }
1171 }
1172
1173 /*@}*/
1174
1175 void
1176 nir_index_local_regs(nir_function_impl *impl)
1177 {
1178 unsigned index = 0;
1179 foreach_list_typed(nir_register, reg, node, &impl->registers) {
1180 reg->index = index++;
1181 }
1182 impl->reg_alloc = index;
1183 }
1184
1185 void
1186 nir_index_global_regs(nir_shader *shader)
1187 {
1188 unsigned index = 0;
1189 foreach_list_typed(nir_register, reg, node, &shader->registers) {
1190 reg->index = index++;
1191 }
1192 shader->reg_alloc = index;
1193 }
1194
1195 static bool
1196 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
1197 {
1198 return cb(&instr->dest.dest, state);
1199 }
1200
1201 static bool
1202 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
1203 void *state)
1204 {
1205 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
1206 return cb(&instr->dest, state);
1207
1208 return true;
1209 }
1210
1211 static bool
1212 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
1213 void *state)
1214 {
1215 return cb(&instr->dest, state);
1216 }
1217
1218 static bool
1219 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
1220 {
1221 return cb(&instr->dest, state);
1222 }
1223
1224 static bool
1225 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
1226 nir_foreach_dest_cb cb, void *state)
1227 {
1228 nir_foreach_parallel_copy_entry(entry, instr) {
1229 if (!cb(&entry->dest, state))
1230 return false;
1231 }
1232
1233 return true;
1234 }
1235
1236 bool
1237 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1238 {
1239 switch (instr->type) {
1240 case nir_instr_type_alu:
1241 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1242 case nir_instr_type_intrinsic:
1243 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1244 case nir_instr_type_tex:
1245 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1246 case nir_instr_type_phi:
1247 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1248 case nir_instr_type_parallel_copy:
1249 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1250 cb, state);
1251
1252 case nir_instr_type_load_const:
1253 case nir_instr_type_ssa_undef:
1254 case nir_instr_type_call:
1255 case nir_instr_type_jump:
1256 break;
1257
1258 default:
1259 unreachable("Invalid instruction type");
1260 break;
1261 }
1262
1263 return true;
1264 }
1265
1266 struct foreach_ssa_def_state {
1267 nir_foreach_ssa_def_cb cb;
1268 void *client_state;
1269 };
1270
1271 static inline bool
1272 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1273 {
1274 struct foreach_ssa_def_state *state = void_state;
1275
1276 if (dest->is_ssa)
1277 return state->cb(&dest->ssa, state->client_state);
1278 else
1279 return true;
1280 }
1281
1282 bool
1283 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1284 {
1285 switch (instr->type) {
1286 case nir_instr_type_alu:
1287 case nir_instr_type_tex:
1288 case nir_instr_type_intrinsic:
1289 case nir_instr_type_phi:
1290 case nir_instr_type_parallel_copy: {
1291 struct foreach_ssa_def_state foreach_state = {cb, state};
1292 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1293 }
1294
1295 case nir_instr_type_load_const:
1296 return cb(&nir_instr_as_load_const(instr)->def, state);
1297 case nir_instr_type_ssa_undef:
1298 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1299 case nir_instr_type_call:
1300 case nir_instr_type_jump:
1301 return true;
1302 default:
1303 unreachable("Invalid instruction type");
1304 }
1305 }
1306
1307 static bool
1308 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1309 {
1310 if (!cb(src, state))
1311 return false;
1312 if (!src->is_ssa && src->reg.indirect)
1313 return cb(src->reg.indirect, state);
1314 return true;
1315 }
1316
1317 static bool
1318 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1319 void *state)
1320 {
1321 if (deref->deref_array_type == nir_deref_array_type_indirect)
1322 return visit_src(&deref->indirect, cb, state);
1323 return true;
1324 }
1325
1326 static bool
1327 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1328 {
1329 nir_deref *cur = &deref->deref;
1330 while (cur != NULL) {
1331 if (cur->deref_type == nir_deref_type_array) {
1332 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1333 return false;
1334 }
1335
1336 cur = cur->child;
1337 }
1338
1339 return true;
1340 }
1341
1342 static bool
1343 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1344 {
1345 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1346 if (!visit_src(&instr->src[i].src, cb, state))
1347 return false;
1348
1349 return true;
1350 }
1351
1352 static bool
1353 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1354 {
1355 for (unsigned i = 0; i < instr->num_srcs; i++) {
1356 if (!visit_src(&instr->src[i].src, cb, state))
1357 return false;
1358 }
1359
1360 if (instr->texture != NULL) {
1361 if (!visit_deref_src(instr->texture, cb, state))
1362 return false;
1363 }
1364
1365 if (instr->sampler != NULL) {
1366 if (!visit_deref_src(instr->sampler, cb, state))
1367 return false;
1368 }
1369
1370 return true;
1371 }
1372
1373 static bool
1374 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1375 void *state)
1376 {
1377 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1378 for (unsigned i = 0; i < num_srcs; i++) {
1379 if (!visit_src(&instr->src[i], cb, state))
1380 return false;
1381 }
1382
1383 unsigned num_vars =
1384 nir_intrinsic_infos[instr->intrinsic].num_variables;
1385 for (unsigned i = 0; i < num_vars; i++) {
1386 if (!visit_deref_src(instr->variables[i], cb, state))
1387 return false;
1388 }
1389
1390 return true;
1391 }
1392
1393 static bool
1394 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1395 {
1396 nir_foreach_phi_src(src, instr) {
1397 if (!visit_src(&src->src, cb, state))
1398 return false;
1399 }
1400
1401 return true;
1402 }
1403
1404 static bool
1405 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1406 nir_foreach_src_cb cb, void *state)
1407 {
1408 nir_foreach_parallel_copy_entry(entry, instr) {
1409 if (!visit_src(&entry->src, cb, state))
1410 return false;
1411 }
1412
1413 return true;
1414 }
1415
1416 typedef struct {
1417 void *state;
1418 nir_foreach_src_cb cb;
1419 } visit_dest_indirect_state;
1420
1421 static bool
1422 visit_dest_indirect(nir_dest *dest, void *_state)
1423 {
1424 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1425
1426 if (!dest->is_ssa && dest->reg.indirect)
1427 return state->cb(dest->reg.indirect, state->state);
1428
1429 return true;
1430 }
1431
1432 bool
1433 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1434 {
1435 switch (instr->type) {
1436 case nir_instr_type_alu:
1437 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1438 return false;
1439 break;
1440 case nir_instr_type_intrinsic:
1441 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1442 return false;
1443 break;
1444 case nir_instr_type_tex:
1445 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1446 return false;
1447 break;
1448 case nir_instr_type_call:
1449 /* Call instructions have no regular sources */
1450 break;
1451 case nir_instr_type_load_const:
1452 /* Constant load instructions have no regular sources */
1453 break;
1454 case nir_instr_type_phi:
1455 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1456 return false;
1457 break;
1458 case nir_instr_type_parallel_copy:
1459 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1460 cb, state))
1461 return false;
1462 break;
1463 case nir_instr_type_jump:
1464 case nir_instr_type_ssa_undef:
1465 return true;
1466
1467 default:
1468 unreachable("Invalid instruction type");
1469 break;
1470 }
1471
1472 visit_dest_indirect_state dest_state;
1473 dest_state.state = state;
1474 dest_state.cb = cb;
1475 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1476 }
1477
1478 nir_const_value *
1479 nir_src_as_const_value(nir_src src)
1480 {
1481 if (!src.is_ssa)
1482 return NULL;
1483
1484 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1485 return NULL;
1486
1487 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1488
1489 return &load->value;
1490 }
1491
1492 /**
1493 * Returns true if the source is known to be dynamically uniform. Otherwise it
1494 * returns false which means it may or may not be dynamically uniform but it
1495 * can't be determined.
1496 */
1497 bool
1498 nir_src_is_dynamically_uniform(nir_src src)
1499 {
1500 if (!src.is_ssa)
1501 return false;
1502
1503 /* Constants are trivially dynamically uniform */
1504 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1505 return true;
1506
1507 /* As are uniform variables */
1508 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1509 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1510
1511 if (intr->intrinsic == nir_intrinsic_load_uniform)
1512 return true;
1513 }
1514
1515 /* XXX: this could have many more tests, such as when a sampler function is
1516 * called with dynamically uniform arguments.
1517 */
1518 return false;
1519 }
1520
1521 static void
1522 src_remove_all_uses(nir_src *src)
1523 {
1524 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1525 if (!src_is_valid(src))
1526 continue;
1527
1528 list_del(&src->use_link);
1529 }
1530 }
1531
1532 static void
1533 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1534 {
1535 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1536 if (!src_is_valid(src))
1537 continue;
1538
1539 if (parent_instr) {
1540 src->parent_instr = parent_instr;
1541 if (src->is_ssa)
1542 list_addtail(&src->use_link, &src->ssa->uses);
1543 else
1544 list_addtail(&src->use_link, &src->reg.reg->uses);
1545 } else {
1546 assert(parent_if);
1547 src->parent_if = parent_if;
1548 if (src->is_ssa)
1549 list_addtail(&src->use_link, &src->ssa->if_uses);
1550 else
1551 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1552 }
1553 }
1554 }
1555
1556 void
1557 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1558 {
1559 assert(!src_is_valid(src) || src->parent_instr == instr);
1560
1561 src_remove_all_uses(src);
1562 *src = new_src;
1563 src_add_all_uses(src, instr, NULL);
1564 }
1565
1566 void
1567 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1568 {
1569 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1570
1571 src_remove_all_uses(dest);
1572 src_remove_all_uses(src);
1573 *dest = *src;
1574 *src = NIR_SRC_INIT;
1575 src_add_all_uses(dest, dest_instr, NULL);
1576 }
1577
1578 void
1579 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1580 {
1581 nir_src *src = &if_stmt->condition;
1582 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1583
1584 src_remove_all_uses(src);
1585 *src = new_src;
1586 src_add_all_uses(src, NULL, if_stmt);
1587 }
1588
1589 void
1590 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1591 {
1592 if (dest->is_ssa) {
1593 /* We can only overwrite an SSA destination if it has no uses. */
1594 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1595 } else {
1596 list_del(&dest->reg.def_link);
1597 if (dest->reg.indirect)
1598 src_remove_all_uses(dest->reg.indirect);
1599 }
1600
1601 /* We can't re-write with an SSA def */
1602 assert(!new_dest.is_ssa);
1603
1604 nir_dest_copy(dest, &new_dest, instr);
1605
1606 dest->reg.parent_instr = instr;
1607 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1608
1609 if (dest->reg.indirect)
1610 src_add_all_uses(dest->reg.indirect, instr, NULL);
1611 }
1612
1613 void
1614 nir_instr_rewrite_deref(nir_instr *instr, nir_deref_var **deref,
1615 nir_deref_var *new_deref)
1616 {
1617 if (*deref)
1618 visit_deref_src(*deref, remove_use_cb, NULL);
1619
1620 *deref = new_deref;
1621
1622 if (*deref)
1623 visit_deref_src(*deref, add_use_cb, instr);
1624 }
1625
1626 /* note: does *not* take ownership of 'name' */
1627 void
1628 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1629 unsigned num_components,
1630 unsigned bit_size, const char *name)
1631 {
1632 def->name = ralloc_strdup(instr, name);
1633 def->parent_instr = instr;
1634 list_inithead(&def->uses);
1635 list_inithead(&def->if_uses);
1636 def->num_components = num_components;
1637 def->bit_size = bit_size;
1638
1639 if (instr->block) {
1640 nir_function_impl *impl =
1641 nir_cf_node_get_function(&instr->block->cf_node);
1642
1643 def->index = impl->ssa_alloc++;
1644 } else {
1645 def->index = UINT_MAX;
1646 }
1647 }
1648
1649 /* note: does *not* take ownership of 'name' */
1650 void
1651 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1652 unsigned num_components, unsigned bit_size,
1653 const char *name)
1654 {
1655 dest->is_ssa = true;
1656 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1657 }
1658
1659 void
1660 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1661 {
1662 assert(!new_src.is_ssa || def != new_src.ssa);
1663
1664 nir_foreach_use_safe(use_src, def)
1665 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1666
1667 nir_foreach_if_use_safe(use_src, def)
1668 nir_if_rewrite_condition(use_src->parent_if, new_src);
1669 }
1670
1671 static bool
1672 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1673 {
1674 assert(start->block == end->block);
1675
1676 if (between->block != start->block)
1677 return false;
1678
1679 /* Search backwards looking for "between" */
1680 while (start != end) {
1681 if (between == end)
1682 return true;
1683
1684 end = nir_instr_prev(end);
1685 assert(end);
1686 }
1687
1688 return false;
1689 }
1690
1691 /* Replaces all uses of the given SSA def with the given source but only if
1692 * the use comes after the after_me instruction. This can be useful if you
1693 * are emitting code to fix up the result of some instruction: you can freely
1694 * use the result in that code and then call rewrite_uses_after and pass the
1695 * last fixup instruction as after_me and it will replace all of the uses you
1696 * want without touching the fixup code.
1697 *
1698 * This function assumes that after_me is in the same block as
1699 * def->parent_instr and that after_me comes after def->parent_instr.
1700 */
1701 void
1702 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1703 nir_instr *after_me)
1704 {
1705 assert(!new_src.is_ssa || def != new_src.ssa);
1706
1707 nir_foreach_use_safe(use_src, def) {
1708 assert(use_src->parent_instr != def->parent_instr);
1709 /* Since def already dominates all of its uses, the only way a use can
1710 * not be dominated by after_me is if it is between def and after_me in
1711 * the instruction list.
1712 */
1713 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1714 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1715 }
1716
1717 nir_foreach_if_use_safe(use_src, def)
1718 nir_if_rewrite_condition(use_src->parent_if, new_src);
1719 }
1720
1721 uint8_t
1722 nir_ssa_def_components_read(const nir_ssa_def *def)
1723 {
1724 uint8_t read_mask = 0;
1725 nir_foreach_use(use, def) {
1726 if (use->parent_instr->type == nir_instr_type_alu) {
1727 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1728 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1729 int src_idx = alu_src - &alu->src[0];
1730 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1731
1732 for (unsigned c = 0; c < 4; c++) {
1733 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1734 continue;
1735
1736 read_mask |= (1 << alu_src->swizzle[c]);
1737 }
1738 } else {
1739 return (1 << def->num_components) - 1;
1740 }
1741 }
1742
1743 return read_mask;
1744 }
1745
1746 nir_block *
1747 nir_block_cf_tree_next(nir_block *block)
1748 {
1749 if (block == NULL) {
1750 /* nir_foreach_block_safe() will call this function on a NULL block
1751 * after the last iteration, but it won't use the result so just return
1752 * NULL here.
1753 */
1754 return NULL;
1755 }
1756
1757 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1758 if (cf_next)
1759 return nir_cf_node_cf_tree_first(cf_next);
1760
1761 nir_cf_node *parent = block->cf_node.parent;
1762
1763 switch (parent->type) {
1764 case nir_cf_node_if: {
1765 /* Are we at the end of the if? Go to the beginning of the else */
1766 nir_if *if_stmt = nir_cf_node_as_if(parent);
1767 if (block == nir_if_last_then_block(if_stmt))
1768 return nir_if_first_else_block(if_stmt);
1769
1770 assert(block == nir_if_last_else_block(if_stmt));
1771 /* fall through */
1772 }
1773
1774 case nir_cf_node_loop:
1775 return nir_cf_node_as_block(nir_cf_node_next(parent));
1776
1777 case nir_cf_node_function:
1778 return NULL;
1779
1780 default:
1781 unreachable("unknown cf node type");
1782 }
1783 }
1784
1785 nir_block *
1786 nir_block_cf_tree_prev(nir_block *block)
1787 {
1788 if (block == NULL) {
1789 /* do this for consistency with nir_block_cf_tree_next() */
1790 return NULL;
1791 }
1792
1793 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1794 if (cf_prev)
1795 return nir_cf_node_cf_tree_last(cf_prev);
1796
1797 nir_cf_node *parent = block->cf_node.parent;
1798
1799 switch (parent->type) {
1800 case nir_cf_node_if: {
1801 /* Are we at the beginning of the else? Go to the end of the if */
1802 nir_if *if_stmt = nir_cf_node_as_if(parent);
1803 if (block == nir_if_first_else_block(if_stmt))
1804 return nir_if_last_then_block(if_stmt);
1805
1806 assert(block == nir_if_first_then_block(if_stmt));
1807 /* fall through */
1808 }
1809
1810 case nir_cf_node_loop:
1811 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1812
1813 case nir_cf_node_function:
1814 return NULL;
1815
1816 default:
1817 unreachable("unknown cf node type");
1818 }
1819 }
1820
1821 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1822 {
1823 switch (node->type) {
1824 case nir_cf_node_function: {
1825 nir_function_impl *impl = nir_cf_node_as_function(node);
1826 return nir_start_block(impl);
1827 }
1828
1829 case nir_cf_node_if: {
1830 nir_if *if_stmt = nir_cf_node_as_if(node);
1831 return nir_if_first_then_block(if_stmt);
1832 }
1833
1834 case nir_cf_node_loop: {
1835 nir_loop *loop = nir_cf_node_as_loop(node);
1836 return nir_loop_first_block(loop);
1837 }
1838
1839 case nir_cf_node_block: {
1840 return nir_cf_node_as_block(node);
1841 }
1842
1843 default:
1844 unreachable("unknown node type");
1845 }
1846 }
1847
1848 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1849 {
1850 switch (node->type) {
1851 case nir_cf_node_function: {
1852 nir_function_impl *impl = nir_cf_node_as_function(node);
1853 return nir_impl_last_block(impl);
1854 }
1855
1856 case nir_cf_node_if: {
1857 nir_if *if_stmt = nir_cf_node_as_if(node);
1858 return nir_if_last_else_block(if_stmt);
1859 }
1860
1861 case nir_cf_node_loop: {
1862 nir_loop *loop = nir_cf_node_as_loop(node);
1863 return nir_loop_last_block(loop);
1864 }
1865
1866 case nir_cf_node_block: {
1867 return nir_cf_node_as_block(node);
1868 }
1869
1870 default:
1871 unreachable("unknown node type");
1872 }
1873 }
1874
1875 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1876 {
1877 if (node->type == nir_cf_node_block)
1878 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1879 else if (node->type == nir_cf_node_function)
1880 return NULL;
1881 else
1882 return nir_cf_node_as_block(nir_cf_node_next(node));
1883 }
1884
1885 nir_if *
1886 nir_block_get_following_if(nir_block *block)
1887 {
1888 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1889 return NULL;
1890
1891 if (nir_cf_node_is_last(&block->cf_node))
1892 return NULL;
1893
1894 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1895
1896 if (next_node->type != nir_cf_node_if)
1897 return NULL;
1898
1899 return nir_cf_node_as_if(next_node);
1900 }
1901
1902 nir_loop *
1903 nir_block_get_following_loop(nir_block *block)
1904 {
1905 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1906 return NULL;
1907
1908 if (nir_cf_node_is_last(&block->cf_node))
1909 return NULL;
1910
1911 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1912
1913 if (next_node->type != nir_cf_node_loop)
1914 return NULL;
1915
1916 return nir_cf_node_as_loop(next_node);
1917 }
1918
1919 void
1920 nir_index_blocks(nir_function_impl *impl)
1921 {
1922 unsigned index = 0;
1923
1924 if (impl->valid_metadata & nir_metadata_block_index)
1925 return;
1926
1927 nir_foreach_block(block, impl) {
1928 block->index = index++;
1929 }
1930
1931 impl->num_blocks = index;
1932 }
1933
1934 static bool
1935 index_ssa_def_cb(nir_ssa_def *def, void *state)
1936 {
1937 unsigned *index = (unsigned *) state;
1938 def->index = (*index)++;
1939
1940 return true;
1941 }
1942
1943 /**
1944 * The indices are applied top-to-bottom which has the very nice property
1945 * that, if A dominates B, then A->index <= B->index.
1946 */
1947 void
1948 nir_index_ssa_defs(nir_function_impl *impl)
1949 {
1950 unsigned index = 0;
1951
1952 nir_foreach_block(block, impl) {
1953 nir_foreach_instr(instr, block)
1954 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1955 }
1956
1957 impl->ssa_alloc = index;
1958 }
1959
1960 /**
1961 * The indices are applied top-to-bottom which has the very nice property
1962 * that, if A dominates B, then A->index <= B->index.
1963 */
1964 unsigned
1965 nir_index_instrs(nir_function_impl *impl)
1966 {
1967 unsigned index = 0;
1968
1969 nir_foreach_block(block, impl) {
1970 nir_foreach_instr(instr, block)
1971 instr->index = index++;
1972 }
1973
1974 return index;
1975 }
1976
1977 nir_intrinsic_op
1978 nir_intrinsic_from_system_value(gl_system_value val)
1979 {
1980 switch (val) {
1981 case SYSTEM_VALUE_VERTEX_ID:
1982 return nir_intrinsic_load_vertex_id;
1983 case SYSTEM_VALUE_INSTANCE_ID:
1984 return nir_intrinsic_load_instance_id;
1985 case SYSTEM_VALUE_DRAW_ID:
1986 return nir_intrinsic_load_draw_id;
1987 case SYSTEM_VALUE_BASE_INSTANCE:
1988 return nir_intrinsic_load_base_instance;
1989 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1990 return nir_intrinsic_load_vertex_id_zero_base;
1991 case SYSTEM_VALUE_BASE_VERTEX:
1992 return nir_intrinsic_load_base_vertex;
1993 case SYSTEM_VALUE_INVOCATION_ID:
1994 return nir_intrinsic_load_invocation_id;
1995 case SYSTEM_VALUE_FRAG_COORD:
1996 return nir_intrinsic_load_frag_coord;
1997 case SYSTEM_VALUE_FRONT_FACE:
1998 return nir_intrinsic_load_front_face;
1999 case SYSTEM_VALUE_SAMPLE_ID:
2000 return nir_intrinsic_load_sample_id;
2001 case SYSTEM_VALUE_SAMPLE_POS:
2002 return nir_intrinsic_load_sample_pos;
2003 case SYSTEM_VALUE_SAMPLE_MASK_IN:
2004 return nir_intrinsic_load_sample_mask_in;
2005 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
2006 return nir_intrinsic_load_local_invocation_id;
2007 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
2008 return nir_intrinsic_load_local_invocation_index;
2009 case SYSTEM_VALUE_WORK_GROUP_ID:
2010 return nir_intrinsic_load_work_group_id;
2011 case SYSTEM_VALUE_NUM_WORK_GROUPS:
2012 return nir_intrinsic_load_num_work_groups;
2013 case SYSTEM_VALUE_PRIMITIVE_ID:
2014 return nir_intrinsic_load_primitive_id;
2015 case SYSTEM_VALUE_TESS_COORD:
2016 return nir_intrinsic_load_tess_coord;
2017 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
2018 return nir_intrinsic_load_tess_level_outer;
2019 case SYSTEM_VALUE_TESS_LEVEL_INNER:
2020 return nir_intrinsic_load_tess_level_inner;
2021 case SYSTEM_VALUE_VERTICES_IN:
2022 return nir_intrinsic_load_patch_vertices_in;
2023 case SYSTEM_VALUE_HELPER_INVOCATION:
2024 return nir_intrinsic_load_helper_invocation;
2025 case SYSTEM_VALUE_VIEW_INDEX:
2026 return nir_intrinsic_load_view_index;
2027 case SYSTEM_VALUE_SUBGROUP_SIZE:
2028 return nir_intrinsic_load_subgroup_size;
2029 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
2030 return nir_intrinsic_load_subgroup_invocation;
2031 case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
2032 return nir_intrinsic_load_subgroup_eq_mask;
2033 case SYSTEM_VALUE_SUBGROUP_GE_MASK:
2034 return nir_intrinsic_load_subgroup_ge_mask;
2035 case SYSTEM_VALUE_SUBGROUP_GT_MASK:
2036 return nir_intrinsic_load_subgroup_gt_mask;
2037 case SYSTEM_VALUE_SUBGROUP_LE_MASK:
2038 return nir_intrinsic_load_subgroup_le_mask;
2039 case SYSTEM_VALUE_SUBGROUP_LT_MASK:
2040 return nir_intrinsic_load_subgroup_lt_mask;
2041 case SYSTEM_VALUE_NUM_SUBGROUPS:
2042 return nir_intrinsic_load_num_subgroups;
2043 case SYSTEM_VALUE_SUBGROUP_ID:
2044 return nir_intrinsic_load_subgroup_id;
2045 case SYSTEM_VALUE_LOCAL_GROUP_SIZE:
2046 return nir_intrinsic_load_local_group_size;
2047 default:
2048 unreachable("system value does not directly correspond to intrinsic");
2049 }
2050 }
2051
2052 gl_system_value
2053 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
2054 {
2055 switch (intrin) {
2056 case nir_intrinsic_load_vertex_id:
2057 return SYSTEM_VALUE_VERTEX_ID;
2058 case nir_intrinsic_load_instance_id:
2059 return SYSTEM_VALUE_INSTANCE_ID;
2060 case nir_intrinsic_load_draw_id:
2061 return SYSTEM_VALUE_DRAW_ID;
2062 case nir_intrinsic_load_base_instance:
2063 return SYSTEM_VALUE_BASE_INSTANCE;
2064 case nir_intrinsic_load_vertex_id_zero_base:
2065 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
2066 case nir_intrinsic_load_base_vertex:
2067 return SYSTEM_VALUE_BASE_VERTEX;
2068 case nir_intrinsic_load_invocation_id:
2069 return SYSTEM_VALUE_INVOCATION_ID;
2070 case nir_intrinsic_load_frag_coord:
2071 return SYSTEM_VALUE_FRAG_COORD;
2072 case nir_intrinsic_load_front_face:
2073 return SYSTEM_VALUE_FRONT_FACE;
2074 case nir_intrinsic_load_sample_id:
2075 return SYSTEM_VALUE_SAMPLE_ID;
2076 case nir_intrinsic_load_sample_pos:
2077 return SYSTEM_VALUE_SAMPLE_POS;
2078 case nir_intrinsic_load_sample_mask_in:
2079 return SYSTEM_VALUE_SAMPLE_MASK_IN;
2080 case nir_intrinsic_load_local_invocation_id:
2081 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
2082 case nir_intrinsic_load_local_invocation_index:
2083 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
2084 case nir_intrinsic_load_num_work_groups:
2085 return SYSTEM_VALUE_NUM_WORK_GROUPS;
2086 case nir_intrinsic_load_work_group_id:
2087 return SYSTEM_VALUE_WORK_GROUP_ID;
2088 case nir_intrinsic_load_primitive_id:
2089 return SYSTEM_VALUE_PRIMITIVE_ID;
2090 case nir_intrinsic_load_tess_coord:
2091 return SYSTEM_VALUE_TESS_COORD;
2092 case nir_intrinsic_load_tess_level_outer:
2093 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
2094 case nir_intrinsic_load_tess_level_inner:
2095 return SYSTEM_VALUE_TESS_LEVEL_INNER;
2096 case nir_intrinsic_load_patch_vertices_in:
2097 return SYSTEM_VALUE_VERTICES_IN;
2098 case nir_intrinsic_load_helper_invocation:
2099 return SYSTEM_VALUE_HELPER_INVOCATION;
2100 case nir_intrinsic_load_view_index:
2101 return SYSTEM_VALUE_VIEW_INDEX;
2102 case nir_intrinsic_load_subgroup_size:
2103 return SYSTEM_VALUE_SUBGROUP_SIZE;
2104 case nir_intrinsic_load_subgroup_invocation:
2105 return SYSTEM_VALUE_SUBGROUP_INVOCATION;
2106 case nir_intrinsic_load_subgroup_eq_mask:
2107 return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
2108 case nir_intrinsic_load_subgroup_ge_mask:
2109 return SYSTEM_VALUE_SUBGROUP_GE_MASK;
2110 case nir_intrinsic_load_subgroup_gt_mask:
2111 return SYSTEM_VALUE_SUBGROUP_GT_MASK;
2112 case nir_intrinsic_load_subgroup_le_mask:
2113 return SYSTEM_VALUE_SUBGROUP_LE_MASK;
2114 case nir_intrinsic_load_subgroup_lt_mask:
2115 return SYSTEM_VALUE_SUBGROUP_LT_MASK;
2116 case nir_intrinsic_load_num_subgroups:
2117 return SYSTEM_VALUE_NUM_SUBGROUPS;
2118 case nir_intrinsic_load_subgroup_id:
2119 return SYSTEM_VALUE_SUBGROUP_ID;
2120 case nir_intrinsic_load_local_group_size:
2121 return SYSTEM_VALUE_LOCAL_GROUP_SIZE;
2122 default:
2123 unreachable("intrinsic doesn't produce a system value");
2124 }
2125 }