src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->num_array_elems = 0;
  74    reg->is_packed = false;
  75    reg->name = NULL;
  76
  77    exec_list_push_tail(list, &reg->node);
  78
  79    return reg;
  80 }
  81
  82 nir_register *
  83 nir_global_reg_create(nir_shader *shader)
  84 {
  85    nir_register *reg = reg_create(shader, &shader->registers);
  86    reg->index = shader->reg_alloc++;
  87    reg->is_global = true;
  88
  89    return reg;
  90 }
  91
  92 nir_register *
  93 nir_local_reg_create(nir_function_impl *impl)
  94 {
  95    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  96    reg->index = impl->reg_alloc++;
  97    reg->is_global = false;
  98
  99    return reg;
 100 }
 101
 102 void
 103 nir_reg_remove(nir_register *reg)
 104 {
 105    exec_node_remove(&reg->node);
 106 }
 107
 108 void
 109 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 110 {
 111    switch (var->data.mode) {
 112    case nir_var_all:
 113       assert(!"invalid mode");
 114       break;
 115
 116    case nir_var_local:
 117       assert(!"nir_shader_add_variable cannot be used for local variables");
 118       break;
 119
 120    case nir_var_param:
 121       assert(!"nir_shader_add_variable cannot be used for function parameters");
 122       break;
 123
 124    case nir_var_global:
 125       exec_list_push_tail(&shader->globals, &var->node);
 126       break;
 127
 128    case nir_var_shader_in:
 129       exec_list_push_tail(&shader->inputs, &var->node);
 130       break;
 131
 132    case nir_var_shader_out:
 133       exec_list_push_tail(&shader->outputs, &var->node);
 134       break;
 135
 136    case nir_var_uniform:
 137    case nir_var_shader_storage:
 138       exec_list_push_tail(&shader->uniforms, &var->node);
 139       break;
 140
 141    case nir_var_shared:
 142       assert(shader->stage == MESA_SHADER_COMPUTE);
 143       exec_list_push_tail(&shader->shared, &var->node);
 144       break;
 145
 146    case nir_var_system_value:
 147       exec_list_push_tail(&shader->system_values, &var->node);
 148       break;
 149    }
 150 }
 151
 152 nir_variable *
 153 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 154                     const struct glsl_type *type, const char *name)
 155 {
 156    nir_variable *var = rzalloc(shader, nir_variable);
 157    var->name = ralloc_strdup(var, name);
 158    var->type = type;
 159    var->data.mode = mode;
 160
 161    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 162        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 163       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 164
 165    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 166       var->data.read_only = true;
 167
 168    nir_shader_add_variable(shader, var);
 169
 170    return var;
 171 }
 172
 173 nir_variable *
 174 nir_local_variable_create(nir_function_impl *impl,
 175                           const struct glsl_type *type, const char *name)
 176 {
 177    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 178    var->name = ralloc_strdup(var, name);
 179    var->type = type;
 180    var->data.mode = nir_var_local;
 181
 182    nir_function_impl_add_variable(impl, var);
 183
 184    return var;
 185 }
 186
 187 nir_function *
 188 nir_function_create(nir_shader *shader, const char *name)
 189 {
 190    nir_function *func = ralloc(shader, nir_function);
 191
 192    exec_list_push_tail(&shader->functions, &func->node);
 193
 194    func->name = ralloc_strdup(func, name);
 195    func->shader = shader;
 196    func->num_params = 0;
 197    func->params = NULL;
 198    func->return_type = glsl_void_type();
 199    func->impl = NULL;
 200
 201    return func;
 202 }
 203
 204 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 205 {
 206    dest->is_ssa = src->is_ssa;
 207    if (src->is_ssa) {
 208       dest->ssa = src->ssa;
 209    } else {
 210       dest->reg.base_offset = src->reg.base_offset;
 211       dest->reg.reg = src->reg.reg;
 212       if (src->reg.indirect) {
 213          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 214          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 215       } else {
 216          dest->reg.indirect = NULL;
 217       }
 218    }
 219 }
 220
 221 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 222 {
 223    /* Copying an SSA definition makes no sense whatsoever. */
 224    assert(!src->is_ssa);
 225
 226    dest->is_ssa = false;
 227
 228    dest->reg.base_offset = src->reg.base_offset;
 229    dest->reg.reg = src->reg.reg;
 230    if (src->reg.indirect) {
 231       dest->reg.indirect = ralloc(instr, nir_src);
 232       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 233    } else {
 234       dest->reg.indirect = NULL;
 235    }
 236 }
 237
 238 void
 239 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 240                  nir_alu_instr *instr)
 241 {
 242    nir_src_copy(&dest->src, &src->src, &instr->instr);
 243    dest->abs = src->abs;
 244    dest->negate = src->negate;
 245    for (unsigned i = 0; i < 4; i++)
 246       dest->swizzle[i] = src->swizzle[i];
 247 }
 248
 249 void
 250 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 251                   nir_alu_instr *instr)
 252 {
 253    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 254    dest->write_mask = src->write_mask;
 255    dest->saturate = src->saturate;
 256 }
 257
 258
 259 static void
 260 cf_init(nir_cf_node *node, nir_cf_node_type type)
 261 {
 262    exec_node_init(&node->node);
 263    node->parent = NULL;
 264    node->type = type;
 265 }
 266
 267 nir_function_impl *
 268 nir_function_impl_create_bare(nir_shader *shader)
 269 {
 270    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 271
 272    impl->function = NULL;
 273
 274    cf_init(&impl->cf_node, nir_cf_node_function);
 275
 276    exec_list_make_empty(&impl->body);
 277    exec_list_make_empty(&impl->registers);
 278    exec_list_make_empty(&impl->locals);
 279    impl->num_params = 0;
 280    impl->params = NULL;
 281    impl->return_var = NULL;
 282    impl->reg_alloc = 0;
 283    impl->ssa_alloc = 0;
 284    impl->valid_metadata = nir_metadata_none;
 285
 286    /* create start & end blocks */
 287    nir_block *start_block = nir_block_create(shader);
 288    nir_block *end_block = nir_block_create(shader);
 289    start_block->cf_node.parent = &impl->cf_node;
 290    end_block->cf_node.parent = &impl->cf_node;
 291    impl->end_block = end_block;
 292
 293    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 294
 295    start_block->successors[0] = end_block;
 296    _mesa_set_add(end_block->predecessors, start_block);
 297    return impl;
 298 }
 299
 300 nir_function_impl *
 301 nir_function_impl_create(nir_function *function)
 302 {
 303    assert(function->impl == NULL);
 304
 305    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 306
 307    function->impl = impl;
 308    impl->function = function;
 309
 310    impl->num_params = function->num_params;
 311    impl->params = ralloc_array(function->shader,
 312                                nir_variable *, impl->num_params);
 313
 314    for (unsigned i = 0; i < impl->num_params; i++) {
 315       impl->params[i] = rzalloc(function->shader, nir_variable);
 316       impl->params[i]->type = function->params[i].type;
 317       impl->params[i]->data.mode = nir_var_param;
 318       impl->params[i]->data.location = i;
 319    }
 320
 321    if (!glsl_type_is_void(function->return_type)) {
 322       impl->return_var = rzalloc(function->shader, nir_variable);
 323       impl->return_var->type = function->return_type;
 324       impl->return_var->data.mode = nir_var_param;
 325       impl->return_var->data.location = -1;
 326    }
 327
 328    return impl;
 329 }
 330
 331 nir_block *
 332 nir_block_create(nir_shader *shader)
 333 {
 334    nir_block *block = ralloc(shader, nir_block);
 335
 336    cf_init(&block->cf_node, nir_cf_node_block);
 337
 338    block->successors[0] = block->successors[1] = NULL;
 339    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 340                                           _mesa_key_pointer_equal);
 341    block->imm_dom = NULL;
 342    /* XXX maybe it would be worth it to defer allocation?  This
 343     * way it doesn't get allocated for shader ref's that never run
 344     * nir_calc_dominance?  For example, state-tracker creates an
 345     * initial IR, clones that, runs appropriate lowering pass, passes
 346     * to driver which does common lowering/opt, and then stores ref
 347     * which is later used to do state specific lowering and futher
 348     * opt.  Do any of the references not need dominance metadata?
 349     */
 350    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 351                                           _mesa_key_pointer_equal);
 352
 353    exec_list_make_empty(&block->instr_list);
 354
 355    return block;
 356 }
 357
 358 static inline void
 359 src_init(nir_src *src)
 360 {
 361    src->is_ssa = false;
 362    src->reg.reg = NULL;
 363    src->reg.indirect = NULL;
 364    src->reg.base_offset = 0;
 365 }
 366
 367 nir_if *
 368 nir_if_create(nir_shader *shader)
 369 {
 370    nir_if *if_stmt = ralloc(shader, nir_if);
 371
 372    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 373    src_init(&if_stmt->condition);
 374
 375    nir_block *then = nir_block_create(shader);
 376    exec_list_make_empty(&if_stmt->then_list);
 377    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 378    then->cf_node.parent = &if_stmt->cf_node;
 379
 380    nir_block *else_stmt = nir_block_create(shader);
 381    exec_list_make_empty(&if_stmt->else_list);
 382    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 383    else_stmt->cf_node.parent = &if_stmt->cf_node;
 384
 385    return if_stmt;
 386 }
 387
 388 nir_loop *
 389 nir_loop_create(nir_shader *shader)
 390 {
 391    nir_loop *loop = ralloc(shader, nir_loop);
 392
 393    cf_init(&loop->cf_node, nir_cf_node_loop);
 394
 395    nir_block *body = nir_block_create(shader);
 396    exec_list_make_empty(&loop->body);
 397    exec_list_push_tail(&loop->body, &body->cf_node.node);
 398    body->cf_node.parent = &loop->cf_node;
 399
 400    body->successors[0] = body;
 401    _mesa_set_add(body->predecessors, body);
 402
 403    return loop;
 404 }
 405
 406 static void
 407 instr_init(nir_instr *instr, nir_instr_type type)
 408 {
 409    instr->type = type;
 410    instr->block = NULL;
 411    exec_node_init(&instr->node);
 412 }
 413
 414 static void
 415 dest_init(nir_dest *dest)
 416 {
 417    dest->is_ssa = false;
 418    dest->reg.reg = NULL;
 419    dest->reg.indirect = NULL;
 420    dest->reg.base_offset = 0;
 421 }
 422
 423 static void
 424 alu_dest_init(nir_alu_dest *dest)
 425 {
 426    dest_init(&dest->dest);
 427    dest->saturate = false;
 428    dest->write_mask = 0xf;
 429 }
 430
 431 static void
 432 alu_src_init(nir_alu_src *src)
 433 {
 434    src_init(&src->src);
 435    src->abs = src->negate = false;
 436    src->swizzle[0] = 0;
 437    src->swizzle[1] = 1;
 438    src->swizzle[2] = 2;
 439    src->swizzle[3] = 3;
 440 }
 441
 442 nir_alu_instr *
 443 nir_alu_instr_create(nir_shader *shader, nir_op op)
 444 {
 445    unsigned num_srcs = nir_op_infos[op].num_inputs;
 446    nir_alu_instr *instr =
 447       ralloc_size(shader,
 448                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 449
 450    instr_init(&instr->instr, nir_instr_type_alu);
 451    instr->op = op;
 452    alu_dest_init(&instr->dest);
 453    for (unsigned i = 0; i < num_srcs; i++)
 454       alu_src_init(&instr->src[i]);
 455
 456    return instr;
 457 }
 458
 459 nir_jump_instr *
 460 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 461 {
 462    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 463    instr_init(&instr->instr, nir_instr_type_jump);
 464    instr->type = type;
 465    return instr;
 466 }
 467
 468 nir_load_const_instr *
 469 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 470 {
 471    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 472    instr_init(&instr->instr, nir_instr_type_load_const);
 473
 474    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 475
 476    return instr;
 477 }
 478
 479 nir_intrinsic_instr *
 480 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 481 {
 482    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 483    nir_intrinsic_instr *instr =
 484       ralloc_size(shader,
 485                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 486
 487    instr_init(&instr->instr, nir_instr_type_intrinsic);
 488    instr->intrinsic = op;
 489
 490    if (nir_intrinsic_infos[op].has_dest)
 491       dest_init(&instr->dest);
 492
 493    for (unsigned i = 0; i < num_srcs; i++)
 494       src_init(&instr->src[i]);
 495
 496    return instr;
 497 }
 498
 499 nir_call_instr *
 500 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 501 {
 502    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 503    instr_init(&instr->instr, nir_instr_type_call);
 504
 505    instr->callee = callee;
 506    instr->num_params = callee->num_params;
 507    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 508    instr->return_deref = NULL;
 509
 510    return instr;
 511 }
 512
 513 nir_tex_instr *
 514 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 515 {
 516    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 517    instr_init(&instr->instr, nir_instr_type_tex);
 518
 519    dest_init(&instr->dest);
 520
 521    instr->num_srcs = num_srcs;
 522    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 523    for (unsigned i = 0; i < num_srcs; i++)
 524       src_init(&instr->src[i].src);
 525
 526    instr->texture_index = 0;
 527    instr->texture_array_size = 0;
 528    instr->texture = NULL;
 529    instr->sampler_index = 0;
 530    instr->sampler = NULL;
 531
 532    return instr;
 533 }
 534
 535 nir_phi_instr *
 536 nir_phi_instr_create(nir_shader *shader)
 537 {
 538    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 539    instr_init(&instr->instr, nir_instr_type_phi);
 540
 541    dest_init(&instr->dest);
 542    exec_list_make_empty(&instr->srcs);
 543    return instr;
 544 }
 545
 546 nir_parallel_copy_instr *
 547 nir_parallel_copy_instr_create(nir_shader *shader)
 548 {
 549    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 550    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 551
 552    exec_list_make_empty(&instr->entries);
 553
 554    return instr;
 555 }
 556
 557 nir_ssa_undef_instr *
 558 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 559 {
 560    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 561    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 562
 563    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 564
 565    return instr;
 566 }
 567
 568 nir_deref_var *
 569 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 570 {
 571    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 572    deref->deref.deref_type = nir_deref_type_var;
 573    deref->deref.child = NULL;
 574    deref->deref.type = var->type;
 575    deref->var = var;
 576    return deref;
 577 }
 578
 579 nir_deref_array *
 580 nir_deref_array_create(void *mem_ctx)
 581 {
 582    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 583    deref->deref.deref_type = nir_deref_type_array;
 584    deref->deref.child = NULL;
 585    deref->deref_array_type = nir_deref_array_type_direct;
 586    src_init(&deref->indirect);
 587    deref->base_offset = 0;
 588    return deref;
 589 }
 590
 591 nir_deref_struct *
 592 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 593 {
 594    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 595    deref->deref.deref_type = nir_deref_type_struct;
 596    deref->deref.child = NULL;
 597    deref->index = field_index;
 598    return deref;
 599 }
 600
 601 static nir_deref_var *
 602 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 603 {
 604    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 605    ret->deref.type = deref->deref.type;
 606    if (deref->deref.child)
 607       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 608    return ret;
 609 }
 610
 611 static nir_deref_array *
 612 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 613 {
 614    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 615    ret->base_offset = deref->base_offset;
 616    ret->deref_array_type = deref->deref_array_type;
 617    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 618       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 619    }
 620    ret->deref.type = deref->deref.type;
 621    if (deref->deref.child)
 622       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 623    return ret;
 624 }
 625
 626 static nir_deref_struct *
 627 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 628 {
 629    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 630    ret->deref.type = deref->deref.type;
 631    if (deref->deref.child)
 632       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 633    return ret;
 634 }
 635
 636 nir_deref *
 637 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 638 {
 639    switch (deref->deref_type) {
 640    case nir_deref_type_var:
 641       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 642    case nir_deref_type_array:
 643       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 644    case nir_deref_type_struct:
 645       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 646    default:
 647       unreachable("Invalid dereference type");
 648    }
 649
 650    return NULL;
 651 }
 652
 653 /* Returns a load_const instruction that represents the constant
 654  * initializer for the given deref chain.  The caller is responsible for
 655  * ensuring that there actually is a constant initializer.
 656  */
 657 nir_load_const_instr *
 658 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 659 {
 660    nir_constant *constant = deref->var->constant_initializer;
 661    assert(constant);
 662
 663    const nir_deref *tail = &deref->deref;
 664    unsigned matrix_offset = 0;
 665    while (tail->child) {
 666       switch (tail->child->deref_type) {
 667       case nir_deref_type_array: {
 668          nir_deref_array *arr = nir_deref_as_array(tail->child);
 669          assert(arr->deref_array_type == nir_deref_array_type_direct);
 670          if (glsl_type_is_matrix(tail->type)) {
 671             assert(arr->deref.child == NULL);
 672             matrix_offset = arr->base_offset;
 673          } else {
 674             constant = constant->elements[arr->base_offset];
 675          }
 676          break;
 677       }
 678
 679       case nir_deref_type_struct: {
 680          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 681          break;
 682       }
 683
 684       default:
 685          unreachable("Invalid deref child type");
 686       }
 687
 688       tail = tail->child;
 689    }
 690
 691    nir_load_const_instr *load =
 692       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 693
 694    matrix_offset *= load->def.num_components;
 695    for (unsigned i = 0; i < load->def.num_components; i++) {
 696       switch (glsl_get_base_type(tail->type)) {
 697       case GLSL_TYPE_FLOAT:
 698       case GLSL_TYPE_INT:
 699       case GLSL_TYPE_UINT:
 700          load->value.u[i] = constant->value.u[matrix_offset + i];
 701          break;
 702       case GLSL_TYPE_BOOL:
 703          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 704                              NIR_TRUE : NIR_FALSE;
 705          break;
 706       default:
 707          unreachable("Invalid immediate type");
 708       }
 709    }
 710
 711    return load;
 712 }
 713
 714 nir_function_impl *
 715 nir_cf_node_get_function(nir_cf_node *node)
 716 {
 717    while (node->type != nir_cf_node_function) {
 718       node = node->parent;
 719    }
 720
 721    return nir_cf_node_as_function(node);
 722 }
 723
 724 /* Reduces a cursor by trying to convert everything to after and trying to
 725  * go up to block granularity when possible.
 726  */
 727 static nir_cursor
 728 reduce_cursor(nir_cursor cursor)
 729 {
 730    switch (cursor.option) {
 731    case nir_cursor_before_block:
 732       if (exec_list_is_empty(&cursor.block->instr_list)) {
 733          /* Empty block.  After is as good as before. */
 734          cursor.option = nir_cursor_after_block;
 735       } else {
 736          /* Try to switch to after the previous block if there is one.
 737           * (This isn't likely, but it can happen.)
 738           */
 739          nir_cf_node *prev_node = nir_cf_node_prev(&cursor.block->cf_node);
 740          if (prev_node && prev_node->type == nir_cf_node_block) {
 741             cursor.block = nir_cf_node_as_block(prev_node);
 742             cursor.option = nir_cursor_after_block;
 743          }
 744       }
 745       return cursor;
 746
 747    case nir_cursor_after_block:
 748       return cursor;
 749
 750    case nir_cursor_before_instr: {
 751       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 752       if (prev_instr) {
 753          /* Before this instruction is after the previous */
 754          cursor.instr = prev_instr;
 755          cursor.option = nir_cursor_after_instr;
 756       } else {
 757          /* No previous instruction.  Switch to before block */
 758          cursor.block = cursor.instr->block;
 759          cursor.option = nir_cursor_before_block;
 760       }
 761       return reduce_cursor(cursor);
 762    }
 763
 764    case nir_cursor_after_instr:
 765       if (nir_instr_next(cursor.instr) == NULL) {
 766          /* This is the last instruction, switch to after block */
 767          cursor.option = nir_cursor_after_block;
 768          cursor.block = cursor.instr->block;
 769       }
 770       return cursor;
 771
 772    default:
 773       unreachable("Inavlid cursor option");
 774    }
 775 }
 776
 777 bool
 778 nir_cursors_equal(nir_cursor a, nir_cursor b)
 779 {
 780    /* Reduced cursors should be unique */
 781    a = reduce_cursor(a);
 782    b = reduce_cursor(b);
 783
 784    return a.block == b.block && a.option == b.option;
 785 }
 786
 787 static bool
 788 add_use_cb(nir_src *src, void *state)
 789 {
 790    nir_instr *instr = state;
 791
 792    src->parent_instr = instr;
 793    list_addtail(&src->use_link,
 794                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 795
 796    return true;
 797 }
 798
 799 static bool
 800 add_ssa_def_cb(nir_ssa_def *def, void *state)
 801 {
 802    nir_instr *instr = state;
 803
 804    if (instr->block && def->index == UINT_MAX) {
 805       nir_function_impl *impl =
 806          nir_cf_node_get_function(&instr->block->cf_node);
 807
 808       def->index = impl->ssa_alloc++;
 809    }
 810
 811    return true;
 812 }
 813
 814 static bool
 815 add_reg_def_cb(nir_dest *dest, void *state)
 816 {
 817    nir_instr *instr = state;
 818
 819    if (!dest->is_ssa) {
 820       dest->reg.parent_instr = instr;
 821       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 822    }
 823
 824    return true;
 825 }
 826
 827 static void
 828 add_defs_uses(nir_instr *instr)
 829 {
 830    nir_foreach_src(instr, add_use_cb, instr);
 831    nir_foreach_dest(instr, add_reg_def_cb, instr);
 832    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 833 }
 834
 835 void
 836 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 837 {
 838    switch (cursor.option) {
 839    case nir_cursor_before_block:
 840       /* Only allow inserting jumps into empty blocks. */
 841       if (instr->type == nir_instr_type_jump)
 842          assert(exec_list_is_empty(&cursor.block->instr_list));
 843
 844       instr->block = cursor.block;
 845       add_defs_uses(instr);
 846       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 847       break;
 848    case nir_cursor_after_block: {
 849       /* Inserting instructions after a jump is illegal. */
 850       nir_instr *last = nir_block_last_instr(cursor.block);
 851       assert(last == NULL || last->type != nir_instr_type_jump);
 852       (void) last;
 853
 854       instr->block = cursor.block;
 855       add_defs_uses(instr);
 856       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 857       break;
 858    }
 859    case nir_cursor_before_instr:
 860       assert(instr->type != nir_instr_type_jump);
 861       instr->block = cursor.instr->block;
 862       add_defs_uses(instr);
 863       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 864       break;
 865    case nir_cursor_after_instr:
 866       /* Inserting instructions after a jump is illegal. */
 867       assert(cursor.instr->type != nir_instr_type_jump);
 868
 869       /* Only allow inserting jumps at the end of the block. */
 870       if (instr->type == nir_instr_type_jump)
 871          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 872
 873       instr->block = cursor.instr->block;
 874       add_defs_uses(instr);
 875       exec_node_insert_after(&cursor.instr->node, &instr->node);
 876       break;
 877    }
 878
 879    if (instr->type == nir_instr_type_jump)
 880       nir_handle_add_jump(instr->block);
 881 }
 882
 883 static bool
 884 src_is_valid(const nir_src *src)
 885 {
 886    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 887 }
 888
 889 static bool
 890 remove_use_cb(nir_src *src, void *state)
 891 {
 892    if (src_is_valid(src))
 893       list_del(&src->use_link);
 894
 895    return true;
 896 }
 897
 898 static bool
 899 remove_def_cb(nir_dest *dest, void *state)
 900 {
 901    if (!dest->is_ssa)
 902       list_del(&dest->reg.def_link);
 903
 904    return true;
 905 }
 906
 907 static void
 908 remove_defs_uses(nir_instr *instr)
 909 {
 910    nir_foreach_dest(instr, remove_def_cb, instr);
 911    nir_foreach_src(instr, remove_use_cb, instr);
 912 }
 913
 914 void nir_instr_remove(nir_instr *instr)
 915 {
 916    remove_defs_uses(instr);
 917    exec_node_remove(&instr->node);
 918
 919    if (instr->type == nir_instr_type_jump) {
 920       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 921       nir_handle_remove_jump(instr->block, jump_instr->type);
 922    }
 923 }
 924
 925 /*@}*/
 926
 927 void
 928 nir_index_local_regs(nir_function_impl *impl)
 929 {
 930    unsigned index = 0;
 931    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 932       reg->index = index++;
 933    }
 934    impl->reg_alloc = index;
 935 }
 936
 937 void
 938 nir_index_global_regs(nir_shader *shader)
 939 {
 940    unsigned index = 0;
 941    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 942       reg->index = index++;
 943    }
 944    shader->reg_alloc = index;
 945 }
 946
 947 static bool
 948 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 949 {
 950    return cb(&instr->dest.dest, state);
 951 }
 952
 953 static bool
 954 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 955                      void *state)
 956 {
 957    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 958       return cb(&instr->dest, state);
 959
 960    return true;
 961 }
 962
 963 static bool
 964 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 965                    void *state)
 966 {
 967    return cb(&instr->dest, state);
 968 }
 969
 970 static bool
 971 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 972 {
 973    return cb(&instr->dest, state);
 974 }
 975
 976 static bool
 977 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 978                          nir_foreach_dest_cb cb, void *state)
 979 {
 980    nir_foreach_parallel_copy_entry(instr, entry) {
 981       if (!cb(&entry->dest, state))
 982          return false;
 983    }
 984
 985    return true;
 986 }
 987
 988 bool
 989 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 990 {
 991    switch (instr->type) {
 992    case nir_instr_type_alu:
 993       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 994    case nir_instr_type_intrinsic:
 995       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 996    case nir_instr_type_tex:
 997       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 998    case nir_instr_type_phi:
 999       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1000    case nir_instr_type_parallel_copy:
1001       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1002                                       cb, state);
1003
1004    case nir_instr_type_load_const:
1005    case nir_instr_type_ssa_undef:
1006    case nir_instr_type_call:
1007    case nir_instr_type_jump:
1008       break;
1009
1010    default:
1011       unreachable("Invalid instruction type");
1012       break;
1013    }
1014
1015    return true;
1016 }
1017
1018 struct foreach_ssa_def_state {
1019    nir_foreach_ssa_def_cb cb;
1020    void *client_state;
1021 };
1022
1023 static inline bool
1024 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1025 {
1026    struct foreach_ssa_def_state *state = void_state;
1027
1028    if (dest->is_ssa)
1029       return state->cb(&dest->ssa, state->client_state);
1030    else
1031       return true;
1032 }
1033
1034 bool
1035 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1036 {
1037    switch (instr->type) {
1038    case nir_instr_type_alu:
1039    case nir_instr_type_tex:
1040    case nir_instr_type_intrinsic:
1041    case nir_instr_type_phi:
1042    case nir_instr_type_parallel_copy: {
1043       struct foreach_ssa_def_state foreach_state = {cb, state};
1044       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1045    }
1046
1047    case nir_instr_type_load_const:
1048       return cb(&nir_instr_as_load_const(instr)->def, state);
1049    case nir_instr_type_ssa_undef:
1050       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1051    case nir_instr_type_call:
1052    case nir_instr_type_jump:
1053       return true;
1054    default:
1055       unreachable("Invalid instruction type");
1056    }
1057 }
1058
1059 static bool
1060 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1061 {
1062    if (!cb(src, state))
1063       return false;
1064    if (!src->is_ssa && src->reg.indirect)
1065       return cb(src->reg.indirect, state);
1066    return true;
1067 }
1068
1069 static bool
1070 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1071                       void *state)
1072 {
1073    if (deref->deref_array_type == nir_deref_array_type_indirect)
1074       return visit_src(&deref->indirect, cb, state);
1075    return true;
1076 }
1077
1078 static bool
1079 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1080 {
1081    nir_deref *cur = &deref->deref;
1082    while (cur != NULL) {
1083       if (cur->deref_type == nir_deref_type_array) {
1084          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1085             return false;
1086       }
1087
1088       cur = cur->child;
1089    }
1090
1091    return true;
1092 }
1093
1094 static bool
1095 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1096 {
1097    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1098       if (!visit_src(&instr->src[i].src, cb, state))
1099          return false;
1100
1101    return true;
1102 }
1103
1104 static bool
1105 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1106 {
1107    for (unsigned i = 0; i < instr->num_srcs; i++) {
1108       if (!visit_src(&instr->src[i].src, cb, state))
1109          return false;
1110    }
1111
1112    if (instr->texture != NULL) {
1113       if (!visit_deref_src(instr->texture, cb, state))
1114          return false;
1115    }
1116
1117    if (instr->sampler != NULL) {
1118       if (!visit_deref_src(instr->sampler, cb, state))
1119          return false;
1120    }
1121
1122    return true;
1123 }
1124
1125 static bool
1126 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1127                     void *state)
1128 {
1129    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1130    for (unsigned i = 0; i < num_srcs; i++) {
1131       if (!visit_src(&instr->src[i], cb, state))
1132          return false;
1133    }
1134
1135    unsigned num_vars =
1136       nir_intrinsic_infos[instr->intrinsic].num_variables;
1137    for (unsigned i = 0; i < num_vars; i++) {
1138       if (!visit_deref_src(instr->variables[i], cb, state))
1139          return false;
1140    }
1141
1142    return true;
1143 }
1144
1145 static bool
1146 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1147 {
1148    return true;
1149 }
1150
1151 static bool
1152 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1153                      void *state)
1154 {
1155    return true;
1156 }
1157
1158 static bool
1159 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1160 {
1161    nir_foreach_phi_src(instr, src) {
1162       if (!visit_src(&src->src, cb, state))
1163          return false;
1164    }
1165
1166    return true;
1167 }
1168
1169 static bool
1170 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1171                         nir_foreach_src_cb cb, void *state)
1172 {
1173    nir_foreach_parallel_copy_entry(instr, entry) {
1174       if (!visit_src(&entry->src, cb, state))
1175          return false;
1176    }
1177
1178    return true;
1179 }
1180
1181 typedef struct {
1182    void *state;
1183    nir_foreach_src_cb cb;
1184 } visit_dest_indirect_state;
1185
1186 static bool
1187 visit_dest_indirect(nir_dest *dest, void *_state)
1188 {
1189    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1190
1191    if (!dest->is_ssa && dest->reg.indirect)
1192       return state->cb(dest->reg.indirect, state->state);
1193
1194    return true;
1195 }
1196
1197 bool
1198 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1199 {
1200    switch (instr->type) {
1201    case nir_instr_type_alu:
1202       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1203          return false;
1204       break;
1205    case nir_instr_type_intrinsic:
1206       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1207          return false;
1208       break;
1209    case nir_instr_type_tex:
1210       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1211          return false;
1212       break;
1213    case nir_instr_type_call:
1214       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1215          return false;
1216       break;
1217    case nir_instr_type_load_const:
1218       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1219          return false;
1220       break;
1221    case nir_instr_type_phi:
1222       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1223          return false;
1224       break;
1225    case nir_instr_type_parallel_copy:
1226       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1227                                    cb, state))
1228          return false;
1229       break;
1230    case nir_instr_type_jump:
1231    case nir_instr_type_ssa_undef:
1232       return true;
1233
1234    default:
1235       unreachable("Invalid instruction type");
1236       break;
1237    }
1238
1239    visit_dest_indirect_state dest_state;
1240    dest_state.state = state;
1241    dest_state.cb = cb;
1242    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1243 }
1244
1245 nir_const_value *
1246 nir_src_as_const_value(nir_src src)
1247 {
1248    if (!src.is_ssa)
1249       return NULL;
1250
1251    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1252       return NULL;
1253
1254    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1255
1256    return &load->value;
1257 }
1258
1259 /**
1260  * Returns true if the source is known to be dynamically uniform. Otherwise it
1261  * returns false which means it may or may not be dynamically uniform but it
1262  * can't be determined.
1263  */
1264 bool
1265 nir_src_is_dynamically_uniform(nir_src src)
1266 {
1267    if (!src.is_ssa)
1268       return false;
1269
1270    /* Constants are trivially dynamically uniform */
1271    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1272       return true;
1273
1274    /* As are uniform variables */
1275    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1276       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1277
1278       if (intr->intrinsic == nir_intrinsic_load_uniform)
1279          return true;
1280    }
1281
1282    /* XXX: this could have many more tests, such as when a sampler function is
1283     * called with dynamically uniform arguments.
1284     */
1285    return false;
1286 }
1287
1288 static void
1289 src_remove_all_uses(nir_src *src)
1290 {
1291    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1292       if (!src_is_valid(src))
1293          continue;
1294
1295       list_del(&src->use_link);
1296    }
1297 }
1298
1299 static void
1300 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1301 {
1302    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1303       if (!src_is_valid(src))
1304          continue;
1305
1306       if (parent_instr) {
1307          src->parent_instr = parent_instr;
1308          if (src->is_ssa)
1309             list_addtail(&src->use_link, &src->ssa->uses);
1310          else
1311             list_addtail(&src->use_link, &src->reg.reg->uses);
1312       } else {
1313          assert(parent_if);
1314          src->parent_if = parent_if;
1315          if (src->is_ssa)
1316             list_addtail(&src->use_link, &src->ssa->if_uses);
1317          else
1318             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1319       }
1320    }
1321 }
1322
1323 void
1324 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1325 {
1326    assert(!src_is_valid(src) || src->parent_instr == instr);
1327
1328    src_remove_all_uses(src);
1329    *src = new_src;
1330    src_add_all_uses(src, instr, NULL);
1331 }
1332
1333 void
1334 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1335 {
1336    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1337
1338    src_remove_all_uses(dest);
1339    src_remove_all_uses(src);
1340    *dest = *src;
1341    *src = NIR_SRC_INIT;
1342    src_add_all_uses(dest, dest_instr, NULL);
1343 }
1344
1345 void
1346 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1347 {
1348    nir_src *src = &if_stmt->condition;
1349    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1350
1351    src_remove_all_uses(src);
1352    *src = new_src;
1353    src_add_all_uses(src, NULL, if_stmt);
1354 }
1355
1356 void
1357 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1358 {
1359    if (dest->is_ssa) {
1360       /* We can only overwrite an SSA destination if it has no uses. */
1361       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1362    } else {
1363       list_del(&dest->reg.def_link);
1364       if (dest->reg.indirect)
1365          src_remove_all_uses(dest->reg.indirect);
1366    }
1367
1368    /* We can't re-write with an SSA def */
1369    assert(!new_dest.is_ssa);
1370
1371    nir_dest_copy(dest, &new_dest, instr);
1372
1373    dest->reg.parent_instr = instr;
1374    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1375
1376    if (dest->reg.indirect)
1377       src_add_all_uses(dest->reg.indirect, instr, NULL);
1378 }
1379
1380 void
1381 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1382                  unsigned num_components, const char *name)
1383 {
1384    def->name = name;
1385    def->parent_instr = instr;
1386    list_inithead(&def->uses);
1387    list_inithead(&def->if_uses);
1388    def->num_components = num_components;
1389
1390    if (instr->block) {
1391       nir_function_impl *impl =
1392          nir_cf_node_get_function(&instr->block->cf_node);
1393
1394       def->index = impl->ssa_alloc++;
1395    } else {
1396       def->index = UINT_MAX;
1397    }
1398 }
1399
1400 void
1401 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1402                  unsigned num_components, const char *name)
1403 {
1404    dest->is_ssa = true;
1405    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1406 }
1407
1408 void
1409 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1410 {
1411    assert(!new_src.is_ssa || def != new_src.ssa);
1412
1413    nir_foreach_use_safe(def, use_src)
1414       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1415
1416    nir_foreach_if_use_safe(def, use_src)
1417       nir_if_rewrite_condition(use_src->parent_if, new_src);
1418 }
1419
1420 static bool
1421 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1422 {
1423    assert(start->block == end->block);
1424
1425    if (between->block != start->block)
1426       return false;
1427
1428    /* Search backwards looking for "between" */
1429    while (start != end) {
1430       if (between == end)
1431          return true;
1432
1433       end = nir_instr_prev(end);
1434       assert(end);
1435    }
1436
1437    return false;
1438 }
1439
1440 /* Replaces all uses of the given SSA def with the given source but only if
1441  * the use comes after the after_me instruction.  This can be useful if you
1442  * are emitting code to fix up the result of some instruction: you can freely
1443  * use the result in that code and then call rewrite_uses_after and pass the
1444  * last fixup instruction as after_me and it will replace all of the uses you
1445  * want without touching the fixup code.
1446  *
1447  * This function assumes that after_me is in the same block as
1448  * def->parent_instr and that after_me comes after def->parent_instr.
1449  */
1450 void
1451 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1452                                nir_instr *after_me)
1453 {
1454    assert(!new_src.is_ssa || def != new_src.ssa);
1455
1456    nir_foreach_use_safe(def, use_src) {
1457       assert(use_src->parent_instr != def->parent_instr);
1458       /* Since def already dominates all of its uses, the only way a use can
1459        * not be dominated by after_me is if it is between def and after_me in
1460        * the instruction list.
1461        */
1462       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1463          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1464    }
1465
1466    nir_foreach_if_use_safe(def, use_src)
1467       nir_if_rewrite_condition(use_src->parent_if, new_src);
1468 }
1469
1470 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1471                             bool reverse, void *state);
1472
1473 static inline bool
1474 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1475 {
1476    if (reverse) {
1477       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1478                                       &if_stmt->else_list) {
1479          if (!foreach_cf_node(node, cb, reverse, state))
1480             return false;
1481       }
1482
1483       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1484                                       &if_stmt->then_list) {
1485          if (!foreach_cf_node(node, cb, reverse, state))
1486             return false;
1487       }
1488    } else {
1489       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1490          if (!foreach_cf_node(node, cb, reverse, state))
1491             return false;
1492       }
1493
1494       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1495          if (!foreach_cf_node(node, cb, reverse, state))
1496             return false;
1497       }
1498    }
1499
1500    return true;
1501 }
1502
1503 static inline bool
1504 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1505 {
1506    if (reverse) {
1507       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1508          if (!foreach_cf_node(node, cb, reverse, state))
1509             return false;
1510       }
1511    } else {
1512       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1513          if (!foreach_cf_node(node, cb, reverse, state))
1514             return false;
1515       }
1516    }
1517
1518    return true;
1519 }
1520
1521 static bool
1522 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1523                 bool reverse, void *state)
1524 {
1525    switch (node->type) {
1526    case nir_cf_node_block:
1527       return cb(nir_cf_node_as_block(node), state);
1528    case nir_cf_node_if:
1529       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1530    case nir_cf_node_loop:
1531       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1532       break;
1533
1534    default:
1535       unreachable("Invalid CFG node type");
1536       break;
1537    }
1538
1539    return false;
1540 }
1541
1542 bool
1543 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1544                              void *state)
1545 {
1546    return foreach_cf_node(node, cb, false, state);
1547 }
1548
1549 bool
1550 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1551 {
1552    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1553       if (!foreach_cf_node(node, cb, false, state))
1554          return false;
1555    }
1556
1557    return cb(impl->end_block, state);
1558 }
1559
1560 bool
1561 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1562                           void *state)
1563 {
1564    if (!cb(impl->end_block, state))
1565       return false;
1566
1567    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1568       if (!foreach_cf_node(node, cb, true, state))
1569          return false;
1570    }
1571
1572    return true;
1573 }
1574
1575 nir_if *
1576 nir_block_get_following_if(nir_block *block)
1577 {
1578    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1579       return NULL;
1580
1581    if (nir_cf_node_is_last(&block->cf_node))
1582       return NULL;
1583
1584    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1585
1586    if (next_node->type != nir_cf_node_if)
1587       return NULL;
1588
1589    return nir_cf_node_as_if(next_node);
1590 }
1591
1592 nir_loop *
1593 nir_block_get_following_loop(nir_block *block)
1594 {
1595    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1596       return NULL;
1597
1598    if (nir_cf_node_is_last(&block->cf_node))
1599       return NULL;
1600
1601    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1602
1603    if (next_node->type != nir_cf_node_loop)
1604       return NULL;
1605
1606    return nir_cf_node_as_loop(next_node);
1607 }
1608 static bool
1609 index_block(nir_block *block, void *state)
1610 {
1611    unsigned *index = state;
1612    block->index = (*index)++;
1613    return true;
1614 }
1615
1616 void
1617 nir_index_blocks(nir_function_impl *impl)
1618 {
1619    unsigned index = 0;
1620
1621    if (impl->valid_metadata & nir_metadata_block_index)
1622       return;
1623
1624    nir_foreach_block(impl, index_block, &index);
1625
1626    impl->num_blocks = index;
1627 }
1628
1629 static bool
1630 index_ssa_def_cb(nir_ssa_def *def, void *state)
1631 {
1632    unsigned *index = (unsigned *) state;
1633    def->index = (*index)++;
1634
1635    return true;
1636 }
1637
1638 static bool
1639 index_ssa_block(nir_block *block, void *state)
1640 {
1641    nir_foreach_instr(block, instr)
1642       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1643
1644    return true;
1645 }
1646
1647 /**
1648  * The indices are applied top-to-bottom which has the very nice property
1649  * that, if A dominates B, then A->index <= B->index.
1650  */
1651 void
1652 nir_index_ssa_defs(nir_function_impl *impl)
1653 {
1654    unsigned index = 0;
1655    nir_foreach_block(impl, index_ssa_block, &index);
1656    impl->ssa_alloc = index;
1657 }
1658
1659 static bool
1660 index_instrs_block(nir_block *block, void *state)
1661 {
1662    unsigned *index = state;
1663    nir_foreach_instr(block, instr)
1664       instr->index = (*index)++;
1665
1666    return true;
1667 }
1668
1669 /**
1670  * The indices are applied top-to-bottom which has the very nice property
1671  * that, if A dominates B, then A->index <= B->index.
1672  */
1673 unsigned
1674 nir_index_instrs(nir_function_impl *impl)
1675 {
1676    unsigned index = 0;
1677    nir_foreach_block(impl, index_instrs_block, &index);
1678    return index;
1679 }
1680
1681 nir_intrinsic_op
1682 nir_intrinsic_from_system_value(gl_system_value val)
1683 {
1684    switch (val) {
1685    case SYSTEM_VALUE_VERTEX_ID:
1686       return nir_intrinsic_load_vertex_id;
1687    case SYSTEM_VALUE_INSTANCE_ID:
1688       return nir_intrinsic_load_instance_id;
1689    case SYSTEM_VALUE_DRAW_ID:
1690       return nir_intrinsic_load_draw_id;
1691    case SYSTEM_VALUE_BASE_INSTANCE:
1692       return nir_intrinsic_load_base_instance;
1693    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1694       return nir_intrinsic_load_vertex_id_zero_base;
1695    case SYSTEM_VALUE_BASE_VERTEX:
1696       return nir_intrinsic_load_base_vertex;
1697    case SYSTEM_VALUE_INVOCATION_ID:
1698       return nir_intrinsic_load_invocation_id;
1699    case SYSTEM_VALUE_FRONT_FACE:
1700       return nir_intrinsic_load_front_face;
1701    case SYSTEM_VALUE_SAMPLE_ID:
1702       return nir_intrinsic_load_sample_id;
1703    case SYSTEM_VALUE_SAMPLE_POS:
1704       return nir_intrinsic_load_sample_pos;
1705    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1706       return nir_intrinsic_load_sample_mask_in;
1707    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1708       return nir_intrinsic_load_local_invocation_id;
1709    case SYSTEM_VALUE_WORK_GROUP_ID:
1710       return nir_intrinsic_load_work_group_id;
1711    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1712       return nir_intrinsic_load_num_work_groups;
1713    case SYSTEM_VALUE_PRIMITIVE_ID:
1714       return nir_intrinsic_load_primitive_id;
1715    case SYSTEM_VALUE_TESS_COORD:
1716       return nir_intrinsic_load_tess_coord;
1717    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1718       return nir_intrinsic_load_tess_level_outer;
1719    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1720       return nir_intrinsic_load_tess_level_inner;
1721    case SYSTEM_VALUE_VERTICES_IN:
1722       return nir_intrinsic_load_patch_vertices_in;
1723    case SYSTEM_VALUE_HELPER_INVOCATION:
1724       return nir_intrinsic_load_helper_invocation;
1725    default:
1726       unreachable("system value does not directly correspond to intrinsic");
1727    }
1728 }
1729
1730 gl_system_value
1731 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1732 {
1733    switch (intrin) {
1734    case nir_intrinsic_load_vertex_id:
1735       return SYSTEM_VALUE_VERTEX_ID;
1736    case nir_intrinsic_load_instance_id:
1737       return SYSTEM_VALUE_INSTANCE_ID;
1738    case nir_intrinsic_load_draw_id:
1739       return SYSTEM_VALUE_DRAW_ID;
1740    case nir_intrinsic_load_base_instance:
1741       return SYSTEM_VALUE_BASE_INSTANCE;
1742    case nir_intrinsic_load_vertex_id_zero_base:
1743       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1744    case nir_intrinsic_load_base_vertex:
1745       return SYSTEM_VALUE_BASE_VERTEX;
1746    case nir_intrinsic_load_invocation_id:
1747       return SYSTEM_VALUE_INVOCATION_ID;
1748    case nir_intrinsic_load_front_face:
1749       return SYSTEM_VALUE_FRONT_FACE;
1750    case nir_intrinsic_load_sample_id:
1751       return SYSTEM_VALUE_SAMPLE_ID;
1752    case nir_intrinsic_load_sample_pos:
1753       return SYSTEM_VALUE_SAMPLE_POS;
1754    case nir_intrinsic_load_sample_mask_in:
1755       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1756    case nir_intrinsic_load_local_invocation_id:
1757       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1758    case nir_intrinsic_load_num_work_groups:
1759       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1760    case nir_intrinsic_load_work_group_id:
1761       return SYSTEM_VALUE_WORK_GROUP_ID;
1762    case nir_intrinsic_load_primitive_id:
1763       return SYSTEM_VALUE_PRIMITIVE_ID;
1764    case nir_intrinsic_load_tess_coord:
1765       return SYSTEM_VALUE_TESS_COORD;
1766    case nir_intrinsic_load_tess_level_outer:
1767       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1768    case nir_intrinsic_load_tess_level_inner:
1769       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1770    case nir_intrinsic_load_patch_vertices_in:
1771       return SYSTEM_VALUE_VERTICES_IN;
1772    case nir_intrinsic_load_helper_invocation:
1773       return SYSTEM_VALUE_HELPER_INVOCATION;
1774    default:
1775       unreachable("intrinsic doesn't produce a system value");
1776    }
1777 }