2 * Copyright © 2014 Connor Abbott
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
46 #include "util/debug.h"
49 #include "nir_opcodes.h"
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 16
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint16_t nir_component_mask_t
;
67 nir_num_components_valid(unsigned num_components
)
69 return (num_components
>= 1 &&
70 num_components
<= 4) ||
71 num_components
== 8 ||
75 /** Defines a cast function
77 * This macro defines a cast function from in_type to out_type where
78 * out_type is some structure type that contains a field of type out_type.
80 * Note that you have to be a bit careful as the generated cast function
83 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
84 type_field, type_value) \
85 static inline out_type * \
86 name(const in_type *parent) \
88 assert(parent && parent->type_field == type_value); \
89 return exec_node_data(out_type, parent, field); \
99 * Description of built-in state associated with a uniform
101 * \sa nir_variable::state_slots
104 gl_state_index16 tokens
[STATE_LENGTH
];
109 nir_var_shader_in
= (1 << 0),
110 nir_var_shader_out
= (1 << 1),
111 nir_var_shader_temp
= (1 << 2),
112 nir_var_function_temp
= (1 << 3),
113 nir_var_uniform
= (1 << 4),
114 nir_var_mem_ubo
= (1 << 5),
115 nir_var_system_value
= (1 << 6),
116 nir_var_mem_ssbo
= (1 << 7),
117 nir_var_mem_shared
= (1 << 8),
118 nir_var_mem_global
= (1 << 9),
119 nir_var_mem_push_const
= (1 << 10), /* not actually used for variables */
120 nir_num_variable_modes
= 11,
121 nir_var_all
= (1 << nir_num_variable_modes
) - 1,
128 nir_rounding_mode_undef
= 0,
129 nir_rounding_mode_rtne
= 1, /* round to nearest even */
130 nir_rounding_mode_ru
= 2, /* round up */
131 nir_rounding_mode_rd
= 3, /* round down */
132 nir_rounding_mode_rtz
= 4, /* round towards zero */
149 #define nir_const_value_to_array(arr, c, components, m) \
151 for (unsigned i = 0; i < components; ++i) \
155 static inline nir_const_value
156 nir_const_value_for_raw_uint(uint64_t x
, unsigned bit_size
)
159 memset(&v
, 0, sizeof(v
));
162 case 1: v
.b
= x
; break;
163 case 8: v
.u8
= x
; break;
164 case 16: v
.u16
= x
; break;
165 case 32: v
.u32
= x
; break;
166 case 64: v
.u64
= x
; break;
168 unreachable("Invalid bit size");
174 static inline nir_const_value
175 nir_const_value_for_int(int64_t i
, unsigned bit_size
)
178 memset(&v
, 0, sizeof(v
));
180 assert(bit_size
<= 64);
182 assert(i
>= (-(1ll << (bit_size
- 1))));
183 assert(i
< (1ll << (bit_size
- 1)));
186 return nir_const_value_for_raw_uint(i
, bit_size
);
189 static inline nir_const_value
190 nir_const_value_for_uint(uint64_t u
, unsigned bit_size
)
193 memset(&v
, 0, sizeof(v
));
195 assert(bit_size
<= 64);
197 assert(u
< (1ull << bit_size
));
199 return nir_const_value_for_raw_uint(u
, bit_size
);
202 static inline nir_const_value
203 nir_const_value_for_bool(bool b
, unsigned bit_size
)
205 /* Booleans use a 0/-1 convention */
206 return nir_const_value_for_int(-(int)b
, bit_size
);
209 /* This one isn't inline because it requires half-float conversion */
210 nir_const_value
nir_const_value_for_float(double b
, unsigned bit_size
);
212 static inline int64_t
213 nir_const_value_as_int(nir_const_value value
, unsigned bit_size
)
216 /* int1_t uses 0/-1 convention */
217 case 1: return -(int)value
.b
;
218 case 8: return value
.i8
;
219 case 16: return value
.i16
;
220 case 32: return value
.i32
;
221 case 64: return value
.i64
;
223 unreachable("Invalid bit size");
227 static inline uint64_t
228 nir_const_value_as_uint(nir_const_value value
, unsigned bit_size
)
231 case 1: return value
.b
;
232 case 8: return value
.u8
;
233 case 16: return value
.u16
;
234 case 32: return value
.u32
;
235 case 64: return value
.u64
;
237 unreachable("Invalid bit size");
242 nir_const_value_as_bool(nir_const_value value
, unsigned bit_size
)
244 int64_t i
= nir_const_value_as_int(value
, bit_size
);
246 /* Booleans of any size use 0/-1 convention */
247 assert(i
== 0 || i
== -1);
252 /* This one isn't inline because it requires half-float conversion */
253 double nir_const_value_as_float(nir_const_value value
, unsigned bit_size
);
255 typedef struct nir_constant
{
257 * Value of the constant.
259 * The field used to back the values supplied by the constant is determined
260 * by the type associated with the \c nir_variable. Constants may be
261 * scalars, vectors, or matrices.
263 nir_const_value values
[NIR_MAX_VEC_COMPONENTS
];
265 /* we could get this from the var->type but makes clone *much* easier to
266 * not have to care about the type.
268 unsigned num_elements
;
270 /* Array elements / Structure Fields */
271 struct nir_constant
**elements
;
275 * \brief Layout qualifiers for gl_FragDepth.
277 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
278 * with a layout qualifier.
281 nir_depth_layout_none
, /**< No depth layout is specified. */
282 nir_depth_layout_any
,
283 nir_depth_layout_greater
,
284 nir_depth_layout_less
,
285 nir_depth_layout_unchanged
289 * Enum keeping track of how a variable was declared.
293 * Normal declaration.
295 nir_var_declared_normally
= 0,
298 * Variable is implicitly generated by the compiler and should not be
299 * visible via the API.
302 } nir_var_declaration_type
;
305 * Either a uniform, global variable, shader input, or shader output. Based on
306 * ir_variable - it should be easy to translate between the two.
309 typedef struct nir_variable
{
310 struct exec_node node
;
313 * Declared type of the variable
315 const struct glsl_type
*type
;
318 * Declared name of the variable
322 struct nir_variable_data
{
324 * Storage class of the variable.
326 * \sa nir_variable_mode
328 nir_variable_mode mode
:11;
331 * Is the variable read-only?
333 * This is set for variables declared as \c const, shader inputs,
336 unsigned read_only
:1;
340 unsigned invariant
:1;
343 * Precision qualifier.
345 * In desktop GLSL we do not care about precision qualifiers at all, in
346 * fact, the spec says that precision qualifiers are ignored.
348 * To make things easy, we make it so that this field is always
349 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
350 * have the same precision value and the checks we add in the compiler
351 * for this field will never break a desktop shader compile.
353 unsigned precision
:2;
356 * Can this variable be coalesced with another?
358 * This is set by nir_lower_io_to_temporaries to say that any
359 * copies involving this variable should stay put. Propagating it can
360 * duplicate the resulting load/store, which is not wanted, and may
361 * result in a load/store of the variable with an indirect offset which
362 * the backend may not be able to handle.
364 unsigned cannot_coalesce
:1;
367 * When separate shader programs are enabled, only input/outputs between
368 * the stages of a multi-stage separate program can be safely removed
369 * from the shader interface. Other input/outputs must remains active.
371 * This is also used to make sure xfb varyings that are unused by the
372 * fragment shader are not removed.
374 unsigned always_active_io
:1;
377 * Interpolation mode for shader inputs / outputs
379 * \sa glsl_interp_mode
381 unsigned interpolation
:2;
384 * If non-zero, then this variable may be packed along with other variables
385 * into a single varying slot, so this offset should be applied when
386 * accessing components. For example, an offset of 1 means that the x
387 * component of this variable is actually stored in component y of the
388 * location specified by \c location.
390 unsigned location_frac
:2;
393 * If true, this variable represents an array of scalars that should
394 * be tightly packed. In other words, consecutive array elements
395 * should be stored one component apart, rather than one slot apart.
400 * Whether this is a fragment shader output implicitly initialized with
401 * the previous contents of the specified render target at the
402 * framebuffer location corresponding to this shader invocation.
404 unsigned fb_fetch_output
:1;
407 * Non-zero if this variable is considered bindless as defined by
408 * ARB_bindless_texture.
413 * Was an explicit binding set in the shader?
415 unsigned explicit_binding
:1;
418 * Was the location explicitly set in the shader?
420 * If the location is explicitly set in the shader, it \b cannot be changed
421 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
424 unsigned explicit_location
:1;
427 * Was a transfer feedback buffer set in the shader?
429 unsigned explicit_xfb_buffer
:1;
432 * Was a transfer feedback stride set in the shader?
434 unsigned explicit_xfb_stride
:1;
437 * Was an explicit offset set in the shader?
439 unsigned explicit_offset
:1;
442 * Non-zero if this variable was created by lowering a named interface
445 unsigned from_named_ifc_block
:1;
448 * How the variable was declared. See nir_var_declaration_type.
450 * This is used to detect variables generated by the compiler, so should
451 * not be visible via the API.
453 unsigned how_declared
:2;
456 * \brief Layout qualifier for gl_FragDepth.
458 * This is not equal to \c ir_depth_layout_none if and only if this
459 * variable is \c gl_FragDepth and a layout qualifier is specified.
461 nir_depth_layout depth_layout
:3;
464 * Vertex stream output identifier.
466 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
467 * indicate the stream of the i-th component.
472 * Access flags for memory variables (SSBO/global), image uniforms, and
473 * bindless images in uniforms/inputs/outputs.
475 enum gl_access_qualifier access
:8;
478 * Descriptor set binding for sampler or UBO.
480 unsigned descriptor_set
:5;
483 * output index for dual source blending.
488 * Initial binding point for a sampler or UBO.
490 * For array types, this represents the binding point for the first element.
495 * Storage location of the base of this variable
497 * The precise meaning of this field depends on the nature of the variable.
499 * - Vertex shader input: one of the values from \c gl_vert_attrib.
500 * - Vertex shader output: one of the values from \c gl_varying_slot.
501 * - Geometry shader input: one of the values from \c gl_varying_slot.
502 * - Geometry shader output: one of the values from \c gl_varying_slot.
503 * - Fragment shader input: one of the values from \c gl_varying_slot.
504 * - Fragment shader output: one of the values from \c gl_frag_result.
505 * - Uniforms: Per-stage uniform slot number for default uniform block.
506 * - Uniforms: Index within the uniform block definition for UBO members.
507 * - Non-UBO Uniforms: uniform slot number.
508 * - Other: This field is not currently used.
510 * If the variable is a uniform, shader input, or shader output, and the
511 * slot has not been assigned, the value will be -1.
516 * The actual location of the variable in the IR. Only valid for inputs,
517 * outputs, and uniforms (including samplers and images).
519 unsigned driver_location
;
522 * Location an atomic counter or transform feedback is stored at.
528 /** Image internal format if specified explicitly, otherwise GL_NONE. */
529 uint16_t format
; /* GLenum */
534 * Transform feedback buffer.
539 * Transform feedback stride.
547 * Identifier for this variable generated by nir_index_vars() that is unique
548 * among other variables in the same exec_list.
552 /* Number of nir_variable_data members */
553 uint16_t num_members
;
556 * Built-in state that backs this uniform
558 * Once set at variable creation, \c state_slots must remain invariant.
559 * This is because, ideally, this array would be shared by all clones of
560 * this variable in the IR tree. In other words, we'd really like for it
561 * to be a fly-weight.
563 * If the variable is not a uniform, \c num_state_slots will be zero and
564 * \c state_slots will be \c NULL.
567 uint16_t num_state_slots
; /**< Number of state slots used */
568 nir_state_slot
*state_slots
; /**< State descriptors. */
572 * Constant expression assigned in the initializer of the variable
574 * This field should only be used temporarily by creators of NIR shaders
575 * and then lower_constant_initializers can be used to get rid of them.
576 * Most of the rest of NIR ignores this field or asserts that it's NULL.
578 nir_constant
*constant_initializer
;
581 * For variables that are in an interface block or are an instance of an
582 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
584 * \sa ir_variable::location
586 const struct glsl_type
*interface_type
;
589 * Description of per-member data for per-member struct variables
591 * This is used for variables which are actually an amalgamation of
592 * multiple entities such as a struct of built-in values or a struct of
593 * inputs each with their own layout specifier. This is only allowed on
594 * variables with a struct or array of array of struct type.
596 struct nir_variable_data
*members
;
599 #define nir_foreach_variable(var, var_list) \
600 foreach_list_typed(nir_variable, var, node, var_list)
602 #define nir_foreach_variable_safe(var, var_list) \
603 foreach_list_typed_safe(nir_variable, var, node, var_list)
606 nir_variable_is_global(const nir_variable
*var
)
608 return var
->data
.mode
!= nir_var_function_temp
;
611 typedef struct nir_register
{
612 struct exec_node node
;
614 unsigned num_components
; /** < number of vector components */
615 unsigned num_array_elems
; /** < size of array (0 for no array) */
617 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
620 /** generic register index. */
623 /** only for debug purposes, can be NULL */
626 /** set of nir_srcs where this register is used (read from) */
627 struct list_head uses
;
629 /** set of nir_dests where this register is defined (written to) */
630 struct list_head defs
;
632 /** set of nir_ifs where this register is used as a condition */
633 struct list_head if_uses
;
636 #define nir_foreach_register(reg, reg_list) \
637 foreach_list_typed(nir_register, reg, node, reg_list)
638 #define nir_foreach_register_safe(reg, reg_list) \
639 foreach_list_typed_safe(nir_register, reg, node, reg_list)
641 typedef enum PACKED
{
643 nir_instr_type_deref
,
646 nir_instr_type_intrinsic
,
647 nir_instr_type_load_const
,
649 nir_instr_type_ssa_undef
,
651 nir_instr_type_parallel_copy
,
654 typedef struct nir_instr
{
655 struct exec_node node
;
656 struct nir_block
*block
;
659 /* A temporary for optimization and analysis passes to use for storing
660 * flags. For instance, DCE uses this to store the "dead/live" info.
664 /** generic instruction index. */
668 static inline nir_instr
*
669 nir_instr_next(nir_instr
*instr
)
671 struct exec_node
*next
= exec_node_get_next(&instr
->node
);
672 if (exec_node_is_tail_sentinel(next
))
675 return exec_node_data(nir_instr
, next
, node
);
678 static inline nir_instr
*
679 nir_instr_prev(nir_instr
*instr
)
681 struct exec_node
*prev
= exec_node_get_prev(&instr
->node
);
682 if (exec_node_is_head_sentinel(prev
))
685 return exec_node_data(nir_instr
, prev
, node
);
689 nir_instr_is_first(const nir_instr
*instr
)
691 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr
->node
));
695 nir_instr_is_last(const nir_instr
*instr
)
697 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr
->node
));
700 typedef struct nir_ssa_def
{
701 /** for debugging only, can be NULL */
704 /** generic SSA definition index. */
707 /** Index into the live_in and live_out bitfields */
710 /** Instruction which produces this SSA value. */
711 nir_instr
*parent_instr
;
713 /** set of nir_instrs where this register is used (read from) */
714 struct list_head uses
;
716 /** set of nir_ifs where this register is used as a condition */
717 struct list_head if_uses
;
719 uint8_t num_components
;
721 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
729 struct nir_src
*indirect
; /** < NULL for no indirect offset */
730 unsigned base_offset
;
732 /* TODO use-def chain goes here */
736 nir_instr
*parent_instr
;
737 struct list_head def_link
;
740 struct nir_src
*indirect
; /** < NULL for no indirect offset */
741 unsigned base_offset
;
743 /* TODO def-use chain goes here */
748 typedef struct nir_src
{
750 /** Instruction that consumes this value as a source. */
751 nir_instr
*parent_instr
;
752 struct nir_if
*parent_if
;
755 struct list_head use_link
;
765 static inline nir_src
768 nir_src src
= { { NULL
} };
772 #define NIR_SRC_INIT nir_src_init()
774 #define nir_foreach_use(src, reg_or_ssa_def) \
775 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
777 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
778 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
780 #define nir_foreach_if_use(src, reg_or_ssa_def) \
781 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
783 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
784 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
795 static inline nir_dest
798 nir_dest dest
= { { { NULL
} } };
802 #define NIR_DEST_INIT nir_dest_init()
804 #define nir_foreach_def(dest, reg) \
805 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
807 #define nir_foreach_def_safe(dest, reg) \
808 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
810 static inline nir_src
811 nir_src_for_ssa(nir_ssa_def
*def
)
813 nir_src src
= NIR_SRC_INIT
;
821 static inline nir_src
822 nir_src_for_reg(nir_register
*reg
)
824 nir_src src
= NIR_SRC_INIT
;
828 src
.reg
.indirect
= NULL
;
829 src
.reg
.base_offset
= 0;
834 static inline nir_dest
835 nir_dest_for_reg(nir_register
*reg
)
837 nir_dest dest
= NIR_DEST_INIT
;
844 static inline unsigned
845 nir_src_bit_size(nir_src src
)
847 return src
.is_ssa
? src
.ssa
->bit_size
: src
.reg
.reg
->bit_size
;
850 static inline unsigned
851 nir_src_num_components(nir_src src
)
853 return src
.is_ssa
? src
.ssa
->num_components
: src
.reg
.reg
->num_components
;
857 nir_src_is_const(nir_src src
)
860 src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
;
863 static inline unsigned
864 nir_dest_bit_size(nir_dest dest
)
866 return dest
.is_ssa
? dest
.ssa
.bit_size
: dest
.reg
.reg
->bit_size
;
869 static inline unsigned
870 nir_dest_num_components(nir_dest dest
)
872 return dest
.is_ssa
? dest
.ssa
.num_components
: dest
.reg
.reg
->num_components
;
875 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *instr_or_if
);
876 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
);
882 * \name input modifiers
886 * For inputs interpreted as floating point, flips the sign bit. For
887 * inputs interpreted as integers, performs the two's complement negation.
892 * Clears the sign bit for floating point values, and computes the integer
893 * absolute value for integers. Note that the negate modifier acts after
894 * the absolute value modifier, therefore if both are set then all inputs
895 * will become negative.
901 * For each input component, says which component of the register it is
902 * chosen from. Note that which elements of the swizzle are used and which
903 * are ignored are based on the write mask for most opcodes - for example,
904 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
905 * a swizzle of {2, x, 1, 0} where x means "don't care."
907 uint8_t swizzle
[NIR_MAX_VEC_COMPONENTS
];
914 * \name saturate output modifier
916 * Only valid for opcodes that output floating-point numbers. Clamps the
917 * output to between 0.0 and 1.0 inclusive.
922 unsigned write_mask
: NIR_MAX_VEC_COMPONENTS
; /* ignored if dest.is_ssa is true */
925 /** NIR sized and unsized types
927 * The values in this enum are carefully chosen so that the sized type is
928 * just the unsized type OR the number of bits.
931 nir_type_invalid
= 0, /* Not a valid type */
935 nir_type_float
= 128,
936 nir_type_bool1
= 1 | nir_type_bool
,
937 nir_type_bool8
= 8 | nir_type_bool
,
938 nir_type_bool16
= 16 | nir_type_bool
,
939 nir_type_bool32
= 32 | nir_type_bool
,
940 nir_type_int1
= 1 | nir_type_int
,
941 nir_type_int8
= 8 | nir_type_int
,
942 nir_type_int16
= 16 | nir_type_int
,
943 nir_type_int32
= 32 | nir_type_int
,
944 nir_type_int64
= 64 | nir_type_int
,
945 nir_type_uint1
= 1 | nir_type_uint
,
946 nir_type_uint8
= 8 | nir_type_uint
,
947 nir_type_uint16
= 16 | nir_type_uint
,
948 nir_type_uint32
= 32 | nir_type_uint
,
949 nir_type_uint64
= 64 | nir_type_uint
,
950 nir_type_float16
= 16 | nir_type_float
,
951 nir_type_float32
= 32 | nir_type_float
,
952 nir_type_float64
= 64 | nir_type_float
,
955 #define NIR_ALU_TYPE_SIZE_MASK 0x79
956 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
958 static inline unsigned
959 nir_alu_type_get_type_size(nir_alu_type type
)
961 return type
& NIR_ALU_TYPE_SIZE_MASK
;
964 static inline unsigned
965 nir_alu_type_get_base_type(nir_alu_type type
)
967 return type
& NIR_ALU_TYPE_BASE_TYPE_MASK
;
970 static inline nir_alu_type
971 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type
)
975 return nir_type_bool1
;
978 return nir_type_uint32
;
981 return nir_type_int32
;
983 case GLSL_TYPE_UINT16
:
984 return nir_type_uint16
;
986 case GLSL_TYPE_INT16
:
987 return nir_type_int16
;
989 case GLSL_TYPE_UINT8
:
990 return nir_type_uint8
;
992 return nir_type_int8
;
993 case GLSL_TYPE_UINT64
:
994 return nir_type_uint64
;
996 case GLSL_TYPE_INT64
:
997 return nir_type_int64
;
999 case GLSL_TYPE_FLOAT
:
1000 return nir_type_float32
;
1002 case GLSL_TYPE_FLOAT16
:
1003 return nir_type_float16
;
1005 case GLSL_TYPE_DOUBLE
:
1006 return nir_type_float64
;
1009 case GLSL_TYPE_SAMPLER
:
1010 case GLSL_TYPE_IMAGE
:
1011 case GLSL_TYPE_ATOMIC_UINT
:
1012 case GLSL_TYPE_STRUCT
:
1013 case GLSL_TYPE_INTERFACE
:
1014 case GLSL_TYPE_ARRAY
:
1015 case GLSL_TYPE_VOID
:
1016 case GLSL_TYPE_SUBROUTINE
:
1017 case GLSL_TYPE_FUNCTION
:
1018 case GLSL_TYPE_ERROR
:
1019 return nir_type_invalid
;
1022 unreachable("unknown type");
1025 static inline nir_alu_type
1026 nir_get_nir_type_for_glsl_type(const struct glsl_type
*type
)
1028 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type
));
1031 nir_op
nir_type_conversion_op(nir_alu_type src
, nir_alu_type dst
,
1032 nir_rounding_mode rnd
);
1034 static inline nir_op
1035 nir_op_vec(unsigned components
)
1037 switch (components
) {
1038 case 1: return nir_op_mov
;
1039 case 2: return nir_op_vec2
;
1040 case 3: return nir_op_vec3
;
1041 case 4: return nir_op_vec4
;
1042 case 8: return nir_op_vec8
;
1043 case 16: return nir_op_vec16
;
1044 default: unreachable("bad component count");
1049 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode
, unsigned bit_size
)
1051 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16
) ||
1052 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32
) ||
1053 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64
);
1057 nir_is_denorm_flush_to_zero(unsigned execution_mode
, unsigned bit_size
)
1059 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16
) ||
1060 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32
) ||
1061 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64
);
1065 nir_is_denorm_preserve(unsigned execution_mode
, unsigned bit_size
)
1067 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP16
) ||
1068 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP32
) ||
1069 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP64
);
1073 nir_is_rounding_mode_rtne(unsigned execution_mode
, unsigned bit_size
)
1075 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1076 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1077 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1081 nir_is_rounding_mode_rtz(unsigned execution_mode
, unsigned bit_size
)
1083 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1084 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1085 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1089 nir_has_any_rounding_mode_rtz(unsigned execution_mode
)
1091 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1092 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1093 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1097 nir_has_any_rounding_mode_rtne(unsigned execution_mode
)
1099 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1100 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1101 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1104 static inline nir_rounding_mode
1105 nir_get_rounding_mode_from_float_controls(unsigned execution_mode
,
1108 if (nir_alu_type_get_base_type(type
) != nir_type_float
)
1109 return nir_rounding_mode_undef
;
1111 unsigned bit_size
= nir_alu_type_get_type_size(type
);
1113 if (nir_is_rounding_mode_rtz(execution_mode
, bit_size
))
1114 return nir_rounding_mode_rtz
;
1115 if (nir_is_rounding_mode_rtne(execution_mode
, bit_size
))
1116 return nir_rounding_mode_rtne
;
1117 return nir_rounding_mode_undef
;
1121 nir_has_any_rounding_mode_enabled(unsigned execution_mode
)
1124 nir_has_any_rounding_mode_rtne(execution_mode
) ||
1125 nir_has_any_rounding_mode_rtz(execution_mode
);
1131 * Operation where the first two sources are commutative.
1133 * For 2-source operations, this just mathematical commutativity. Some
1134 * 3-source operations, like ffma, are only commutative in the first two
1137 NIR_OP_IS_2SRC_COMMUTATIVE
= (1 << 0),
1138 NIR_OP_IS_ASSOCIATIVE
= (1 << 1),
1139 } nir_op_algebraic_property
;
1144 unsigned num_inputs
;
1147 * The number of components in the output
1149 * If non-zero, this is the size of the output and input sizes are
1150 * explicitly given; swizzle and writemask are still in effect, but if
1151 * the output component is masked out, then the input component may
1154 * If zero, the opcode acts in the standard, per-component manner; the
1155 * operation is performed on each component (except the ones that are
1156 * masked out) with the input being taken from the input swizzle for
1159 * The size of some of the inputs may be given (i.e. non-zero) even
1160 * though output_size is zero; in that case, the inputs with a zero
1161 * size act per-component, while the inputs with non-zero size don't.
1163 unsigned output_size
;
1166 * The type of vector that the instruction outputs. Note that the
1167 * staurate modifier is only allowed on outputs with the float type.
1170 nir_alu_type output_type
;
1173 * The number of components in each input
1175 unsigned input_sizes
[NIR_MAX_VEC_COMPONENTS
];
1178 * The type of vector that each input takes. Note that negate and
1179 * absolute value are only allowed on inputs with int or float type and
1180 * behave differently on the two.
1182 nir_alu_type input_types
[NIR_MAX_VEC_COMPONENTS
];
1184 nir_op_algebraic_property algebraic_properties
;
1186 /* Whether this represents a numeric conversion opcode */
1190 extern const nir_op_info nir_op_infos
[nir_num_opcodes
];
1192 typedef struct nir_alu_instr
{
1196 /** Indicates that this ALU instruction generates an exact value
1198 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1199 * really equivalent to either. This indicates that the value generated by
1200 * this operation is high-precision and any code transformations that touch
1201 * it must ensure that the resulting value is bit-for-bit identical to the
1207 * Indicates that this instruction do not cause wrapping to occur, in the
1208 * form of overflow or underflow.
1210 bool no_signed_wrap
:1;
1211 bool no_unsigned_wrap
:1;
1217 void nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
1218 nir_alu_instr
*instr
);
1219 void nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
1220 nir_alu_instr
*instr
);
1222 /* is this source channel used? */
1224 nir_alu_instr_channel_used(const nir_alu_instr
*instr
, unsigned src
,
1227 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1228 return channel
< nir_op_infos
[instr
->op
].input_sizes
[src
];
1230 return (instr
->dest
.write_mask
>> channel
) & 1;
1233 static inline nir_component_mask_t
1234 nir_alu_instr_src_read_mask(const nir_alu_instr
*instr
, unsigned src
)
1236 nir_component_mask_t read_mask
= 0;
1237 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1238 if (!nir_alu_instr_channel_used(instr
, src
, c
))
1241 read_mask
|= (1 << instr
->src
[src
].swizzle
[c
]);
1247 * Get the number of channels used for a source
1249 static inline unsigned
1250 nir_ssa_alu_instr_src_components(const nir_alu_instr
*instr
, unsigned src
)
1252 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1253 return nir_op_infos
[instr
->op
].input_sizes
[src
];
1255 return nir_dest_num_components(instr
->dest
.dest
);
1259 nir_alu_instr_is_comparison(const nir_alu_instr
*instr
)
1261 switch (instr
->op
) {
1281 bool nir_const_value_negative_equal(nir_const_value c1
, nir_const_value c2
,
1282 nir_alu_type full_type
);
1284 bool nir_alu_srcs_equal(const nir_alu_instr
*alu1
, const nir_alu_instr
*alu2
,
1285 unsigned src1
, unsigned src2
);
1287 bool nir_alu_srcs_negative_equal(const nir_alu_instr
*alu1
,
1288 const nir_alu_instr
*alu2
,
1289 unsigned src1
, unsigned src2
);
1293 nir_deref_type_array
,
1294 nir_deref_type_array_wildcard
,
1295 nir_deref_type_ptr_as_array
,
1296 nir_deref_type_struct
,
1297 nir_deref_type_cast
,
1303 /** The type of this deref instruction */
1304 nir_deref_type deref_type
;
1306 /** The mode of the underlying variable */
1307 nir_variable_mode mode
;
1309 /** The dereferenced type of the resulting pointer value */
1310 const struct glsl_type
*type
;
1313 /** Variable being dereferenced if deref_type is a deref_var */
1316 /** Parent deref if deref_type is not deref_var */
1320 /** Additional deref parameters */
1331 unsigned ptr_stride
;
1335 /** Destination to store the resulting "pointer" */
1339 static inline nir_deref_instr
*nir_src_as_deref(nir_src src
);
1341 static inline nir_deref_instr
*
1342 nir_deref_instr_parent(const nir_deref_instr
*instr
)
1344 if (instr
->deref_type
== nir_deref_type_var
)
1347 return nir_src_as_deref(instr
->parent
);
1350 static inline nir_variable
*
1351 nir_deref_instr_get_variable(const nir_deref_instr
*instr
)
1353 while (instr
->deref_type
!= nir_deref_type_var
) {
1354 if (instr
->deref_type
== nir_deref_type_cast
)
1357 instr
= nir_deref_instr_parent(instr
);
1363 bool nir_deref_instr_has_indirect(nir_deref_instr
*instr
);
1364 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr
*instr
);
1365 bool nir_deref_instr_has_complex_use(nir_deref_instr
*instr
);
1367 bool nir_deref_instr_remove_if_unused(nir_deref_instr
*instr
);
1369 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr
*instr
);
1374 struct nir_function
*callee
;
1376 unsigned num_params
;
1380 #include "nir_intrinsics.h"
1382 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1384 /** Represents an intrinsic
1386 * An intrinsic is an instruction type for handling things that are
1387 * more-or-less regular operations but don't just consume and produce SSA
1388 * values like ALU operations do. Intrinsics are not for things that have
1389 * special semantic meaning such as phi nodes and parallel copies.
1390 * Examples of intrinsics include variable load/store operations, system
1391 * value loads, and the like. Even though texturing more-or-less falls
1392 * under this category, texturing is its own instruction type because
1393 * trying to represent texturing with intrinsics would lead to a
1394 * combinatorial explosion of intrinsic opcodes.
1396 * By having a single instruction type for handling a lot of different
1397 * cases, optimization passes can look for intrinsics and, for the most
1398 * part, completely ignore them. Each intrinsic type also has a few
1399 * possible flags that govern whether or not they can be reordered or
1400 * eliminated. That way passes like dead code elimination can still work
1401 * on intrisics without understanding the meaning of each.
1403 * Each intrinsic has some number of constant indices, some number of
1404 * variables, and some number of sources. What these sources, variables,
1405 * and indices mean depends on the intrinsic and is documented with the
1406 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1407 * instructions are the only types of instruction that can operate on
1413 nir_intrinsic_op intrinsic
;
1417 /** number of components if this is a vectorized intrinsic
1419 * Similarly to ALU operations, some intrinsics are vectorized.
1420 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1421 * For vectorized intrinsics, the num_components field specifies the
1422 * number of destination components and the number of source components
1423 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1425 uint8_t num_components
;
1427 int const_index
[NIR_INTRINSIC_MAX_CONST_INDEX
];
1430 } nir_intrinsic_instr
;
1432 static inline nir_variable
*
1433 nir_intrinsic_get_var(nir_intrinsic_instr
*intrin
, unsigned i
)
1435 return nir_deref_instr_get_variable(nir_src_as_deref(intrin
->src
[i
]));
1439 /* Memory ordering. */
1440 NIR_MEMORY_ACQUIRE
= 1 << 0,
1441 NIR_MEMORY_RELEASE
= 1 << 1,
1443 /* Memory visibility operations. */
1444 NIR_MEMORY_MAKE_AVAILABLE
= 1 << 3,
1445 NIR_MEMORY_MAKE_VISIBLE
= 1 << 4,
1446 } nir_memory_semantics
;
1450 NIR_SCOPE_QUEUE_FAMILY
,
1451 NIR_SCOPE_WORKGROUP
,
1453 NIR_SCOPE_INVOCATION
,
1457 * \name NIR intrinsics semantic flags
1459 * information about what the compiler can do with the intrinsics.
1461 * \sa nir_intrinsic_info::flags
1465 * whether the intrinsic can be safely eliminated if none of its output
1466 * value is not being used.
1468 NIR_INTRINSIC_CAN_ELIMINATE
= (1 << 0),
1471 * Whether the intrinsic can be reordered with respect to any other
1472 * intrinsic, i.e. whether the only reordering dependencies of the
1473 * intrinsic are due to the register reads/writes.
1475 NIR_INTRINSIC_CAN_REORDER
= (1 << 1),
1476 } nir_intrinsic_semantic_flag
;
1479 * \name NIR intrinsics const-index flag
1481 * Indicates the usage of a const_index slot.
1483 * \sa nir_intrinsic_info::index_map
1487 * Generally instructions that take a offset src argument, can encode
1488 * a constant 'base' value which is added to the offset.
1490 NIR_INTRINSIC_BASE
= 1,
1493 * For store instructions, a writemask for the store.
1495 NIR_INTRINSIC_WRMASK
,
1498 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1500 NIR_INTRINSIC_STREAM_ID
,
1503 * The clip-plane id for load_user_clip_plane intrinsic.
1505 NIR_INTRINSIC_UCP_ID
,
1508 * The amount of data, starting from BASE, that this instruction may
1509 * access. This is used to provide bounds if the offset is not constant.
1511 NIR_INTRINSIC_RANGE
,
1514 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1516 NIR_INTRINSIC_DESC_SET
,
1519 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1521 NIR_INTRINSIC_BINDING
,
1526 NIR_INTRINSIC_COMPONENT
,
1529 * Interpolation mode (only meaningful for FS inputs).
1531 NIR_INTRINSIC_INTERP_MODE
,
1534 * A binary nir_op to use when performing a reduction or scan operation
1536 NIR_INTRINSIC_REDUCTION_OP
,
1539 * Cluster size for reduction operations
1541 NIR_INTRINSIC_CLUSTER_SIZE
,
1544 * Parameter index for a load_param intrinsic
1546 NIR_INTRINSIC_PARAM_IDX
,
1549 * Image dimensionality for image intrinsics
1551 * One of GLSL_SAMPLER_DIM_*
1553 NIR_INTRINSIC_IMAGE_DIM
,
1556 * Non-zero if we are accessing an array image
1558 NIR_INTRINSIC_IMAGE_ARRAY
,
1561 * Image format for image intrinsics
1563 NIR_INTRINSIC_FORMAT
,
1566 * Access qualifiers for image and memory access intrinsics
1568 NIR_INTRINSIC_ACCESS
,
1571 * Alignment for offsets and addresses
1573 * These two parameters, specify an alignment in terms of a multiplier and
1574 * an offset. The offset or address parameter X of the intrinsic is
1575 * guaranteed to satisfy the following:
1577 * (X - align_offset) % align_mul == 0
1579 NIR_INTRINSIC_ALIGN_MUL
,
1580 NIR_INTRINSIC_ALIGN_OFFSET
,
1583 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1585 NIR_INTRINSIC_DESC_TYPE
,
1588 * The nir_alu_type of a uniform/input/output
1593 * The swizzle mask for the instructions
1594 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1596 NIR_INTRINSIC_SWIZZLE_MASK
,
1598 /* Separate source/dest access flags for copies */
1599 NIR_INTRINSIC_SRC_ACCESS
,
1600 NIR_INTRINSIC_DST_ACCESS
,
1602 /* Driver location for nir_load_patch_location_ir3 */
1603 NIR_INTRINSIC_DRIVER_LOCATION
,
1606 * Mask of nir_memory_semantics, includes ordering and visibility.
1608 NIR_INTRINSIC_MEMORY_SEMANTICS
,
1611 * Mask of nir_variable_modes affected by the memory operation.
1613 NIR_INTRINSIC_MEMORY_MODES
,
1616 * Value of nir_scope.
1618 NIR_INTRINSIC_MEMORY_SCOPE
,
1620 NIR_INTRINSIC_NUM_INDEX_FLAGS
,
1622 } nir_intrinsic_index_flag
;
1624 #define NIR_INTRINSIC_MAX_INPUTS 5
1629 unsigned num_srcs
; /** < number of register/SSA inputs */
1631 /** number of components of each input register
1633 * If this value is 0, the number of components is given by the
1634 * num_components field of nir_intrinsic_instr. If this value is -1, the
1635 * intrinsic consumes however many components are provided and it is not
1638 int src_components
[NIR_INTRINSIC_MAX_INPUTS
];
1642 /** number of components of the output register
1644 * If this value is 0, the number of components is given by the
1645 * num_components field of nir_intrinsic_instr.
1647 unsigned dest_components
;
1649 /** bitfield of legal bit sizes */
1650 unsigned dest_bit_sizes
;
1652 /** the number of constant indices used by the intrinsic */
1653 unsigned num_indices
;
1655 /** indicates the usage of intr->const_index[n] */
1656 unsigned index_map
[NIR_INTRINSIC_NUM_INDEX_FLAGS
];
1658 /** semantic flags for calls to this intrinsic */
1659 nir_intrinsic_semantic_flag flags
;
1660 } nir_intrinsic_info
;
1662 extern const nir_intrinsic_info nir_intrinsic_infos
[nir_num_intrinsics
];
1664 static inline unsigned
1665 nir_intrinsic_src_components(nir_intrinsic_instr
*intr
, unsigned srcn
)
1667 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1668 assert(srcn
< info
->num_srcs
);
1669 if (info
->src_components
[srcn
] > 0)
1670 return info
->src_components
[srcn
];
1671 else if (info
->src_components
[srcn
] == 0)
1672 return intr
->num_components
;
1674 return nir_src_num_components(intr
->src
[srcn
]);
1677 static inline unsigned
1678 nir_intrinsic_dest_components(nir_intrinsic_instr
*intr
)
1680 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1681 if (!info
->has_dest
)
1683 else if (info
->dest_components
)
1684 return info
->dest_components
;
1686 return intr
->num_components
;
1689 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1690 static inline type \
1691 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1693 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1694 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1695 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1697 static inline void \
1698 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1700 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1701 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1702 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1705 INTRINSIC_IDX_ACCESSORS(write_mask
, WRMASK
, unsigned)
1706 INTRINSIC_IDX_ACCESSORS(base
, BASE
, int)
1707 INTRINSIC_IDX_ACCESSORS(stream_id
, STREAM_ID
, unsigned)
1708 INTRINSIC_IDX_ACCESSORS(ucp_id
, UCP_ID
, unsigned)
1709 INTRINSIC_IDX_ACCESSORS(range
, RANGE
, unsigned)
1710 INTRINSIC_IDX_ACCESSORS(desc_set
, DESC_SET
, unsigned)
1711 INTRINSIC_IDX_ACCESSORS(binding
, BINDING
, unsigned)
1712 INTRINSIC_IDX_ACCESSORS(component
, COMPONENT
, unsigned)
1713 INTRINSIC_IDX_ACCESSORS(interp_mode
, INTERP_MODE
, unsigned)
1714 INTRINSIC_IDX_ACCESSORS(reduction_op
, REDUCTION_OP
, unsigned)
1715 INTRINSIC_IDX_ACCESSORS(cluster_size
, CLUSTER_SIZE
, unsigned)
1716 INTRINSIC_IDX_ACCESSORS(param_idx
, PARAM_IDX
, unsigned)
1717 INTRINSIC_IDX_ACCESSORS(image_dim
, IMAGE_DIM
, enum glsl_sampler_dim
)
1718 INTRINSIC_IDX_ACCESSORS(image_array
, IMAGE_ARRAY
, bool)
1719 INTRINSIC_IDX_ACCESSORS(access
, ACCESS
, enum gl_access_qualifier
)
1720 INTRINSIC_IDX_ACCESSORS(src_access
, SRC_ACCESS
, enum gl_access_qualifier
)
1721 INTRINSIC_IDX_ACCESSORS(dst_access
, DST_ACCESS
, enum gl_access_qualifier
)
1722 INTRINSIC_IDX_ACCESSORS(format
, FORMAT
, unsigned)
1723 INTRINSIC_IDX_ACCESSORS(align_mul
, ALIGN_MUL
, unsigned)
1724 INTRINSIC_IDX_ACCESSORS(align_offset
, ALIGN_OFFSET
, unsigned)
1725 INTRINSIC_IDX_ACCESSORS(desc_type
, DESC_TYPE
, unsigned)
1726 INTRINSIC_IDX_ACCESSORS(type
, TYPE
, nir_alu_type
)
1727 INTRINSIC_IDX_ACCESSORS(swizzle_mask
, SWIZZLE_MASK
, unsigned)
1728 INTRINSIC_IDX_ACCESSORS(driver_location
, DRIVER_LOCATION
, unsigned)
1729 INTRINSIC_IDX_ACCESSORS(memory_semantics
, MEMORY_SEMANTICS
, nir_memory_semantics
)
1730 INTRINSIC_IDX_ACCESSORS(memory_modes
, MEMORY_MODES
, nir_variable_mode
)
1731 INTRINSIC_IDX_ACCESSORS(memory_scope
, MEMORY_SCOPE
, nir_scope
)
1734 nir_intrinsic_set_align(nir_intrinsic_instr
*intrin
,
1735 unsigned align_mul
, unsigned align_offset
)
1737 assert(util_is_power_of_two_nonzero(align_mul
));
1738 assert(align_offset
< align_mul
);
1739 nir_intrinsic_set_align_mul(intrin
, align_mul
);
1740 nir_intrinsic_set_align_offset(intrin
, align_offset
);
1743 /** Returns a simple alignment for a load/store intrinsic offset
1745 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1746 * and ALIGN_OFFSET parameters, this helper takes both into account and
1747 * provides a single simple alignment parameter. The offset X is guaranteed
1748 * to satisfy X % align == 0.
1750 static inline unsigned
1751 nir_intrinsic_align(const nir_intrinsic_instr
*intrin
)
1753 const unsigned align_mul
= nir_intrinsic_align_mul(intrin
);
1754 const unsigned align_offset
= nir_intrinsic_align_offset(intrin
);
1755 assert(align_offset
< align_mul
);
1756 return align_offset
? 1 << (ffs(align_offset
) - 1) : align_mul
;
1759 /* Converts a image_deref_* intrinsic into a image_* one */
1760 void nir_rewrite_image_intrinsic(nir_intrinsic_instr
*instr
,
1761 nir_ssa_def
*handle
, bool bindless
);
1763 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1765 nir_intrinsic_can_reorder(nir_intrinsic_instr
*instr
)
1767 if (instr
->intrinsic
== nir_intrinsic_load_deref
||
1768 instr
->intrinsic
== nir_intrinsic_load_ssbo
||
1769 instr
->intrinsic
== nir_intrinsic_bindless_image_load
||
1770 instr
->intrinsic
== nir_intrinsic_image_deref_load
||
1771 instr
->intrinsic
== nir_intrinsic_image_load
) {
1772 return nir_intrinsic_access(instr
) & ACCESS_CAN_REORDER
;
1774 const nir_intrinsic_info
*info
=
1775 &nir_intrinsic_infos
[instr
->intrinsic
];
1776 return (info
->flags
& NIR_INTRINSIC_CAN_ELIMINATE
) &&
1777 (info
->flags
& NIR_INTRINSIC_CAN_REORDER
);
1782 * \group texture information
1784 * This gives semantic information about textures which is useful to the
1785 * frontend, the backend, and lowering passes, but not the optimizer.
1790 nir_tex_src_projector
,
1791 nir_tex_src_comparator
, /* shadow comparator */
1795 nir_tex_src_min_lod
,
1796 nir_tex_src_ms_index
, /* MSAA sample index */
1797 nir_tex_src_ms_mcs
, /* MSAA compression value */
1800 nir_tex_src_texture_deref
, /* < deref pointing to the texture */
1801 nir_tex_src_sampler_deref
, /* < deref pointing to the sampler */
1802 nir_tex_src_texture_offset
, /* < dynamically uniform indirect offset */
1803 nir_tex_src_sampler_offset
, /* < dynamically uniform indirect offset */
1804 nir_tex_src_texture_handle
, /* < bindless texture handle */
1805 nir_tex_src_sampler_handle
, /* < bindless sampler handle */
1806 nir_tex_src_plane
, /* < selects plane for planar textures */
1807 nir_num_tex_src_types
1812 nir_tex_src_type src_type
;
1816 nir_texop_tex
, /**< Regular texture look-up */
1817 nir_texop_txb
, /**< Texture look-up with LOD bias */
1818 nir_texop_txl
, /**< Texture look-up with explicit LOD */
1819 nir_texop_txd
, /**< Texture look-up with partial derivatives */
1820 nir_texop_txf
, /**< Texel fetch with explicit LOD */
1821 nir_texop_txf_ms
, /**< Multisample texture fetch */
1822 nir_texop_txf_ms_fb
, /**< Multisample texture fetch from framebuffer */
1823 nir_texop_txf_ms_mcs
, /**< Multisample compression value fetch */
1824 nir_texop_txs
, /**< Texture size */
1825 nir_texop_lod
, /**< Texture lod query */
1826 nir_texop_tg4
, /**< Texture gather */
1827 nir_texop_query_levels
, /**< Texture levels query */
1828 nir_texop_texture_samples
, /**< Texture samples query */
1829 nir_texop_samples_identical
, /**< Query whether all samples are definitely
1832 nir_texop_tex_prefetch
, /**< Regular texture look-up, eligible for pre-dispatch */
1838 enum glsl_sampler_dim sampler_dim
;
1839 nir_alu_type dest_type
;
1844 unsigned num_srcs
, coord_components
;
1845 bool is_array
, is_shadow
;
1848 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1849 * components or the new-style shadow that outputs 1 component.
1851 bool is_new_style_shadow
;
1853 /* gather component selector */
1854 unsigned component
: 2;
1856 /* gather offsets */
1857 int8_t tg4_offsets
[4][2];
1859 /* True if the texture index or handle is not dynamically uniform */
1860 bool texture_non_uniform
;
1862 /* True if the sampler index or handle is not dynamically uniform */
1863 bool sampler_non_uniform
;
1865 /** The texture index
1867 * If this texture instruction has a nir_tex_src_texture_offset source,
1868 * then the texture index is given by texture_index + texture_offset.
1870 unsigned texture_index
;
1872 /** The size of the texture array or 0 if it's not an array */
1873 unsigned texture_array_size
;
1875 /** The sampler index
1877 * The following operations do not require a sampler and, as such, this
1878 * field should be ignored:
1880 * - nir_texop_txf_ms
1883 * - nir_texop_query_levels
1884 * - nir_texop_texture_samples
1885 * - nir_texop_samples_identical
1887 * If this texture instruction has a nir_tex_src_sampler_offset source,
1888 * then the sampler index is given by sampler_index + sampler_offset.
1890 unsigned sampler_index
;
1893 static inline unsigned
1894 nir_tex_instr_dest_size(const nir_tex_instr
*instr
)
1896 switch (instr
->op
) {
1897 case nir_texop_txs
: {
1899 switch (instr
->sampler_dim
) {
1900 case GLSL_SAMPLER_DIM_1D
:
1901 case GLSL_SAMPLER_DIM_BUF
:
1904 case GLSL_SAMPLER_DIM_2D
:
1905 case GLSL_SAMPLER_DIM_CUBE
:
1906 case GLSL_SAMPLER_DIM_MS
:
1907 case GLSL_SAMPLER_DIM_RECT
:
1908 case GLSL_SAMPLER_DIM_EXTERNAL
:
1909 case GLSL_SAMPLER_DIM_SUBPASS
:
1912 case GLSL_SAMPLER_DIM_3D
:
1916 unreachable("not reached");
1918 if (instr
->is_array
)
1926 case nir_texop_texture_samples
:
1927 case nir_texop_query_levels
:
1928 case nir_texop_samples_identical
:
1932 if (instr
->is_shadow
&& instr
->is_new_style_shadow
)
1939 /* Returns true if this texture operation queries something about the texture
1940 * rather than actually sampling it.
1943 nir_tex_instr_is_query(const nir_tex_instr
*instr
)
1945 switch (instr
->op
) {
1948 case nir_texop_texture_samples
:
1949 case nir_texop_query_levels
:
1950 case nir_texop_txf_ms_mcs
:
1957 case nir_texop_txf_ms
:
1958 case nir_texop_txf_ms_fb
:
1962 unreachable("Invalid texture opcode");
1967 nir_tex_instr_has_implicit_derivative(const nir_tex_instr
*instr
)
1969 switch (instr
->op
) {
1979 static inline nir_alu_type
1980 nir_tex_instr_src_type(const nir_tex_instr
*instr
, unsigned src
)
1982 switch (instr
->src
[src
].src_type
) {
1983 case nir_tex_src_coord
:
1984 switch (instr
->op
) {
1986 case nir_texop_txf_ms
:
1987 case nir_texop_txf_ms_fb
:
1988 case nir_texop_txf_ms_mcs
:
1989 case nir_texop_samples_identical
:
1990 return nir_type_int
;
1993 return nir_type_float
;
1996 case nir_tex_src_lod
:
1997 switch (instr
->op
) {
2000 return nir_type_int
;
2003 return nir_type_float
;
2006 case nir_tex_src_projector
:
2007 case nir_tex_src_comparator
:
2008 case nir_tex_src_bias
:
2009 case nir_tex_src_min_lod
:
2010 case nir_tex_src_ddx
:
2011 case nir_tex_src_ddy
:
2012 return nir_type_float
;
2014 case nir_tex_src_offset
:
2015 case nir_tex_src_ms_index
:
2016 case nir_tex_src_plane
:
2017 return nir_type_int
;
2019 case nir_tex_src_ms_mcs
:
2020 case nir_tex_src_texture_deref
:
2021 case nir_tex_src_sampler_deref
:
2022 case nir_tex_src_texture_offset
:
2023 case nir_tex_src_sampler_offset
:
2024 case nir_tex_src_texture_handle
:
2025 case nir_tex_src_sampler_handle
:
2026 return nir_type_uint
;
2028 case nir_num_tex_src_types
:
2029 unreachable("nir_num_tex_src_types is not a valid source type");
2032 unreachable("Invalid texture source type");
2035 static inline unsigned
2036 nir_tex_instr_src_size(const nir_tex_instr
*instr
, unsigned src
)
2038 if (instr
->src
[src
].src_type
== nir_tex_src_coord
)
2039 return instr
->coord_components
;
2041 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2042 if (instr
->src
[src
].src_type
== nir_tex_src_ms_mcs
)
2045 if (instr
->src
[src
].src_type
== nir_tex_src_ddx
||
2046 instr
->src
[src
].src_type
== nir_tex_src_ddy
) {
2047 if (instr
->is_array
)
2048 return instr
->coord_components
- 1;
2050 return instr
->coord_components
;
2053 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2054 * the offset, since a cube maps to a single face.
2056 if (instr
->src
[src
].src_type
== nir_tex_src_offset
) {
2057 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
)
2059 else if (instr
->is_array
)
2060 return instr
->coord_components
- 1;
2062 return instr
->coord_components
;
2069 nir_tex_instr_src_index(const nir_tex_instr
*instr
, nir_tex_src_type type
)
2071 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++)
2072 if (instr
->src
[i
].src_type
== type
)
2078 void nir_tex_instr_add_src(nir_tex_instr
*tex
,
2079 nir_tex_src_type src_type
,
2082 void nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
);
2084 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr
*tex
);
2091 nir_const_value value
[];
2092 } nir_load_const_instr
;
2105 /* creates a new SSA variable in an undefined state */
2110 } nir_ssa_undef_instr
;
2113 struct exec_node node
;
2115 /* The predecessor block corresponding to this source */
2116 struct nir_block
*pred
;
2121 #define nir_foreach_phi_src(phi_src, phi) \
2122 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2123 #define nir_foreach_phi_src_safe(phi_src, phi) \
2124 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2129 struct exec_list srcs
; /** < list of nir_phi_src */
2135 struct exec_node node
;
2138 } nir_parallel_copy_entry
;
2140 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2141 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2146 /* A list of nir_parallel_copy_entrys. The sources of all of the
2147 * entries are copied to the corresponding destinations "in parallel".
2148 * In other words, if we have two entries: a -> b and b -> a, the values
2151 struct exec_list entries
;
2152 } nir_parallel_copy_instr
;
2154 NIR_DEFINE_CAST(nir_instr_as_alu
, nir_instr
, nir_alu_instr
, instr
,
2155 type
, nir_instr_type_alu
)
2156 NIR_DEFINE_CAST(nir_instr_as_deref
, nir_instr
, nir_deref_instr
, instr
,
2157 type
, nir_instr_type_deref
)
2158 NIR_DEFINE_CAST(nir_instr_as_call
, nir_instr
, nir_call_instr
, instr
,
2159 type
, nir_instr_type_call
)
2160 NIR_DEFINE_CAST(nir_instr_as_jump
, nir_instr
, nir_jump_instr
, instr
,
2161 type
, nir_instr_type_jump
)
2162 NIR_DEFINE_CAST(nir_instr_as_tex
, nir_instr
, nir_tex_instr
, instr
,
2163 type
, nir_instr_type_tex
)
2164 NIR_DEFINE_CAST(nir_instr_as_intrinsic
, nir_instr
, nir_intrinsic_instr
, instr
,
2165 type
, nir_instr_type_intrinsic
)
2166 NIR_DEFINE_CAST(nir_instr_as_load_const
, nir_instr
, nir_load_const_instr
, instr
,
2167 type
, nir_instr_type_load_const
)
2168 NIR_DEFINE_CAST(nir_instr_as_ssa_undef
, nir_instr
, nir_ssa_undef_instr
, instr
,
2169 type
, nir_instr_type_ssa_undef
)
2170 NIR_DEFINE_CAST(nir_instr_as_phi
, nir_instr
, nir_phi_instr
, instr
,
2171 type
, nir_instr_type_phi
)
2172 NIR_DEFINE_CAST(nir_instr_as_parallel_copy
, nir_instr
,
2173 nir_parallel_copy_instr
, instr
,
2174 type
, nir_instr_type_parallel_copy
)
2177 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2178 static inline type \
2179 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2181 assert(nir_src_is_const(src)); \
2182 nir_load_const_instr *load = \
2183 nir_instr_as_load_const(src.ssa->parent_instr); \
2184 assert(comp < load->def.num_components); \
2185 return nir_const_value_as_##suffix(load->value[comp], \
2186 load->def.bit_size); \
2189 static inline type \
2190 nir_src_as_##suffix(nir_src src) \
2192 assert(nir_src_num_components(src) == 1); \
2193 return nir_src_comp_as_##suffix(src, 0); \
2196 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2197 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint
)
2198 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2199 NIR_DEFINE_SRC_AS_CONST(double, float)
2201 #undef NIR_DEFINE_SRC_AS_CONST
2210 nir_ssa_scalar_is_const(nir_ssa_scalar s
)
2212 return s
.def
->parent_instr
->type
== nir_instr_type_load_const
;
2215 static inline nir_const_value
2216 nir_ssa_scalar_as_const_value(nir_ssa_scalar s
)
2218 assert(s
.comp
< s
.def
->num_components
);
2219 nir_load_const_instr
*load
= nir_instr_as_load_const(s
.def
->parent_instr
);
2220 return load
->value
[s
.comp
];
2223 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2224 static inline type \
2225 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2227 return nir_const_value_as_##suffix( \
2228 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2231 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2232 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint
)
2233 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2234 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2236 #undef NIR_DEFINE_SCALAR_AS_CONST
2239 nir_ssa_scalar_is_alu(nir_ssa_scalar s
)
2241 return s
.def
->parent_instr
->type
== nir_instr_type_alu
;
2244 static inline nir_op
2245 nir_ssa_scalar_alu_op(nir_ssa_scalar s
)
2247 return nir_instr_as_alu(s
.def
->parent_instr
)->op
;
2250 static inline nir_ssa_scalar
2251 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s
, unsigned alu_src_idx
)
2253 nir_ssa_scalar out
= { NULL
, 0 };
2255 nir_alu_instr
*alu
= nir_instr_as_alu(s
.def
->parent_instr
);
2256 assert(alu_src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
2258 /* Our component must be written */
2259 assert(s
.comp
< s
.def
->num_components
);
2260 assert(alu
->dest
.write_mask
& (1u << s
.comp
));
2262 assert(alu
->src
[alu_src_idx
].src
.is_ssa
);
2263 out
.def
= alu
->src
[alu_src_idx
].src
.ssa
;
2265 if (nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 0) {
2266 /* The ALU src is unsized so the source component follows the
2267 * destination component.
2269 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[s
.comp
];
2271 /* This is a sized source so all source components work together to
2272 * produce all the destination components. Since we need to return a
2273 * scalar, this only works if the source is a scalar.
2275 assert(nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 1);
2276 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[0];
2278 assert(out
.comp
< out
.def
->num_components
);
2287 * Control flow consists of a tree of control flow nodes, which include
2288 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2289 * instructions that always run start-to-finish. Each basic block also keeps
2290 * track of its successors (blocks which may run immediately after the current
2291 * block) and predecessors (blocks which could have run immediately before the
2292 * current block). Each function also has a start block and an end block which
2293 * all return statements point to (which is always empty). Together, all the
2294 * blocks with their predecessors and successors make up the control flow
2295 * graph (CFG) of the function. There are helpers that modify the tree of
2296 * control flow nodes while modifying the CFG appropriately; these should be
2297 * used instead of modifying the tree directly.
2304 nir_cf_node_function
2307 typedef struct nir_cf_node
{
2308 struct exec_node node
;
2309 nir_cf_node_type type
;
2310 struct nir_cf_node
*parent
;
2313 typedef struct nir_block
{
2314 nir_cf_node cf_node
;
2316 struct exec_list instr_list
; /** < list of nir_instr */
2318 /** generic block index; generated by nir_index_blocks */
2322 * Each block can only have up to 2 successors, so we put them in a simple
2323 * array - no need for anything more complicated.
2325 struct nir_block
*successors
[2];
2327 /* Set of nir_block predecessors in the CFG */
2328 struct set
*predecessors
;
2331 * this node's immediate dominator in the dominance tree - set to NULL for
2334 struct nir_block
*imm_dom
;
2336 /* This node's children in the dominance tree */
2337 unsigned num_dom_children
;
2338 struct nir_block
**dom_children
;
2340 /* Set of nir_blocks on the dominance frontier of this block */
2341 struct set
*dom_frontier
;
2344 * These two indices have the property that dom_{pre,post}_index for each
2345 * child of this block in the dominance tree will always be between
2346 * dom_pre_index and dom_post_index for this block, which makes testing if
2347 * a given block is dominated by another block an O(1) operation.
2349 unsigned dom_pre_index
, dom_post_index
;
2351 /* live in and out for this block; used for liveness analysis */
2352 BITSET_WORD
*live_in
;
2353 BITSET_WORD
*live_out
;
2356 static inline nir_instr
*
2357 nir_block_first_instr(nir_block
*block
)
2359 struct exec_node
*head
= exec_list_get_head(&block
->instr_list
);
2360 return exec_node_data(nir_instr
, head
, node
);
2363 static inline nir_instr
*
2364 nir_block_last_instr(nir_block
*block
)
2366 struct exec_node
*tail
= exec_list_get_tail(&block
->instr_list
);
2367 return exec_node_data(nir_instr
, tail
, node
);
2371 nir_block_ends_in_jump(nir_block
*block
)
2373 return !exec_list_is_empty(&block
->instr_list
) &&
2374 nir_block_last_instr(block
)->type
== nir_instr_type_jump
;
2377 #define nir_foreach_instr(instr, block) \
2378 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2379 #define nir_foreach_instr_reverse(instr, block) \
2380 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2381 #define nir_foreach_instr_safe(instr, block) \
2382 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2383 #define nir_foreach_instr_reverse_safe(instr, block) \
2384 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2387 nir_selection_control_none
= 0x0,
2388 nir_selection_control_flatten
= 0x1,
2389 nir_selection_control_dont_flatten
= 0x2,
2390 } nir_selection_control
;
2392 typedef struct nir_if
{
2393 nir_cf_node cf_node
;
2395 nir_selection_control control
;
2397 struct exec_list then_list
; /** < list of nir_cf_node */
2398 struct exec_list else_list
; /** < list of nir_cf_node */
2404 /** Instruction that generates nif::condition. */
2405 nir_instr
*conditional_instr
;
2407 /** Block within ::nif that has the break instruction. */
2408 nir_block
*break_block
;
2410 /** Last block for the then- or else-path that does not contain the break. */
2411 nir_block
*continue_from_block
;
2413 /** True when ::break_block is in the else-path of ::nif. */
2414 bool continue_from_then
;
2417 /* This is true if the terminators exact trip count is unknown. For
2420 * for (int i = 0; i < imin(x, 4); i++)
2423 * Here loop analysis would have set a max_trip_count of 4 however we dont
2424 * know for sure that this is the exact trip count.
2426 bool exact_trip_count_unknown
;
2428 struct list_head loop_terminator_link
;
2429 } nir_loop_terminator
;
2432 /* Estimated cost (in number of instructions) of the loop */
2433 unsigned instr_cost
;
2435 /* Guessed trip count based on array indexing */
2436 unsigned guessed_trip_count
;
2438 /* Maximum number of times the loop is run (if known) */
2439 unsigned max_trip_count
;
2441 /* Do we know the exact number of times the loop will be run */
2442 bool exact_trip_count_known
;
2444 /* Unroll the loop regardless of its size */
2447 /* Does the loop contain complex loop terminators, continues or other
2448 * complex behaviours? If this is true we can't rely on
2449 * loop_terminator_list to be complete or accurate.
2453 nir_loop_terminator
*limiting_terminator
;
2455 /* A list of loop_terminators terminating this loop. */
2456 struct list_head loop_terminator_list
;
2460 nir_loop_control_none
= 0x0,
2461 nir_loop_control_unroll
= 0x1,
2462 nir_loop_control_dont_unroll
= 0x2,
2466 nir_cf_node cf_node
;
2468 struct exec_list body
; /** < list of nir_cf_node */
2470 nir_loop_info
*info
;
2471 nir_loop_control control
;
2472 bool partially_unrolled
;
2476 * Various bits of metadata that can may be created or required by
2477 * optimization and analysis passes
2480 nir_metadata_none
= 0x0,
2481 nir_metadata_block_index
= 0x1,
2482 nir_metadata_dominance
= 0x2,
2483 nir_metadata_live_ssa_defs
= 0x4,
2484 nir_metadata_not_properly_reset
= 0x8,
2485 nir_metadata_loop_analysis
= 0x10,
2489 nir_cf_node cf_node
;
2491 /** pointer to the function of which this is an implementation */
2492 struct nir_function
*function
;
2494 struct exec_list body
; /** < list of nir_cf_node */
2496 nir_block
*end_block
;
2498 /** list for all local variables in the function */
2499 struct exec_list locals
;
2501 /** list of local registers in the function */
2502 struct exec_list registers
;
2504 /** next available local register index */
2507 /** next available SSA value index */
2510 /* total number of basic blocks, only valid when block_index_dirty = false */
2511 unsigned num_blocks
;
2513 nir_metadata valid_metadata
;
2514 } nir_function_impl
;
2516 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2517 nir_start_block(nir_function_impl
*impl
)
2519 return (nir_block
*) impl
->body
.head_sentinel
.next
;
2522 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2523 nir_impl_last_block(nir_function_impl
*impl
)
2525 return (nir_block
*) impl
->body
.tail_sentinel
.prev
;
2528 static inline nir_cf_node
*
2529 nir_cf_node_next(nir_cf_node
*node
)
2531 struct exec_node
*next
= exec_node_get_next(&node
->node
);
2532 if (exec_node_is_tail_sentinel(next
))
2535 return exec_node_data(nir_cf_node
, next
, node
);
2538 static inline nir_cf_node
*
2539 nir_cf_node_prev(nir_cf_node
*node
)
2541 struct exec_node
*prev
= exec_node_get_prev(&node
->node
);
2542 if (exec_node_is_head_sentinel(prev
))
2545 return exec_node_data(nir_cf_node
, prev
, node
);
2549 nir_cf_node_is_first(const nir_cf_node
*node
)
2551 return exec_node_is_head_sentinel(node
->node
.prev
);
2555 nir_cf_node_is_last(const nir_cf_node
*node
)
2557 return exec_node_is_tail_sentinel(node
->node
.next
);
2560 NIR_DEFINE_CAST(nir_cf_node_as_block
, nir_cf_node
, nir_block
, cf_node
,
2561 type
, nir_cf_node_block
)
2562 NIR_DEFINE_CAST(nir_cf_node_as_if
, nir_cf_node
, nir_if
, cf_node
,
2563 type
, nir_cf_node_if
)
2564 NIR_DEFINE_CAST(nir_cf_node_as_loop
, nir_cf_node
, nir_loop
, cf_node
,
2565 type
, nir_cf_node_loop
)
2566 NIR_DEFINE_CAST(nir_cf_node_as_function
, nir_cf_node
,
2567 nir_function_impl
, cf_node
, type
, nir_cf_node_function
)
2569 static inline nir_block
*
2570 nir_if_first_then_block(nir_if
*if_stmt
)
2572 struct exec_node
*head
= exec_list_get_head(&if_stmt
->then_list
);
2573 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2576 static inline nir_block
*
2577 nir_if_last_then_block(nir_if
*if_stmt
)
2579 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->then_list
);
2580 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2583 static inline nir_block
*
2584 nir_if_first_else_block(nir_if
*if_stmt
)
2586 struct exec_node
*head
= exec_list_get_head(&if_stmt
->else_list
);
2587 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2590 static inline nir_block
*
2591 nir_if_last_else_block(nir_if
*if_stmt
)
2593 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->else_list
);
2594 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2597 static inline nir_block
*
2598 nir_loop_first_block(nir_loop
*loop
)
2600 struct exec_node
*head
= exec_list_get_head(&loop
->body
);
2601 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2604 static inline nir_block
*
2605 nir_loop_last_block(nir_loop
*loop
)
2607 struct exec_node
*tail
= exec_list_get_tail(&loop
->body
);
2608 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2612 * Return true if this list of cf_nodes contains a single empty block.
2615 nir_cf_list_is_empty_block(struct exec_list
*cf_list
)
2617 if (exec_list_is_singular(cf_list
)) {
2618 struct exec_node
*head
= exec_list_get_head(cf_list
);
2620 nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2621 return exec_list_is_empty(&block
->instr_list
);
2627 uint8_t num_components
;
2631 typedef struct nir_function
{
2632 struct exec_node node
;
2635 struct nir_shader
*shader
;
2637 unsigned num_params
;
2638 nir_parameter
*params
;
2640 /** The implementation of this function.
2642 * If the function is only declared and not implemented, this is NULL.
2644 nir_function_impl
*impl
;
2650 nir_lower_imul64
= (1 << 0),
2651 nir_lower_isign64
= (1 << 1),
2652 /** Lower all int64 modulus and division opcodes */
2653 nir_lower_divmod64
= (1 << 2),
2654 /** Lower all 64-bit umul_high and imul_high opcodes */
2655 nir_lower_imul_high64
= (1 << 3),
2656 nir_lower_mov64
= (1 << 4),
2657 nir_lower_icmp64
= (1 << 5),
2658 nir_lower_iadd64
= (1 << 6),
2659 nir_lower_iabs64
= (1 << 7),
2660 nir_lower_ineg64
= (1 << 8),
2661 nir_lower_logic64
= (1 << 9),
2662 nir_lower_minmax64
= (1 << 10),
2663 nir_lower_shift64
= (1 << 11),
2664 nir_lower_imul_2x32_64
= (1 << 12),
2665 nir_lower_extract64
= (1 << 13),
2666 nir_lower_ufind_msb64
= (1 << 14),
2667 } nir_lower_int64_options
;
2670 nir_lower_drcp
= (1 << 0),
2671 nir_lower_dsqrt
= (1 << 1),
2672 nir_lower_drsq
= (1 << 2),
2673 nir_lower_dtrunc
= (1 << 3),
2674 nir_lower_dfloor
= (1 << 4),
2675 nir_lower_dceil
= (1 << 5),
2676 nir_lower_dfract
= (1 << 6),
2677 nir_lower_dround_even
= (1 << 7),
2678 nir_lower_dmod
= (1 << 8),
2679 nir_lower_dsub
= (1 << 9),
2680 nir_lower_ddiv
= (1 << 10),
2681 nir_lower_fp64_full_software
= (1 << 11),
2682 } nir_lower_doubles_options
;
2685 nir_divergence_single_prim_per_subgroup
= (1 << 0),
2686 nir_divergence_single_patch_per_tcs_subgroup
= (1 << 1),
2687 nir_divergence_single_patch_per_tes_subgroup
= (1 << 2),
2688 nir_divergence_view_index_uniform
= (1 << 3),
2689 } nir_divergence_options
;
2691 typedef struct nir_shader_compiler_options
{
2697 /** Lowers flrp when it does not support doubles */
2704 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2705 bool lower_bitfield_extract
;
2706 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2707 bool lower_bitfield_extract_to_shifts
;
2708 /** Lowers bitfield_insert to bfi/bfm */
2709 bool lower_bitfield_insert
;
2710 /** Lowers bitfield_insert to compares, and shifts. */
2711 bool lower_bitfield_insert_to_shifts
;
2712 /** Lowers bitfield_insert to bfm/bitfield_select. */
2713 bool lower_bitfield_insert_to_bitfield_select
;
2714 /** Lowers bitfield_reverse to shifts. */
2715 bool lower_bitfield_reverse
;
2716 /** Lowers bit_count to shifts. */
2717 bool lower_bit_count
;
2718 /** Lowers ifind_msb to compare and ufind_msb */
2719 bool lower_ifind_msb
;
2720 /** Lowers find_lsb to ufind_msb and logic ops */
2721 bool lower_find_lsb
;
2722 bool lower_uadd_carry
;
2723 bool lower_usub_borrow
;
2724 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2725 bool lower_mul_high
;
2726 /** lowers fneg and ineg to fsub and isub. */
2728 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2731 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2734 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2735 bool lower_vector_cmp
;
2737 /** enables rules to lower idiv by power-of-two: */
2740 /** enable rules to avoid bit ops */
2743 /** enables rules to lower isign to imin+imax */
2746 /** enables rules to lower fsign to fsub and flt */
2749 /* lower fdph to fdot4 */
2752 /** lower fdot to fmul and fsum/fadd. */
2755 /* Does the native fdot instruction replicate its result for four
2756 * components? If so, then opt_algebraic_late will turn all fdotN
2757 * instructions into fdot_replicatedN instructions.
2759 bool fdot_replicates
;
2761 /** lowers ffloor to fsub+ffract: */
2764 /** lowers ffract to fsub+ffloor: */
2767 /** lowers fceil to fneg+ffloor+fneg: */
2774 bool lower_pack_half_2x16
;
2775 bool lower_pack_half_2x16_split
;
2776 bool lower_pack_unorm_2x16
;
2777 bool lower_pack_snorm_2x16
;
2778 bool lower_pack_unorm_4x8
;
2779 bool lower_pack_snorm_4x8
;
2780 bool lower_unpack_half_2x16
;
2781 bool lower_unpack_half_2x16_split
;
2782 bool lower_unpack_unorm_2x16
;
2783 bool lower_unpack_snorm_2x16
;
2784 bool lower_unpack_unorm_4x8
;
2785 bool lower_unpack_snorm_4x8
;
2787 bool lower_extract_byte
;
2788 bool lower_extract_word
;
2790 bool lower_all_io_to_temps
;
2791 bool lower_all_io_to_elements
;
2793 /* Indicates that the driver only has zero-based vertex id */
2794 bool vertex_id_zero_based
;
2797 * If enabled, gl_BaseVertex will be lowered as:
2798 * is_indexed_draw (~0/0) & firstvertex
2800 bool lower_base_vertex
;
2803 * If enabled, gl_HelperInvocation will be lowered as:
2805 * !((1 << sample_id) & sample_mask_in))
2807 * This depends on some possibly hw implementation details, which may
2808 * not be true for all hw. In particular that the FS is only executed
2809 * for covered samples or for helper invocations. So, do not blindly
2810 * enable this option.
2812 * Note: See also issue #22 in ARB_shader_image_load_store
2814 bool lower_helper_invocation
;
2817 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2819 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2820 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2822 bool optimize_sample_mask_in
;
2824 bool lower_cs_local_index_from_id
;
2825 bool lower_cs_local_id_from_index
;
2827 bool lower_device_index_to_zero
;
2829 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2830 bool lower_wpos_pntc
;
2836 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2837 * for IO purposes and would prefer loads/stores be vectorized.
2840 bool lower_to_scalar
;
2843 * Should nir_lower_io() create load_interpolated_input intrinsics?
2845 * If not, it generates regular load_input intrinsics and interpolation
2846 * information must be inferred from the list of input nir_variables.
2848 bool use_interpolated_input_intrinsics
;
2850 /* Lowers when 32x32->64 bit multiplication is not supported */
2851 bool lower_mul_2x32_64
;
2853 /* Lowers when rotate instruction is not supported */
2857 * Backend supports imul24, and would like to use it (when possible)
2858 * for address/offset calculation. If true, driver should call
2859 * nir_lower_amul(). (If not set, amul will automatically be lowered
2865 * Is this the Intel vec4 backend?
2867 * Used to inhibit algebraic optimizations that are known to be harmful on
2868 * the Intel vec4 backend. This is generally applicable to any
2869 * optimization that might cause more immediate values to be used in
2870 * 3-source (e.g., ffma and flrp) instructions.
2874 unsigned max_unroll_iterations
;
2876 nir_lower_int64_options lower_int64_options
;
2877 nir_lower_doubles_options lower_doubles_options
;
2878 } nir_shader_compiler_options
;
2880 typedef struct nir_shader
{
2881 /** list of uniforms (nir_variable) */
2882 struct exec_list uniforms
;
2884 /** list of inputs (nir_variable) */
2885 struct exec_list inputs
;
2887 /** list of outputs (nir_variable) */
2888 struct exec_list outputs
;
2890 /** list of shared compute variables (nir_variable) */
2891 struct exec_list shared
;
2893 /** Set of driver-specific options for the shader.
2895 * The memory for the options is expected to be kept in a single static
2896 * copy by the driver.
2898 const struct nir_shader_compiler_options
*options
;
2900 /** Various bits of compile-time information about a given shader */
2901 struct shader_info info
;
2903 /** list of global variables in the shader (nir_variable) */
2904 struct exec_list globals
;
2906 /** list of system value variables in the shader (nir_variable) */
2907 struct exec_list system_values
;
2909 struct exec_list functions
; /** < list of nir_function */
2912 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2915 unsigned num_inputs
, num_uniforms
, num_outputs
, num_shared
;
2917 /** Size in bytes of required scratch space */
2918 unsigned scratch_size
;
2920 /** Constant data associated with this shader.
2922 * Constant data is loaded through load_constant intrinsics. See also
2923 * nir_opt_large_constants.
2925 void *constant_data
;
2926 unsigned constant_data_size
;
2929 #define nir_foreach_function(func, shader) \
2930 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2932 static inline nir_function_impl
*
2933 nir_shader_get_entrypoint(nir_shader
*shader
)
2935 nir_function
*func
= NULL
;
2937 nir_foreach_function(function
, shader
) {
2938 assert(func
== NULL
);
2939 if (function
->is_entrypoint
) {
2950 assert(func
->num_params
== 0);
2955 nir_shader
*nir_shader_create(void *mem_ctx
,
2956 gl_shader_stage stage
,
2957 const nir_shader_compiler_options
*options
,
2960 nir_register
*nir_local_reg_create(nir_function_impl
*impl
);
2962 void nir_reg_remove(nir_register
*reg
);
2964 /** Adds a variable to the appropriate list in nir_shader */
2965 void nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
);
2968 nir_function_impl_add_variable(nir_function_impl
*impl
, nir_variable
*var
)
2970 assert(var
->data
.mode
== nir_var_function_temp
);
2971 exec_list_push_tail(&impl
->locals
, &var
->node
);
2974 /** creates a variable, sets a few defaults, and adds it to the list */
2975 nir_variable
*nir_variable_create(nir_shader
*shader
,
2976 nir_variable_mode mode
,
2977 const struct glsl_type
*type
,
2979 /** creates a local variable and adds it to the list */
2980 nir_variable
*nir_local_variable_create(nir_function_impl
*impl
,
2981 const struct glsl_type
*type
,
2984 /** creates a function and adds it to the shader's list of functions */
2985 nir_function
*nir_function_create(nir_shader
*shader
, const char *name
);
2987 nir_function_impl
*nir_function_impl_create(nir_function
*func
);
2988 /** creates a function_impl that isn't tied to any particular function */
2989 nir_function_impl
*nir_function_impl_create_bare(nir_shader
*shader
);
2991 nir_block
*nir_block_create(nir_shader
*shader
);
2992 nir_if
*nir_if_create(nir_shader
*shader
);
2993 nir_loop
*nir_loop_create(nir_shader
*shader
);
2995 nir_function_impl
*nir_cf_node_get_function(nir_cf_node
*node
);
2997 /** requests that the given pieces of metadata be generated */
2998 void nir_metadata_require(nir_function_impl
*impl
, nir_metadata required
, ...);
2999 /** dirties all but the preserved metadata */
3000 void nir_metadata_preserve(nir_function_impl
*impl
, nir_metadata preserved
);
3002 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3003 nir_alu_instr
*nir_alu_instr_create(nir_shader
*shader
, nir_op op
);
3005 nir_deref_instr
*nir_deref_instr_create(nir_shader
*shader
,
3006 nir_deref_type deref_type
);
3008 nir_jump_instr
*nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
);
3010 nir_load_const_instr
*nir_load_const_instr_create(nir_shader
*shader
,
3011 unsigned num_components
,
3014 nir_intrinsic_instr
*nir_intrinsic_instr_create(nir_shader
*shader
,
3015 nir_intrinsic_op op
);
3017 nir_call_instr
*nir_call_instr_create(nir_shader
*shader
,
3018 nir_function
*callee
);
3020 nir_tex_instr
*nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
);
3022 nir_phi_instr
*nir_phi_instr_create(nir_shader
*shader
);
3024 nir_parallel_copy_instr
*nir_parallel_copy_instr_create(nir_shader
*shader
);
3026 nir_ssa_undef_instr
*nir_ssa_undef_instr_create(nir_shader
*shader
,
3027 unsigned num_components
,
3030 nir_const_value
nir_alu_binop_identity(nir_op binop
, unsigned bit_size
);
3033 * NIR Cursors and Instruction Insertion API
3036 * A tiny struct representing a point to insert/extract instructions or
3037 * control flow nodes. Helps reduce the combinatorial explosion of possible
3038 * points to insert/extract.
3040 * \sa nir_control_flow.h
3043 nir_cursor_before_block
,
3044 nir_cursor_after_block
,
3045 nir_cursor_before_instr
,
3046 nir_cursor_after_instr
,
3047 } nir_cursor_option
;
3050 nir_cursor_option option
;
3057 static inline nir_block
*
3058 nir_cursor_current_block(nir_cursor cursor
)
3060 if (cursor
.option
== nir_cursor_before_instr
||
3061 cursor
.option
== nir_cursor_after_instr
) {
3062 return cursor
.instr
->block
;
3064 return cursor
.block
;
3068 bool nir_cursors_equal(nir_cursor a
, nir_cursor b
);
3070 static inline nir_cursor
3071 nir_before_block(nir_block
*block
)
3074 cursor
.option
= nir_cursor_before_block
;
3075 cursor
.block
= block
;
3079 static inline nir_cursor
3080 nir_after_block(nir_block
*block
)
3083 cursor
.option
= nir_cursor_after_block
;
3084 cursor
.block
= block
;
3088 static inline nir_cursor
3089 nir_before_instr(nir_instr
*instr
)
3092 cursor
.option
= nir_cursor_before_instr
;
3093 cursor
.instr
= instr
;
3097 static inline nir_cursor
3098 nir_after_instr(nir_instr
*instr
)
3101 cursor
.option
= nir_cursor_after_instr
;
3102 cursor
.instr
= instr
;
3106 static inline nir_cursor
3107 nir_after_block_before_jump(nir_block
*block
)
3109 nir_instr
*last_instr
= nir_block_last_instr(block
);
3110 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
3111 return nir_before_instr(last_instr
);
3113 return nir_after_block(block
);
3117 static inline nir_cursor
3118 nir_before_src(nir_src
*src
, bool is_if_condition
)
3120 if (is_if_condition
) {
3121 nir_block
*prev_block
=
3122 nir_cf_node_as_block(nir_cf_node_prev(&src
->parent_if
->cf_node
));
3123 assert(!nir_block_ends_in_jump(prev_block
));
3124 return nir_after_block(prev_block
);
3125 } else if (src
->parent_instr
->type
== nir_instr_type_phi
) {
3127 nir_phi_instr
*cond_phi
= nir_instr_as_phi(src
->parent_instr
);
3129 nir_foreach_phi_src(phi_src
, cond_phi
) {
3130 if (phi_src
->src
.ssa
== src
->ssa
) {
3137 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3138 * to have a more specific name.
3140 nir_phi_src
*phi_src
= LIST_ENTRY(nir_phi_src
, src
, src
);
3141 return nir_after_block_before_jump(phi_src
->pred
);
3143 return nir_before_instr(src
->parent_instr
);
3147 static inline nir_cursor
3148 nir_before_cf_node(nir_cf_node
*node
)
3150 if (node
->type
== nir_cf_node_block
)
3151 return nir_before_block(nir_cf_node_as_block(node
));
3153 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node
)));
3156 static inline nir_cursor
3157 nir_after_cf_node(nir_cf_node
*node
)
3159 if (node
->type
== nir_cf_node_block
)
3160 return nir_after_block(nir_cf_node_as_block(node
));
3162 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node
)));
3165 static inline nir_cursor
3166 nir_after_phis(nir_block
*block
)
3168 nir_foreach_instr(instr
, block
) {
3169 if (instr
->type
!= nir_instr_type_phi
)
3170 return nir_before_instr(instr
);
3172 return nir_after_block(block
);
3175 static inline nir_cursor
3176 nir_after_cf_node_and_phis(nir_cf_node
*node
)
3178 if (node
->type
== nir_cf_node_block
)
3179 return nir_after_block(nir_cf_node_as_block(node
));
3181 nir_block
*block
= nir_cf_node_as_block(nir_cf_node_next(node
));
3183 return nir_after_phis(block
);
3186 static inline nir_cursor
3187 nir_before_cf_list(struct exec_list
*cf_list
)
3189 nir_cf_node
*first_node
= exec_node_data(nir_cf_node
,
3190 exec_list_get_head(cf_list
), node
);
3191 return nir_before_cf_node(first_node
);
3194 static inline nir_cursor
3195 nir_after_cf_list(struct exec_list
*cf_list
)
3197 nir_cf_node
*last_node
= exec_node_data(nir_cf_node
,
3198 exec_list_get_tail(cf_list
), node
);
3199 return nir_after_cf_node(last_node
);
3203 * Insert a NIR instruction at the given cursor.
3205 * Note: This does not update the cursor.
3207 void nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
);
3210 nir_instr_insert_before(nir_instr
*instr
, nir_instr
*before
)
3212 nir_instr_insert(nir_before_instr(instr
), before
);
3216 nir_instr_insert_after(nir_instr
*instr
, nir_instr
*after
)
3218 nir_instr_insert(nir_after_instr(instr
), after
);
3222 nir_instr_insert_before_block(nir_block
*block
, nir_instr
*before
)
3224 nir_instr_insert(nir_before_block(block
), before
);
3228 nir_instr_insert_after_block(nir_block
*block
, nir_instr
*after
)
3230 nir_instr_insert(nir_after_block(block
), after
);
3234 nir_instr_insert_before_cf(nir_cf_node
*node
, nir_instr
*before
)
3236 nir_instr_insert(nir_before_cf_node(node
), before
);
3240 nir_instr_insert_after_cf(nir_cf_node
*node
, nir_instr
*after
)
3242 nir_instr_insert(nir_after_cf_node(node
), after
);
3246 nir_instr_insert_before_cf_list(struct exec_list
*list
, nir_instr
*before
)
3248 nir_instr_insert(nir_before_cf_list(list
), before
);
3252 nir_instr_insert_after_cf_list(struct exec_list
*list
, nir_instr
*after
)
3254 nir_instr_insert(nir_after_cf_list(list
), after
);
3257 void nir_instr_remove_v(nir_instr
*instr
);
3259 static inline nir_cursor
3260 nir_instr_remove(nir_instr
*instr
)
3263 nir_instr
*prev
= nir_instr_prev(instr
);
3265 cursor
= nir_after_instr(prev
);
3267 cursor
= nir_before_block(instr
->block
);
3269 nir_instr_remove_v(instr
);
3275 nir_ssa_def
*nir_instr_ssa_def(nir_instr
*instr
);
3277 typedef bool (*nir_foreach_ssa_def_cb
)(nir_ssa_def
*def
, void *state
);
3278 typedef bool (*nir_foreach_dest_cb
)(nir_dest
*dest
, void *state
);
3279 typedef bool (*nir_foreach_src_cb
)(nir_src
*src
, void *state
);
3280 bool nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
,
3282 bool nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
);
3283 bool nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
);
3285 nir_const_value
*nir_src_as_const_value(nir_src src
);
3287 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3288 static inline c_type * \
3289 nir_src_as_ ## name (nir_src src) \
3291 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3292 ? cast_macro(src.ssa->parent_instr) : NULL; \
3295 NIR_SRC_AS_(alu_instr
, nir_alu_instr
, nir_instr_type_alu
, nir_instr_as_alu
)
3296 NIR_SRC_AS_(intrinsic
, nir_intrinsic_instr
,
3297 nir_instr_type_intrinsic
, nir_instr_as_intrinsic
)
3298 NIR_SRC_AS_(deref
, nir_deref_instr
, nir_instr_type_deref
, nir_instr_as_deref
)
3300 bool nir_src_is_dynamically_uniform(nir_src src
);
3301 bool nir_srcs_equal(nir_src src1
, nir_src src2
);
3302 bool nir_instrs_equal(const nir_instr
*instr1
, const nir_instr
*instr2
);
3303 void nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
);
3304 void nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
);
3305 void nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
);
3306 void nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
,
3309 void nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
3310 unsigned num_components
, unsigned bit_size
,
3312 void nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
3313 unsigned num_components
, unsigned bit_size
,
3316 nir_ssa_dest_init_for_type(nir_instr
*instr
, nir_dest
*dest
,
3317 const struct glsl_type
*type
,
3320 assert(glsl_type_is_vector_or_scalar(type
));
3321 nir_ssa_dest_init(instr
, dest
, glsl_get_components(type
),
3322 glsl_get_bit_size(type
), name
);
3324 void nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
);
3325 void nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
3326 nir_instr
*after_me
);
3328 nir_component_mask_t
nir_ssa_def_components_read(const nir_ssa_def
*def
);
3331 * finds the next basic block in source-code order, returns NULL if there is
3335 nir_block
*nir_block_cf_tree_next(nir_block
*block
);
3337 /* Performs the opposite of nir_block_cf_tree_next() */
3339 nir_block
*nir_block_cf_tree_prev(nir_block
*block
);
3341 /* Gets the first block in a CF node in source-code order */
3343 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
);
3345 /* Gets the last block in a CF node in source-code order */
3347 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
);
3349 /* Gets the next block after a CF node in source-code order */
3351 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
);
3353 /* Macros for loops that visit blocks in source-code order */
3355 #define nir_foreach_block(block, impl) \
3356 for (nir_block *block = nir_start_block(impl); block != NULL; \
3357 block = nir_block_cf_tree_next(block))
3359 #define nir_foreach_block_safe(block, impl) \
3360 for (nir_block *block = nir_start_block(impl), \
3361 *next = nir_block_cf_tree_next(block); \
3363 block = next, next = nir_block_cf_tree_next(block))
3365 #define nir_foreach_block_reverse(block, impl) \
3366 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3367 block = nir_block_cf_tree_prev(block))
3369 #define nir_foreach_block_reverse_safe(block, impl) \
3370 for (nir_block *block = nir_impl_last_block(impl), \
3371 *prev = nir_block_cf_tree_prev(block); \
3373 block = prev, prev = nir_block_cf_tree_prev(block))
3375 #define nir_foreach_block_in_cf_node(block, node) \
3376 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3377 block != nir_cf_node_cf_tree_next(node); \
3378 block = nir_block_cf_tree_next(block))
3380 /* If the following CF node is an if, this function returns that if.
3381 * Otherwise, it returns NULL.
3383 nir_if
*nir_block_get_following_if(nir_block
*block
);
3385 nir_loop
*nir_block_get_following_loop(nir_block
*block
);
3387 void nir_index_local_regs(nir_function_impl
*impl
);
3388 void nir_index_ssa_defs(nir_function_impl
*impl
);
3389 unsigned nir_index_instrs(nir_function_impl
*impl
);
3391 void nir_index_blocks(nir_function_impl
*impl
);
3393 void nir_index_vars(nir_shader
*shader
, nir_function_impl
*impl
, nir_variable_mode modes
);
3395 void nir_print_shader(nir_shader
*shader
, FILE *fp
);
3396 void nir_print_shader_annotated(nir_shader
*shader
, FILE *fp
, struct hash_table
*errors
);
3397 void nir_print_instr(const nir_instr
*instr
, FILE *fp
);
3398 void nir_print_deref(const nir_deref_instr
*deref
, FILE *fp
);
3400 /** Shallow clone of a single ALU instruction. */
3401 nir_alu_instr
*nir_alu_instr_clone(nir_shader
*s
, const nir_alu_instr
*orig
);
3403 nir_shader
*nir_shader_clone(void *mem_ctx
, const nir_shader
*s
);
3404 nir_function_impl
*nir_function_impl_clone(nir_shader
*shader
,
3405 const nir_function_impl
*fi
);
3406 nir_constant
*nir_constant_clone(const nir_constant
*c
, nir_variable
*var
);
3407 nir_variable
*nir_variable_clone(const nir_variable
*c
, nir_shader
*shader
);
3409 void nir_shader_replace(nir_shader
*dest
, nir_shader
*src
);
3411 void nir_shader_serialize_deserialize(nir_shader
*s
);
3414 void nir_validate_shader(nir_shader
*shader
, const char *when
);
3415 void nir_metadata_set_validation_flag(nir_shader
*shader
);
3416 void nir_metadata_check_validation_flag(nir_shader
*shader
);
3419 should_skip_nir(const char *name
)
3421 static const char *list
= NULL
;
3423 /* Comma separated list of names to skip. */
3424 list
= getenv("NIR_SKIP");
3432 return comma_separated_list_contains(list
, name
);
3436 should_clone_nir(void)
3438 static int should_clone
= -1;
3439 if (should_clone
< 0)
3440 should_clone
= env_var_as_boolean("NIR_TEST_CLONE", false);
3442 return should_clone
;
3446 should_serialize_deserialize_nir(void)
3448 static int test_serialize
= -1;
3449 if (test_serialize
< 0)
3450 test_serialize
= env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3452 return test_serialize
;
3456 should_print_nir(void)
3458 static int should_print
= -1;
3459 if (should_print
< 0)
3460 should_print
= env_var_as_boolean("NIR_PRINT", false);
3462 return should_print
;
3465 static inline void nir_validate_shader(nir_shader
*shader
, const char *when
) { (void) shader
; (void)when
; }
3466 static inline void nir_metadata_set_validation_flag(nir_shader
*shader
) { (void) shader
; }
3467 static inline void nir_metadata_check_validation_flag(nir_shader
*shader
) { (void) shader
; }
3468 static inline bool should_skip_nir(UNUSED
const char *pass_name
) { return false; }
3469 static inline bool should_clone_nir(void) { return false; }
3470 static inline bool should_serialize_deserialize_nir(void) { return false; }
3471 static inline bool should_print_nir(void) { return false; }
3474 #define _PASS(pass, nir, do_pass) do { \
3475 if (should_skip_nir(#pass)) { \
3476 printf("skipping %s\n", #pass); \
3480 nir_validate_shader(nir, "after " #pass); \
3481 if (should_clone_nir()) { \
3482 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3483 nir_shader_replace(nir, clone); \
3485 if (should_serialize_deserialize_nir()) { \
3486 nir_shader_serialize_deserialize(nir); \
3490 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3491 nir_metadata_set_validation_flag(nir); \
3492 if (should_print_nir()) \
3493 printf("%s\n", #pass); \
3494 if (pass(nir, ##__VA_ARGS__)) { \
3496 if (should_print_nir()) \
3497 nir_print_shader(nir, stdout); \
3498 nir_metadata_check_validation_flag(nir); \
3502 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3503 if (should_print_nir()) \
3504 printf("%s\n", #pass); \
3505 pass(nir, ##__VA_ARGS__); \
3506 if (should_print_nir()) \
3507 nir_print_shader(nir, stdout); \
3510 #define NIR_SKIP(name) should_skip_nir(#name)
3512 /** An instruction filtering callback
3514 * Returns true if the instruction should be processed and false otherwise.
3516 typedef bool (*nir_instr_filter_cb
)(const nir_instr
*, const void *);
3518 /** A simple instruction lowering callback
3520 * Many instruction lowering passes can be written as a simple function which
3521 * takes an instruction as its input and returns a sequence of instructions
3522 * that implement the consumed instruction. This function type represents
3523 * such a lowering function. When called, a function with this prototype
3524 * should either return NULL indicating that no lowering needs to be done or
3525 * emit a sequence of instructions using the provided builder (whose cursor
3526 * will already be placed after the instruction to be lowered) and return the
3527 * resulting nir_ssa_def.
3529 typedef nir_ssa_def
*(*nir_lower_instr_cb
)(struct nir_builder
*,
3530 nir_instr
*, void *);
3533 * Special return value for nir_lower_instr_cb when some progress occurred
3534 * (like changing an input to the instr) that didn't result in a replacement
3535 * SSA def being generated.
3537 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3539 /** Iterate over all the instructions in a nir_function_impl and lower them
3540 * using the provided callbacks
3542 * This function implements the guts of a standard lowering pass for you. It
3543 * iterates over all of the instructions in a nir_function_impl and calls the
3544 * filter callback on each one. If the filter callback returns true, it then
3545 * calls the lowering call back on the instruction. (Splitting it this way
3546 * allows us to avoid some save/restore work for instructions we know won't be
3547 * lowered.) If the instruction is dead after the lowering is complete, it
3548 * will be removed. If new instructions are added, the lowering callback will
3549 * also be called on them in case multiple lowerings are required.
3551 * The metadata for the nir_function_impl will also be updated. If any blocks
3552 * are added (they cannot be removed), dominance and block indices will be
3555 bool nir_function_impl_lower_instructions(nir_function_impl
*impl
,
3556 nir_instr_filter_cb filter
,
3557 nir_lower_instr_cb lower
,
3559 bool nir_shader_lower_instructions(nir_shader
*shader
,
3560 nir_instr_filter_cb filter
,
3561 nir_lower_instr_cb lower
,
3564 void nir_calc_dominance_impl(nir_function_impl
*impl
);
3565 void nir_calc_dominance(nir_shader
*shader
);
3567 nir_block
*nir_dominance_lca(nir_block
*b1
, nir_block
*b2
);
3568 bool nir_block_dominates(nir_block
*parent
, nir_block
*child
);
3569 bool nir_block_is_unreachable(nir_block
*block
);
3571 void nir_dump_dom_tree_impl(nir_function_impl
*impl
, FILE *fp
);
3572 void nir_dump_dom_tree(nir_shader
*shader
, FILE *fp
);
3574 void nir_dump_dom_frontier_impl(nir_function_impl
*impl
, FILE *fp
);
3575 void nir_dump_dom_frontier(nir_shader
*shader
, FILE *fp
);
3577 void nir_dump_cfg_impl(nir_function_impl
*impl
, FILE *fp
);
3578 void nir_dump_cfg(nir_shader
*shader
, FILE *fp
);
3580 int nir_gs_count_vertices(const nir_shader
*shader
);
3582 bool nir_shrink_vec_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3583 bool nir_split_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3584 bool nir_split_var_copies(nir_shader
*shader
);
3585 bool nir_split_per_member_structs(nir_shader
*shader
);
3586 bool nir_split_struct_vars(nir_shader
*shader
, nir_variable_mode modes
);
3588 bool nir_lower_returns_impl(nir_function_impl
*impl
);
3589 bool nir_lower_returns(nir_shader
*shader
);
3591 void nir_inline_function_impl(struct nir_builder
*b
,
3592 const nir_function_impl
*impl
,
3593 nir_ssa_def
**params
);
3594 bool nir_inline_functions(nir_shader
*shader
);
3596 bool nir_propagate_invariant(nir_shader
*shader
);
3598 void nir_lower_var_copy_instr(nir_intrinsic_instr
*copy
, nir_shader
*shader
);
3599 void nir_lower_deref_copy_instr(struct nir_builder
*b
,
3600 nir_intrinsic_instr
*copy
);
3601 bool nir_lower_var_copies(nir_shader
*shader
);
3603 void nir_fixup_deref_modes(nir_shader
*shader
);
3605 bool nir_lower_global_vars_to_local(nir_shader
*shader
);
3608 nir_lower_direct_array_deref_of_vec_load
= (1 << 0),
3609 nir_lower_indirect_array_deref_of_vec_load
= (1 << 1),
3610 nir_lower_direct_array_deref_of_vec_store
= (1 << 2),
3611 nir_lower_indirect_array_deref_of_vec_store
= (1 << 3),
3612 } nir_lower_array_deref_of_vec_options
;
3614 bool nir_lower_array_deref_of_vec(nir_shader
*shader
, nir_variable_mode modes
,
3615 nir_lower_array_deref_of_vec_options options
);
3617 bool nir_lower_indirect_derefs(nir_shader
*shader
, nir_variable_mode modes
);
3619 bool nir_lower_locals_to_regs(nir_shader
*shader
);
3621 void nir_lower_io_to_temporaries(nir_shader
*shader
,
3622 nir_function_impl
*entrypoint
,
3623 bool outputs
, bool inputs
);
3625 bool nir_lower_vars_to_scratch(nir_shader
*shader
,
3626 nir_variable_mode modes
,
3628 glsl_type_size_align_func size_align
);
3630 void nir_shader_gather_info(nir_shader
*shader
, nir_function_impl
*entrypoint
);
3632 void nir_gather_ssa_types(nir_function_impl
*impl
,
3633 BITSET_WORD
*float_types
,
3634 BITSET_WORD
*int_types
);
3636 void nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
3637 int (*type_size
)(const struct glsl_type
*, bool));
3639 /* Some helpers to do very simple linking */
3640 bool nir_remove_unused_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3641 bool nir_remove_unused_io_vars(nir_shader
*shader
, struct exec_list
*var_list
,
3642 uint64_t *used_by_other_stage
,
3643 uint64_t *used_by_other_stage_patches
);
3644 void nir_compact_varyings(nir_shader
*producer
, nir_shader
*consumer
,
3645 bool default_to_smooth_interp
);
3646 void nir_link_xfb_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3647 bool nir_link_opt_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3649 bool nir_lower_amul(nir_shader
*shader
,
3650 int (*type_size
)(const struct glsl_type
*, bool));
3652 void nir_assign_io_var_locations(struct exec_list
*var_list
,
3654 gl_shader_stage stage
);
3657 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3658 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3661 nir_lower_io_lower_64bit_to_32
= (1 << 0),
3663 /* If set, this forces all non-flat fragment shader inputs to be
3664 * interpolated as if with the "sample" qualifier. This requires
3665 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3667 nir_lower_io_force_sample_interpolation
= (1 << 1),
3668 } nir_lower_io_options
;
3669 bool nir_lower_io(nir_shader
*shader
,
3670 nir_variable_mode modes
,
3671 int (*type_size
)(const struct glsl_type
*, bool),
3672 nir_lower_io_options
);
3674 bool nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
);
3677 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
3678 nir_variable_mode modes
,
3679 glsl_type_size_align_func type_info
);
3683 * An address format which is a simple 32-bit global GPU address.
3685 nir_address_format_32bit_global
,
3688 * An address format which is a simple 64-bit global GPU address.
3690 nir_address_format_64bit_global
,
3693 * An address format which is a bounds-checked 64-bit global GPU address.
3695 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3696 * address stored with the low bits in .x and high bits in .y, .z is a
3697 * size, and .w is an offset. When the final I/O operation is lowered, .w
3698 * is checked against .z and the operation is predicated on the result.
3700 nir_address_format_64bit_bounded_global
,
3703 * An address format which is comprised of a vec2 where the first
3704 * component is a buffer index and the second is an offset.
3706 nir_address_format_32bit_index_offset
,
3709 * An address format which is a simple 32-bit offset.
3711 nir_address_format_32bit_offset
,
3714 * An address format representing a purely logical addressing model. In
3715 * this model, all deref chains must be complete from the dereference
3716 * operation to the variable. Cast derefs are not allowed. These
3717 * addresses will be 32-bit scalars but the format is immaterial because
3718 * you can always chase the chain.
3720 nir_address_format_logical
,
3721 } nir_address_format
;
3723 static inline unsigned
3724 nir_address_format_bit_size(nir_address_format addr_format
)
3726 switch (addr_format
) {
3727 case nir_address_format_32bit_global
: return 32;
3728 case nir_address_format_64bit_global
: return 64;
3729 case nir_address_format_64bit_bounded_global
: return 32;
3730 case nir_address_format_32bit_index_offset
: return 32;
3731 case nir_address_format_32bit_offset
: return 32;
3732 case nir_address_format_logical
: return 32;
3734 unreachable("Invalid address format");
3737 static inline unsigned
3738 nir_address_format_num_components(nir_address_format addr_format
)
3740 switch (addr_format
) {
3741 case nir_address_format_32bit_global
: return 1;
3742 case nir_address_format_64bit_global
: return 1;
3743 case nir_address_format_64bit_bounded_global
: return 4;
3744 case nir_address_format_32bit_index_offset
: return 2;
3745 case nir_address_format_32bit_offset
: return 1;
3746 case nir_address_format_logical
: return 1;
3748 unreachable("Invalid address format");
3751 static inline const struct glsl_type
*
3752 nir_address_format_to_glsl_type(nir_address_format addr_format
)
3754 unsigned bit_size
= nir_address_format_bit_size(addr_format
);
3755 assert(bit_size
== 32 || bit_size
== 64);
3756 return glsl_vector_type(bit_size
== 32 ? GLSL_TYPE_UINT
: GLSL_TYPE_UINT64
,
3757 nir_address_format_num_components(addr_format
));
3760 const nir_const_value
*nir_address_format_null_value(nir_address_format addr_format
);
3762 nir_ssa_def
*nir_build_addr_ieq(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
3763 nir_address_format addr_format
);
3765 nir_ssa_def
*nir_build_addr_isub(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
3766 nir_address_format addr_format
);
3768 nir_ssa_def
* nir_explicit_io_address_from_deref(struct nir_builder
*b
,
3769 nir_deref_instr
*deref
,
3770 nir_ssa_def
*base_addr
,
3771 nir_address_format addr_format
);
3772 void nir_lower_explicit_io_instr(struct nir_builder
*b
,
3773 nir_intrinsic_instr
*io_instr
,
3775 nir_address_format addr_format
);
3777 bool nir_lower_explicit_io(nir_shader
*shader
,
3778 nir_variable_mode modes
,
3779 nir_address_format
);
3781 nir_src
*nir_get_io_offset_src(nir_intrinsic_instr
*instr
);
3782 nir_src
*nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
);
3784 bool nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
);
3786 bool nir_lower_regs_to_ssa_impl(nir_function_impl
*impl
);
3787 bool nir_lower_regs_to_ssa(nir_shader
*shader
);
3788 bool nir_lower_vars_to_ssa(nir_shader
*shader
);
3790 bool nir_remove_dead_derefs(nir_shader
*shader
);
3791 bool nir_remove_dead_derefs_impl(nir_function_impl
*impl
);
3792 bool nir_remove_dead_variables(nir_shader
*shader
, nir_variable_mode modes
);
3793 bool nir_lower_constant_initializers(nir_shader
*shader
,
3794 nir_variable_mode modes
);
3796 bool nir_move_vec_src_uses_to_dest(nir_shader
*shader
);
3797 bool nir_lower_vec_to_movs(nir_shader
*shader
);
3798 void nir_lower_alpha_test(nir_shader
*shader
, enum compare_func func
,
3800 const gl_state_index16
*alpha_ref_state_tokens
);
3801 bool nir_lower_alu(nir_shader
*shader
);
3803 bool nir_lower_flrp(nir_shader
*shader
, unsigned lowering_mask
,
3804 bool always_precise
, bool have_ffma
);
3806 bool nir_lower_alu_to_scalar(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
3807 bool nir_lower_bool_to_float(nir_shader
*shader
);
3808 bool nir_lower_bool_to_int32(nir_shader
*shader
);
3809 bool nir_lower_int_to_float(nir_shader
*shader
);
3810 bool nir_lower_load_const_to_scalar(nir_shader
*shader
);
3811 bool nir_lower_read_invocation_to_scalar(nir_shader
*shader
);
3812 bool nir_lower_phis_to_scalar(nir_shader
*shader
);
3813 void nir_lower_io_arrays_to_elements(nir_shader
*producer
, nir_shader
*consumer
);
3814 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader
*shader
,
3816 void nir_lower_io_to_scalar(nir_shader
*shader
, nir_variable_mode mask
);
3817 void nir_lower_io_to_scalar_early(nir_shader
*shader
, nir_variable_mode mask
);
3818 bool nir_lower_io_to_vector(nir_shader
*shader
, nir_variable_mode mask
);
3820 void nir_lower_fragcoord_wtrans(nir_shader
*shader
);
3821 void nir_lower_viewport_transform(nir_shader
*shader
);
3822 bool nir_lower_uniforms_to_ubo(nir_shader
*shader
, int multiplier
);
3824 typedef struct nir_lower_subgroups_options
{
3825 uint8_t subgroup_size
;
3826 uint8_t ballot_bit_size
;
3827 bool lower_to_scalar
:1;
3828 bool lower_vote_trivial
:1;
3829 bool lower_vote_eq_to_ballot
:1;
3830 bool lower_subgroup_masks
:1;
3831 bool lower_shuffle
:1;
3832 bool lower_shuffle_to_32bit
:1;
3834 } nir_lower_subgroups_options
;
3836 bool nir_lower_subgroups(nir_shader
*shader
,
3837 const nir_lower_subgroups_options
*options
);
3839 bool nir_lower_system_values(nir_shader
*shader
);
3841 enum PACKED nir_lower_tex_packing
{
3842 nir_lower_tex_packing_none
= 0,
3843 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3844 * or unsigned ints based on the sampler type
3846 nir_lower_tex_packing_16
,
3847 /* The sampler returns 1 32-bit word of 4x8 unorm */
3848 nir_lower_tex_packing_8
,
3851 typedef struct nir_lower_tex_options
{
3853 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3854 * sampler types a texture projector is lowered.
3859 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3861 bool lower_txf_offset
;
3864 * If true, lower away nir_tex_src_offset for all rect textures.
3866 bool lower_rect_offset
;
3869 * If true, lower rect textures to 2D, using txs to fetch the
3870 * texture dimensions and dividing the texture coords by the
3871 * texture dims to normalize.
3876 * If true, convert yuv to rgb.
3878 unsigned lower_y_uv_external
;
3879 unsigned lower_y_u_v_external
;
3880 unsigned lower_yx_xuxv_external
;
3881 unsigned lower_xy_uxvx_external
;
3882 unsigned lower_ayuv_external
;
3883 unsigned lower_xyuv_external
;
3886 * To emulate certain texture wrap modes, this can be used
3887 * to saturate the specified tex coord to [0.0, 1.0]. The
3888 * bits are according to sampler #, ie. if, for example:
3890 * (conf->saturate_s & (1 << n))
3892 * is true, then the s coord for sampler n is saturated.
3894 * Note that clamping must happen *after* projector lowering
3895 * so any projected texture sample instruction with a clamped
3896 * coordinate gets automatically lowered, regardless of the
3897 * 'lower_txp' setting.
3899 unsigned saturate_s
;
3900 unsigned saturate_t
;
3901 unsigned saturate_r
;
3903 /* Bitmask of textures that need swizzling.
3905 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3906 * swizzles[texture_index] is applied to the result of the texturing
3909 unsigned swizzle_result
;
3911 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3912 * while 4 and 5 represent 0 and 1 respectively.
3914 uint8_t swizzles
[32][4];
3916 /* Can be used to scale sampled values in range required by the format. */
3917 float scale_factors
[32];
3920 * Bitmap of textures that need srgb to linear conversion. If
3921 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3922 * of the texture are lowered to linear.
3924 unsigned lower_srgb
;
3927 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3928 * LODs to nir_texop_txl.
3930 bool lower_tex_without_implicit_lod
;
3933 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3935 bool lower_txd_cube_map
;
3938 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3943 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3944 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3945 * with lower_txd_cube_map.
3947 bool lower_txd_shadow
;
3950 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3951 * Implies lower_txd_cube_map and lower_txd_shadow.
3956 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3957 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3959 bool lower_txb_shadow_clamp
;
3962 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3963 * with nir_texop_txl. This includes cube maps.
3965 bool lower_txd_shadow_clamp
;
3968 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3969 * with nir_texop_txl. This includes cube maps.
3971 bool lower_txd_offset_clamp
;
3974 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3975 * sampler is bindless.
3977 bool lower_txd_clamp_bindless_sampler
;
3980 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3981 * sampler index is not statically determinable to be less than 16.
3983 bool lower_txd_clamp_if_sampler_index_not_lt_16
;
3986 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3987 * 0-lod followed by a nir_ishr.
3992 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3993 * mixed-up tg4 locations.
3995 bool lower_tg4_broadcom_swizzle
;
3998 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4000 bool lower_tg4_offsets
;
4002 enum nir_lower_tex_packing lower_tex_packing
[32];
4003 } nir_lower_tex_options
;
4005 bool nir_lower_tex(nir_shader
*shader
,
4006 const nir_lower_tex_options
*options
);
4008 enum nir_lower_non_uniform_access_type
{
4009 nir_lower_non_uniform_ubo_access
= (1 << 0),
4010 nir_lower_non_uniform_ssbo_access
= (1 << 1),
4011 nir_lower_non_uniform_texture_access
= (1 << 2),
4012 nir_lower_non_uniform_image_access
= (1 << 3),
4015 bool nir_lower_non_uniform_access(nir_shader
*shader
,
4016 enum nir_lower_non_uniform_access_type
);
4018 enum nir_lower_idiv_path
{
4019 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4020 * the two but it is not exact in some cases (for example, 1091317713u /
4021 * 1034u gives 5209173 instead of 1055432) */
4022 nir_lower_idiv_fast
,
4023 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4024 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4025 * the nv50 path and many of them are integer multiplications, so it is
4026 * probably slower. It should always return the correct result, though. */
4027 nir_lower_idiv_precise
,
4030 bool nir_lower_idiv(nir_shader
*shader
, enum nir_lower_idiv_path path
);
4032 bool nir_lower_input_attachments(nir_shader
*shader
, bool use_fragcoord_sysval
);
4034 bool nir_lower_clip_vs(nir_shader
*shader
, unsigned ucp_enables
,
4036 bool use_clipdist_array
,
4037 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4038 bool nir_lower_clip_gs(nir_shader
*shader
, unsigned ucp_enables
,
4039 bool use_clipdist_array
,
4040 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4041 bool nir_lower_clip_fs(nir_shader
*shader
, unsigned ucp_enables
,
4042 bool use_clipdist_array
);
4043 bool nir_lower_clip_cull_distance_arrays(nir_shader
*nir
);
4045 void nir_lower_point_size_mov(nir_shader
*shader
,
4046 const gl_state_index16
*pointsize_state_tokens
);
4048 bool nir_lower_frexp(nir_shader
*nir
);
4050 void nir_lower_two_sided_color(nir_shader
*shader
);
4052 bool nir_lower_clamp_color_outputs(nir_shader
*shader
);
4054 bool nir_lower_flatshade(nir_shader
*shader
);
4056 void nir_lower_passthrough_edgeflags(nir_shader
*shader
);
4057 bool nir_lower_patch_vertices(nir_shader
*nir
, unsigned static_count
,
4058 const gl_state_index16
*uniform_state_tokens
);
4060 typedef struct nir_lower_wpos_ytransform_options
{
4061 gl_state_index16 state_tokens
[STATE_LENGTH
];
4062 bool fs_coord_origin_upper_left
:1;
4063 bool fs_coord_origin_lower_left
:1;
4064 bool fs_coord_pixel_center_integer
:1;
4065 bool fs_coord_pixel_center_half_integer
:1;
4066 } nir_lower_wpos_ytransform_options
;
4068 bool nir_lower_wpos_ytransform(nir_shader
*shader
,
4069 const nir_lower_wpos_ytransform_options
*options
);
4070 bool nir_lower_wpos_center(nir_shader
*shader
, const bool for_sample_shading
);
4072 bool nir_lower_fb_read(nir_shader
*shader
);
4074 typedef struct nir_lower_drawpixels_options
{
4075 gl_state_index16 texcoord_state_tokens
[STATE_LENGTH
];
4076 gl_state_index16 scale_state_tokens
[STATE_LENGTH
];
4077 gl_state_index16 bias_state_tokens
[STATE_LENGTH
];
4078 unsigned drawpix_sampler
;
4079 unsigned pixelmap_sampler
;
4081 bool scale_and_bias
:1;
4082 } nir_lower_drawpixels_options
;
4084 void nir_lower_drawpixels(nir_shader
*shader
,
4085 const nir_lower_drawpixels_options
*options
);
4087 typedef struct nir_lower_bitmap_options
{
4090 } nir_lower_bitmap_options
;
4092 void nir_lower_bitmap(nir_shader
*shader
, const nir_lower_bitmap_options
*options
);
4094 bool nir_lower_atomics_to_ssbo(nir_shader
*shader
, unsigned ssbo_offset
);
4097 nir_lower_int_source_mods
= 1 << 0,
4098 nir_lower_float_source_mods
= 1 << 1,
4099 nir_lower_triop_abs
= 1 << 2,
4100 nir_lower_all_source_mods
= (1 << 3) - 1
4101 } nir_lower_to_source_mods_flags
;
4104 bool nir_lower_to_source_mods(nir_shader
*shader
, nir_lower_to_source_mods_flags options
);
4106 bool nir_lower_gs_intrinsics(nir_shader
*shader
);
4108 typedef unsigned (*nir_lower_bit_size_callback
)(const nir_alu_instr
*, void *);
4110 bool nir_lower_bit_size(nir_shader
*shader
,
4111 nir_lower_bit_size_callback callback
,
4112 void *callback_data
);
4114 nir_lower_int64_options
nir_lower_int64_op_to_options_mask(nir_op opcode
);
4115 bool nir_lower_int64(nir_shader
*shader
, nir_lower_int64_options options
);
4117 nir_lower_doubles_options
nir_lower_doubles_op_to_options_mask(nir_op opcode
);
4118 bool nir_lower_doubles(nir_shader
*shader
, const nir_shader
*softfp64
,
4119 nir_lower_doubles_options options
);
4120 bool nir_lower_pack(nir_shader
*shader
);
4122 bool nir_lower_point_size(nir_shader
*shader
, float min
, float max
);
4125 nir_lower_interpolation_at_sample
= (1 << 1),
4126 nir_lower_interpolation_at_offset
= (1 << 2),
4127 nir_lower_interpolation_centroid
= (1 << 3),
4128 nir_lower_interpolation_pixel
= (1 << 4),
4129 nir_lower_interpolation_sample
= (1 << 5),
4130 } nir_lower_interpolation_options
;
4132 bool nir_lower_interpolation(nir_shader
*shader
,
4133 nir_lower_interpolation_options options
);
4135 bool nir_normalize_cubemap_coords(nir_shader
*shader
);
4137 void nir_live_ssa_defs_impl(nir_function_impl
*impl
);
4139 void nir_loop_analyze_impl(nir_function_impl
*impl
,
4140 nir_variable_mode indirect_mask
);
4142 bool nir_ssa_defs_interfere(nir_ssa_def
*a
, nir_ssa_def
*b
);
4144 bool nir_repair_ssa_impl(nir_function_impl
*impl
);
4145 bool nir_repair_ssa(nir_shader
*shader
);
4147 void nir_convert_loop_to_lcssa(nir_loop
*loop
);
4148 bool nir_convert_to_lcssa(nir_shader
*shader
, bool skip_invariants
, bool skip_bool_invariants
);
4149 bool* nir_divergence_analysis(nir_shader
*shader
, nir_divergence_options options
);
4151 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4152 * registers. If false, convert all values (even those not involved in a phi
4153 * node) to registers.
4155 bool nir_convert_from_ssa(nir_shader
*shader
, bool phi_webs_only
);
4157 bool nir_lower_phis_to_regs_block(nir_block
*block
);
4158 bool nir_lower_ssa_defs_to_regs_block(nir_block
*block
);
4159 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl
*impl
);
4161 bool nir_lower_samplers(nir_shader
*shader
);
4163 /* This is here for unit tests. */
4164 bool nir_opt_comparison_pre_impl(nir_function_impl
*impl
);
4166 bool nir_opt_comparison_pre(nir_shader
*shader
);
4168 bool nir_opt_access(nir_shader
*shader
);
4169 bool nir_opt_algebraic(nir_shader
*shader
);
4170 bool nir_opt_algebraic_before_ffma(nir_shader
*shader
);
4171 bool nir_opt_algebraic_late(nir_shader
*shader
);
4172 bool nir_opt_constant_folding(nir_shader
*shader
);
4174 bool nir_opt_combine_stores(nir_shader
*shader
, nir_variable_mode modes
);
4176 bool nir_copy_prop(nir_shader
*shader
);
4178 bool nir_opt_copy_prop_vars(nir_shader
*shader
);
4180 bool nir_opt_cse(nir_shader
*shader
);
4182 bool nir_opt_dce(nir_shader
*shader
);
4184 bool nir_opt_dead_cf(nir_shader
*shader
);
4186 bool nir_opt_dead_write_vars(nir_shader
*shader
);
4188 bool nir_opt_deref_impl(nir_function_impl
*impl
);
4189 bool nir_opt_deref(nir_shader
*shader
);
4191 bool nir_opt_find_array_copies(nir_shader
*shader
);
4193 bool nir_opt_gcm(nir_shader
*shader
, bool value_number
);
4195 bool nir_opt_idiv_const(nir_shader
*shader
, unsigned min_bit_size
);
4197 bool nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
);
4199 bool nir_opt_intrinsics(nir_shader
*shader
);
4201 bool nir_opt_large_constants(nir_shader
*shader
,
4202 glsl_type_size_align_func size_align
,
4203 unsigned threshold
);
4205 bool nir_opt_loop_unroll(nir_shader
*shader
, nir_variable_mode indirect_mask
);
4208 nir_move_const_undef
= (1 << 0),
4209 nir_move_load_ubo
= (1 << 1),
4210 nir_move_load_input
= (1 << 2),
4211 nir_move_comparisons
= (1 << 3),
4214 bool nir_can_move_instr(nir_instr
*instr
, nir_move_options options
);
4216 bool nir_opt_sink(nir_shader
*shader
, nir_move_options options
);
4218 bool nir_opt_move(nir_shader
*shader
, nir_move_options options
);
4220 bool nir_opt_peephole_select(nir_shader
*shader
, unsigned limit
,
4221 bool indirect_load_ok
, bool expensive_alu_ok
);
4223 bool nir_opt_rematerialize_compares(nir_shader
*shader
);
4225 bool nir_opt_remove_phis(nir_shader
*shader
);
4226 bool nir_opt_remove_phis_block(nir_block
*block
);
4228 bool nir_opt_shrink_load(nir_shader
*shader
);
4230 bool nir_opt_trivial_continues(nir_shader
*shader
);
4232 bool nir_opt_undef(nir_shader
*shader
);
4234 bool nir_opt_vectorize(nir_shader
*shader
);
4236 bool nir_opt_conditional_discard(nir_shader
*shader
);
4238 typedef bool (*nir_should_vectorize_mem_func
)(unsigned align
, unsigned bit_size
,
4239 unsigned num_components
, unsigned high_offset
,
4240 nir_intrinsic_instr
*low
, nir_intrinsic_instr
*high
);
4242 bool nir_opt_load_store_vectorize(nir_shader
*shader
, nir_variable_mode modes
,
4243 nir_should_vectorize_mem_func callback
);
4245 void nir_schedule(nir_shader
*shader
, int threshold
);
4247 void nir_strip(nir_shader
*shader
);
4249 void nir_sweep(nir_shader
*shader
);
4251 void nir_remap_dual_slot_attributes(nir_shader
*shader
,
4252 uint64_t *dual_slot_inputs
);
4253 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
);
4255 nir_intrinsic_op
nir_intrinsic_from_system_value(gl_system_value val
);
4256 gl_system_value
nir_system_value_from_intrinsic(nir_intrinsic_op intrin
);
4259 nir_variable_is_in_ubo(const nir_variable
*var
)
4261 return (var
->data
.mode
== nir_var_mem_ubo
&&
4262 var
->interface_type
!= NULL
);
4266 nir_variable_is_in_ssbo(const nir_variable
*var
)
4268 return (var
->data
.mode
== nir_var_mem_ssbo
&&
4269 var
->interface_type
!= NULL
);
4273 nir_variable_is_in_block(const nir_variable
*var
)
4275 return nir_variable_is_in_ubo(var
) || nir_variable_is_in_ssbo(var
);