6496ad92b11b7ab1052e8851c03df8097820c165
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 typedef uint8_t nir_component_mask_t;
64
65 /** Defines a cast function
66 *
67 * This macro defines a cast function from in_type to out_type where
68 * out_type is some structure type that contains a field of type out_type.
69 *
70 * Note that you have to be a bit careful as the generated cast function
71 * destroys constness.
72 */
73 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
74 type_field, type_value) \
75 static inline out_type * \
76 name(const in_type *parent) \
77 { \
78 assert(parent && parent->type_field == type_value); \
79 return exec_node_data(out_type, parent, field); \
80 }
81
82 struct nir_function;
83 struct nir_shader;
84 struct nir_instr;
85 struct nir_builder;
86
87
88 /**
89 * Description of built-in state associated with a uniform
90 *
91 * \sa nir_variable::state_slots
92 */
93 typedef struct {
94 gl_state_index16 tokens[STATE_LENGTH];
95 int swizzle;
96 } nir_state_slot;
97
98 typedef enum {
99 nir_var_shader_in = (1 << 0),
100 nir_var_shader_out = (1 << 1),
101 nir_var_shader_temp = (1 << 2),
102 nir_var_function_temp = (1 << 3),
103 nir_var_uniform = (1 << 4),
104 nir_var_mem_ubo = (1 << 5),
105 nir_var_system_value = (1 << 6),
106 nir_var_mem_ssbo = (1 << 7),
107 nir_var_mem_shared = (1 << 8),
108 nir_var_mem_global = (1 << 9),
109 nir_var_all = ~0,
110 } nir_variable_mode;
111
112 /**
113 * Rounding modes.
114 */
115 typedef enum {
116 nir_rounding_mode_undef = 0,
117 nir_rounding_mode_rtne = 1, /* round to nearest even */
118 nir_rounding_mode_ru = 2, /* round up */
119 nir_rounding_mode_rd = 3, /* round down */
120 nir_rounding_mode_rtz = 4, /* round towards zero */
121 } nir_rounding_mode;
122
123 typedef union {
124 bool b;
125 float f32;
126 double f64;
127 int8_t i8;
128 uint8_t u8;
129 int16_t i16;
130 uint16_t u16;
131 int32_t i32;
132 uint32_t u32;
133 int64_t i64;
134 uint64_t u64;
135 } nir_const_value;
136
137 #define nir_const_value_to_array(arr, c, components, m) \
138 { \
139 for (unsigned i = 0; i < components; ++i) \
140 arr[i] = c[i].m; \
141 } while (false)
142
143 static inline nir_const_value
144 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
145 {
146 nir_const_value v;
147 memset(&v, 0, sizeof(v));
148
149 switch (bit_size) {
150 case 1: v.b = x; break;
151 case 8: v.u8 = x; break;
152 case 16: v.u16 = x; break;
153 case 32: v.u32 = x; break;
154 case 64: v.u64 = x; break;
155 default:
156 unreachable("Invalid bit size");
157 }
158
159 return v;
160 }
161
162 static inline nir_const_value
163 nir_const_value_for_int(int64_t i, unsigned bit_size)
164 {
165 nir_const_value v;
166 memset(&v, 0, sizeof(v));
167
168 assert(bit_size <= 64);
169 if (bit_size < 64) {
170 assert(i >= (-(1ll << (bit_size - 1))));
171 assert(i < (1ll << (bit_size - 1)));
172 }
173
174 return nir_const_value_for_raw_uint(i, bit_size);
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64)
185 assert(u < (1ull << bit_size));
186
187 return nir_const_value_for_raw_uint(u, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_bool(bool b, unsigned bit_size)
192 {
193 /* Booleans use a 0/-1 convention */
194 return nir_const_value_for_int(-(int)b, bit_size);
195 }
196
197 /* This one isn't inline because it requires half-float conversion */
198 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
199
200 static inline int64_t
201 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
202 {
203 switch (bit_size) {
204 /* int1_t uses 0/-1 convention */
205 case 1: return -(int)value.b;
206 case 8: return value.i8;
207 case 16: return value.i16;
208 case 32: return value.i32;
209 case 64: return value.i64;
210 default:
211 unreachable("Invalid bit size");
212 }
213 }
214
215 static inline uint64_t
216 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 case 1: return value.b;
220 case 8: return value.u8;
221 case 16: return value.u16;
222 case 32: return value.u32;
223 case 64: return value.u64;
224 default:
225 unreachable("Invalid bit size");
226 }
227 }
228
229 static inline bool
230 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
231 {
232 int64_t i = nir_const_value_as_int(value, bit_size);
233
234 /* Booleans of any size use 0/-1 convention */
235 assert(i == 0 || i == -1);
236
237 return i;
238 }
239
240 /* This one isn't inline because it requires half-float conversion */
241 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
242
243 typedef struct nir_constant {
244 /**
245 * Value of the constant.
246 *
247 * The field used to back the values supplied by the constant is determined
248 * by the type associated with the \c nir_variable. Constants may be
249 * scalars, vectors, or matrices.
250 */
251 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
252
253 /* we could get this from the var->type but makes clone *much* easier to
254 * not have to care about the type.
255 */
256 unsigned num_elements;
257
258 /* Array elements / Structure Fields */
259 struct nir_constant **elements;
260 } nir_constant;
261
262 /**
263 * \brief Layout qualifiers for gl_FragDepth.
264 *
265 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
266 * with a layout qualifier.
267 */
268 typedef enum {
269 nir_depth_layout_none, /**< No depth layout is specified. */
270 nir_depth_layout_any,
271 nir_depth_layout_greater,
272 nir_depth_layout_less,
273 nir_depth_layout_unchanged
274 } nir_depth_layout;
275
276 /**
277 * Enum keeping track of how a variable was declared.
278 */
279 typedef enum {
280 /**
281 * Normal declaration.
282 */
283 nir_var_declared_normally = 0,
284
285 /**
286 * Variable is implicitly generated by the compiler and should not be
287 * visible via the API.
288 */
289 nir_var_hidden,
290 } nir_var_declaration_type;
291
292 /**
293 * Either a uniform, global variable, shader input, or shader output. Based on
294 * ir_variable - it should be easy to translate between the two.
295 */
296
297 typedef struct nir_variable {
298 struct exec_node node;
299
300 /**
301 * Declared type of the variable
302 */
303 const struct glsl_type *type;
304
305 /**
306 * Declared name of the variable
307 */
308 char *name;
309
310 struct nir_variable_data {
311 /**
312 * Storage class of the variable.
313 *
314 * \sa nir_variable_mode
315 */
316 nir_variable_mode mode;
317
318 /**
319 * Is the variable read-only?
320 *
321 * This is set for variables declared as \c const, shader inputs,
322 * and uniforms.
323 */
324 unsigned read_only:1;
325 unsigned centroid:1;
326 unsigned sample:1;
327 unsigned patch:1;
328 unsigned invariant:1;
329
330 /**
331 * Can this variable be coalesced with another?
332 *
333 * This is set by nir_lower_io_to_temporaries to say that any
334 * copies involving this variable should stay put. Propagating it can
335 * duplicate the resulting load/store, which is not wanted, and may
336 * result in a load/store of the variable with an indirect offset which
337 * the backend may not be able to handle.
338 */
339 unsigned cannot_coalesce:1;
340
341 /**
342 * When separate shader programs are enabled, only input/outputs between
343 * the stages of a multi-stage separate program can be safely removed
344 * from the shader interface. Other input/outputs must remains active.
345 *
346 * This is also used to make sure xfb varyings that are unused by the
347 * fragment shader are not removed.
348 */
349 unsigned always_active_io:1;
350
351 /**
352 * Interpolation mode for shader inputs / outputs
353 *
354 * \sa glsl_interp_mode
355 */
356 unsigned interpolation:2;
357
358 /**
359 * If non-zero, then this variable may be packed along with other variables
360 * into a single varying slot, so this offset should be applied when
361 * accessing components. For example, an offset of 1 means that the x
362 * component of this variable is actually stored in component y of the
363 * location specified by \c location.
364 */
365 unsigned location_frac:2;
366
367 /**
368 * If true, this variable represents an array of scalars that should
369 * be tightly packed. In other words, consecutive array elements
370 * should be stored one component apart, rather than one slot apart.
371 */
372 unsigned compact:1;
373
374 /**
375 * Whether this is a fragment shader output implicitly initialized with
376 * the previous contents of the specified render target at the
377 * framebuffer location corresponding to this shader invocation.
378 */
379 unsigned fb_fetch_output:1;
380
381 /**
382 * Non-zero if this variable is considered bindless as defined by
383 * ARB_bindless_texture.
384 */
385 unsigned bindless:1;
386
387 /**
388 * Was an explicit binding set in the shader?
389 */
390 unsigned explicit_binding:1;
391
392 /**
393 * Was a transfer feedback buffer set in the shader?
394 */
395 unsigned explicit_xfb_buffer:1;
396
397 /**
398 * Was a transfer feedback stride set in the shader?
399 */
400 unsigned explicit_xfb_stride:1;
401
402 /**
403 * Was an explicit offset set in the shader?
404 */
405 unsigned explicit_offset:1;
406
407 /**
408 * How the variable was declared. See nir_var_declaration_type.
409 *
410 * This is used to detect variables generated by the compiler, so should
411 * not be visible via the API.
412 */
413 unsigned how_declared:2;
414
415 /**
416 * \brief Layout qualifier for gl_FragDepth.
417 *
418 * This is not equal to \c ir_depth_layout_none if and only if this
419 * variable is \c gl_FragDepth and a layout qualifier is specified.
420 */
421 nir_depth_layout depth_layout;
422
423 /**
424 * Storage location of the base of this variable
425 *
426 * The precise meaning of this field depends on the nature of the variable.
427 *
428 * - Vertex shader input: one of the values from \c gl_vert_attrib.
429 * - Vertex shader output: one of the values from \c gl_varying_slot.
430 * - Geometry shader input: one of the values from \c gl_varying_slot.
431 * - Geometry shader output: one of the values from \c gl_varying_slot.
432 * - Fragment shader input: one of the values from \c gl_varying_slot.
433 * - Fragment shader output: one of the values from \c gl_frag_result.
434 * - Uniforms: Per-stage uniform slot number for default uniform block.
435 * - Uniforms: Index within the uniform block definition for UBO members.
436 * - Non-UBO Uniforms: uniform slot number.
437 * - Other: This field is not currently used.
438 *
439 * If the variable is a uniform, shader input, or shader output, and the
440 * slot has not been assigned, the value will be -1.
441 */
442 int location;
443
444 /**
445 * The actual location of the variable in the IR. Only valid for inputs
446 * and outputs.
447 */
448 unsigned int driver_location;
449
450 /**
451 * Vertex stream output identifier.
452 *
453 * For packed outputs, bit 31 is set and bits [2*i+1,2*i] indicate the
454 * stream of the i-th component.
455 */
456 unsigned stream;
457
458 /**
459 * output index for dual source blending.
460 */
461 int index;
462
463 /**
464 * Descriptor set binding for sampler or UBO.
465 */
466 int descriptor_set;
467
468 /**
469 * Initial binding point for a sampler or UBO.
470 *
471 * For array types, this represents the binding point for the first element.
472 */
473 int binding;
474
475 /**
476 * Location an atomic counter or transform feedback is stored at.
477 */
478 unsigned offset;
479
480 /**
481 * Transform feedback buffer.
482 */
483 unsigned xfb_buffer;
484
485 /**
486 * Transform feedback stride.
487 */
488 unsigned xfb_stride;
489
490 /**
491 * ARB_shader_image_load_store qualifiers.
492 */
493 struct {
494 enum gl_access_qualifier access;
495
496 /** Image internal format if specified explicitly, otherwise GL_NONE. */
497 GLenum format;
498 } image;
499 } data;
500
501 /* Number of nir_variable_data members */
502 unsigned num_members;
503
504 /**
505 * Built-in state that backs this uniform
506 *
507 * Once set at variable creation, \c state_slots must remain invariant.
508 * This is because, ideally, this array would be shared by all clones of
509 * this variable in the IR tree. In other words, we'd really like for it
510 * to be a fly-weight.
511 *
512 * If the variable is not a uniform, \c num_state_slots will be zero and
513 * \c state_slots will be \c NULL.
514 */
515 /*@{*/
516 unsigned num_state_slots; /**< Number of state slots used */
517 nir_state_slot *state_slots; /**< State descriptors. */
518 /*@}*/
519
520 /**
521 * Constant expression assigned in the initializer of the variable
522 *
523 * This field should only be used temporarily by creators of NIR shaders
524 * and then lower_constant_initializers can be used to get rid of them.
525 * Most of the rest of NIR ignores this field or asserts that it's NULL.
526 */
527 nir_constant *constant_initializer;
528
529 /**
530 * For variables that are in an interface block or are an instance of an
531 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
532 *
533 * \sa ir_variable::location
534 */
535 const struct glsl_type *interface_type;
536
537 /**
538 * Description of per-member data for per-member struct variables
539 *
540 * This is used for variables which are actually an amalgamation of
541 * multiple entities such as a struct of built-in values or a struct of
542 * inputs each with their own layout specifier. This is only allowed on
543 * variables with a struct or array of array of struct type.
544 */
545 struct nir_variable_data *members;
546 } nir_variable;
547
548 #define nir_foreach_variable(var, var_list) \
549 foreach_list_typed(nir_variable, var, node, var_list)
550
551 #define nir_foreach_variable_safe(var, var_list) \
552 foreach_list_typed_safe(nir_variable, var, node, var_list)
553
554 static inline bool
555 nir_variable_is_global(const nir_variable *var)
556 {
557 return var->data.mode != nir_var_function_temp;
558 }
559
560 typedef struct nir_register {
561 struct exec_node node;
562
563 unsigned num_components; /** < number of vector components */
564 unsigned num_array_elems; /** < size of array (0 for no array) */
565
566 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
567 uint8_t bit_size;
568
569 /** generic register index. */
570 unsigned index;
571
572 /** only for debug purposes, can be NULL */
573 const char *name;
574
575 /** set of nir_srcs where this register is used (read from) */
576 struct list_head uses;
577
578 /** set of nir_dests where this register is defined (written to) */
579 struct list_head defs;
580
581 /** set of nir_ifs where this register is used as a condition */
582 struct list_head if_uses;
583 } nir_register;
584
585 #define nir_foreach_register(reg, reg_list) \
586 foreach_list_typed(nir_register, reg, node, reg_list)
587 #define nir_foreach_register_safe(reg, reg_list) \
588 foreach_list_typed_safe(nir_register, reg, node, reg_list)
589
590 typedef enum PACKED {
591 nir_instr_type_alu,
592 nir_instr_type_deref,
593 nir_instr_type_call,
594 nir_instr_type_tex,
595 nir_instr_type_intrinsic,
596 nir_instr_type_load_const,
597 nir_instr_type_jump,
598 nir_instr_type_ssa_undef,
599 nir_instr_type_phi,
600 nir_instr_type_parallel_copy,
601 } nir_instr_type;
602
603 typedef struct nir_instr {
604 struct exec_node node;
605 struct nir_block *block;
606 nir_instr_type type;
607
608 /* A temporary for optimization and analysis passes to use for storing
609 * flags. For instance, DCE uses this to store the "dead/live" info.
610 */
611 uint8_t pass_flags;
612
613 /** generic instruction index. */
614 unsigned index;
615 } nir_instr;
616
617 static inline nir_instr *
618 nir_instr_next(nir_instr *instr)
619 {
620 struct exec_node *next = exec_node_get_next(&instr->node);
621 if (exec_node_is_tail_sentinel(next))
622 return NULL;
623 else
624 return exec_node_data(nir_instr, next, node);
625 }
626
627 static inline nir_instr *
628 nir_instr_prev(nir_instr *instr)
629 {
630 struct exec_node *prev = exec_node_get_prev(&instr->node);
631 if (exec_node_is_head_sentinel(prev))
632 return NULL;
633 else
634 return exec_node_data(nir_instr, prev, node);
635 }
636
637 static inline bool
638 nir_instr_is_first(const nir_instr *instr)
639 {
640 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
641 }
642
643 static inline bool
644 nir_instr_is_last(const nir_instr *instr)
645 {
646 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
647 }
648
649 typedef struct nir_ssa_def {
650 /** for debugging only, can be NULL */
651 const char* name;
652
653 /** generic SSA definition index. */
654 unsigned index;
655
656 /** Index into the live_in and live_out bitfields */
657 unsigned live_index;
658
659 /** Instruction which produces this SSA value. */
660 nir_instr *parent_instr;
661
662 /** set of nir_instrs where this register is used (read from) */
663 struct list_head uses;
664
665 /** set of nir_ifs where this register is used as a condition */
666 struct list_head if_uses;
667
668 uint8_t num_components;
669
670 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
671 uint8_t bit_size;
672 } nir_ssa_def;
673
674 struct nir_src;
675
676 typedef struct {
677 nir_register *reg;
678 struct nir_src *indirect; /** < NULL for no indirect offset */
679 unsigned base_offset;
680
681 /* TODO use-def chain goes here */
682 } nir_reg_src;
683
684 typedef struct {
685 nir_instr *parent_instr;
686 struct list_head def_link;
687
688 nir_register *reg;
689 struct nir_src *indirect; /** < NULL for no indirect offset */
690 unsigned base_offset;
691
692 /* TODO def-use chain goes here */
693 } nir_reg_dest;
694
695 struct nir_if;
696
697 typedef struct nir_src {
698 union {
699 /** Instruction that consumes this value as a source. */
700 nir_instr *parent_instr;
701 struct nir_if *parent_if;
702 };
703
704 struct list_head use_link;
705
706 union {
707 nir_reg_src reg;
708 nir_ssa_def *ssa;
709 };
710
711 bool is_ssa;
712 } nir_src;
713
714 static inline nir_src
715 nir_src_init(void)
716 {
717 nir_src src = { { NULL } };
718 return src;
719 }
720
721 #define NIR_SRC_INIT nir_src_init()
722
723 #define nir_foreach_use(src, reg_or_ssa_def) \
724 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
725
726 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
727 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
728
729 #define nir_foreach_if_use(src, reg_or_ssa_def) \
730 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
731
732 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
733 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
734
735 typedef struct {
736 union {
737 nir_reg_dest reg;
738 nir_ssa_def ssa;
739 };
740
741 bool is_ssa;
742 } nir_dest;
743
744 static inline nir_dest
745 nir_dest_init(void)
746 {
747 nir_dest dest = { { { NULL } } };
748 return dest;
749 }
750
751 #define NIR_DEST_INIT nir_dest_init()
752
753 #define nir_foreach_def(dest, reg) \
754 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
755
756 #define nir_foreach_def_safe(dest, reg) \
757 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
758
759 static inline nir_src
760 nir_src_for_ssa(nir_ssa_def *def)
761 {
762 nir_src src = NIR_SRC_INIT;
763
764 src.is_ssa = true;
765 src.ssa = def;
766
767 return src;
768 }
769
770 static inline nir_src
771 nir_src_for_reg(nir_register *reg)
772 {
773 nir_src src = NIR_SRC_INIT;
774
775 src.is_ssa = false;
776 src.reg.reg = reg;
777 src.reg.indirect = NULL;
778 src.reg.base_offset = 0;
779
780 return src;
781 }
782
783 static inline nir_dest
784 nir_dest_for_reg(nir_register *reg)
785 {
786 nir_dest dest = NIR_DEST_INIT;
787
788 dest.reg.reg = reg;
789
790 return dest;
791 }
792
793 static inline unsigned
794 nir_src_bit_size(nir_src src)
795 {
796 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
797 }
798
799 static inline unsigned
800 nir_src_num_components(nir_src src)
801 {
802 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
803 }
804
805 static inline bool
806 nir_src_is_const(nir_src src)
807 {
808 return src.is_ssa &&
809 src.ssa->parent_instr->type == nir_instr_type_load_const;
810 }
811
812 static inline unsigned
813 nir_dest_bit_size(nir_dest dest)
814 {
815 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
816 }
817
818 static inline unsigned
819 nir_dest_num_components(nir_dest dest)
820 {
821 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
822 }
823
824 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
825 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
826
827 typedef struct {
828 nir_src src;
829
830 /**
831 * \name input modifiers
832 */
833 /*@{*/
834 /**
835 * For inputs interpreted as floating point, flips the sign bit. For
836 * inputs interpreted as integers, performs the two's complement negation.
837 */
838 bool negate;
839
840 /**
841 * Clears the sign bit for floating point values, and computes the integer
842 * absolute value for integers. Note that the negate modifier acts after
843 * the absolute value modifier, therefore if both are set then all inputs
844 * will become negative.
845 */
846 bool abs;
847 /*@}*/
848
849 /**
850 * For each input component, says which component of the register it is
851 * chosen from. Note that which elements of the swizzle are used and which
852 * are ignored are based on the write mask for most opcodes - for example,
853 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
854 * a swizzle of {2, x, 1, 0} where x means "don't care."
855 */
856 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
857 } nir_alu_src;
858
859 typedef struct {
860 nir_dest dest;
861
862 /**
863 * \name saturate output modifier
864 *
865 * Only valid for opcodes that output floating-point numbers. Clamps the
866 * output to between 0.0 and 1.0 inclusive.
867 */
868
869 bool saturate;
870
871 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
872 } nir_alu_dest;
873
874 /** NIR sized and unsized types
875 *
876 * The values in this enum are carefully chosen so that the sized type is
877 * just the unsized type OR the number of bits.
878 */
879 typedef enum {
880 nir_type_invalid = 0, /* Not a valid type */
881 nir_type_int = 2,
882 nir_type_uint = 4,
883 nir_type_bool = 6,
884 nir_type_float = 128,
885 nir_type_bool1 = 1 | nir_type_bool,
886 nir_type_bool32 = 32 | nir_type_bool,
887 nir_type_int1 = 1 | nir_type_int,
888 nir_type_int8 = 8 | nir_type_int,
889 nir_type_int16 = 16 | nir_type_int,
890 nir_type_int32 = 32 | nir_type_int,
891 nir_type_int64 = 64 | nir_type_int,
892 nir_type_uint1 = 1 | nir_type_uint,
893 nir_type_uint8 = 8 | nir_type_uint,
894 nir_type_uint16 = 16 | nir_type_uint,
895 nir_type_uint32 = 32 | nir_type_uint,
896 nir_type_uint64 = 64 | nir_type_uint,
897 nir_type_float16 = 16 | nir_type_float,
898 nir_type_float32 = 32 | nir_type_float,
899 nir_type_float64 = 64 | nir_type_float,
900 } nir_alu_type;
901
902 #define NIR_ALU_TYPE_SIZE_MASK 0x79
903 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
904
905 static inline unsigned
906 nir_alu_type_get_type_size(nir_alu_type type)
907 {
908 return type & NIR_ALU_TYPE_SIZE_MASK;
909 }
910
911 static inline unsigned
912 nir_alu_type_get_base_type(nir_alu_type type)
913 {
914 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
915 }
916
917 static inline nir_alu_type
918 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
919 {
920 switch (base_type) {
921 case GLSL_TYPE_BOOL:
922 return nir_type_bool1;
923 break;
924 case GLSL_TYPE_UINT:
925 return nir_type_uint32;
926 break;
927 case GLSL_TYPE_INT:
928 return nir_type_int32;
929 break;
930 case GLSL_TYPE_UINT16:
931 return nir_type_uint16;
932 break;
933 case GLSL_TYPE_INT16:
934 return nir_type_int16;
935 break;
936 case GLSL_TYPE_UINT8:
937 return nir_type_uint8;
938 case GLSL_TYPE_INT8:
939 return nir_type_int8;
940 case GLSL_TYPE_UINT64:
941 return nir_type_uint64;
942 break;
943 case GLSL_TYPE_INT64:
944 return nir_type_int64;
945 break;
946 case GLSL_TYPE_FLOAT:
947 return nir_type_float32;
948 break;
949 case GLSL_TYPE_FLOAT16:
950 return nir_type_float16;
951 break;
952 case GLSL_TYPE_DOUBLE:
953 return nir_type_float64;
954 break;
955
956 case GLSL_TYPE_SAMPLER:
957 case GLSL_TYPE_IMAGE:
958 case GLSL_TYPE_ATOMIC_UINT:
959 case GLSL_TYPE_STRUCT:
960 case GLSL_TYPE_INTERFACE:
961 case GLSL_TYPE_ARRAY:
962 case GLSL_TYPE_VOID:
963 case GLSL_TYPE_SUBROUTINE:
964 case GLSL_TYPE_FUNCTION:
965 case GLSL_TYPE_ERROR:
966 return nir_type_invalid;
967 }
968
969 unreachable("unknown type");
970 }
971
972 static inline nir_alu_type
973 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
974 {
975 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
976 }
977
978 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
979 nir_rounding_mode rnd);
980
981 static inline nir_op
982 nir_op_vec(unsigned components)
983 {
984 switch (components) {
985 case 1: return nir_op_mov;
986 case 2: return nir_op_vec2;
987 case 3: return nir_op_vec3;
988 case 4: return nir_op_vec4;
989 default: unreachable("bad component count");
990 }
991 }
992
993 static inline bool
994 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
995 {
996 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
997 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
998 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
999 }
1000
1001 static inline bool
1002 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1003 {
1004 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1005 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1006 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1007 }
1008
1009 static inline bool
1010 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1011 {
1012 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1013 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1014 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1015 }
1016
1017 static inline bool
1018 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1019 {
1020 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1021 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1022 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1023 }
1024
1025 static inline bool
1026 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1027 {
1028 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1029 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1030 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1031 }
1032
1033 static inline bool
1034 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1035 {
1036 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1037 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1038 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1039 }
1040
1041 static inline bool
1042 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1043 {
1044 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1045 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1046 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1047 }
1048
1049 static inline nir_rounding_mode
1050 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1051 nir_alu_type type)
1052 {
1053 if (nir_alu_type_get_base_type(type) != nir_type_float)
1054 return nir_rounding_mode_undef;
1055
1056 unsigned bit_size = nir_alu_type_get_type_size(type);
1057
1058 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1059 return nir_rounding_mode_rtz;
1060 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1061 return nir_rounding_mode_rtne;
1062 return nir_rounding_mode_undef;
1063 }
1064
1065 static inline bool
1066 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1067 {
1068 bool result =
1069 nir_has_any_rounding_mode_rtne(execution_mode) ||
1070 nir_has_any_rounding_mode_rtz(execution_mode);
1071 return result;
1072 }
1073
1074 typedef enum {
1075 /**
1076 * Operation where the first two sources are commutative.
1077 *
1078 * For 2-source operations, this just mathematical commutativity. Some
1079 * 3-source operations, like ffma, are only commutative in the first two
1080 * sources.
1081 */
1082 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1083 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1084 } nir_op_algebraic_property;
1085
1086 typedef struct {
1087 const char *name;
1088
1089 unsigned num_inputs;
1090
1091 /**
1092 * The number of components in the output
1093 *
1094 * If non-zero, this is the size of the output and input sizes are
1095 * explicitly given; swizzle and writemask are still in effect, but if
1096 * the output component is masked out, then the input component may
1097 * still be in use.
1098 *
1099 * If zero, the opcode acts in the standard, per-component manner; the
1100 * operation is performed on each component (except the ones that are
1101 * masked out) with the input being taken from the input swizzle for
1102 * that component.
1103 *
1104 * The size of some of the inputs may be given (i.e. non-zero) even
1105 * though output_size is zero; in that case, the inputs with a zero
1106 * size act per-component, while the inputs with non-zero size don't.
1107 */
1108 unsigned output_size;
1109
1110 /**
1111 * The type of vector that the instruction outputs. Note that the
1112 * staurate modifier is only allowed on outputs with the float type.
1113 */
1114
1115 nir_alu_type output_type;
1116
1117 /**
1118 * The number of components in each input
1119 */
1120 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1121
1122 /**
1123 * The type of vector that each input takes. Note that negate and
1124 * absolute value are only allowed on inputs with int or float type and
1125 * behave differently on the two.
1126 */
1127 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1128
1129 nir_op_algebraic_property algebraic_properties;
1130
1131 /* Whether this represents a numeric conversion opcode */
1132 bool is_conversion;
1133 } nir_op_info;
1134
1135 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1136
1137 typedef struct nir_alu_instr {
1138 nir_instr instr;
1139 nir_op op;
1140
1141 /** Indicates that this ALU instruction generates an exact value
1142 *
1143 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1144 * really equivalent to either. This indicates that the value generated by
1145 * this operation is high-precision and any code transformations that touch
1146 * it must ensure that the resulting value is bit-for-bit identical to the
1147 * original.
1148 */
1149 bool exact:1;
1150
1151 /**
1152 * Indicates that this instruction do not cause wrapping to occur, in the
1153 * form of overflow or underflow.
1154 */
1155 bool no_signed_wrap:1;
1156 bool no_unsigned_wrap:1;
1157
1158 nir_alu_dest dest;
1159 nir_alu_src src[];
1160 } nir_alu_instr;
1161
1162 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1163 nir_alu_instr *instr);
1164 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1165 nir_alu_instr *instr);
1166
1167 /* is this source channel used? */
1168 static inline bool
1169 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1170 unsigned channel)
1171 {
1172 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1173 return channel < nir_op_infos[instr->op].input_sizes[src];
1174
1175 return (instr->dest.write_mask >> channel) & 1;
1176 }
1177
1178 static inline nir_component_mask_t
1179 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1180 {
1181 nir_component_mask_t read_mask = 0;
1182 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1183 if (!nir_alu_instr_channel_used(instr, src, c))
1184 continue;
1185
1186 read_mask |= (1 << instr->src[src].swizzle[c]);
1187 }
1188 return read_mask;
1189 }
1190
1191 /**
1192 * Get the number of channels used for a source
1193 */
1194 static inline unsigned
1195 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1196 {
1197 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1198 return nir_op_infos[instr->op].input_sizes[src];
1199
1200 return nir_dest_num_components(instr->dest.dest);
1201 }
1202
1203 static inline bool
1204 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1205 {
1206 switch (instr->op) {
1207 case nir_op_flt:
1208 case nir_op_fge:
1209 case nir_op_feq:
1210 case nir_op_fne:
1211 case nir_op_ilt:
1212 case nir_op_ult:
1213 case nir_op_ige:
1214 case nir_op_uge:
1215 case nir_op_ieq:
1216 case nir_op_ine:
1217 case nir_op_i2b1:
1218 case nir_op_f2b1:
1219 case nir_op_inot:
1220 return true;
1221 default:
1222 return false;
1223 }
1224 }
1225
1226 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1227 nir_alu_type full_type);
1228
1229 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1230 unsigned src1, unsigned src2);
1231
1232 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1233 const nir_alu_instr *alu2,
1234 unsigned src1, unsigned src2);
1235
1236 typedef enum {
1237 nir_deref_type_var,
1238 nir_deref_type_array,
1239 nir_deref_type_array_wildcard,
1240 nir_deref_type_ptr_as_array,
1241 nir_deref_type_struct,
1242 nir_deref_type_cast,
1243 } nir_deref_type;
1244
1245 typedef struct {
1246 nir_instr instr;
1247
1248 /** The type of this deref instruction */
1249 nir_deref_type deref_type;
1250
1251 /** The mode of the underlying variable */
1252 nir_variable_mode mode;
1253
1254 /** The dereferenced type of the resulting pointer value */
1255 const struct glsl_type *type;
1256
1257 union {
1258 /** Variable being dereferenced if deref_type is a deref_var */
1259 nir_variable *var;
1260
1261 /** Parent deref if deref_type is not deref_var */
1262 nir_src parent;
1263 };
1264
1265 /** Additional deref parameters */
1266 union {
1267 struct {
1268 nir_src index;
1269 } arr;
1270
1271 struct {
1272 unsigned index;
1273 } strct;
1274
1275 struct {
1276 unsigned ptr_stride;
1277 } cast;
1278 };
1279
1280 /** Destination to store the resulting "pointer" */
1281 nir_dest dest;
1282 } nir_deref_instr;
1283
1284 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1285
1286 static inline nir_deref_instr *
1287 nir_deref_instr_parent(const nir_deref_instr *instr)
1288 {
1289 if (instr->deref_type == nir_deref_type_var)
1290 return NULL;
1291 else
1292 return nir_src_as_deref(instr->parent);
1293 }
1294
1295 static inline nir_variable *
1296 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1297 {
1298 while (instr->deref_type != nir_deref_type_var) {
1299 if (instr->deref_type == nir_deref_type_cast)
1300 return NULL;
1301
1302 instr = nir_deref_instr_parent(instr);
1303 }
1304
1305 return instr->var;
1306 }
1307
1308 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1309 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1310 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1311
1312 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1313
1314 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1315
1316 typedef struct {
1317 nir_instr instr;
1318
1319 struct nir_function *callee;
1320
1321 unsigned num_params;
1322 nir_src params[];
1323 } nir_call_instr;
1324
1325 #include "nir_intrinsics.h"
1326
1327 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1328
1329 /** Represents an intrinsic
1330 *
1331 * An intrinsic is an instruction type for handling things that are
1332 * more-or-less regular operations but don't just consume and produce SSA
1333 * values like ALU operations do. Intrinsics are not for things that have
1334 * special semantic meaning such as phi nodes and parallel copies.
1335 * Examples of intrinsics include variable load/store operations, system
1336 * value loads, and the like. Even though texturing more-or-less falls
1337 * under this category, texturing is its own instruction type because
1338 * trying to represent texturing with intrinsics would lead to a
1339 * combinatorial explosion of intrinsic opcodes.
1340 *
1341 * By having a single instruction type for handling a lot of different
1342 * cases, optimization passes can look for intrinsics and, for the most
1343 * part, completely ignore them. Each intrinsic type also has a few
1344 * possible flags that govern whether or not they can be reordered or
1345 * eliminated. That way passes like dead code elimination can still work
1346 * on intrisics without understanding the meaning of each.
1347 *
1348 * Each intrinsic has some number of constant indices, some number of
1349 * variables, and some number of sources. What these sources, variables,
1350 * and indices mean depends on the intrinsic and is documented with the
1351 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1352 * instructions are the only types of instruction that can operate on
1353 * variables.
1354 */
1355 typedef struct {
1356 nir_instr instr;
1357
1358 nir_intrinsic_op intrinsic;
1359
1360 nir_dest dest;
1361
1362 /** number of components if this is a vectorized intrinsic
1363 *
1364 * Similarly to ALU operations, some intrinsics are vectorized.
1365 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1366 * For vectorized intrinsics, the num_components field specifies the
1367 * number of destination components and the number of source components
1368 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1369 */
1370 uint8_t num_components;
1371
1372 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1373
1374 nir_src src[];
1375 } nir_intrinsic_instr;
1376
1377 static inline nir_variable *
1378 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1379 {
1380 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1381 }
1382
1383 /**
1384 * \name NIR intrinsics semantic flags
1385 *
1386 * information about what the compiler can do with the intrinsics.
1387 *
1388 * \sa nir_intrinsic_info::flags
1389 */
1390 typedef enum {
1391 /**
1392 * whether the intrinsic can be safely eliminated if none of its output
1393 * value is not being used.
1394 */
1395 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1396
1397 /**
1398 * Whether the intrinsic can be reordered with respect to any other
1399 * intrinsic, i.e. whether the only reordering dependencies of the
1400 * intrinsic are due to the register reads/writes.
1401 */
1402 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1403 } nir_intrinsic_semantic_flag;
1404
1405 /**
1406 * \name NIR intrinsics const-index flag
1407 *
1408 * Indicates the usage of a const_index slot.
1409 *
1410 * \sa nir_intrinsic_info::index_map
1411 */
1412 typedef enum {
1413 /**
1414 * Generally instructions that take a offset src argument, can encode
1415 * a constant 'base' value which is added to the offset.
1416 */
1417 NIR_INTRINSIC_BASE = 1,
1418
1419 /**
1420 * For store instructions, a writemask for the store.
1421 */
1422 NIR_INTRINSIC_WRMASK,
1423
1424 /**
1425 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1426 */
1427 NIR_INTRINSIC_STREAM_ID,
1428
1429 /**
1430 * The clip-plane id for load_user_clip_plane intrinsic.
1431 */
1432 NIR_INTRINSIC_UCP_ID,
1433
1434 /**
1435 * The amount of data, starting from BASE, that this instruction may
1436 * access. This is used to provide bounds if the offset is not constant.
1437 */
1438 NIR_INTRINSIC_RANGE,
1439
1440 /**
1441 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1442 */
1443 NIR_INTRINSIC_DESC_SET,
1444
1445 /**
1446 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1447 */
1448 NIR_INTRINSIC_BINDING,
1449
1450 /**
1451 * Component offset.
1452 */
1453 NIR_INTRINSIC_COMPONENT,
1454
1455 /**
1456 * Interpolation mode (only meaningful for FS inputs).
1457 */
1458 NIR_INTRINSIC_INTERP_MODE,
1459
1460 /**
1461 * A binary nir_op to use when performing a reduction or scan operation
1462 */
1463 NIR_INTRINSIC_REDUCTION_OP,
1464
1465 /**
1466 * Cluster size for reduction operations
1467 */
1468 NIR_INTRINSIC_CLUSTER_SIZE,
1469
1470 /**
1471 * Parameter index for a load_param intrinsic
1472 */
1473 NIR_INTRINSIC_PARAM_IDX,
1474
1475 /**
1476 * Image dimensionality for image intrinsics
1477 *
1478 * One of GLSL_SAMPLER_DIM_*
1479 */
1480 NIR_INTRINSIC_IMAGE_DIM,
1481
1482 /**
1483 * Non-zero if we are accessing an array image
1484 */
1485 NIR_INTRINSIC_IMAGE_ARRAY,
1486
1487 /**
1488 * Image format for image intrinsics
1489 */
1490 NIR_INTRINSIC_FORMAT,
1491
1492 /**
1493 * Access qualifiers for image and memory access intrinsics
1494 */
1495 NIR_INTRINSIC_ACCESS,
1496
1497 /**
1498 * Alignment for offsets and addresses
1499 *
1500 * These two parameters, specify an alignment in terms of a multiplier and
1501 * an offset. The offset or address parameter X of the intrinsic is
1502 * guaranteed to satisfy the following:
1503 *
1504 * (X - align_offset) % align_mul == 0
1505 */
1506 NIR_INTRINSIC_ALIGN_MUL,
1507 NIR_INTRINSIC_ALIGN_OFFSET,
1508
1509 /**
1510 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1511 */
1512 NIR_INTRINSIC_DESC_TYPE,
1513
1514 /**
1515 * The nir_alu_type of a uniform/input/output
1516 */
1517 NIR_INTRINSIC_TYPE,
1518
1519 /**
1520 * The swizzle mask for the instructions
1521 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1522 */
1523 NIR_INTRINSIC_SWIZZLE_MASK,
1524
1525 /* Separate source/dest access flags for copies */
1526 NIR_INTRINSIC_SRC_ACCESS,
1527 NIR_INTRINSIC_DST_ACCESS,
1528
1529 /* Driver location for nir_load_patch_location_ir3 */
1530 NIR_INTRINSIC_DRIVER_LOCATION,
1531
1532 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1533
1534 } nir_intrinsic_index_flag;
1535
1536 #define NIR_INTRINSIC_MAX_INPUTS 5
1537
1538 typedef struct {
1539 const char *name;
1540
1541 unsigned num_srcs; /** < number of register/SSA inputs */
1542
1543 /** number of components of each input register
1544 *
1545 * If this value is 0, the number of components is given by the
1546 * num_components field of nir_intrinsic_instr. If this value is -1, the
1547 * intrinsic consumes however many components are provided and it is not
1548 * validated at all.
1549 */
1550 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1551
1552 bool has_dest;
1553
1554 /** number of components of the output register
1555 *
1556 * If this value is 0, the number of components is given by the
1557 * num_components field of nir_intrinsic_instr.
1558 */
1559 unsigned dest_components;
1560
1561 /** bitfield of legal bit sizes */
1562 unsigned dest_bit_sizes;
1563
1564 /** the number of constant indices used by the intrinsic */
1565 unsigned num_indices;
1566
1567 /** indicates the usage of intr->const_index[n] */
1568 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1569
1570 /** semantic flags for calls to this intrinsic */
1571 nir_intrinsic_semantic_flag flags;
1572 } nir_intrinsic_info;
1573
1574 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1575
1576 static inline unsigned
1577 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1578 {
1579 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1580 assert(srcn < info->num_srcs);
1581 if (info->src_components[srcn] > 0)
1582 return info->src_components[srcn];
1583 else if (info->src_components[srcn] == 0)
1584 return intr->num_components;
1585 else
1586 return nir_src_num_components(intr->src[srcn]);
1587 }
1588
1589 static inline unsigned
1590 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1591 {
1592 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1593 if (!info->has_dest)
1594 return 0;
1595 else if (info->dest_components)
1596 return info->dest_components;
1597 else
1598 return intr->num_components;
1599 }
1600
1601 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1602 static inline type \
1603 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1604 { \
1605 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1606 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1607 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1608 } \
1609 static inline void \
1610 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1611 { \
1612 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1613 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1614 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1615 }
1616
1617 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1618 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1619 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1620 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1621 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1622 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1623 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1624 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1625 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1626 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1627 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1628 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1629 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1630 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1631 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1632 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1633 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1634 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1635 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1636 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1637 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1638 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1639 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1640 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1641
1642 static inline void
1643 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1644 unsigned align_mul, unsigned align_offset)
1645 {
1646 assert(util_is_power_of_two_nonzero(align_mul));
1647 assert(align_offset < align_mul);
1648 nir_intrinsic_set_align_mul(intrin, align_mul);
1649 nir_intrinsic_set_align_offset(intrin, align_offset);
1650 }
1651
1652 /** Returns a simple alignment for a load/store intrinsic offset
1653 *
1654 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1655 * and ALIGN_OFFSET parameters, this helper takes both into account and
1656 * provides a single simple alignment parameter. The offset X is guaranteed
1657 * to satisfy X % align == 0.
1658 */
1659 static inline unsigned
1660 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1661 {
1662 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1663 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1664 assert(align_offset < align_mul);
1665 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1666 }
1667
1668 /* Converts a image_deref_* intrinsic into a image_* one */
1669 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1670 nir_ssa_def *handle, bool bindless);
1671
1672 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1673 static inline bool
1674 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1675 {
1676 if (instr->intrinsic == nir_intrinsic_load_deref ||
1677 instr->intrinsic == nir_intrinsic_load_ssbo ||
1678 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1679 instr->intrinsic == nir_intrinsic_image_deref_load ||
1680 instr->intrinsic == nir_intrinsic_image_load) {
1681 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1682 } else {
1683 const nir_intrinsic_info *info =
1684 &nir_intrinsic_infos[instr->intrinsic];
1685 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1686 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1687 }
1688 }
1689
1690 /**
1691 * \group texture information
1692 *
1693 * This gives semantic information about textures which is useful to the
1694 * frontend, the backend, and lowering passes, but not the optimizer.
1695 */
1696
1697 typedef enum {
1698 nir_tex_src_coord,
1699 nir_tex_src_projector,
1700 nir_tex_src_comparator, /* shadow comparator */
1701 nir_tex_src_offset,
1702 nir_tex_src_bias,
1703 nir_tex_src_lod,
1704 nir_tex_src_min_lod,
1705 nir_tex_src_ms_index, /* MSAA sample index */
1706 nir_tex_src_ms_mcs, /* MSAA compression value */
1707 nir_tex_src_ddx,
1708 nir_tex_src_ddy,
1709 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1710 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1711 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1712 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1713 nir_tex_src_texture_handle, /* < bindless texture handle */
1714 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1715 nir_tex_src_plane, /* < selects plane for planar textures */
1716 nir_num_tex_src_types
1717 } nir_tex_src_type;
1718
1719 typedef struct {
1720 nir_src src;
1721 nir_tex_src_type src_type;
1722 } nir_tex_src;
1723
1724 typedef enum {
1725 nir_texop_tex, /**< Regular texture look-up */
1726 nir_texop_txb, /**< Texture look-up with LOD bias */
1727 nir_texop_txl, /**< Texture look-up with explicit LOD */
1728 nir_texop_txd, /**< Texture look-up with partial derivatives */
1729 nir_texop_txf, /**< Texel fetch with explicit LOD */
1730 nir_texop_txf_ms, /**< Multisample texture fetch */
1731 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1732 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1733 nir_texop_txs, /**< Texture size */
1734 nir_texop_lod, /**< Texture lod query */
1735 nir_texop_tg4, /**< Texture gather */
1736 nir_texop_query_levels, /**< Texture levels query */
1737 nir_texop_texture_samples, /**< Texture samples query */
1738 nir_texop_samples_identical, /**< Query whether all samples are definitely
1739 * identical.
1740 */
1741 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1742 } nir_texop;
1743
1744 typedef struct {
1745 nir_instr instr;
1746
1747 enum glsl_sampler_dim sampler_dim;
1748 nir_alu_type dest_type;
1749
1750 nir_texop op;
1751 nir_dest dest;
1752 nir_tex_src *src;
1753 unsigned num_srcs, coord_components;
1754 bool is_array, is_shadow;
1755
1756 /**
1757 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1758 * components or the new-style shadow that outputs 1 component.
1759 */
1760 bool is_new_style_shadow;
1761
1762 /* gather component selector */
1763 unsigned component : 2;
1764
1765 /* gather offsets */
1766 int8_t tg4_offsets[4][2];
1767
1768 /* True if the texture index or handle is not dynamically uniform */
1769 bool texture_non_uniform;
1770
1771 /* True if the sampler index or handle is not dynamically uniform */
1772 bool sampler_non_uniform;
1773
1774 /** The texture index
1775 *
1776 * If this texture instruction has a nir_tex_src_texture_offset source,
1777 * then the texture index is given by texture_index + texture_offset.
1778 */
1779 unsigned texture_index;
1780
1781 /** The size of the texture array or 0 if it's not an array */
1782 unsigned texture_array_size;
1783
1784 /** The sampler index
1785 *
1786 * The following operations do not require a sampler and, as such, this
1787 * field should be ignored:
1788 * - nir_texop_txf
1789 * - nir_texop_txf_ms
1790 * - nir_texop_txs
1791 * - nir_texop_lod
1792 * - nir_texop_query_levels
1793 * - nir_texop_texture_samples
1794 * - nir_texop_samples_identical
1795 *
1796 * If this texture instruction has a nir_tex_src_sampler_offset source,
1797 * then the sampler index is given by sampler_index + sampler_offset.
1798 */
1799 unsigned sampler_index;
1800 } nir_tex_instr;
1801
1802 static inline unsigned
1803 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1804 {
1805 switch (instr->op) {
1806 case nir_texop_txs: {
1807 unsigned ret;
1808 switch (instr->sampler_dim) {
1809 case GLSL_SAMPLER_DIM_1D:
1810 case GLSL_SAMPLER_DIM_BUF:
1811 ret = 1;
1812 break;
1813 case GLSL_SAMPLER_DIM_2D:
1814 case GLSL_SAMPLER_DIM_CUBE:
1815 case GLSL_SAMPLER_DIM_MS:
1816 case GLSL_SAMPLER_DIM_RECT:
1817 case GLSL_SAMPLER_DIM_EXTERNAL:
1818 case GLSL_SAMPLER_DIM_SUBPASS:
1819 ret = 2;
1820 break;
1821 case GLSL_SAMPLER_DIM_3D:
1822 ret = 3;
1823 break;
1824 default:
1825 unreachable("not reached");
1826 }
1827 if (instr->is_array)
1828 ret++;
1829 return ret;
1830 }
1831
1832 case nir_texop_lod:
1833 return 2;
1834
1835 case nir_texop_texture_samples:
1836 case nir_texop_query_levels:
1837 case nir_texop_samples_identical:
1838 return 1;
1839
1840 default:
1841 if (instr->is_shadow && instr->is_new_style_shadow)
1842 return 1;
1843
1844 return 4;
1845 }
1846 }
1847
1848 /* Returns true if this texture operation queries something about the texture
1849 * rather than actually sampling it.
1850 */
1851 static inline bool
1852 nir_tex_instr_is_query(const nir_tex_instr *instr)
1853 {
1854 switch (instr->op) {
1855 case nir_texop_txs:
1856 case nir_texop_lod:
1857 case nir_texop_texture_samples:
1858 case nir_texop_query_levels:
1859 case nir_texop_txf_ms_mcs:
1860 return true;
1861 case nir_texop_tex:
1862 case nir_texop_txb:
1863 case nir_texop_txl:
1864 case nir_texop_txd:
1865 case nir_texop_txf:
1866 case nir_texop_txf_ms:
1867 case nir_texop_txf_ms_fb:
1868 case nir_texop_tg4:
1869 return false;
1870 default:
1871 unreachable("Invalid texture opcode");
1872 }
1873 }
1874
1875 static inline bool
1876 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1877 {
1878 switch (instr->op) {
1879 case nir_texop_tex:
1880 case nir_texop_txb:
1881 case nir_texop_lod:
1882 return true;
1883 default:
1884 return false;
1885 }
1886 }
1887
1888 static inline nir_alu_type
1889 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1890 {
1891 switch (instr->src[src].src_type) {
1892 case nir_tex_src_coord:
1893 switch (instr->op) {
1894 case nir_texop_txf:
1895 case nir_texop_txf_ms:
1896 case nir_texop_txf_ms_fb:
1897 case nir_texop_txf_ms_mcs:
1898 case nir_texop_samples_identical:
1899 return nir_type_int;
1900
1901 default:
1902 return nir_type_float;
1903 }
1904
1905 case nir_tex_src_lod:
1906 switch (instr->op) {
1907 case nir_texop_txs:
1908 case nir_texop_txf:
1909 return nir_type_int;
1910
1911 default:
1912 return nir_type_float;
1913 }
1914
1915 case nir_tex_src_projector:
1916 case nir_tex_src_comparator:
1917 case nir_tex_src_bias:
1918 case nir_tex_src_min_lod:
1919 case nir_tex_src_ddx:
1920 case nir_tex_src_ddy:
1921 return nir_type_float;
1922
1923 case nir_tex_src_offset:
1924 case nir_tex_src_ms_index:
1925 case nir_tex_src_plane:
1926 return nir_type_int;
1927
1928 case nir_tex_src_ms_mcs:
1929 case nir_tex_src_texture_deref:
1930 case nir_tex_src_sampler_deref:
1931 case nir_tex_src_texture_offset:
1932 case nir_tex_src_sampler_offset:
1933 case nir_tex_src_texture_handle:
1934 case nir_tex_src_sampler_handle:
1935 return nir_type_uint;
1936
1937 case nir_num_tex_src_types:
1938 unreachable("nir_num_tex_src_types is not a valid source type");
1939 }
1940
1941 unreachable("Invalid texture source type");
1942 }
1943
1944 static inline unsigned
1945 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
1946 {
1947 if (instr->src[src].src_type == nir_tex_src_coord)
1948 return instr->coord_components;
1949
1950 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
1951 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
1952 return 4;
1953
1954 if (instr->src[src].src_type == nir_tex_src_ddx ||
1955 instr->src[src].src_type == nir_tex_src_ddy) {
1956 if (instr->is_array)
1957 return instr->coord_components - 1;
1958 else
1959 return instr->coord_components;
1960 }
1961
1962 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
1963 * the offset, since a cube maps to a single face.
1964 */
1965 if (instr->src[src].src_type == nir_tex_src_offset) {
1966 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
1967 return 2;
1968 else if (instr->is_array)
1969 return instr->coord_components - 1;
1970 else
1971 return instr->coord_components;
1972 }
1973
1974 return 1;
1975 }
1976
1977 static inline int
1978 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
1979 {
1980 for (unsigned i = 0; i < instr->num_srcs; i++)
1981 if (instr->src[i].src_type == type)
1982 return (int) i;
1983
1984 return -1;
1985 }
1986
1987 void nir_tex_instr_add_src(nir_tex_instr *tex,
1988 nir_tex_src_type src_type,
1989 nir_src src);
1990
1991 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
1992
1993 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
1994
1995 typedef struct {
1996 nir_instr instr;
1997
1998 nir_ssa_def def;
1999
2000 nir_const_value value[];
2001 } nir_load_const_instr;
2002
2003 typedef enum {
2004 nir_jump_return,
2005 nir_jump_break,
2006 nir_jump_continue,
2007 } nir_jump_type;
2008
2009 typedef struct {
2010 nir_instr instr;
2011 nir_jump_type type;
2012 } nir_jump_instr;
2013
2014 /* creates a new SSA variable in an undefined state */
2015
2016 typedef struct {
2017 nir_instr instr;
2018 nir_ssa_def def;
2019 } nir_ssa_undef_instr;
2020
2021 typedef struct {
2022 struct exec_node node;
2023
2024 /* The predecessor block corresponding to this source */
2025 struct nir_block *pred;
2026
2027 nir_src src;
2028 } nir_phi_src;
2029
2030 #define nir_foreach_phi_src(phi_src, phi) \
2031 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2032 #define nir_foreach_phi_src_safe(phi_src, phi) \
2033 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2034
2035 typedef struct {
2036 nir_instr instr;
2037
2038 struct exec_list srcs; /** < list of nir_phi_src */
2039
2040 nir_dest dest;
2041 } nir_phi_instr;
2042
2043 typedef struct {
2044 struct exec_node node;
2045 nir_src src;
2046 nir_dest dest;
2047 } nir_parallel_copy_entry;
2048
2049 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2050 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2051
2052 typedef struct {
2053 nir_instr instr;
2054
2055 /* A list of nir_parallel_copy_entrys. The sources of all of the
2056 * entries are copied to the corresponding destinations "in parallel".
2057 * In other words, if we have two entries: a -> b and b -> a, the values
2058 * get swapped.
2059 */
2060 struct exec_list entries;
2061 } nir_parallel_copy_instr;
2062
2063 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2064 type, nir_instr_type_alu)
2065 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2066 type, nir_instr_type_deref)
2067 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2068 type, nir_instr_type_call)
2069 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2070 type, nir_instr_type_jump)
2071 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2072 type, nir_instr_type_tex)
2073 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2074 type, nir_instr_type_intrinsic)
2075 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2076 type, nir_instr_type_load_const)
2077 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2078 type, nir_instr_type_ssa_undef)
2079 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2080 type, nir_instr_type_phi)
2081 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2082 nir_parallel_copy_instr, instr,
2083 type, nir_instr_type_parallel_copy)
2084
2085
2086 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2087 static inline type \
2088 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2089 { \
2090 assert(nir_src_is_const(src)); \
2091 nir_load_const_instr *load = \
2092 nir_instr_as_load_const(src.ssa->parent_instr); \
2093 assert(comp < load->def.num_components); \
2094 return nir_const_value_as_##suffix(load->value[comp], \
2095 load->def.bit_size); \
2096 } \
2097 \
2098 static inline type \
2099 nir_src_as_##suffix(nir_src src) \
2100 { \
2101 assert(nir_src_num_components(src) == 1); \
2102 return nir_src_comp_as_##suffix(src, 0); \
2103 }
2104
2105 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2106 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2107 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2108 NIR_DEFINE_SRC_AS_CONST(double, float)
2109
2110 #undef NIR_DEFINE_SRC_AS_CONST
2111
2112
2113 typedef struct {
2114 nir_ssa_def *def;
2115 unsigned comp;
2116 } nir_ssa_scalar;
2117
2118 static inline bool
2119 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2120 {
2121 return s.def->parent_instr->type == nir_instr_type_load_const;
2122 }
2123
2124 static inline nir_const_value
2125 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2126 {
2127 assert(s.comp < s.def->num_components);
2128 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2129 return load->value[s.comp];
2130 }
2131
2132 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2133 static inline type \
2134 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2135 { \
2136 return nir_const_value_as_##suffix( \
2137 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2138 }
2139
2140 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2141 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2142 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2143 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2144
2145 #undef NIR_DEFINE_SCALAR_AS_CONST
2146
2147 static inline bool
2148 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2149 {
2150 return s.def->parent_instr->type == nir_instr_type_alu;
2151 }
2152
2153 static inline nir_op
2154 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2155 {
2156 return nir_instr_as_alu(s.def->parent_instr)->op;
2157 }
2158
2159 static inline nir_ssa_scalar
2160 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2161 {
2162 nir_ssa_scalar out = { NULL, 0 };
2163
2164 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2165 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2166
2167 /* Our component must be written */
2168 assert(s.comp < s.def->num_components);
2169 assert(alu->dest.write_mask & (1u << s.comp));
2170
2171 assert(alu->src[alu_src_idx].src.is_ssa);
2172 out.def = alu->src[alu_src_idx].src.ssa;
2173
2174 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2175 /* The ALU src is unsized so the source component follows the
2176 * destination component.
2177 */
2178 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2179 } else {
2180 /* This is a sized source so all source components work together to
2181 * produce all the destination components. Since we need to return a
2182 * scalar, this only works if the source is a scalar.
2183 */
2184 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2185 out.comp = alu->src[alu_src_idx].swizzle[0];
2186 }
2187 assert(out.comp < out.def->num_components);
2188
2189 return out;
2190 }
2191
2192
2193 /*
2194 * Control flow
2195 *
2196 * Control flow consists of a tree of control flow nodes, which include
2197 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2198 * instructions that always run start-to-finish. Each basic block also keeps
2199 * track of its successors (blocks which may run immediately after the current
2200 * block) and predecessors (blocks which could have run immediately before the
2201 * current block). Each function also has a start block and an end block which
2202 * all return statements point to (which is always empty). Together, all the
2203 * blocks with their predecessors and successors make up the control flow
2204 * graph (CFG) of the function. There are helpers that modify the tree of
2205 * control flow nodes while modifying the CFG appropriately; these should be
2206 * used instead of modifying the tree directly.
2207 */
2208
2209 typedef enum {
2210 nir_cf_node_block,
2211 nir_cf_node_if,
2212 nir_cf_node_loop,
2213 nir_cf_node_function
2214 } nir_cf_node_type;
2215
2216 typedef struct nir_cf_node {
2217 struct exec_node node;
2218 nir_cf_node_type type;
2219 struct nir_cf_node *parent;
2220 } nir_cf_node;
2221
2222 typedef struct nir_block {
2223 nir_cf_node cf_node;
2224
2225 struct exec_list instr_list; /** < list of nir_instr */
2226
2227 /** generic block index; generated by nir_index_blocks */
2228 unsigned index;
2229
2230 /*
2231 * Each block can only have up to 2 successors, so we put them in a simple
2232 * array - no need for anything more complicated.
2233 */
2234 struct nir_block *successors[2];
2235
2236 /* Set of nir_block predecessors in the CFG */
2237 struct set *predecessors;
2238
2239 /*
2240 * this node's immediate dominator in the dominance tree - set to NULL for
2241 * the start block.
2242 */
2243 struct nir_block *imm_dom;
2244
2245 /* This node's children in the dominance tree */
2246 unsigned num_dom_children;
2247 struct nir_block **dom_children;
2248
2249 /* Set of nir_blocks on the dominance frontier of this block */
2250 struct set *dom_frontier;
2251
2252 /*
2253 * These two indices have the property that dom_{pre,post}_index for each
2254 * child of this block in the dominance tree will always be between
2255 * dom_pre_index and dom_post_index for this block, which makes testing if
2256 * a given block is dominated by another block an O(1) operation.
2257 */
2258 unsigned dom_pre_index, dom_post_index;
2259
2260 /* live in and out for this block; used for liveness analysis */
2261 BITSET_WORD *live_in;
2262 BITSET_WORD *live_out;
2263 } nir_block;
2264
2265 static inline nir_instr *
2266 nir_block_first_instr(nir_block *block)
2267 {
2268 struct exec_node *head = exec_list_get_head(&block->instr_list);
2269 return exec_node_data(nir_instr, head, node);
2270 }
2271
2272 static inline nir_instr *
2273 nir_block_last_instr(nir_block *block)
2274 {
2275 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2276 return exec_node_data(nir_instr, tail, node);
2277 }
2278
2279 static inline bool
2280 nir_block_ends_in_jump(nir_block *block)
2281 {
2282 return !exec_list_is_empty(&block->instr_list) &&
2283 nir_block_last_instr(block)->type == nir_instr_type_jump;
2284 }
2285
2286 #define nir_foreach_instr(instr, block) \
2287 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2288 #define nir_foreach_instr_reverse(instr, block) \
2289 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2290 #define nir_foreach_instr_safe(instr, block) \
2291 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2292 #define nir_foreach_instr_reverse_safe(instr, block) \
2293 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2294
2295 typedef enum {
2296 nir_selection_control_none = 0x0,
2297 nir_selection_control_flatten = 0x1,
2298 nir_selection_control_dont_flatten = 0x2,
2299 } nir_selection_control;
2300
2301 typedef struct nir_if {
2302 nir_cf_node cf_node;
2303 nir_src condition;
2304 nir_selection_control control;
2305
2306 struct exec_list then_list; /** < list of nir_cf_node */
2307 struct exec_list else_list; /** < list of nir_cf_node */
2308 } nir_if;
2309
2310 typedef struct {
2311 nir_if *nif;
2312
2313 /** Instruction that generates nif::condition. */
2314 nir_instr *conditional_instr;
2315
2316 /** Block within ::nif that has the break instruction. */
2317 nir_block *break_block;
2318
2319 /** Last block for the then- or else-path that does not contain the break. */
2320 nir_block *continue_from_block;
2321
2322 /** True when ::break_block is in the else-path of ::nif. */
2323 bool continue_from_then;
2324 bool induction_rhs;
2325
2326 /* This is true if the terminators exact trip count is unknown. For
2327 * example:
2328 *
2329 * for (int i = 0; i < imin(x, 4); i++)
2330 * ...
2331 *
2332 * Here loop analysis would have set a max_trip_count of 4 however we dont
2333 * know for sure that this is the exact trip count.
2334 */
2335 bool exact_trip_count_unknown;
2336
2337 struct list_head loop_terminator_link;
2338 } nir_loop_terminator;
2339
2340 typedef struct {
2341 /* Estimated cost (in number of instructions) of the loop */
2342 unsigned instr_cost;
2343
2344 /* Guessed trip count based on array indexing */
2345 unsigned guessed_trip_count;
2346
2347 /* Maximum number of times the loop is run (if known) */
2348 unsigned max_trip_count;
2349
2350 /* Do we know the exact number of times the loop will be run */
2351 bool exact_trip_count_known;
2352
2353 /* Unroll the loop regardless of its size */
2354 bool force_unroll;
2355
2356 /* Does the loop contain complex loop terminators, continues or other
2357 * complex behaviours? If this is true we can't rely on
2358 * loop_terminator_list to be complete or accurate.
2359 */
2360 bool complex_loop;
2361
2362 nir_loop_terminator *limiting_terminator;
2363
2364 /* A list of loop_terminators terminating this loop. */
2365 struct list_head loop_terminator_list;
2366 } nir_loop_info;
2367
2368 typedef enum {
2369 nir_loop_control_none = 0x0,
2370 nir_loop_control_unroll = 0x1,
2371 nir_loop_control_dont_unroll = 0x2,
2372 } nir_loop_control;
2373
2374 typedef struct {
2375 nir_cf_node cf_node;
2376
2377 struct exec_list body; /** < list of nir_cf_node */
2378
2379 nir_loop_info *info;
2380 nir_loop_control control;
2381 bool partially_unrolled;
2382 } nir_loop;
2383
2384 /**
2385 * Various bits of metadata that can may be created or required by
2386 * optimization and analysis passes
2387 */
2388 typedef enum {
2389 nir_metadata_none = 0x0,
2390 nir_metadata_block_index = 0x1,
2391 nir_metadata_dominance = 0x2,
2392 nir_metadata_live_ssa_defs = 0x4,
2393 nir_metadata_not_properly_reset = 0x8,
2394 nir_metadata_loop_analysis = 0x10,
2395 } nir_metadata;
2396
2397 typedef struct {
2398 nir_cf_node cf_node;
2399
2400 /** pointer to the function of which this is an implementation */
2401 struct nir_function *function;
2402
2403 struct exec_list body; /** < list of nir_cf_node */
2404
2405 nir_block *end_block;
2406
2407 /** list for all local variables in the function */
2408 struct exec_list locals;
2409
2410 /** list of local registers in the function */
2411 struct exec_list registers;
2412
2413 /** next available local register index */
2414 unsigned reg_alloc;
2415
2416 /** next available SSA value index */
2417 unsigned ssa_alloc;
2418
2419 /* total number of basic blocks, only valid when block_index_dirty = false */
2420 unsigned num_blocks;
2421
2422 nir_metadata valid_metadata;
2423 } nir_function_impl;
2424
2425 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2426 nir_start_block(nir_function_impl *impl)
2427 {
2428 return (nir_block *) impl->body.head_sentinel.next;
2429 }
2430
2431 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2432 nir_impl_last_block(nir_function_impl *impl)
2433 {
2434 return (nir_block *) impl->body.tail_sentinel.prev;
2435 }
2436
2437 static inline nir_cf_node *
2438 nir_cf_node_next(nir_cf_node *node)
2439 {
2440 struct exec_node *next = exec_node_get_next(&node->node);
2441 if (exec_node_is_tail_sentinel(next))
2442 return NULL;
2443 else
2444 return exec_node_data(nir_cf_node, next, node);
2445 }
2446
2447 static inline nir_cf_node *
2448 nir_cf_node_prev(nir_cf_node *node)
2449 {
2450 struct exec_node *prev = exec_node_get_prev(&node->node);
2451 if (exec_node_is_head_sentinel(prev))
2452 return NULL;
2453 else
2454 return exec_node_data(nir_cf_node, prev, node);
2455 }
2456
2457 static inline bool
2458 nir_cf_node_is_first(const nir_cf_node *node)
2459 {
2460 return exec_node_is_head_sentinel(node->node.prev);
2461 }
2462
2463 static inline bool
2464 nir_cf_node_is_last(const nir_cf_node *node)
2465 {
2466 return exec_node_is_tail_sentinel(node->node.next);
2467 }
2468
2469 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2470 type, nir_cf_node_block)
2471 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2472 type, nir_cf_node_if)
2473 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2474 type, nir_cf_node_loop)
2475 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2476 nir_function_impl, cf_node, type, nir_cf_node_function)
2477
2478 static inline nir_block *
2479 nir_if_first_then_block(nir_if *if_stmt)
2480 {
2481 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2482 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2483 }
2484
2485 static inline nir_block *
2486 nir_if_last_then_block(nir_if *if_stmt)
2487 {
2488 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2489 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2490 }
2491
2492 static inline nir_block *
2493 nir_if_first_else_block(nir_if *if_stmt)
2494 {
2495 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2496 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2497 }
2498
2499 static inline nir_block *
2500 nir_if_last_else_block(nir_if *if_stmt)
2501 {
2502 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2503 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2504 }
2505
2506 static inline nir_block *
2507 nir_loop_first_block(nir_loop *loop)
2508 {
2509 struct exec_node *head = exec_list_get_head(&loop->body);
2510 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2511 }
2512
2513 static inline nir_block *
2514 nir_loop_last_block(nir_loop *loop)
2515 {
2516 struct exec_node *tail = exec_list_get_tail(&loop->body);
2517 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2518 }
2519
2520 /**
2521 * Return true if this list of cf_nodes contains a single empty block.
2522 */
2523 static inline bool
2524 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2525 {
2526 if (exec_list_is_singular(cf_list)) {
2527 struct exec_node *head = exec_list_get_head(cf_list);
2528 nir_block *block =
2529 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2530 return exec_list_is_empty(&block->instr_list);
2531 }
2532 return false;
2533 }
2534
2535 typedef struct {
2536 uint8_t num_components;
2537 uint8_t bit_size;
2538 } nir_parameter;
2539
2540 typedef struct nir_function {
2541 struct exec_node node;
2542
2543 const char *name;
2544 struct nir_shader *shader;
2545
2546 unsigned num_params;
2547 nir_parameter *params;
2548
2549 /** The implementation of this function.
2550 *
2551 * If the function is only declared and not implemented, this is NULL.
2552 */
2553 nir_function_impl *impl;
2554
2555 bool is_entrypoint;
2556 } nir_function;
2557
2558 typedef enum {
2559 nir_lower_imul64 = (1 << 0),
2560 nir_lower_isign64 = (1 << 1),
2561 /** Lower all int64 modulus and division opcodes */
2562 nir_lower_divmod64 = (1 << 2),
2563 /** Lower all 64-bit umul_high and imul_high opcodes */
2564 nir_lower_imul_high64 = (1 << 3),
2565 nir_lower_mov64 = (1 << 4),
2566 nir_lower_icmp64 = (1 << 5),
2567 nir_lower_iadd64 = (1 << 6),
2568 nir_lower_iabs64 = (1 << 7),
2569 nir_lower_ineg64 = (1 << 8),
2570 nir_lower_logic64 = (1 << 9),
2571 nir_lower_minmax64 = (1 << 10),
2572 nir_lower_shift64 = (1 << 11),
2573 nir_lower_imul_2x32_64 = (1 << 12),
2574 nir_lower_extract64 = (1 << 13),
2575 } nir_lower_int64_options;
2576
2577 typedef enum {
2578 nir_lower_drcp = (1 << 0),
2579 nir_lower_dsqrt = (1 << 1),
2580 nir_lower_drsq = (1 << 2),
2581 nir_lower_dtrunc = (1 << 3),
2582 nir_lower_dfloor = (1 << 4),
2583 nir_lower_dceil = (1 << 5),
2584 nir_lower_dfract = (1 << 6),
2585 nir_lower_dround_even = (1 << 7),
2586 nir_lower_dmod = (1 << 8),
2587 nir_lower_dsub = (1 << 9),
2588 nir_lower_ddiv = (1 << 10),
2589 nir_lower_fp64_full_software = (1 << 11),
2590 } nir_lower_doubles_options;
2591
2592 typedef enum {
2593 nir_divergence_single_prim_per_subgroup = (1 << 0),
2594 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2595 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2596 nir_divergence_view_index_uniform = (1 << 3),
2597 } nir_divergence_options;
2598
2599 typedef struct nir_shader_compiler_options {
2600 bool lower_fdiv;
2601 bool lower_ffma;
2602 bool fuse_ffma;
2603 bool lower_flrp16;
2604 bool lower_flrp32;
2605 /** Lowers flrp when it does not support doubles */
2606 bool lower_flrp64;
2607 bool lower_fpow;
2608 bool lower_fsat;
2609 bool lower_fsqrt;
2610 bool lower_sincos;
2611 bool lower_fmod;
2612 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2613 bool lower_bitfield_extract;
2614 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2615 bool lower_bitfield_extract_to_shifts;
2616 /** Lowers bitfield_insert to bfi/bfm */
2617 bool lower_bitfield_insert;
2618 /** Lowers bitfield_insert to compares, and shifts. */
2619 bool lower_bitfield_insert_to_shifts;
2620 /** Lowers bitfield_insert to bfm/bitfield_select. */
2621 bool lower_bitfield_insert_to_bitfield_select;
2622 /** Lowers bitfield_reverse to shifts. */
2623 bool lower_bitfield_reverse;
2624 /** Lowers bit_count to shifts. */
2625 bool lower_bit_count;
2626 /** Lowers ifind_msb to compare and ufind_msb */
2627 bool lower_ifind_msb;
2628 /** Lowers find_lsb to ufind_msb and logic ops */
2629 bool lower_find_lsb;
2630 bool lower_uadd_carry;
2631 bool lower_usub_borrow;
2632 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2633 bool lower_mul_high;
2634 /** lowers fneg and ineg to fsub and isub. */
2635 bool lower_negate;
2636 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2637 bool lower_sub;
2638
2639 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2640 bool lower_scmp;
2641
2642 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2643 bool lower_vector_cmp;
2644
2645 /** enables rules to lower idiv by power-of-two: */
2646 bool lower_idiv;
2647
2648 /** enable rules to avoid bit ops */
2649 bool lower_bitops;
2650
2651 /** enables rules to lower isign to imin+imax */
2652 bool lower_isign;
2653
2654 /** enables rules to lower fsign to fsub and flt */
2655 bool lower_fsign;
2656
2657 /* lower fdph to fdot4 */
2658 bool lower_fdph;
2659
2660 /** lower fdot to fmul and fsum/fadd. */
2661 bool lower_fdot;
2662
2663 /* Does the native fdot instruction replicate its result for four
2664 * components? If so, then opt_algebraic_late will turn all fdotN
2665 * instructions into fdot_replicatedN instructions.
2666 */
2667 bool fdot_replicates;
2668
2669 /** lowers ffloor to fsub+ffract: */
2670 bool lower_ffloor;
2671
2672 /** lowers ffract to fsub+ffloor: */
2673 bool lower_ffract;
2674
2675 /** lowers fceil to fneg+ffloor+fneg: */
2676 bool lower_fceil;
2677
2678 bool lower_ftrunc;
2679
2680 bool lower_ldexp;
2681
2682 bool lower_pack_half_2x16;
2683 bool lower_pack_unorm_2x16;
2684 bool lower_pack_snorm_2x16;
2685 bool lower_pack_unorm_4x8;
2686 bool lower_pack_snorm_4x8;
2687 bool lower_unpack_half_2x16;
2688 bool lower_unpack_unorm_2x16;
2689 bool lower_unpack_snorm_2x16;
2690 bool lower_unpack_unorm_4x8;
2691 bool lower_unpack_snorm_4x8;
2692
2693 bool lower_extract_byte;
2694 bool lower_extract_word;
2695
2696 bool lower_all_io_to_temps;
2697 bool lower_all_io_to_elements;
2698
2699 /* Indicates that the driver only has zero-based vertex id */
2700 bool vertex_id_zero_based;
2701
2702 /**
2703 * If enabled, gl_BaseVertex will be lowered as:
2704 * is_indexed_draw (~0/0) & firstvertex
2705 */
2706 bool lower_base_vertex;
2707
2708 /**
2709 * If enabled, gl_HelperInvocation will be lowered as:
2710 *
2711 * !((1 << sample_id) & sample_mask_in))
2712 *
2713 * This depends on some possibly hw implementation details, which may
2714 * not be true for all hw. In particular that the FS is only executed
2715 * for covered samples or for helper invocations. So, do not blindly
2716 * enable this option.
2717 *
2718 * Note: See also issue #22 in ARB_shader_image_load_store
2719 */
2720 bool lower_helper_invocation;
2721
2722 /**
2723 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2724 *
2725 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2726 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2727 */
2728 bool optimize_sample_mask_in;
2729
2730 bool lower_cs_local_index_from_id;
2731 bool lower_cs_local_id_from_index;
2732
2733 bool lower_device_index_to_zero;
2734
2735 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2736 bool lower_wpos_pntc;
2737
2738 bool lower_hadd;
2739 bool lower_add_sat;
2740
2741 /**
2742 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2743 * for IO purposes and would prefer loads/stores be vectorized.
2744 */
2745 bool vectorize_io;
2746 bool lower_to_scalar;
2747
2748 /**
2749 * Should nir_lower_io() create load_interpolated_input intrinsics?
2750 *
2751 * If not, it generates regular load_input intrinsics and interpolation
2752 * information must be inferred from the list of input nir_variables.
2753 */
2754 bool use_interpolated_input_intrinsics;
2755
2756 /* Lowers when 32x32->64 bit multiplication is not supported */
2757 bool lower_mul_2x32_64;
2758
2759 /* Lowers when rotate instruction is not supported */
2760 bool lower_rotate;
2761
2762 /**
2763 * Backend supports imul24, and would like to use it (when possible)
2764 * for address/offset calculation. If true, driver should call
2765 * nir_lower_amul(). (If not set, amul will automatically be lowered
2766 * to imul.)
2767 */
2768 bool has_imul24;
2769
2770 /**
2771 * Is this the Intel vec4 backend?
2772 *
2773 * Used to inhibit algebraic optimizations that are known to be harmful on
2774 * the Intel vec4 backend. This is generally applicable to any
2775 * optimization that might cause more immediate values to be used in
2776 * 3-source (e.g., ffma and flrp) instructions.
2777 */
2778 bool intel_vec4;
2779
2780 unsigned max_unroll_iterations;
2781
2782 nir_lower_int64_options lower_int64_options;
2783 nir_lower_doubles_options lower_doubles_options;
2784 } nir_shader_compiler_options;
2785
2786 typedef struct nir_shader {
2787 /** list of uniforms (nir_variable) */
2788 struct exec_list uniforms;
2789
2790 /** list of inputs (nir_variable) */
2791 struct exec_list inputs;
2792
2793 /** list of outputs (nir_variable) */
2794 struct exec_list outputs;
2795
2796 /** list of shared compute variables (nir_variable) */
2797 struct exec_list shared;
2798
2799 /** Set of driver-specific options for the shader.
2800 *
2801 * The memory for the options is expected to be kept in a single static
2802 * copy by the driver.
2803 */
2804 const struct nir_shader_compiler_options *options;
2805
2806 /** Various bits of compile-time information about a given shader */
2807 struct shader_info info;
2808
2809 /** list of global variables in the shader (nir_variable) */
2810 struct exec_list globals;
2811
2812 /** list of system value variables in the shader (nir_variable) */
2813 struct exec_list system_values;
2814
2815 struct exec_list functions; /** < list of nir_function */
2816
2817 /**
2818 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2819 * access plus one
2820 */
2821 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2822
2823 /** Size in bytes of required scratch space */
2824 unsigned scratch_size;
2825
2826 /** Constant data associated with this shader.
2827 *
2828 * Constant data is loaded through load_constant intrinsics. See also
2829 * nir_opt_large_constants.
2830 */
2831 void *constant_data;
2832 unsigned constant_data_size;
2833 } nir_shader;
2834
2835 #define nir_foreach_function(func, shader) \
2836 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2837
2838 static inline nir_function_impl *
2839 nir_shader_get_entrypoint(nir_shader *shader)
2840 {
2841 nir_function *func = NULL;
2842
2843 nir_foreach_function(function, shader) {
2844 assert(func == NULL);
2845 if (function->is_entrypoint) {
2846 func = function;
2847 #ifndef NDEBUG
2848 break;
2849 #endif
2850 }
2851 }
2852
2853 if (!func)
2854 return NULL;
2855
2856 assert(func->num_params == 0);
2857 assert(func->impl);
2858 return func->impl;
2859 }
2860
2861 nir_shader *nir_shader_create(void *mem_ctx,
2862 gl_shader_stage stage,
2863 const nir_shader_compiler_options *options,
2864 shader_info *si);
2865
2866 nir_register *nir_local_reg_create(nir_function_impl *impl);
2867
2868 void nir_reg_remove(nir_register *reg);
2869
2870 /** Adds a variable to the appropriate list in nir_shader */
2871 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
2872
2873 static inline void
2874 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
2875 {
2876 assert(var->data.mode == nir_var_function_temp);
2877 exec_list_push_tail(&impl->locals, &var->node);
2878 }
2879
2880 /** creates a variable, sets a few defaults, and adds it to the list */
2881 nir_variable *nir_variable_create(nir_shader *shader,
2882 nir_variable_mode mode,
2883 const struct glsl_type *type,
2884 const char *name);
2885 /** creates a local variable and adds it to the list */
2886 nir_variable *nir_local_variable_create(nir_function_impl *impl,
2887 const struct glsl_type *type,
2888 const char *name);
2889
2890 /** creates a function and adds it to the shader's list of functions */
2891 nir_function *nir_function_create(nir_shader *shader, const char *name);
2892
2893 nir_function_impl *nir_function_impl_create(nir_function *func);
2894 /** creates a function_impl that isn't tied to any particular function */
2895 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
2896
2897 nir_block *nir_block_create(nir_shader *shader);
2898 nir_if *nir_if_create(nir_shader *shader);
2899 nir_loop *nir_loop_create(nir_shader *shader);
2900
2901 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
2902
2903 /** requests that the given pieces of metadata be generated */
2904 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
2905 /** dirties all but the preserved metadata */
2906 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
2907
2908 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2909 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
2910
2911 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
2912 nir_deref_type deref_type);
2913
2914 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
2915
2916 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
2917 unsigned num_components,
2918 unsigned bit_size);
2919
2920 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
2921 nir_intrinsic_op op);
2922
2923 nir_call_instr *nir_call_instr_create(nir_shader *shader,
2924 nir_function *callee);
2925
2926 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
2927
2928 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
2929
2930 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
2931
2932 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
2933 unsigned num_components,
2934 unsigned bit_size);
2935
2936 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
2937
2938 /**
2939 * NIR Cursors and Instruction Insertion API
2940 * @{
2941 *
2942 * A tiny struct representing a point to insert/extract instructions or
2943 * control flow nodes. Helps reduce the combinatorial explosion of possible
2944 * points to insert/extract.
2945 *
2946 * \sa nir_control_flow.h
2947 */
2948 typedef enum {
2949 nir_cursor_before_block,
2950 nir_cursor_after_block,
2951 nir_cursor_before_instr,
2952 nir_cursor_after_instr,
2953 } nir_cursor_option;
2954
2955 typedef struct {
2956 nir_cursor_option option;
2957 union {
2958 nir_block *block;
2959 nir_instr *instr;
2960 };
2961 } nir_cursor;
2962
2963 static inline nir_block *
2964 nir_cursor_current_block(nir_cursor cursor)
2965 {
2966 if (cursor.option == nir_cursor_before_instr ||
2967 cursor.option == nir_cursor_after_instr) {
2968 return cursor.instr->block;
2969 } else {
2970 return cursor.block;
2971 }
2972 }
2973
2974 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
2975
2976 static inline nir_cursor
2977 nir_before_block(nir_block *block)
2978 {
2979 nir_cursor cursor;
2980 cursor.option = nir_cursor_before_block;
2981 cursor.block = block;
2982 return cursor;
2983 }
2984
2985 static inline nir_cursor
2986 nir_after_block(nir_block *block)
2987 {
2988 nir_cursor cursor;
2989 cursor.option = nir_cursor_after_block;
2990 cursor.block = block;
2991 return cursor;
2992 }
2993
2994 static inline nir_cursor
2995 nir_before_instr(nir_instr *instr)
2996 {
2997 nir_cursor cursor;
2998 cursor.option = nir_cursor_before_instr;
2999 cursor.instr = instr;
3000 return cursor;
3001 }
3002
3003 static inline nir_cursor
3004 nir_after_instr(nir_instr *instr)
3005 {
3006 nir_cursor cursor;
3007 cursor.option = nir_cursor_after_instr;
3008 cursor.instr = instr;
3009 return cursor;
3010 }
3011
3012 static inline nir_cursor
3013 nir_after_block_before_jump(nir_block *block)
3014 {
3015 nir_instr *last_instr = nir_block_last_instr(block);
3016 if (last_instr && last_instr->type == nir_instr_type_jump) {
3017 return nir_before_instr(last_instr);
3018 } else {
3019 return nir_after_block(block);
3020 }
3021 }
3022
3023 static inline nir_cursor
3024 nir_before_src(nir_src *src, bool is_if_condition)
3025 {
3026 if (is_if_condition) {
3027 nir_block *prev_block =
3028 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3029 assert(!nir_block_ends_in_jump(prev_block));
3030 return nir_after_block(prev_block);
3031 } else if (src->parent_instr->type == nir_instr_type_phi) {
3032 #ifndef NDEBUG
3033 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3034 bool found = false;
3035 nir_foreach_phi_src(phi_src, cond_phi) {
3036 if (phi_src->src.ssa == src->ssa) {
3037 found = true;
3038 break;
3039 }
3040 }
3041 assert(found);
3042 #endif
3043 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3044 * to have a more specific name.
3045 */
3046 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3047 return nir_after_block_before_jump(phi_src->pred);
3048 } else {
3049 return nir_before_instr(src->parent_instr);
3050 }
3051 }
3052
3053 static inline nir_cursor
3054 nir_before_cf_node(nir_cf_node *node)
3055 {
3056 if (node->type == nir_cf_node_block)
3057 return nir_before_block(nir_cf_node_as_block(node));
3058
3059 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3060 }
3061
3062 static inline nir_cursor
3063 nir_after_cf_node(nir_cf_node *node)
3064 {
3065 if (node->type == nir_cf_node_block)
3066 return nir_after_block(nir_cf_node_as_block(node));
3067
3068 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3069 }
3070
3071 static inline nir_cursor
3072 nir_after_phis(nir_block *block)
3073 {
3074 nir_foreach_instr(instr, block) {
3075 if (instr->type != nir_instr_type_phi)
3076 return nir_before_instr(instr);
3077 }
3078 return nir_after_block(block);
3079 }
3080
3081 static inline nir_cursor
3082 nir_after_cf_node_and_phis(nir_cf_node *node)
3083 {
3084 if (node->type == nir_cf_node_block)
3085 return nir_after_block(nir_cf_node_as_block(node));
3086
3087 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3088
3089 return nir_after_phis(block);
3090 }
3091
3092 static inline nir_cursor
3093 nir_before_cf_list(struct exec_list *cf_list)
3094 {
3095 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3096 exec_list_get_head(cf_list), node);
3097 return nir_before_cf_node(first_node);
3098 }
3099
3100 static inline nir_cursor
3101 nir_after_cf_list(struct exec_list *cf_list)
3102 {
3103 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3104 exec_list_get_tail(cf_list), node);
3105 return nir_after_cf_node(last_node);
3106 }
3107
3108 /**
3109 * Insert a NIR instruction at the given cursor.
3110 *
3111 * Note: This does not update the cursor.
3112 */
3113 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3114
3115 static inline void
3116 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3117 {
3118 nir_instr_insert(nir_before_instr(instr), before);
3119 }
3120
3121 static inline void
3122 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3123 {
3124 nir_instr_insert(nir_after_instr(instr), after);
3125 }
3126
3127 static inline void
3128 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3129 {
3130 nir_instr_insert(nir_before_block(block), before);
3131 }
3132
3133 static inline void
3134 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3135 {
3136 nir_instr_insert(nir_after_block(block), after);
3137 }
3138
3139 static inline void
3140 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3141 {
3142 nir_instr_insert(nir_before_cf_node(node), before);
3143 }
3144
3145 static inline void
3146 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3147 {
3148 nir_instr_insert(nir_after_cf_node(node), after);
3149 }
3150
3151 static inline void
3152 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3153 {
3154 nir_instr_insert(nir_before_cf_list(list), before);
3155 }
3156
3157 static inline void
3158 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3159 {
3160 nir_instr_insert(nir_after_cf_list(list), after);
3161 }
3162
3163 void nir_instr_remove_v(nir_instr *instr);
3164
3165 static inline nir_cursor
3166 nir_instr_remove(nir_instr *instr)
3167 {
3168 nir_cursor cursor;
3169 nir_instr *prev = nir_instr_prev(instr);
3170 if (prev) {
3171 cursor = nir_after_instr(prev);
3172 } else {
3173 cursor = nir_before_block(instr->block);
3174 }
3175 nir_instr_remove_v(instr);
3176 return cursor;
3177 }
3178
3179 /** @} */
3180
3181 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3182
3183 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3184 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3185 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3186 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3187 void *state);
3188 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3189 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3190
3191 nir_const_value *nir_src_as_const_value(nir_src src);
3192
3193 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3194 static inline c_type * \
3195 nir_src_as_ ## name (nir_src src) \
3196 { \
3197 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3198 ? cast_macro(src.ssa->parent_instr) : NULL; \
3199 }
3200
3201 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3202 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3203 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3204 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3205
3206 bool nir_src_is_dynamically_uniform(nir_src src);
3207 bool nir_srcs_equal(nir_src src1, nir_src src2);
3208 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3209 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3210 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3211 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3212 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3213 nir_dest new_dest);
3214
3215 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3216 unsigned num_components, unsigned bit_size,
3217 const char *name);
3218 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3219 unsigned num_components, unsigned bit_size,
3220 const char *name);
3221 static inline void
3222 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3223 const struct glsl_type *type,
3224 const char *name)
3225 {
3226 assert(glsl_type_is_vector_or_scalar(type));
3227 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3228 glsl_get_bit_size(type), name);
3229 }
3230 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3231 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3232 nir_instr *after_me);
3233
3234 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3235
3236 /*
3237 * finds the next basic block in source-code order, returns NULL if there is
3238 * none
3239 */
3240
3241 nir_block *nir_block_cf_tree_next(nir_block *block);
3242
3243 /* Performs the opposite of nir_block_cf_tree_next() */
3244
3245 nir_block *nir_block_cf_tree_prev(nir_block *block);
3246
3247 /* Gets the first block in a CF node in source-code order */
3248
3249 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3250
3251 /* Gets the last block in a CF node in source-code order */
3252
3253 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3254
3255 /* Gets the next block after a CF node in source-code order */
3256
3257 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3258
3259 /* Macros for loops that visit blocks in source-code order */
3260
3261 #define nir_foreach_block(block, impl) \
3262 for (nir_block *block = nir_start_block(impl); block != NULL; \
3263 block = nir_block_cf_tree_next(block))
3264
3265 #define nir_foreach_block_safe(block, impl) \
3266 for (nir_block *block = nir_start_block(impl), \
3267 *next = nir_block_cf_tree_next(block); \
3268 block != NULL; \
3269 block = next, next = nir_block_cf_tree_next(block))
3270
3271 #define nir_foreach_block_reverse(block, impl) \
3272 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3273 block = nir_block_cf_tree_prev(block))
3274
3275 #define nir_foreach_block_reverse_safe(block, impl) \
3276 for (nir_block *block = nir_impl_last_block(impl), \
3277 *prev = nir_block_cf_tree_prev(block); \
3278 block != NULL; \
3279 block = prev, prev = nir_block_cf_tree_prev(block))
3280
3281 #define nir_foreach_block_in_cf_node(block, node) \
3282 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3283 block != nir_cf_node_cf_tree_next(node); \
3284 block = nir_block_cf_tree_next(block))
3285
3286 /* If the following CF node is an if, this function returns that if.
3287 * Otherwise, it returns NULL.
3288 */
3289 nir_if *nir_block_get_following_if(nir_block *block);
3290
3291 nir_loop *nir_block_get_following_loop(nir_block *block);
3292
3293 void nir_index_local_regs(nir_function_impl *impl);
3294 void nir_index_ssa_defs(nir_function_impl *impl);
3295 unsigned nir_index_instrs(nir_function_impl *impl);
3296
3297 void nir_index_blocks(nir_function_impl *impl);
3298
3299 void nir_print_shader(nir_shader *shader, FILE *fp);
3300 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3301 void nir_print_instr(const nir_instr *instr, FILE *fp);
3302 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3303
3304 /** Shallow clone of a single ALU instruction. */
3305 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3306
3307 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3308 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3309 const nir_function_impl *fi);
3310 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3311 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3312
3313 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3314
3315 void nir_shader_serialize_deserialize(nir_shader *s);
3316
3317 #ifndef NDEBUG
3318 void nir_validate_shader(nir_shader *shader, const char *when);
3319 void nir_metadata_set_validation_flag(nir_shader *shader);
3320 void nir_metadata_check_validation_flag(nir_shader *shader);
3321
3322 static inline bool
3323 should_skip_nir(const char *name)
3324 {
3325 static const char *list = NULL;
3326 if (!list) {
3327 /* Comma separated list of names to skip. */
3328 list = getenv("NIR_SKIP");
3329 if (!list)
3330 list = "";
3331 }
3332
3333 if (!list[0])
3334 return false;
3335
3336 return comma_separated_list_contains(list, name);
3337 }
3338
3339 static inline bool
3340 should_clone_nir(void)
3341 {
3342 static int should_clone = -1;
3343 if (should_clone < 0)
3344 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3345
3346 return should_clone;
3347 }
3348
3349 static inline bool
3350 should_serialize_deserialize_nir(void)
3351 {
3352 static int test_serialize = -1;
3353 if (test_serialize < 0)
3354 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3355
3356 return test_serialize;
3357 }
3358
3359 static inline bool
3360 should_print_nir(void)
3361 {
3362 static int should_print = -1;
3363 if (should_print < 0)
3364 should_print = env_var_as_boolean("NIR_PRINT", false);
3365
3366 return should_print;
3367 }
3368 #else
3369 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3370 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3371 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3372 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3373 static inline bool should_clone_nir(void) { return false; }
3374 static inline bool should_serialize_deserialize_nir(void) { return false; }
3375 static inline bool should_print_nir(void) { return false; }
3376 #endif /* NDEBUG */
3377
3378 #define _PASS(pass, nir, do_pass) do { \
3379 if (should_skip_nir(#pass)) { \
3380 printf("skipping %s\n", #pass); \
3381 break; \
3382 } \
3383 do_pass \
3384 nir_validate_shader(nir, "after " #pass); \
3385 if (should_clone_nir()) { \
3386 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3387 nir_shader_replace(nir, clone); \
3388 } \
3389 if (should_serialize_deserialize_nir()) { \
3390 nir_shader_serialize_deserialize(nir); \
3391 } \
3392 } while (0)
3393
3394 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3395 nir_metadata_set_validation_flag(nir); \
3396 if (should_print_nir()) \
3397 printf("%s\n", #pass); \
3398 if (pass(nir, ##__VA_ARGS__)) { \
3399 progress = true; \
3400 if (should_print_nir()) \
3401 nir_print_shader(nir, stdout); \
3402 nir_metadata_check_validation_flag(nir); \
3403 } \
3404 )
3405
3406 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3407 if (should_print_nir()) \
3408 printf("%s\n", #pass); \
3409 pass(nir, ##__VA_ARGS__); \
3410 if (should_print_nir()) \
3411 nir_print_shader(nir, stdout); \
3412 )
3413
3414 #define NIR_SKIP(name) should_skip_nir(#name)
3415
3416 /** An instruction filtering callback
3417 *
3418 * Returns true if the instruction should be processed and false otherwise.
3419 */
3420 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3421
3422 /** A simple instruction lowering callback
3423 *
3424 * Many instruction lowering passes can be written as a simple function which
3425 * takes an instruction as its input and returns a sequence of instructions
3426 * that implement the consumed instruction. This function type represents
3427 * such a lowering function. When called, a function with this prototype
3428 * should either return NULL indicating that no lowering needs to be done or
3429 * emit a sequence of instructions using the provided builder (whose cursor
3430 * will already be placed after the instruction to be lowered) and return the
3431 * resulting nir_ssa_def.
3432 */
3433 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3434 nir_instr *, void *);
3435
3436 /**
3437 * Special return value for nir_lower_instr_cb when some progress occurred
3438 * (like changing an input to the instr) that didn't result in a replacement
3439 * SSA def being generated.
3440 */
3441 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3442
3443 /** Iterate over all the instructions in a nir_function_impl and lower them
3444 * using the provided callbacks
3445 *
3446 * This function implements the guts of a standard lowering pass for you. It
3447 * iterates over all of the instructions in a nir_function_impl and calls the
3448 * filter callback on each one. If the filter callback returns true, it then
3449 * calls the lowering call back on the instruction. (Splitting it this way
3450 * allows us to avoid some save/restore work for instructions we know won't be
3451 * lowered.) If the instruction is dead after the lowering is complete, it
3452 * will be removed. If new instructions are added, the lowering callback will
3453 * also be called on them in case multiple lowerings are required.
3454 *
3455 * The metadata for the nir_function_impl will also be updated. If any blocks
3456 * are added (they cannot be removed), dominance and block indices will be
3457 * invalidated.
3458 */
3459 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3460 nir_instr_filter_cb filter,
3461 nir_lower_instr_cb lower,
3462 void *cb_data);
3463 bool nir_shader_lower_instructions(nir_shader *shader,
3464 nir_instr_filter_cb filter,
3465 nir_lower_instr_cb lower,
3466 void *cb_data);
3467
3468 void nir_calc_dominance_impl(nir_function_impl *impl);
3469 void nir_calc_dominance(nir_shader *shader);
3470
3471 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3472 bool nir_block_dominates(nir_block *parent, nir_block *child);
3473 bool nir_block_is_unreachable(nir_block *block);
3474
3475 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3476 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3477
3478 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3479 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3480
3481 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3482 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3483
3484 int nir_gs_count_vertices(const nir_shader *shader);
3485
3486 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3487 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3488 bool nir_split_var_copies(nir_shader *shader);
3489 bool nir_split_per_member_structs(nir_shader *shader);
3490 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3491
3492 bool nir_lower_returns_impl(nir_function_impl *impl);
3493 bool nir_lower_returns(nir_shader *shader);
3494
3495 void nir_inline_function_impl(struct nir_builder *b,
3496 const nir_function_impl *impl,
3497 nir_ssa_def **params);
3498 bool nir_inline_functions(nir_shader *shader);
3499
3500 bool nir_propagate_invariant(nir_shader *shader);
3501
3502 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3503 void nir_lower_deref_copy_instr(struct nir_builder *b,
3504 nir_intrinsic_instr *copy);
3505 bool nir_lower_var_copies(nir_shader *shader);
3506
3507 void nir_fixup_deref_modes(nir_shader *shader);
3508
3509 bool nir_lower_global_vars_to_local(nir_shader *shader);
3510
3511 typedef enum {
3512 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3513 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3514 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3515 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3516 } nir_lower_array_deref_of_vec_options;
3517
3518 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3519 nir_lower_array_deref_of_vec_options options);
3520
3521 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3522
3523 bool nir_lower_locals_to_regs(nir_shader *shader);
3524
3525 void nir_lower_io_to_temporaries(nir_shader *shader,
3526 nir_function_impl *entrypoint,
3527 bool outputs, bool inputs);
3528
3529 bool nir_lower_vars_to_scratch(nir_shader *shader,
3530 nir_variable_mode modes,
3531 int size_threshold,
3532 glsl_type_size_align_func size_align);
3533
3534 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3535
3536 void nir_gather_ssa_types(nir_function_impl *impl,
3537 BITSET_WORD *float_types,
3538 BITSET_WORD *int_types);
3539
3540 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3541 int (*type_size)(const struct glsl_type *, bool));
3542
3543 /* Some helpers to do very simple linking */
3544 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3545 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3546 uint64_t *used_by_other_stage,
3547 uint64_t *used_by_other_stage_patches);
3548 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3549 bool default_to_smooth_interp);
3550 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3551 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3552
3553 bool nir_lower_amul(nir_shader *shader,
3554 int (*type_size)(const struct glsl_type *, bool));
3555
3556 void nir_assign_io_var_locations(struct exec_list *var_list,
3557 unsigned *size,
3558 gl_shader_stage stage);
3559
3560 typedef enum {
3561 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3562 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3563 * modes.
3564 */
3565 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3566
3567 /* If set, this forces all non-flat fragment shader inputs to be
3568 * interpolated as if with the "sample" qualifier. This requires
3569 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3570 */
3571 nir_lower_io_force_sample_interpolation = (1 << 1),
3572 } nir_lower_io_options;
3573 bool nir_lower_io(nir_shader *shader,
3574 nir_variable_mode modes,
3575 int (*type_size)(const struct glsl_type *, bool),
3576 nir_lower_io_options);
3577
3578 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3579
3580 bool
3581 nir_lower_vars_to_explicit_types(nir_shader *shader,
3582 nir_variable_mode modes,
3583 glsl_type_size_align_func type_info);
3584
3585 typedef enum {
3586 /**
3587 * An address format which is a simple 32-bit global GPU address.
3588 */
3589 nir_address_format_32bit_global,
3590
3591 /**
3592 * An address format which is a simple 64-bit global GPU address.
3593 */
3594 nir_address_format_64bit_global,
3595
3596 /**
3597 * An address format which is a bounds-checked 64-bit global GPU address.
3598 *
3599 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3600 * address stored with the low bits in .x and high bits in .y, .z is a
3601 * size, and .w is an offset. When the final I/O operation is lowered, .w
3602 * is checked against .z and the operation is predicated on the result.
3603 */
3604 nir_address_format_64bit_bounded_global,
3605
3606 /**
3607 * An address format which is comprised of a vec2 where the first
3608 * component is a buffer index and the second is an offset.
3609 */
3610 nir_address_format_32bit_index_offset,
3611
3612 /**
3613 * An address format which is a simple 32-bit offset.
3614 */
3615 nir_address_format_32bit_offset,
3616
3617 /**
3618 * An address format representing a purely logical addressing model. In
3619 * this model, all deref chains must be complete from the dereference
3620 * operation to the variable. Cast derefs are not allowed. These
3621 * addresses will be 32-bit scalars but the format is immaterial because
3622 * you can always chase the chain.
3623 */
3624 nir_address_format_logical,
3625 } nir_address_format;
3626
3627 static inline unsigned
3628 nir_address_format_bit_size(nir_address_format addr_format)
3629 {
3630 switch (addr_format) {
3631 case nir_address_format_32bit_global: return 32;
3632 case nir_address_format_64bit_global: return 64;
3633 case nir_address_format_64bit_bounded_global: return 32;
3634 case nir_address_format_32bit_index_offset: return 32;
3635 case nir_address_format_32bit_offset: return 32;
3636 case nir_address_format_logical: return 32;
3637 }
3638 unreachable("Invalid address format");
3639 }
3640
3641 static inline unsigned
3642 nir_address_format_num_components(nir_address_format addr_format)
3643 {
3644 switch (addr_format) {
3645 case nir_address_format_32bit_global: return 1;
3646 case nir_address_format_64bit_global: return 1;
3647 case nir_address_format_64bit_bounded_global: return 4;
3648 case nir_address_format_32bit_index_offset: return 2;
3649 case nir_address_format_32bit_offset: return 1;
3650 case nir_address_format_logical: return 1;
3651 }
3652 unreachable("Invalid address format");
3653 }
3654
3655 static inline const struct glsl_type *
3656 nir_address_format_to_glsl_type(nir_address_format addr_format)
3657 {
3658 unsigned bit_size = nir_address_format_bit_size(addr_format);
3659 assert(bit_size == 32 || bit_size == 64);
3660 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3661 nir_address_format_num_components(addr_format));
3662 }
3663
3664 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3665
3666 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3667 nir_address_format addr_format);
3668
3669 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3670 nir_address_format addr_format);
3671
3672 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3673 nir_deref_instr *deref,
3674 nir_ssa_def *base_addr,
3675 nir_address_format addr_format);
3676 void nir_lower_explicit_io_instr(struct nir_builder *b,
3677 nir_intrinsic_instr *io_instr,
3678 nir_ssa_def *addr,
3679 nir_address_format addr_format);
3680
3681 bool nir_lower_explicit_io(nir_shader *shader,
3682 nir_variable_mode modes,
3683 nir_address_format);
3684
3685 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3686 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3687
3688 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3689
3690 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3691 bool nir_lower_regs_to_ssa(nir_shader *shader);
3692 bool nir_lower_vars_to_ssa(nir_shader *shader);
3693
3694 bool nir_remove_dead_derefs(nir_shader *shader);
3695 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3696 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3697 bool nir_lower_constant_initializers(nir_shader *shader,
3698 nir_variable_mode modes);
3699
3700 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3701 bool nir_lower_vec_to_movs(nir_shader *shader);
3702 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3703 bool alpha_to_one,
3704 const gl_state_index16 *alpha_ref_state_tokens);
3705 bool nir_lower_alu(nir_shader *shader);
3706
3707 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3708 bool always_precise, bool have_ffma);
3709
3710 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3711 bool nir_lower_bool_to_float(nir_shader *shader);
3712 bool nir_lower_bool_to_int32(nir_shader *shader);
3713 bool nir_lower_int_to_float(nir_shader *shader);
3714 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3715 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3716 bool nir_lower_phis_to_scalar(nir_shader *shader);
3717 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3718 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3719 bool outputs_only);
3720 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3721 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3722 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3723
3724 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3725 void nir_lower_viewport_transform(nir_shader *shader);
3726 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3727
3728 typedef struct nir_lower_subgroups_options {
3729 uint8_t subgroup_size;
3730 uint8_t ballot_bit_size;
3731 bool lower_to_scalar:1;
3732 bool lower_vote_trivial:1;
3733 bool lower_vote_eq_to_ballot:1;
3734 bool lower_subgroup_masks:1;
3735 bool lower_shuffle:1;
3736 bool lower_shuffle_to_32bit:1;
3737 bool lower_quad:1;
3738 } nir_lower_subgroups_options;
3739
3740 bool nir_lower_subgroups(nir_shader *shader,
3741 const nir_lower_subgroups_options *options);
3742
3743 bool nir_lower_system_values(nir_shader *shader);
3744
3745 enum PACKED nir_lower_tex_packing {
3746 nir_lower_tex_packing_none = 0,
3747 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3748 * or unsigned ints based on the sampler type
3749 */
3750 nir_lower_tex_packing_16,
3751 /* The sampler returns 1 32-bit word of 4x8 unorm */
3752 nir_lower_tex_packing_8,
3753 };
3754
3755 typedef struct nir_lower_tex_options {
3756 /**
3757 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3758 * sampler types a texture projector is lowered.
3759 */
3760 unsigned lower_txp;
3761
3762 /**
3763 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3764 */
3765 bool lower_txf_offset;
3766
3767 /**
3768 * If true, lower away nir_tex_src_offset for all rect textures.
3769 */
3770 bool lower_rect_offset;
3771
3772 /**
3773 * If true, lower rect textures to 2D, using txs to fetch the
3774 * texture dimensions and dividing the texture coords by the
3775 * texture dims to normalize.
3776 */
3777 bool lower_rect;
3778
3779 /**
3780 * If true, convert yuv to rgb.
3781 */
3782 unsigned lower_y_uv_external;
3783 unsigned lower_y_u_v_external;
3784 unsigned lower_yx_xuxv_external;
3785 unsigned lower_xy_uxvx_external;
3786 unsigned lower_ayuv_external;
3787 unsigned lower_xyuv_external;
3788
3789 /**
3790 * To emulate certain texture wrap modes, this can be used
3791 * to saturate the specified tex coord to [0.0, 1.0]. The
3792 * bits are according to sampler #, ie. if, for example:
3793 *
3794 * (conf->saturate_s & (1 << n))
3795 *
3796 * is true, then the s coord for sampler n is saturated.
3797 *
3798 * Note that clamping must happen *after* projector lowering
3799 * so any projected texture sample instruction with a clamped
3800 * coordinate gets automatically lowered, regardless of the
3801 * 'lower_txp' setting.
3802 */
3803 unsigned saturate_s;
3804 unsigned saturate_t;
3805 unsigned saturate_r;
3806
3807 /* Bitmask of textures that need swizzling.
3808 *
3809 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3810 * swizzles[texture_index] is applied to the result of the texturing
3811 * operation.
3812 */
3813 unsigned swizzle_result;
3814
3815 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3816 * while 4 and 5 represent 0 and 1 respectively.
3817 */
3818 uint8_t swizzles[32][4];
3819
3820 /* Can be used to scale sampled values in range required by the format. */
3821 float scale_factors[32];
3822
3823 /**
3824 * Bitmap of textures that need srgb to linear conversion. If
3825 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3826 * of the texture are lowered to linear.
3827 */
3828 unsigned lower_srgb;
3829
3830 /**
3831 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3832 * LODs to nir_texop_txl.
3833 */
3834 bool lower_tex_without_implicit_lod;
3835
3836 /**
3837 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3838 */
3839 bool lower_txd_cube_map;
3840
3841 /**
3842 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3843 */
3844 bool lower_txd_3d;
3845
3846 /**
3847 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3848 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3849 * with lower_txd_cube_map.
3850 */
3851 bool lower_txd_shadow;
3852
3853 /**
3854 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3855 * Implies lower_txd_cube_map and lower_txd_shadow.
3856 */
3857 bool lower_txd;
3858
3859 /**
3860 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3861 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3862 */
3863 bool lower_txb_shadow_clamp;
3864
3865 /**
3866 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3867 * with nir_texop_txl. This includes cube maps.
3868 */
3869 bool lower_txd_shadow_clamp;
3870
3871 /**
3872 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3873 * with nir_texop_txl. This includes cube maps.
3874 */
3875 bool lower_txd_offset_clamp;
3876
3877 /**
3878 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3879 * sampler is bindless.
3880 */
3881 bool lower_txd_clamp_bindless_sampler;
3882
3883 /**
3884 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3885 * sampler index is not statically determinable to be less than 16.
3886 */
3887 bool lower_txd_clamp_if_sampler_index_not_lt_16;
3888
3889 /**
3890 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3891 * 0-lod followed by a nir_ishr.
3892 */
3893 bool lower_txs_lod;
3894
3895 /**
3896 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3897 * mixed-up tg4 locations.
3898 */
3899 bool lower_tg4_broadcom_swizzle;
3900
3901 /**
3902 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3903 */
3904 bool lower_tg4_offsets;
3905
3906 enum nir_lower_tex_packing lower_tex_packing[32];
3907 } nir_lower_tex_options;
3908
3909 bool nir_lower_tex(nir_shader *shader,
3910 const nir_lower_tex_options *options);
3911
3912 enum nir_lower_non_uniform_access_type {
3913 nir_lower_non_uniform_ubo_access = (1 << 0),
3914 nir_lower_non_uniform_ssbo_access = (1 << 1),
3915 nir_lower_non_uniform_texture_access = (1 << 2),
3916 nir_lower_non_uniform_image_access = (1 << 3),
3917 };
3918
3919 bool nir_lower_non_uniform_access(nir_shader *shader,
3920 enum nir_lower_non_uniform_access_type);
3921
3922 enum nir_lower_idiv_path {
3923 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
3924 * the two but it is not exact in some cases (for example, 1091317713u /
3925 * 1034u gives 5209173 instead of 1055432) */
3926 nir_lower_idiv_fast,
3927 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
3928 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
3929 * the nv50 path and many of them are integer multiplications, so it is
3930 * probably slower. It should always return the correct result, though. */
3931 nir_lower_idiv_precise,
3932 };
3933
3934 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
3935
3936 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
3937
3938 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
3939 bool use_vars,
3940 bool use_clipdist_array,
3941 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3942 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
3943 bool use_clipdist_array,
3944 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3945 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
3946 bool use_clipdist_array);
3947 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
3948
3949 void nir_lower_point_size_mov(nir_shader *shader,
3950 const gl_state_index16 *pointsize_state_tokens);
3951
3952 bool nir_lower_frexp(nir_shader *nir);
3953
3954 void nir_lower_two_sided_color(nir_shader *shader);
3955
3956 bool nir_lower_clamp_color_outputs(nir_shader *shader);
3957
3958 bool nir_lower_flatshade(nir_shader *shader);
3959
3960 void nir_lower_passthrough_edgeflags(nir_shader *shader);
3961 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
3962 const gl_state_index16 *uniform_state_tokens);
3963
3964 typedef struct nir_lower_wpos_ytransform_options {
3965 gl_state_index16 state_tokens[STATE_LENGTH];
3966 bool fs_coord_origin_upper_left :1;
3967 bool fs_coord_origin_lower_left :1;
3968 bool fs_coord_pixel_center_integer :1;
3969 bool fs_coord_pixel_center_half_integer :1;
3970 } nir_lower_wpos_ytransform_options;
3971
3972 bool nir_lower_wpos_ytransform(nir_shader *shader,
3973 const nir_lower_wpos_ytransform_options *options);
3974 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
3975
3976 bool nir_lower_fb_read(nir_shader *shader);
3977
3978 typedef struct nir_lower_drawpixels_options {
3979 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
3980 gl_state_index16 scale_state_tokens[STATE_LENGTH];
3981 gl_state_index16 bias_state_tokens[STATE_LENGTH];
3982 unsigned drawpix_sampler;
3983 unsigned pixelmap_sampler;
3984 bool pixel_maps :1;
3985 bool scale_and_bias :1;
3986 } nir_lower_drawpixels_options;
3987
3988 void nir_lower_drawpixels(nir_shader *shader,
3989 const nir_lower_drawpixels_options *options);
3990
3991 typedef struct nir_lower_bitmap_options {
3992 unsigned sampler;
3993 bool swizzle_xxxx;
3994 } nir_lower_bitmap_options;
3995
3996 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
3997
3998 bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
3999
4000 typedef enum {
4001 nir_lower_int_source_mods = 1 << 0,
4002 nir_lower_float_source_mods = 1 << 1,
4003 nir_lower_triop_abs = 1 << 2,
4004 nir_lower_all_source_mods = (1 << 3) - 1
4005 } nir_lower_to_source_mods_flags;
4006
4007
4008 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4009
4010 bool nir_lower_gs_intrinsics(nir_shader *shader);
4011
4012 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4013
4014 bool nir_lower_bit_size(nir_shader *shader,
4015 nir_lower_bit_size_callback callback,
4016 void *callback_data);
4017
4018 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4019 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4020
4021 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4022 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4023 nir_lower_doubles_options options);
4024 bool nir_lower_pack(nir_shader *shader);
4025
4026 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4027
4028 typedef enum {
4029 nir_lower_interpolation_at_sample = (1 << 1),
4030 nir_lower_interpolation_at_offset = (1 << 2),
4031 nir_lower_interpolation_centroid = (1 << 3),
4032 nir_lower_interpolation_pixel = (1 << 4),
4033 nir_lower_interpolation_sample = (1 << 5),
4034 } nir_lower_interpolation_options;
4035
4036 bool nir_lower_interpolation(nir_shader *shader,
4037 nir_lower_interpolation_options options);
4038
4039 bool nir_normalize_cubemap_coords(nir_shader *shader);
4040
4041 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4042
4043 void nir_loop_analyze_impl(nir_function_impl *impl,
4044 nir_variable_mode indirect_mask);
4045
4046 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4047
4048 bool nir_repair_ssa_impl(nir_function_impl *impl);
4049 bool nir_repair_ssa(nir_shader *shader);
4050
4051 void nir_convert_loop_to_lcssa(nir_loop *loop);
4052 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4053 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4054
4055 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4056 * registers. If false, convert all values (even those not involved in a phi
4057 * node) to registers.
4058 */
4059 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4060
4061 bool nir_lower_phis_to_regs_block(nir_block *block);
4062 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4063 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4064
4065 bool nir_lower_samplers(nir_shader *shader);
4066
4067 /* This is here for unit tests. */
4068 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4069
4070 bool nir_opt_comparison_pre(nir_shader *shader);
4071
4072 bool nir_opt_access(nir_shader *shader);
4073 bool nir_opt_algebraic(nir_shader *shader);
4074 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4075 bool nir_opt_algebraic_late(nir_shader *shader);
4076 bool nir_opt_constant_folding(nir_shader *shader);
4077
4078 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4079
4080 bool nir_copy_prop(nir_shader *shader);
4081
4082 bool nir_opt_copy_prop_vars(nir_shader *shader);
4083
4084 bool nir_opt_cse(nir_shader *shader);
4085
4086 bool nir_opt_dce(nir_shader *shader);
4087
4088 bool nir_opt_dead_cf(nir_shader *shader);
4089
4090 bool nir_opt_dead_write_vars(nir_shader *shader);
4091
4092 bool nir_opt_deref_impl(nir_function_impl *impl);
4093 bool nir_opt_deref(nir_shader *shader);
4094
4095 bool nir_opt_find_array_copies(nir_shader *shader);
4096
4097 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4098
4099 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4100
4101 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4102
4103 bool nir_opt_intrinsics(nir_shader *shader);
4104
4105 bool nir_opt_large_constants(nir_shader *shader,
4106 glsl_type_size_align_func size_align,
4107 unsigned threshold);
4108
4109 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4110
4111 typedef enum {
4112 nir_move_const_undef = (1 << 0),
4113 nir_move_load_ubo = (1 << 1),
4114 nir_move_load_input = (1 << 2),
4115 nir_move_comparisons = (1 << 3),
4116 } nir_move_options;
4117
4118 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4119
4120 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4121
4122 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4123
4124 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4125 bool indirect_load_ok, bool expensive_alu_ok);
4126
4127 bool nir_opt_rematerialize_compares(nir_shader *shader);
4128
4129 bool nir_opt_remove_phis(nir_shader *shader);
4130 bool nir_opt_remove_phis_block(nir_block *block);
4131
4132 bool nir_opt_shrink_load(nir_shader *shader);
4133
4134 bool nir_opt_trivial_continues(nir_shader *shader);
4135
4136 bool nir_opt_undef(nir_shader *shader);
4137
4138 bool nir_opt_vectorize(nir_shader *shader);
4139
4140 bool nir_opt_conditional_discard(nir_shader *shader);
4141
4142 void nir_strip(nir_shader *shader);
4143
4144 void nir_sweep(nir_shader *shader);
4145
4146 void nir_remap_dual_slot_attributes(nir_shader *shader,
4147 uint64_t *dual_slot_inputs);
4148 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4149
4150 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4151 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4152
4153 static inline bool
4154 nir_variable_is_in_ubo(const nir_variable *var)
4155 {
4156 return (var->data.mode == nir_var_mem_ubo &&
4157 var->interface_type != NULL);
4158 }
4159
4160 static inline bool
4161 nir_variable_is_in_ssbo(const nir_variable *var)
4162 {
4163 return (var->data.mode == nir_var_mem_ssbo &&
4164 var->interface_type != NULL);
4165 }
4166
4167 static inline bool
4168 nir_variable_is_in_block(const nir_variable *var)
4169 {
4170 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4171 }
4172
4173 #ifdef __cplusplus
4174 } /* extern "C" */
4175 #endif
4176
4177 #endif /* NIR_H */