2 * Copyright © 2014 Connor Abbott
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
47 #include "util/debug.h"
50 #include "nir_opcodes.h"
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t
;
68 nir_num_components_valid(unsigned num_components
)
70 return (num_components
>= 1 &&
71 num_components
<= 4) ||
72 num_components
== 8 ||
76 /** Defines a cast function
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
81 * Note that you have to be a bit careful as the generated cast function
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
100 * Description of built-in state associated with a uniform
102 * \sa nir_variable::state_slots
105 gl_state_index16 tokens
[STATE_LENGTH
];
110 nir_var_shader_in
= (1 << 0),
111 nir_var_shader_out
= (1 << 1),
112 nir_var_shader_temp
= (1 << 2),
113 nir_var_function_temp
= (1 << 3),
114 nir_var_uniform
= (1 << 4),
115 nir_var_mem_ubo
= (1 << 5),
116 nir_var_system_value
= (1 << 6),
117 nir_var_mem_ssbo
= (1 << 7),
118 nir_var_mem_shared
= (1 << 8),
119 nir_var_mem_global
= (1 << 9),
120 nir_var_mem_push_const
= (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes
= 11,
122 nir_var_all
= (1 << nir_num_variable_modes
) - 1,
129 nir_rounding_mode_undef
= 0,
130 nir_rounding_mode_rtne
= 1, /* round to nearest even */
131 nir_rounding_mode_ru
= 2, /* round up */
132 nir_rounding_mode_rd
= 3, /* round down */
133 nir_rounding_mode_rtz
= 4, /* round towards zero */
150 #define nir_const_value_to_array(arr, c, components, m) \
152 for (unsigned i = 0; i < components; ++i) \
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x
, unsigned bit_size
)
160 memset(&v
, 0, sizeof(v
));
163 case 1: v
.b
= x
; break;
164 case 8: v
.u8
= x
; break;
165 case 16: v
.u16
= x
; break;
166 case 32: v
.u32
= x
; break;
167 case 64: v
.u64
= x
; break;
169 unreachable("Invalid bit size");
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i
, unsigned bit_size
)
179 memset(&v
, 0, sizeof(v
));
181 assert(bit_size
<= 64);
183 assert(i
>= (-(1ll << (bit_size
- 1))));
184 assert(i
< (1ll << (bit_size
- 1)));
187 return nir_const_value_for_raw_uint(i
, bit_size
);
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u
, unsigned bit_size
)
194 memset(&v
, 0, sizeof(v
));
196 assert(bit_size
<= 64);
198 assert(u
< (1ull << bit_size
));
200 return nir_const_value_for_raw_uint(u
, bit_size
);
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b
, unsigned bit_size
)
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b
, bit_size
);
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value
nir_const_value_for_float(double b
, unsigned bit_size
);
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value
, unsigned bit_size
)
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value
.b
;
219 case 8: return value
.i8
;
220 case 16: return value
.i16
;
221 case 32: return value
.i32
;
222 case 64: return value
.i64
;
224 unreachable("Invalid bit size");
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value
, unsigned bit_size
)
232 case 1: return value
.b
;
233 case 8: return value
.u8
;
234 case 16: return value
.u16
;
235 case 32: return value
.u32
;
236 case 64: return value
.u64
;
238 unreachable("Invalid bit size");
243 nir_const_value_as_bool(nir_const_value value
, unsigned bit_size
)
245 int64_t i
= nir_const_value_as_int(value
, bit_size
);
247 /* Booleans of any size use 0/-1 convention */
248 assert(i
== 0 || i
== -1);
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value
, unsigned bit_size
);
256 typedef struct nir_constant
{
258 * Value of the constant.
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
264 nir_const_value values
[NIR_MAX_VEC_COMPONENTS
];
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
269 unsigned num_elements
;
271 /* Array elements / Structure Fields */
272 struct nir_constant
**elements
;
276 * \brief Layout qualifiers for gl_FragDepth.
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
282 nir_depth_layout_none
, /**< No depth layout is specified. */
283 nir_depth_layout_any
,
284 nir_depth_layout_greater
,
285 nir_depth_layout_less
,
286 nir_depth_layout_unchanged
290 * Enum keeping track of how a variable was declared.
294 * Normal declaration.
296 nir_var_declared_normally
= 0,
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
303 } nir_var_declaration_type
;
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
310 typedef struct nir_variable
{
311 struct exec_node node
;
314 * Declared type of the variable
316 const struct glsl_type
*type
;
319 * Declared name of the variable
323 struct nir_variable_data
{
325 * Storage class of the variable.
327 * \sa nir_variable_mode
329 nir_variable_mode mode
:11;
332 * Is the variable read-only?
334 * This is set for variables declared as \c const, shader inputs,
337 unsigned read_only
:1;
341 unsigned invariant
:1;
344 * Precision qualifier.
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
354 unsigned precision
:2;
357 * Can this variable be coalesced with another?
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
365 unsigned cannot_coalesce
:1;
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
375 unsigned always_active_io
:1;
378 * Interpolation mode for shader inputs / outputs
380 * \sa glsl_interp_mode
382 unsigned interpolation
:3;
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
391 unsigned location_frac
:2;
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
405 unsigned fb_fetch_output
:1;
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
414 * Was an explicit binding set in the shader?
416 unsigned explicit_binding
:1;
419 * Was the location explicitly set in the shader?
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
425 unsigned explicit_location
:1;
428 * Was a transfer feedback buffer set in the shader?
430 unsigned explicit_xfb_buffer
:1;
433 * Was a transfer feedback stride set in the shader?
435 unsigned explicit_xfb_stride
:1;
438 * Was an explicit offset set in the shader?
440 unsigned explicit_offset
:1;
443 * Layout of the matrix. Uses glsl_matrix_layout values.
445 unsigned matrix_layout
:2;
448 * Non-zero if this variable was created by lowering a named interface
451 unsigned from_named_ifc_block
:1;
454 * How the variable was declared. See nir_var_declaration_type.
456 * This is used to detect variables generated by the compiler, so should
457 * not be visible via the API.
459 unsigned how_declared
:2;
462 * Is this variable per-view? If so, we know it must be an array with
463 * size corresponding to the number of views.
468 * \brief Layout qualifier for gl_FragDepth.
470 * This is not equal to \c ir_depth_layout_none if and only if this
471 * variable is \c gl_FragDepth and a layout qualifier is specified.
473 nir_depth_layout depth_layout
:3;
476 * Vertex stream output identifier.
478 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
479 * indicate the stream of the i-th component.
484 * Access flags for memory variables (SSBO/global), image uniforms, and
485 * bindless images in uniforms/inputs/outputs.
487 enum gl_access_qualifier access
:8;
490 * Descriptor set binding for sampler or UBO.
492 unsigned descriptor_set
:5;
495 * output index for dual source blending.
500 * Initial binding point for a sampler or UBO.
502 * For array types, this represents the binding point for the first element.
507 * Storage location of the base of this variable
509 * The precise meaning of this field depends on the nature of the variable.
511 * - Vertex shader input: one of the values from \c gl_vert_attrib.
512 * - Vertex shader output: one of the values from \c gl_varying_slot.
513 * - Geometry shader input: one of the values from \c gl_varying_slot.
514 * - Geometry shader output: one of the values from \c gl_varying_slot.
515 * - Fragment shader input: one of the values from \c gl_varying_slot.
516 * - Fragment shader output: one of the values from \c gl_frag_result.
517 * - Uniforms: Per-stage uniform slot number for default uniform block.
518 * - Uniforms: Index within the uniform block definition for UBO members.
519 * - Non-UBO Uniforms: uniform slot number.
520 * - Other: This field is not currently used.
522 * If the variable is a uniform, shader input, or shader output, and the
523 * slot has not been assigned, the value will be -1.
528 * The actual location of the variable in the IR. Only valid for inputs,
529 * outputs, and uniforms (including samplers and images).
531 unsigned driver_location
;
534 * Location an atomic counter or transform feedback is stored at.
540 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
541 enum pipe_format format
;
546 * Transform feedback buffer.
551 * Transform feedback stride.
559 * Identifier for this variable generated by nir_index_vars() that is unique
560 * among other variables in the same exec_list.
564 /* Number of nir_variable_data members */
565 uint16_t num_members
;
568 * Built-in state that backs this uniform
570 * Once set at variable creation, \c state_slots must remain invariant.
571 * This is because, ideally, this array would be shared by all clones of
572 * this variable in the IR tree. In other words, we'd really like for it
573 * to be a fly-weight.
575 * If the variable is not a uniform, \c num_state_slots will be zero and
576 * \c state_slots will be \c NULL.
579 uint16_t num_state_slots
; /**< Number of state slots used */
580 nir_state_slot
*state_slots
; /**< State descriptors. */
584 * Constant expression assigned in the initializer of the variable
586 * This field should only be used temporarily by creators of NIR shaders
587 * and then lower_constant_initializers can be used to get rid of them.
588 * Most of the rest of NIR ignores this field or asserts that it's NULL.
590 nir_constant
*constant_initializer
;
593 * Global variable assigned in the initializer of the variable
594 * This field should only be used temporarily by creators of NIR shaders
595 * and then lower_constant_initializers can be used to get rid of them.
596 * Most of the rest of NIR ignores this field or asserts that it's NULL.
598 struct nir_variable
*pointer_initializer
;
601 * For variables that are in an interface block or are an instance of an
602 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
604 * \sa ir_variable::location
606 const struct glsl_type
*interface_type
;
609 * Description of per-member data for per-member struct variables
611 * This is used for variables which are actually an amalgamation of
612 * multiple entities such as a struct of built-in values or a struct of
613 * inputs each with their own layout specifier. This is only allowed on
614 * variables with a struct or array of array of struct type.
616 struct nir_variable_data
*members
;
619 #define nir_foreach_variable(var, var_list) \
620 foreach_list_typed(nir_variable, var, node, var_list)
622 #define nir_foreach_variable_safe(var, var_list) \
623 foreach_list_typed_safe(nir_variable, var, node, var_list)
626 nir_variable_is_global(const nir_variable
*var
)
628 return var
->data
.mode
!= nir_var_function_temp
;
631 typedef struct nir_register
{
632 struct exec_node node
;
634 unsigned num_components
; /** < number of vector components */
635 unsigned num_array_elems
; /** < size of array (0 for no array) */
637 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
640 /** generic register index. */
643 /** only for debug purposes, can be NULL */
646 /** set of nir_srcs where this register is used (read from) */
647 struct list_head uses
;
649 /** set of nir_dests where this register is defined (written to) */
650 struct list_head defs
;
652 /** set of nir_ifs where this register is used as a condition */
653 struct list_head if_uses
;
656 #define nir_foreach_register(reg, reg_list) \
657 foreach_list_typed(nir_register, reg, node, reg_list)
658 #define nir_foreach_register_safe(reg, reg_list) \
659 foreach_list_typed_safe(nir_register, reg, node, reg_list)
661 typedef enum PACKED
{
663 nir_instr_type_deref
,
666 nir_instr_type_intrinsic
,
667 nir_instr_type_load_const
,
669 nir_instr_type_ssa_undef
,
671 nir_instr_type_parallel_copy
,
674 typedef struct nir_instr
{
675 struct exec_node node
;
676 struct nir_block
*block
;
679 /* A temporary for optimization and analysis passes to use for storing
680 * flags. For instance, DCE uses this to store the "dead/live" info.
684 /** generic instruction index. */
688 static inline nir_instr
*
689 nir_instr_next(nir_instr
*instr
)
691 struct exec_node
*next
= exec_node_get_next(&instr
->node
);
692 if (exec_node_is_tail_sentinel(next
))
695 return exec_node_data(nir_instr
, next
, node
);
698 static inline nir_instr
*
699 nir_instr_prev(nir_instr
*instr
)
701 struct exec_node
*prev
= exec_node_get_prev(&instr
->node
);
702 if (exec_node_is_head_sentinel(prev
))
705 return exec_node_data(nir_instr
, prev
, node
);
709 nir_instr_is_first(const nir_instr
*instr
)
711 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr
->node
));
715 nir_instr_is_last(const nir_instr
*instr
)
717 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr
->node
));
720 typedef struct nir_ssa_def
{
721 /** for debugging only, can be NULL */
724 /** generic SSA definition index. */
727 /** Index into the live_in and live_out bitfields */
730 /** Instruction which produces this SSA value. */
731 nir_instr
*parent_instr
;
733 /** set of nir_instrs where this register is used (read from) */
734 struct list_head uses
;
736 /** set of nir_ifs where this register is used as a condition */
737 struct list_head if_uses
;
739 uint8_t num_components
;
741 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
745 * True if this SSA value may have different values in different SIMD
746 * invocations of the shader. This is set by nir_divergence_analysis.
755 struct nir_src
*indirect
; /** < NULL for no indirect offset */
756 unsigned base_offset
;
758 /* TODO use-def chain goes here */
762 nir_instr
*parent_instr
;
763 struct list_head def_link
;
766 struct nir_src
*indirect
; /** < NULL for no indirect offset */
767 unsigned base_offset
;
769 /* TODO def-use chain goes here */
774 typedef struct nir_src
{
776 /** Instruction that consumes this value as a source. */
777 nir_instr
*parent_instr
;
778 struct nir_if
*parent_if
;
781 struct list_head use_link
;
791 static inline nir_src
794 nir_src src
= { { NULL
} };
798 #define NIR_SRC_INIT nir_src_init()
800 #define nir_foreach_use(src, reg_or_ssa_def) \
801 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
803 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
804 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
806 #define nir_foreach_if_use(src, reg_or_ssa_def) \
807 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
809 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
810 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
821 static inline nir_dest
824 nir_dest dest
= { { { NULL
} } };
828 #define NIR_DEST_INIT nir_dest_init()
830 #define nir_foreach_def(dest, reg) \
831 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
833 #define nir_foreach_def_safe(dest, reg) \
834 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
836 static inline nir_src
837 nir_src_for_ssa(nir_ssa_def
*def
)
839 nir_src src
= NIR_SRC_INIT
;
847 static inline nir_src
848 nir_src_for_reg(nir_register
*reg
)
850 nir_src src
= NIR_SRC_INIT
;
854 src
.reg
.indirect
= NULL
;
855 src
.reg
.base_offset
= 0;
860 static inline nir_dest
861 nir_dest_for_reg(nir_register
*reg
)
863 nir_dest dest
= NIR_DEST_INIT
;
870 static inline unsigned
871 nir_src_bit_size(nir_src src
)
873 return src
.is_ssa
? src
.ssa
->bit_size
: src
.reg
.reg
->bit_size
;
876 static inline unsigned
877 nir_src_num_components(nir_src src
)
879 return src
.is_ssa
? src
.ssa
->num_components
: src
.reg
.reg
->num_components
;
883 nir_src_is_const(nir_src src
)
886 src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
;
890 nir_src_is_divergent(nir_src src
)
893 return src
.ssa
->divergent
;
896 static inline unsigned
897 nir_dest_bit_size(nir_dest dest
)
899 return dest
.is_ssa
? dest
.ssa
.bit_size
: dest
.reg
.reg
->bit_size
;
902 static inline unsigned
903 nir_dest_num_components(nir_dest dest
)
905 return dest
.is_ssa
? dest
.ssa
.num_components
: dest
.reg
.reg
->num_components
;
909 nir_dest_is_divergent(nir_dest dest
)
912 return dest
.ssa
.divergent
;
915 /* Are all components the same, ie. .xxxx */
917 nir_is_same_comp_swizzle(uint8_t *swiz
, unsigned nr_comp
)
919 for (unsigned i
= 1; i
< nr_comp
; i
++)
920 if (swiz
[i
] != swiz
[0])
925 /* Are all components sequential, ie. .yzw */
927 nir_is_sequential_comp_swizzle(uint8_t *swiz
, unsigned nr_comp
)
929 for (unsigned i
= 1; i
< nr_comp
; i
++)
930 if (swiz
[i
] != (swiz
[0] + i
))
935 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *instr_or_if
);
936 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
);
942 * \name input modifiers
946 * For inputs interpreted as floating point, flips the sign bit. For
947 * inputs interpreted as integers, performs the two's complement negation.
952 * Clears the sign bit for floating point values, and computes the integer
953 * absolute value for integers. Note that the negate modifier acts after
954 * the absolute value modifier, therefore if both are set then all inputs
955 * will become negative.
961 * For each input component, says which component of the register it is
962 * chosen from. Note that which elements of the swizzle are used and which
963 * are ignored are based on the write mask for most opcodes - for example,
964 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
965 * a swizzle of {2, x, 1, 0} where x means "don't care."
967 uint8_t swizzle
[NIR_MAX_VEC_COMPONENTS
];
974 * \name saturate output modifier
976 * Only valid for opcodes that output floating-point numbers. Clamps the
977 * output to between 0.0 and 1.0 inclusive.
982 unsigned write_mask
: NIR_MAX_VEC_COMPONENTS
; /* ignored if dest.is_ssa is true */
985 /** NIR sized and unsized types
987 * The values in this enum are carefully chosen so that the sized type is
988 * just the unsized type OR the number of bits.
990 typedef enum PACKED
{
991 nir_type_invalid
= 0, /* Not a valid type */
995 nir_type_float
= 128,
996 nir_type_bool1
= 1 | nir_type_bool
,
997 nir_type_bool8
= 8 | nir_type_bool
,
998 nir_type_bool16
= 16 | nir_type_bool
,
999 nir_type_bool32
= 32 | nir_type_bool
,
1000 nir_type_int1
= 1 | nir_type_int
,
1001 nir_type_int8
= 8 | nir_type_int
,
1002 nir_type_int16
= 16 | nir_type_int
,
1003 nir_type_int32
= 32 | nir_type_int
,
1004 nir_type_int64
= 64 | nir_type_int
,
1005 nir_type_uint1
= 1 | nir_type_uint
,
1006 nir_type_uint8
= 8 | nir_type_uint
,
1007 nir_type_uint16
= 16 | nir_type_uint
,
1008 nir_type_uint32
= 32 | nir_type_uint
,
1009 nir_type_uint64
= 64 | nir_type_uint
,
1010 nir_type_float16
= 16 | nir_type_float
,
1011 nir_type_float32
= 32 | nir_type_float
,
1012 nir_type_float64
= 64 | nir_type_float
,
1015 #define NIR_ALU_TYPE_SIZE_MASK 0x79
1016 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
1018 static inline unsigned
1019 nir_alu_type_get_type_size(nir_alu_type type
)
1021 return type
& NIR_ALU_TYPE_SIZE_MASK
;
1024 static inline unsigned
1025 nir_alu_type_get_base_type(nir_alu_type type
)
1027 return type
& NIR_ALU_TYPE_BASE_TYPE_MASK
;
1030 static inline nir_alu_type
1031 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type
)
1033 switch (base_type
) {
1034 case GLSL_TYPE_BOOL
:
1035 return nir_type_bool1
;
1037 case GLSL_TYPE_UINT
:
1038 return nir_type_uint32
;
1041 return nir_type_int32
;
1043 case GLSL_TYPE_UINT16
:
1044 return nir_type_uint16
;
1046 case GLSL_TYPE_INT16
:
1047 return nir_type_int16
;
1049 case GLSL_TYPE_UINT8
:
1050 return nir_type_uint8
;
1051 case GLSL_TYPE_INT8
:
1052 return nir_type_int8
;
1053 case GLSL_TYPE_UINT64
:
1054 return nir_type_uint64
;
1056 case GLSL_TYPE_INT64
:
1057 return nir_type_int64
;
1059 case GLSL_TYPE_FLOAT
:
1060 return nir_type_float32
;
1062 case GLSL_TYPE_FLOAT16
:
1063 return nir_type_float16
;
1065 case GLSL_TYPE_DOUBLE
:
1066 return nir_type_float64
;
1069 case GLSL_TYPE_SAMPLER
:
1070 case GLSL_TYPE_IMAGE
:
1071 case GLSL_TYPE_ATOMIC_UINT
:
1072 case GLSL_TYPE_STRUCT
:
1073 case GLSL_TYPE_INTERFACE
:
1074 case GLSL_TYPE_ARRAY
:
1075 case GLSL_TYPE_VOID
:
1076 case GLSL_TYPE_SUBROUTINE
:
1077 case GLSL_TYPE_FUNCTION
:
1078 case GLSL_TYPE_ERROR
:
1079 return nir_type_invalid
;
1082 unreachable("unknown type");
1085 static inline nir_alu_type
1086 nir_get_nir_type_for_glsl_type(const struct glsl_type
*type
)
1088 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type
));
1091 nir_op
nir_type_conversion_op(nir_alu_type src
, nir_alu_type dst
,
1092 nir_rounding_mode rnd
);
1094 static inline nir_op
1095 nir_op_vec(unsigned components
)
1097 switch (components
) {
1098 case 1: return nir_op_mov
;
1099 case 2: return nir_op_vec2
;
1100 case 3: return nir_op_vec3
;
1101 case 4: return nir_op_vec4
;
1102 case 8: return nir_op_vec8
;
1103 case 16: return nir_op_vec16
;
1104 default: unreachable("bad component count");
1109 nir_op_is_vec(nir_op op
)
1125 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode
, unsigned bit_size
)
1127 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16
) ||
1128 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32
) ||
1129 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64
);
1133 nir_is_denorm_flush_to_zero(unsigned execution_mode
, unsigned bit_size
)
1135 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16
) ||
1136 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32
) ||
1137 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64
);
1141 nir_is_denorm_preserve(unsigned execution_mode
, unsigned bit_size
)
1143 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP16
) ||
1144 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP32
) ||
1145 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP64
);
1149 nir_is_rounding_mode_rtne(unsigned execution_mode
, unsigned bit_size
)
1151 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1152 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1153 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1157 nir_is_rounding_mode_rtz(unsigned execution_mode
, unsigned bit_size
)
1159 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1160 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1161 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1165 nir_has_any_rounding_mode_rtz(unsigned execution_mode
)
1167 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1168 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1169 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1173 nir_has_any_rounding_mode_rtne(unsigned execution_mode
)
1175 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1176 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1177 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1180 static inline nir_rounding_mode
1181 nir_get_rounding_mode_from_float_controls(unsigned execution_mode
,
1184 if (nir_alu_type_get_base_type(type
) != nir_type_float
)
1185 return nir_rounding_mode_undef
;
1187 unsigned bit_size
= nir_alu_type_get_type_size(type
);
1189 if (nir_is_rounding_mode_rtz(execution_mode
, bit_size
))
1190 return nir_rounding_mode_rtz
;
1191 if (nir_is_rounding_mode_rtne(execution_mode
, bit_size
))
1192 return nir_rounding_mode_rtne
;
1193 return nir_rounding_mode_undef
;
1197 nir_has_any_rounding_mode_enabled(unsigned execution_mode
)
1200 nir_has_any_rounding_mode_rtne(execution_mode
) ||
1201 nir_has_any_rounding_mode_rtz(execution_mode
);
1207 * Operation where the first two sources are commutative.
1209 * For 2-source operations, this just mathematical commutativity. Some
1210 * 3-source operations, like ffma, are only commutative in the first two
1213 NIR_OP_IS_2SRC_COMMUTATIVE
= (1 << 0),
1214 NIR_OP_IS_ASSOCIATIVE
= (1 << 1),
1215 } nir_op_algebraic_property
;
1223 * The number of components in the output
1225 * If non-zero, this is the size of the output and input sizes are
1226 * explicitly given; swizzle and writemask are still in effect, but if
1227 * the output component is masked out, then the input component may
1230 * If zero, the opcode acts in the standard, per-component manner; the
1231 * operation is performed on each component (except the ones that are
1232 * masked out) with the input being taken from the input swizzle for
1235 * The size of some of the inputs may be given (i.e. non-zero) even
1236 * though output_size is zero; in that case, the inputs with a zero
1237 * size act per-component, while the inputs with non-zero size don't.
1239 uint8_t output_size
;
1242 * The type of vector that the instruction outputs. Note that the
1243 * staurate modifier is only allowed on outputs with the float type.
1246 nir_alu_type output_type
;
1249 * The number of components in each input
1251 uint8_t input_sizes
[NIR_MAX_VEC_COMPONENTS
];
1254 * The type of vector that each input takes. Note that negate and
1255 * absolute value are only allowed on inputs with int or float type and
1256 * behave differently on the two.
1258 nir_alu_type input_types
[NIR_MAX_VEC_COMPONENTS
];
1260 nir_op_algebraic_property algebraic_properties
;
1262 /* Whether this represents a numeric conversion opcode */
1266 extern const nir_op_info nir_op_infos
[nir_num_opcodes
];
1268 typedef struct nir_alu_instr
{
1272 /** Indicates that this ALU instruction generates an exact value
1274 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1275 * really equivalent to either. This indicates that the value generated by
1276 * this operation is high-precision and any code transformations that touch
1277 * it must ensure that the resulting value is bit-for-bit identical to the
1283 * Indicates that this instruction do not cause wrapping to occur, in the
1284 * form of overflow or underflow.
1286 bool no_signed_wrap
:1;
1287 bool no_unsigned_wrap
:1;
1293 void nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
1294 nir_alu_instr
*instr
);
1295 void nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
1296 nir_alu_instr
*instr
);
1298 /* is this source channel used? */
1300 nir_alu_instr_channel_used(const nir_alu_instr
*instr
, unsigned src
,
1303 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1304 return channel
< nir_op_infos
[instr
->op
].input_sizes
[src
];
1306 return (instr
->dest
.write_mask
>> channel
) & 1;
1309 static inline nir_component_mask_t
1310 nir_alu_instr_src_read_mask(const nir_alu_instr
*instr
, unsigned src
)
1312 nir_component_mask_t read_mask
= 0;
1313 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1314 if (!nir_alu_instr_channel_used(instr
, src
, c
))
1317 read_mask
|= (1 << instr
->src
[src
].swizzle
[c
]);
1323 * Get the number of channels used for a source
1325 static inline unsigned
1326 nir_ssa_alu_instr_src_components(const nir_alu_instr
*instr
, unsigned src
)
1328 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1329 return nir_op_infos
[instr
->op
].input_sizes
[src
];
1331 return nir_dest_num_components(instr
->dest
.dest
);
1335 nir_alu_instr_is_comparison(const nir_alu_instr
*instr
)
1337 switch (instr
->op
) {
1357 bool nir_const_value_negative_equal(nir_const_value c1
, nir_const_value c2
,
1358 nir_alu_type full_type
);
1360 bool nir_alu_srcs_equal(const nir_alu_instr
*alu1
, const nir_alu_instr
*alu2
,
1361 unsigned src1
, unsigned src2
);
1363 bool nir_alu_srcs_negative_equal(const nir_alu_instr
*alu1
,
1364 const nir_alu_instr
*alu2
,
1365 unsigned src1
, unsigned src2
);
1369 nir_deref_type_array
,
1370 nir_deref_type_array_wildcard
,
1371 nir_deref_type_ptr_as_array
,
1372 nir_deref_type_struct
,
1373 nir_deref_type_cast
,
1379 /** The type of this deref instruction */
1380 nir_deref_type deref_type
;
1382 /** The mode of the underlying variable */
1383 nir_variable_mode mode
;
1385 /** The dereferenced type of the resulting pointer value */
1386 const struct glsl_type
*type
;
1389 /** Variable being dereferenced if deref_type is a deref_var */
1392 /** Parent deref if deref_type is not deref_var */
1396 /** Additional deref parameters */
1407 unsigned ptr_stride
;
1411 /** Destination to store the resulting "pointer" */
1415 static inline nir_deref_instr
*nir_src_as_deref(nir_src src
);
1417 static inline nir_deref_instr
*
1418 nir_deref_instr_parent(const nir_deref_instr
*instr
)
1420 if (instr
->deref_type
== nir_deref_type_var
)
1423 return nir_src_as_deref(instr
->parent
);
1426 static inline nir_variable
*
1427 nir_deref_instr_get_variable(const nir_deref_instr
*instr
)
1429 while (instr
->deref_type
!= nir_deref_type_var
) {
1430 if (instr
->deref_type
== nir_deref_type_cast
)
1433 instr
= nir_deref_instr_parent(instr
);
1439 bool nir_deref_instr_has_indirect(nir_deref_instr
*instr
);
1440 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr
*instr
);
1441 bool nir_deref_instr_has_complex_use(nir_deref_instr
*instr
);
1443 bool nir_deref_instr_remove_if_unused(nir_deref_instr
*instr
);
1445 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr
*instr
);
1450 struct nir_function
*callee
;
1452 unsigned num_params
;
1456 #include "nir_intrinsics.h"
1458 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1460 /** Represents an intrinsic
1462 * An intrinsic is an instruction type for handling things that are
1463 * more-or-less regular operations but don't just consume and produce SSA
1464 * values like ALU operations do. Intrinsics are not for things that have
1465 * special semantic meaning such as phi nodes and parallel copies.
1466 * Examples of intrinsics include variable load/store operations, system
1467 * value loads, and the like. Even though texturing more-or-less falls
1468 * under this category, texturing is its own instruction type because
1469 * trying to represent texturing with intrinsics would lead to a
1470 * combinatorial explosion of intrinsic opcodes.
1472 * By having a single instruction type for handling a lot of different
1473 * cases, optimization passes can look for intrinsics and, for the most
1474 * part, completely ignore them. Each intrinsic type also has a few
1475 * possible flags that govern whether or not they can be reordered or
1476 * eliminated. That way passes like dead code elimination can still work
1477 * on intrisics without understanding the meaning of each.
1479 * Each intrinsic has some number of constant indices, some number of
1480 * variables, and some number of sources. What these sources, variables,
1481 * and indices mean depends on the intrinsic and is documented with the
1482 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1483 * instructions are the only types of instruction that can operate on
1489 nir_intrinsic_op intrinsic
;
1493 /** number of components if this is a vectorized intrinsic
1495 * Similarly to ALU operations, some intrinsics are vectorized.
1496 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1497 * For vectorized intrinsics, the num_components field specifies the
1498 * number of destination components and the number of source components
1499 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1501 uint8_t num_components
;
1503 int const_index
[NIR_INTRINSIC_MAX_CONST_INDEX
];
1506 } nir_intrinsic_instr
;
1508 static inline nir_variable
*
1509 nir_intrinsic_get_var(nir_intrinsic_instr
*intrin
, unsigned i
)
1511 return nir_deref_instr_get_variable(nir_src_as_deref(intrin
->src
[i
]));
1515 /* Memory ordering. */
1516 NIR_MEMORY_ACQUIRE
= 1 << 0,
1517 NIR_MEMORY_RELEASE
= 1 << 1,
1518 NIR_MEMORY_ACQ_REL
= NIR_MEMORY_ACQUIRE
| NIR_MEMORY_RELEASE
,
1520 /* Memory visibility operations. */
1521 NIR_MEMORY_MAKE_AVAILABLE
= 1 << 2,
1522 NIR_MEMORY_MAKE_VISIBLE
= 1 << 3,
1523 } nir_memory_semantics
;
1526 NIR_SCOPE_INVOCATION
,
1528 NIR_SCOPE_WORKGROUP
,
1529 NIR_SCOPE_QUEUE_FAMILY
,
1534 * \name NIR intrinsics semantic flags
1536 * information about what the compiler can do with the intrinsics.
1538 * \sa nir_intrinsic_info::flags
1542 * whether the intrinsic can be safely eliminated if none of its output
1543 * value is not being used.
1545 NIR_INTRINSIC_CAN_ELIMINATE
= (1 << 0),
1548 * Whether the intrinsic can be reordered with respect to any other
1549 * intrinsic, i.e. whether the only reordering dependencies of the
1550 * intrinsic are due to the register reads/writes.
1552 NIR_INTRINSIC_CAN_REORDER
= (1 << 1),
1553 } nir_intrinsic_semantic_flag
;
1556 * \name NIR intrinsics const-index flag
1558 * Indicates the usage of a const_index slot.
1560 * \sa nir_intrinsic_info::index_map
1564 * Generally instructions that take a offset src argument, can encode
1565 * a constant 'base' value which is added to the offset.
1567 NIR_INTRINSIC_BASE
= 1,
1570 * For store instructions, a writemask for the store.
1572 NIR_INTRINSIC_WRMASK
,
1575 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1577 NIR_INTRINSIC_STREAM_ID
,
1580 * The clip-plane id for load_user_clip_plane intrinsic.
1582 NIR_INTRINSIC_UCP_ID
,
1585 * The amount of data, starting from BASE, that this instruction may
1586 * access. This is used to provide bounds if the offset is not constant.
1588 NIR_INTRINSIC_RANGE
,
1591 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1593 NIR_INTRINSIC_DESC_SET
,
1596 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1598 NIR_INTRINSIC_BINDING
,
1603 NIR_INTRINSIC_COMPONENT
,
1606 * Interpolation mode (only meaningful for FS inputs).
1608 NIR_INTRINSIC_INTERP_MODE
,
1611 * A binary nir_op to use when performing a reduction or scan operation
1613 NIR_INTRINSIC_REDUCTION_OP
,
1616 * Cluster size for reduction operations
1618 NIR_INTRINSIC_CLUSTER_SIZE
,
1621 * Parameter index for a load_param intrinsic
1623 NIR_INTRINSIC_PARAM_IDX
,
1626 * Image dimensionality for image intrinsics
1628 * One of GLSL_SAMPLER_DIM_*
1630 NIR_INTRINSIC_IMAGE_DIM
,
1633 * Non-zero if we are accessing an array image
1635 NIR_INTRINSIC_IMAGE_ARRAY
,
1638 * Image format for image intrinsics
1640 NIR_INTRINSIC_FORMAT
,
1643 * Access qualifiers for image and memory access intrinsics
1645 NIR_INTRINSIC_ACCESS
,
1648 * Alignment for offsets and addresses
1650 * These two parameters, specify an alignment in terms of a multiplier and
1651 * an offset. The offset or address parameter X of the intrinsic is
1652 * guaranteed to satisfy the following:
1654 * (X - align_offset) % align_mul == 0
1656 NIR_INTRINSIC_ALIGN_MUL
,
1657 NIR_INTRINSIC_ALIGN_OFFSET
,
1660 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1662 NIR_INTRINSIC_DESC_TYPE
,
1665 * The nir_alu_type of a uniform/input/output
1670 * The swizzle mask for the instructions
1671 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1673 NIR_INTRINSIC_SWIZZLE_MASK
,
1675 /* Separate source/dest access flags for copies */
1676 NIR_INTRINSIC_SRC_ACCESS
,
1677 NIR_INTRINSIC_DST_ACCESS
,
1679 /* Driver location for nir_load_patch_location_ir3 */
1680 NIR_INTRINSIC_DRIVER_LOCATION
,
1683 * Mask of nir_memory_semantics, includes ordering and visibility.
1685 NIR_INTRINSIC_MEMORY_SEMANTICS
,
1688 * Mask of nir_variable_modes affected by the memory operation.
1690 NIR_INTRINSIC_MEMORY_MODES
,
1693 * Value of nir_scope.
1695 NIR_INTRINSIC_MEMORY_SCOPE
,
1697 NIR_INTRINSIC_NUM_INDEX_FLAGS
,
1699 } nir_intrinsic_index_flag
;
1701 #define NIR_INTRINSIC_MAX_INPUTS 5
1706 uint8_t num_srcs
; /** < number of register/SSA inputs */
1708 /** number of components of each input register
1710 * If this value is 0, the number of components is given by the
1711 * num_components field of nir_intrinsic_instr. If this value is -1, the
1712 * intrinsic consumes however many components are provided and it is not
1715 int8_t src_components
[NIR_INTRINSIC_MAX_INPUTS
];
1719 /** number of components of the output register
1721 * If this value is 0, the number of components is given by the
1722 * num_components field of nir_intrinsic_instr.
1724 uint8_t dest_components
;
1726 /** bitfield of legal bit sizes */
1727 uint8_t dest_bit_sizes
;
1729 /** the number of constant indices used by the intrinsic */
1730 uint8_t num_indices
;
1732 /** indicates the usage of intr->const_index[n] */
1733 uint8_t index_map
[NIR_INTRINSIC_NUM_INDEX_FLAGS
];
1735 /** semantic flags for calls to this intrinsic */
1736 nir_intrinsic_semantic_flag flags
;
1737 } nir_intrinsic_info
;
1739 extern const nir_intrinsic_info nir_intrinsic_infos
[nir_num_intrinsics
];
1741 static inline unsigned
1742 nir_intrinsic_src_components(nir_intrinsic_instr
*intr
, unsigned srcn
)
1744 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1745 assert(srcn
< info
->num_srcs
);
1746 if (info
->src_components
[srcn
] > 0)
1747 return info
->src_components
[srcn
];
1748 else if (info
->src_components
[srcn
] == 0)
1749 return intr
->num_components
;
1751 return nir_src_num_components(intr
->src
[srcn
]);
1754 static inline unsigned
1755 nir_intrinsic_dest_components(nir_intrinsic_instr
*intr
)
1757 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1758 if (!info
->has_dest
)
1760 else if (info
->dest_components
)
1761 return info
->dest_components
;
1763 return intr
->num_components
;
1767 * Helper to copy const_index[] from src to dst, without assuming they
1771 nir_intrinsic_copy_const_indices(nir_intrinsic_instr
*dst
, nir_intrinsic_instr
*src
)
1773 if (src
->intrinsic
== dst
->intrinsic
) {
1774 memcpy(dst
->const_index
, src
->const_index
, sizeof(dst
->const_index
));
1778 const nir_intrinsic_info
*src_info
= &nir_intrinsic_infos
[src
->intrinsic
];
1779 const nir_intrinsic_info
*dst_info
= &nir_intrinsic_infos
[dst
->intrinsic
];
1781 for (unsigned i
= 0; i
< NIR_INTRINSIC_NUM_INDEX_FLAGS
; i
++) {
1782 if (src_info
->index_map
[i
] == 0)
1785 /* require that dst instruction also uses the same const_index[]: */
1786 assert(dst_info
->index_map
[i
] > 0);
1788 dst
->const_index
[dst_info
->index_map
[i
] - 1] =
1789 src
->const_index
[src_info
->index_map
[i
] - 1];
1793 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1794 static inline type \
1795 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1797 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1798 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1799 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1801 static inline void \
1802 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1804 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1805 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1806 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1809 INTRINSIC_IDX_ACCESSORS(write_mask
, WRMASK
, unsigned)
1810 INTRINSIC_IDX_ACCESSORS(base
, BASE
, int)
1811 INTRINSIC_IDX_ACCESSORS(stream_id
, STREAM_ID
, unsigned)
1812 INTRINSIC_IDX_ACCESSORS(ucp_id
, UCP_ID
, unsigned)
1813 INTRINSIC_IDX_ACCESSORS(range
, RANGE
, unsigned)
1814 INTRINSIC_IDX_ACCESSORS(desc_set
, DESC_SET
, unsigned)
1815 INTRINSIC_IDX_ACCESSORS(binding
, BINDING
, unsigned)
1816 INTRINSIC_IDX_ACCESSORS(component
, COMPONENT
, unsigned)
1817 INTRINSIC_IDX_ACCESSORS(interp_mode
, INTERP_MODE
, unsigned)
1818 INTRINSIC_IDX_ACCESSORS(reduction_op
, REDUCTION_OP
, unsigned)
1819 INTRINSIC_IDX_ACCESSORS(cluster_size
, CLUSTER_SIZE
, unsigned)
1820 INTRINSIC_IDX_ACCESSORS(param_idx
, PARAM_IDX
, unsigned)
1821 INTRINSIC_IDX_ACCESSORS(image_dim
, IMAGE_DIM
, enum glsl_sampler_dim
)
1822 INTRINSIC_IDX_ACCESSORS(image_array
, IMAGE_ARRAY
, bool)
1823 INTRINSIC_IDX_ACCESSORS(access
, ACCESS
, enum gl_access_qualifier
)
1824 INTRINSIC_IDX_ACCESSORS(src_access
, SRC_ACCESS
, enum gl_access_qualifier
)
1825 INTRINSIC_IDX_ACCESSORS(dst_access
, DST_ACCESS
, enum gl_access_qualifier
)
1826 INTRINSIC_IDX_ACCESSORS(format
, FORMAT
, enum pipe_format
)
1827 INTRINSIC_IDX_ACCESSORS(align_mul
, ALIGN_MUL
, unsigned)
1828 INTRINSIC_IDX_ACCESSORS(align_offset
, ALIGN_OFFSET
, unsigned)
1829 INTRINSIC_IDX_ACCESSORS(desc_type
, DESC_TYPE
, unsigned)
1830 INTRINSIC_IDX_ACCESSORS(type
, TYPE
, nir_alu_type
)
1831 INTRINSIC_IDX_ACCESSORS(swizzle_mask
, SWIZZLE_MASK
, unsigned)
1832 INTRINSIC_IDX_ACCESSORS(driver_location
, DRIVER_LOCATION
, unsigned)
1833 INTRINSIC_IDX_ACCESSORS(memory_semantics
, MEMORY_SEMANTICS
, nir_memory_semantics
)
1834 INTRINSIC_IDX_ACCESSORS(memory_modes
, MEMORY_MODES
, nir_variable_mode
)
1835 INTRINSIC_IDX_ACCESSORS(memory_scope
, MEMORY_SCOPE
, nir_scope
)
1838 nir_intrinsic_set_align(nir_intrinsic_instr
*intrin
,
1839 unsigned align_mul
, unsigned align_offset
)
1841 assert(util_is_power_of_two_nonzero(align_mul
));
1842 assert(align_offset
< align_mul
);
1843 nir_intrinsic_set_align_mul(intrin
, align_mul
);
1844 nir_intrinsic_set_align_offset(intrin
, align_offset
);
1847 /** Returns a simple alignment for a load/store intrinsic offset
1849 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1850 * and ALIGN_OFFSET parameters, this helper takes both into account and
1851 * provides a single simple alignment parameter. The offset X is guaranteed
1852 * to satisfy X % align == 0.
1854 static inline unsigned
1855 nir_intrinsic_align(const nir_intrinsic_instr
*intrin
)
1857 const unsigned align_mul
= nir_intrinsic_align_mul(intrin
);
1858 const unsigned align_offset
= nir_intrinsic_align_offset(intrin
);
1859 assert(align_offset
< align_mul
);
1860 return align_offset
? 1 << (ffs(align_offset
) - 1) : align_mul
;
1864 nir_image_intrinsic_coord_components(const nir_intrinsic_instr
*instr
);
1866 /* Converts a image_deref_* intrinsic into a image_* one */
1867 void nir_rewrite_image_intrinsic(nir_intrinsic_instr
*instr
,
1868 nir_ssa_def
*handle
, bool bindless
);
1870 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1872 nir_intrinsic_can_reorder(nir_intrinsic_instr
*instr
)
1874 if (instr
->intrinsic
== nir_intrinsic_load_deref
||
1875 instr
->intrinsic
== nir_intrinsic_load_ssbo
||
1876 instr
->intrinsic
== nir_intrinsic_bindless_image_load
||
1877 instr
->intrinsic
== nir_intrinsic_image_deref_load
||
1878 instr
->intrinsic
== nir_intrinsic_image_load
) {
1879 return nir_intrinsic_access(instr
) & ACCESS_CAN_REORDER
;
1881 const nir_intrinsic_info
*info
=
1882 &nir_intrinsic_infos
[instr
->intrinsic
];
1883 return (info
->flags
& NIR_INTRINSIC_CAN_ELIMINATE
) &&
1884 (info
->flags
& NIR_INTRINSIC_CAN_REORDER
);
1889 * \group texture information
1891 * This gives semantic information about textures which is useful to the
1892 * frontend, the backend, and lowering passes, but not the optimizer.
1897 nir_tex_src_projector
,
1898 nir_tex_src_comparator
, /* shadow comparator */
1902 nir_tex_src_min_lod
,
1903 nir_tex_src_ms_index
, /* MSAA sample index */
1904 nir_tex_src_ms_mcs
, /* MSAA compression value */
1907 nir_tex_src_texture_deref
, /* < deref pointing to the texture */
1908 nir_tex_src_sampler_deref
, /* < deref pointing to the sampler */
1909 nir_tex_src_texture_offset
, /* < dynamically uniform indirect offset */
1910 nir_tex_src_sampler_offset
, /* < dynamically uniform indirect offset */
1911 nir_tex_src_texture_handle
, /* < bindless texture handle */
1912 nir_tex_src_sampler_handle
, /* < bindless sampler handle */
1913 nir_tex_src_plane
, /* < selects plane for planar textures */
1914 nir_num_tex_src_types
1919 nir_tex_src_type src_type
;
1923 nir_texop_tex
, /**< Regular texture look-up */
1924 nir_texop_txb
, /**< Texture look-up with LOD bias */
1925 nir_texop_txl
, /**< Texture look-up with explicit LOD */
1926 nir_texop_txd
, /**< Texture look-up with partial derivatives */
1927 nir_texop_txf
, /**< Texel fetch with explicit LOD */
1928 nir_texop_txf_ms
, /**< Multisample texture fetch */
1929 nir_texop_txf_ms_fb
, /**< Multisample texture fetch from framebuffer */
1930 nir_texop_txf_ms_mcs
, /**< Multisample compression value fetch */
1931 nir_texop_txs
, /**< Texture size */
1932 nir_texop_lod
, /**< Texture lod query */
1933 nir_texop_tg4
, /**< Texture gather */
1934 nir_texop_query_levels
, /**< Texture levels query */
1935 nir_texop_texture_samples
, /**< Texture samples query */
1936 nir_texop_samples_identical
, /**< Query whether all samples are definitely
1939 nir_texop_tex_prefetch
, /**< Regular texture look-up, eligible for pre-dispatch */
1940 nir_texop_fragment_fetch
, /**< Multisample fragment color texture fetch */
1941 nir_texop_fragment_mask_fetch
,/**< Multisample fragment mask texture fetch */
1947 enum glsl_sampler_dim sampler_dim
;
1948 nir_alu_type dest_type
;
1953 unsigned num_srcs
, coord_components
;
1954 bool is_array
, is_shadow
;
1957 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1958 * components or the new-style shadow that outputs 1 component.
1960 bool is_new_style_shadow
;
1962 /* gather component selector */
1963 unsigned component
: 2;
1965 /* gather offsets */
1966 int8_t tg4_offsets
[4][2];
1968 /* True if the texture index or handle is not dynamically uniform */
1969 bool texture_non_uniform
;
1971 /* True if the sampler index or handle is not dynamically uniform */
1972 bool sampler_non_uniform
;
1974 /** The texture index
1976 * If this texture instruction has a nir_tex_src_texture_offset source,
1977 * then the texture index is given by texture_index + texture_offset.
1979 unsigned texture_index
;
1981 /** The sampler index
1983 * The following operations do not require a sampler and, as such, this
1984 * field should be ignored:
1986 * - nir_texop_txf_ms
1989 * - nir_texop_query_levels
1990 * - nir_texop_texture_samples
1991 * - nir_texop_samples_identical
1993 * If this texture instruction has a nir_tex_src_sampler_offset source,
1994 * then the sampler index is given by sampler_index + sampler_offset.
1996 unsigned sampler_index
;
2000 * Returns true if the texture operation requires a sampler as a general rule,
2001 * see the documentation of sampler_index.
2003 * Note that the specific hw/driver backend could require to a sampler
2004 * object/configuration packet in any case, for some other reason.
2007 nir_tex_instr_need_sampler(const nir_tex_instr
*instr
)
2009 switch (instr
->op
) {
2011 case nir_texop_txf_ms
:
2014 case nir_texop_query_levels
:
2015 case nir_texop_texture_samples
:
2016 case nir_texop_samples_identical
:
2023 static inline unsigned
2024 nir_tex_instr_dest_size(const nir_tex_instr
*instr
)
2026 switch (instr
->op
) {
2027 case nir_texop_txs
: {
2029 switch (instr
->sampler_dim
) {
2030 case GLSL_SAMPLER_DIM_1D
:
2031 case GLSL_SAMPLER_DIM_BUF
:
2034 case GLSL_SAMPLER_DIM_2D
:
2035 case GLSL_SAMPLER_DIM_CUBE
:
2036 case GLSL_SAMPLER_DIM_MS
:
2037 case GLSL_SAMPLER_DIM_RECT
:
2038 case GLSL_SAMPLER_DIM_EXTERNAL
:
2039 case GLSL_SAMPLER_DIM_SUBPASS
:
2042 case GLSL_SAMPLER_DIM_3D
:
2046 unreachable("not reached");
2048 if (instr
->is_array
)
2056 case nir_texop_texture_samples
:
2057 case nir_texop_query_levels
:
2058 case nir_texop_samples_identical
:
2059 case nir_texop_fragment_mask_fetch
:
2063 if (instr
->is_shadow
&& instr
->is_new_style_shadow
)
2070 /* Returns true if this texture operation queries something about the texture
2071 * rather than actually sampling it.
2074 nir_tex_instr_is_query(const nir_tex_instr
*instr
)
2076 switch (instr
->op
) {
2079 case nir_texop_texture_samples
:
2080 case nir_texop_query_levels
:
2081 case nir_texop_txf_ms_mcs
:
2088 case nir_texop_txf_ms
:
2089 case nir_texop_txf_ms_fb
:
2093 unreachable("Invalid texture opcode");
2098 nir_tex_instr_has_implicit_derivative(const nir_tex_instr
*instr
)
2100 switch (instr
->op
) {
2110 static inline nir_alu_type
2111 nir_tex_instr_src_type(const nir_tex_instr
*instr
, unsigned src
)
2113 switch (instr
->src
[src
].src_type
) {
2114 case nir_tex_src_coord
:
2115 switch (instr
->op
) {
2117 case nir_texop_txf_ms
:
2118 case nir_texop_txf_ms_fb
:
2119 case nir_texop_txf_ms_mcs
:
2120 case nir_texop_samples_identical
:
2121 return nir_type_int
;
2124 return nir_type_float
;
2127 case nir_tex_src_lod
:
2128 switch (instr
->op
) {
2131 return nir_type_int
;
2134 return nir_type_float
;
2137 case nir_tex_src_projector
:
2138 case nir_tex_src_comparator
:
2139 case nir_tex_src_bias
:
2140 case nir_tex_src_min_lod
:
2141 case nir_tex_src_ddx
:
2142 case nir_tex_src_ddy
:
2143 return nir_type_float
;
2145 case nir_tex_src_offset
:
2146 case nir_tex_src_ms_index
:
2147 case nir_tex_src_plane
:
2148 return nir_type_int
;
2150 case nir_tex_src_ms_mcs
:
2151 case nir_tex_src_texture_deref
:
2152 case nir_tex_src_sampler_deref
:
2153 case nir_tex_src_texture_offset
:
2154 case nir_tex_src_sampler_offset
:
2155 case nir_tex_src_texture_handle
:
2156 case nir_tex_src_sampler_handle
:
2157 return nir_type_uint
;
2159 case nir_num_tex_src_types
:
2160 unreachable("nir_num_tex_src_types is not a valid source type");
2163 unreachable("Invalid texture source type");
2166 static inline unsigned
2167 nir_tex_instr_src_size(const nir_tex_instr
*instr
, unsigned src
)
2169 if (instr
->src
[src
].src_type
== nir_tex_src_coord
)
2170 return instr
->coord_components
;
2172 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2173 if (instr
->src
[src
].src_type
== nir_tex_src_ms_mcs
)
2176 if (instr
->src
[src
].src_type
== nir_tex_src_ddx
||
2177 instr
->src
[src
].src_type
== nir_tex_src_ddy
) {
2178 if (instr
->is_array
)
2179 return instr
->coord_components
- 1;
2181 return instr
->coord_components
;
2184 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2185 * the offset, since a cube maps to a single face.
2187 if (instr
->src
[src
].src_type
== nir_tex_src_offset
) {
2188 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
)
2190 else if (instr
->is_array
)
2191 return instr
->coord_components
- 1;
2193 return instr
->coord_components
;
2200 nir_tex_instr_src_index(const nir_tex_instr
*instr
, nir_tex_src_type type
)
2202 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++)
2203 if (instr
->src
[i
].src_type
== type
)
2209 void nir_tex_instr_add_src(nir_tex_instr
*tex
,
2210 nir_tex_src_type src_type
,
2213 void nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
);
2215 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr
*tex
);
2222 nir_const_value value
[];
2223 } nir_load_const_instr
;
2226 /** Return from a function
2228 * This instruction is a classic function return. It jumps to
2229 * nir_function_impl::end_block. No return value is provided in this
2230 * instruction. Instead, the function is expected to write any return
2231 * data to a deref passed in from the caller.
2235 /** Break out of the inner-most loop
2237 * This has the same semantics as C's "break" statement.
2241 /** Jump back to the top of the inner-most loop
2243 * This has the same semantics as C's "continue" statement assuming that a
2244 * NIR loop is implemented as "while (1) { body }".
2254 /* creates a new SSA variable in an undefined state */
2259 } nir_ssa_undef_instr
;
2262 struct exec_node node
;
2264 /* The predecessor block corresponding to this source */
2265 struct nir_block
*pred
;
2270 #define nir_foreach_phi_src(phi_src, phi) \
2271 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2272 #define nir_foreach_phi_src_safe(phi_src, phi) \
2273 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2278 struct exec_list srcs
; /** < list of nir_phi_src */
2284 struct exec_node node
;
2287 } nir_parallel_copy_entry
;
2289 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2290 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2295 /* A list of nir_parallel_copy_entrys. The sources of all of the
2296 * entries are copied to the corresponding destinations "in parallel".
2297 * In other words, if we have two entries: a -> b and b -> a, the values
2300 struct exec_list entries
;
2301 } nir_parallel_copy_instr
;
2303 NIR_DEFINE_CAST(nir_instr_as_alu
, nir_instr
, nir_alu_instr
, instr
,
2304 type
, nir_instr_type_alu
)
2305 NIR_DEFINE_CAST(nir_instr_as_deref
, nir_instr
, nir_deref_instr
, instr
,
2306 type
, nir_instr_type_deref
)
2307 NIR_DEFINE_CAST(nir_instr_as_call
, nir_instr
, nir_call_instr
, instr
,
2308 type
, nir_instr_type_call
)
2309 NIR_DEFINE_CAST(nir_instr_as_jump
, nir_instr
, nir_jump_instr
, instr
,
2310 type
, nir_instr_type_jump
)
2311 NIR_DEFINE_CAST(nir_instr_as_tex
, nir_instr
, nir_tex_instr
, instr
,
2312 type
, nir_instr_type_tex
)
2313 NIR_DEFINE_CAST(nir_instr_as_intrinsic
, nir_instr
, nir_intrinsic_instr
, instr
,
2314 type
, nir_instr_type_intrinsic
)
2315 NIR_DEFINE_CAST(nir_instr_as_load_const
, nir_instr
, nir_load_const_instr
, instr
,
2316 type
, nir_instr_type_load_const
)
2317 NIR_DEFINE_CAST(nir_instr_as_ssa_undef
, nir_instr
, nir_ssa_undef_instr
, instr
,
2318 type
, nir_instr_type_ssa_undef
)
2319 NIR_DEFINE_CAST(nir_instr_as_phi
, nir_instr
, nir_phi_instr
, instr
,
2320 type
, nir_instr_type_phi
)
2321 NIR_DEFINE_CAST(nir_instr_as_parallel_copy
, nir_instr
,
2322 nir_parallel_copy_instr
, instr
,
2323 type
, nir_instr_type_parallel_copy
)
2326 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2327 static inline type \
2328 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2330 assert(nir_src_is_const(src)); \
2331 nir_load_const_instr *load = \
2332 nir_instr_as_load_const(src.ssa->parent_instr); \
2333 assert(comp < load->def.num_components); \
2334 return nir_const_value_as_##suffix(load->value[comp], \
2335 load->def.bit_size); \
2338 static inline type \
2339 nir_src_as_##suffix(nir_src src) \
2341 assert(nir_src_num_components(src) == 1); \
2342 return nir_src_comp_as_##suffix(src, 0); \
2345 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2346 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint
)
2347 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2348 NIR_DEFINE_SRC_AS_CONST(double, float)
2350 #undef NIR_DEFINE_SRC_AS_CONST
2359 nir_ssa_scalar_is_const(nir_ssa_scalar s
)
2361 return s
.def
->parent_instr
->type
== nir_instr_type_load_const
;
2364 static inline nir_const_value
2365 nir_ssa_scalar_as_const_value(nir_ssa_scalar s
)
2367 assert(s
.comp
< s
.def
->num_components
);
2368 nir_load_const_instr
*load
= nir_instr_as_load_const(s
.def
->parent_instr
);
2369 return load
->value
[s
.comp
];
2372 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2373 static inline type \
2374 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2376 return nir_const_value_as_##suffix( \
2377 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2380 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2381 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint
)
2382 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2383 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2385 #undef NIR_DEFINE_SCALAR_AS_CONST
2388 nir_ssa_scalar_is_alu(nir_ssa_scalar s
)
2390 return s
.def
->parent_instr
->type
== nir_instr_type_alu
;
2393 static inline nir_op
2394 nir_ssa_scalar_alu_op(nir_ssa_scalar s
)
2396 return nir_instr_as_alu(s
.def
->parent_instr
)->op
;
2399 static inline nir_ssa_scalar
2400 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s
, unsigned alu_src_idx
)
2402 nir_ssa_scalar out
= { NULL
, 0 };
2404 nir_alu_instr
*alu
= nir_instr_as_alu(s
.def
->parent_instr
);
2405 assert(alu_src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
2407 /* Our component must be written */
2408 assert(s
.comp
< s
.def
->num_components
);
2409 assert(alu
->dest
.write_mask
& (1u << s
.comp
));
2411 assert(alu
->src
[alu_src_idx
].src
.is_ssa
);
2412 out
.def
= alu
->src
[alu_src_idx
].src
.ssa
;
2414 if (nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 0) {
2415 /* The ALU src is unsized so the source component follows the
2416 * destination component.
2418 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[s
.comp
];
2420 /* This is a sized source so all source components work together to
2421 * produce all the destination components. Since we need to return a
2422 * scalar, this only works if the source is a scalar.
2424 assert(nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 1);
2425 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[0];
2427 assert(out
.comp
< out
.def
->num_components
);
2436 * Control flow consists of a tree of control flow nodes, which include
2437 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2438 * instructions that always run start-to-finish. Each basic block also keeps
2439 * track of its successors (blocks which may run immediately after the current
2440 * block) and predecessors (blocks which could have run immediately before the
2441 * current block). Each function also has a start block and an end block which
2442 * all return statements point to (which is always empty). Together, all the
2443 * blocks with their predecessors and successors make up the control flow
2444 * graph (CFG) of the function. There are helpers that modify the tree of
2445 * control flow nodes while modifying the CFG appropriately; these should be
2446 * used instead of modifying the tree directly.
2453 nir_cf_node_function
2456 typedef struct nir_cf_node
{
2457 struct exec_node node
;
2458 nir_cf_node_type type
;
2459 struct nir_cf_node
*parent
;
2462 typedef struct nir_block
{
2463 nir_cf_node cf_node
;
2465 struct exec_list instr_list
; /** < list of nir_instr */
2467 /** generic block index; generated by nir_index_blocks */
2471 * Each block can only have up to 2 successors, so we put them in a simple
2472 * array - no need for anything more complicated.
2474 struct nir_block
*successors
[2];
2476 /* Set of nir_block predecessors in the CFG */
2477 struct set
*predecessors
;
2480 * this node's immediate dominator in the dominance tree - set to NULL for
2483 struct nir_block
*imm_dom
;
2485 /* This node's children in the dominance tree */
2486 unsigned num_dom_children
;
2487 struct nir_block
**dom_children
;
2489 /* Set of nir_blocks on the dominance frontier of this block */
2490 struct set
*dom_frontier
;
2493 * These two indices have the property that dom_{pre,post}_index for each
2494 * child of this block in the dominance tree will always be between
2495 * dom_pre_index and dom_post_index for this block, which makes testing if
2496 * a given block is dominated by another block an O(1) operation.
2498 int16_t dom_pre_index
, dom_post_index
;
2500 /* live in and out for this block; used for liveness analysis */
2501 BITSET_WORD
*live_in
;
2502 BITSET_WORD
*live_out
;
2506 nir_block_is_reachable(nir_block
*b
)
2508 /* See also nir_block_dominates */
2509 return b
->dom_post_index
!= -1;
2512 static inline nir_instr
*
2513 nir_block_first_instr(nir_block
*block
)
2515 struct exec_node
*head
= exec_list_get_head(&block
->instr_list
);
2516 return exec_node_data(nir_instr
, head
, node
);
2519 static inline nir_instr
*
2520 nir_block_last_instr(nir_block
*block
)
2522 struct exec_node
*tail
= exec_list_get_tail(&block
->instr_list
);
2523 return exec_node_data(nir_instr
, tail
, node
);
2527 nir_block_ends_in_jump(nir_block
*block
)
2529 return !exec_list_is_empty(&block
->instr_list
) &&
2530 nir_block_last_instr(block
)->type
== nir_instr_type_jump
;
2533 #define nir_foreach_instr(instr, block) \
2534 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2535 #define nir_foreach_instr_reverse(instr, block) \
2536 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2537 #define nir_foreach_instr_safe(instr, block) \
2538 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2539 #define nir_foreach_instr_reverse_safe(instr, block) \
2540 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2543 nir_selection_control_none
= 0x0,
2544 nir_selection_control_flatten
= 0x1,
2545 nir_selection_control_dont_flatten
= 0x2,
2546 } nir_selection_control
;
2548 typedef struct nir_if
{
2549 nir_cf_node cf_node
;
2551 nir_selection_control control
;
2553 struct exec_list then_list
; /** < list of nir_cf_node */
2554 struct exec_list else_list
; /** < list of nir_cf_node */
2560 /** Instruction that generates nif::condition. */
2561 nir_instr
*conditional_instr
;
2563 /** Block within ::nif that has the break instruction. */
2564 nir_block
*break_block
;
2566 /** Last block for the then- or else-path that does not contain the break. */
2567 nir_block
*continue_from_block
;
2569 /** True when ::break_block is in the else-path of ::nif. */
2570 bool continue_from_then
;
2573 /* This is true if the terminators exact trip count is unknown. For
2576 * for (int i = 0; i < imin(x, 4); i++)
2579 * Here loop analysis would have set a max_trip_count of 4 however we dont
2580 * know for sure that this is the exact trip count.
2582 bool exact_trip_count_unknown
;
2584 struct list_head loop_terminator_link
;
2585 } nir_loop_terminator
;
2588 /* Estimated cost (in number of instructions) of the loop */
2589 unsigned instr_cost
;
2591 /* Guessed trip count based on array indexing */
2592 unsigned guessed_trip_count
;
2594 /* Maximum number of times the loop is run (if known) */
2595 unsigned max_trip_count
;
2597 /* Do we know the exact number of times the loop will be run */
2598 bool exact_trip_count_known
;
2600 /* Unroll the loop regardless of its size */
2603 /* Does the loop contain complex loop terminators, continues or other
2604 * complex behaviours? If this is true we can't rely on
2605 * loop_terminator_list to be complete or accurate.
2609 nir_loop_terminator
*limiting_terminator
;
2611 /* A list of loop_terminators terminating this loop. */
2612 struct list_head loop_terminator_list
;
2616 nir_loop_control_none
= 0x0,
2617 nir_loop_control_unroll
= 0x1,
2618 nir_loop_control_dont_unroll
= 0x2,
2622 nir_cf_node cf_node
;
2624 struct exec_list body
; /** < list of nir_cf_node */
2626 nir_loop_info
*info
;
2627 nir_loop_control control
;
2628 bool partially_unrolled
;
2632 * Various bits of metadata that can may be created or required by
2633 * optimization and analysis passes
2636 nir_metadata_none
= 0x0,
2638 /** Indicates that nir_block::index values are valid.
2640 * The start block has index 0 and they increase through a natural walk of
2641 * the CFG. nir_function_impl::num_blocks is the number of blocks and
2642 * every block index is in the range [0, nir_function_impl::num_blocks].
2644 * A pass can preserve this metadata type if it doesn't touch the CFG.
2646 nir_metadata_block_index
= 0x1,
2648 /** Indicates that block dominance information is valid
2652 * - nir_block::num_dom_children
2653 * - nir_block::dom_children
2654 * - nir_block::dom_frontier
2655 * - nir_block::dom_pre_index
2656 * - nir_block::dom_post_index
2658 * A pass can preserve this metadata type if it doesn't touch the CFG.
2660 nir_metadata_dominance
= 0x2,
2662 /** Indicates that SSA def data-flow liveness information is valid
2666 * - nir_ssa_def::live_index
2667 * - nir_block::live_in
2668 * - nir_block::live_out
2670 * A pass can preserve this metadata type if it never adds or removes any
2671 * SSA defs (most passes shouldn't preserve this metadata type).
2673 nir_metadata_live_ssa_defs
= 0x4,
2675 /** A dummy metadata value to track when a pass forgot to call
2676 * nir_metadata_preserve.
2678 * A pass should always clear this value even if it doesn't make any
2679 * progress to indicate that it thought about preserving metadata.
2681 nir_metadata_not_properly_reset
= 0x8,
2683 /** Indicates that loop analysis information is valid.
2685 * This includes everything pointed to by nir_loop::info.
2687 * A pass can preserve this metadata type if it is guaranteed to not affect
2688 * any loop metadata. However, since loop metadata includes things like
2689 * loop counts which depend on arithmetic in the loop, this is very hard to
2690 * determine. Most passes shouldn't preserve this metadata type.
2692 nir_metadata_loop_analysis
= 0x10,
2696 nir_cf_node cf_node
;
2698 /** pointer to the function of which this is an implementation */
2699 struct nir_function
*function
;
2701 struct exec_list body
; /** < list of nir_cf_node */
2703 nir_block
*end_block
;
2705 /** list for all local variables in the function */
2706 struct exec_list locals
;
2708 /** list of local registers in the function */
2709 struct exec_list registers
;
2711 /** next available local register index */
2714 /** next available SSA value index */
2717 /* total number of basic blocks, only valid when block_index_dirty = false */
2718 unsigned num_blocks
;
2720 nir_metadata valid_metadata
;
2721 } nir_function_impl
;
2723 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2724 nir_start_block(nir_function_impl
*impl
)
2726 return (nir_block
*) impl
->body
.head_sentinel
.next
;
2729 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2730 nir_impl_last_block(nir_function_impl
*impl
)
2732 return (nir_block
*) impl
->body
.tail_sentinel
.prev
;
2735 static inline nir_cf_node
*
2736 nir_cf_node_next(nir_cf_node
*node
)
2738 struct exec_node
*next
= exec_node_get_next(&node
->node
);
2739 if (exec_node_is_tail_sentinel(next
))
2742 return exec_node_data(nir_cf_node
, next
, node
);
2745 static inline nir_cf_node
*
2746 nir_cf_node_prev(nir_cf_node
*node
)
2748 struct exec_node
*prev
= exec_node_get_prev(&node
->node
);
2749 if (exec_node_is_head_sentinel(prev
))
2752 return exec_node_data(nir_cf_node
, prev
, node
);
2756 nir_cf_node_is_first(const nir_cf_node
*node
)
2758 return exec_node_is_head_sentinel(node
->node
.prev
);
2762 nir_cf_node_is_last(const nir_cf_node
*node
)
2764 return exec_node_is_tail_sentinel(node
->node
.next
);
2767 NIR_DEFINE_CAST(nir_cf_node_as_block
, nir_cf_node
, nir_block
, cf_node
,
2768 type
, nir_cf_node_block
)
2769 NIR_DEFINE_CAST(nir_cf_node_as_if
, nir_cf_node
, nir_if
, cf_node
,
2770 type
, nir_cf_node_if
)
2771 NIR_DEFINE_CAST(nir_cf_node_as_loop
, nir_cf_node
, nir_loop
, cf_node
,
2772 type
, nir_cf_node_loop
)
2773 NIR_DEFINE_CAST(nir_cf_node_as_function
, nir_cf_node
,
2774 nir_function_impl
, cf_node
, type
, nir_cf_node_function
)
2776 static inline nir_block
*
2777 nir_if_first_then_block(nir_if
*if_stmt
)
2779 struct exec_node
*head
= exec_list_get_head(&if_stmt
->then_list
);
2780 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2783 static inline nir_block
*
2784 nir_if_last_then_block(nir_if
*if_stmt
)
2786 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->then_list
);
2787 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2790 static inline nir_block
*
2791 nir_if_first_else_block(nir_if
*if_stmt
)
2793 struct exec_node
*head
= exec_list_get_head(&if_stmt
->else_list
);
2794 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2797 static inline nir_block
*
2798 nir_if_last_else_block(nir_if
*if_stmt
)
2800 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->else_list
);
2801 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2804 static inline nir_block
*
2805 nir_loop_first_block(nir_loop
*loop
)
2807 struct exec_node
*head
= exec_list_get_head(&loop
->body
);
2808 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2811 static inline nir_block
*
2812 nir_loop_last_block(nir_loop
*loop
)
2814 struct exec_node
*tail
= exec_list_get_tail(&loop
->body
);
2815 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2819 * Return true if this list of cf_nodes contains a single empty block.
2822 nir_cf_list_is_empty_block(struct exec_list
*cf_list
)
2824 if (exec_list_is_singular(cf_list
)) {
2825 struct exec_node
*head
= exec_list_get_head(cf_list
);
2827 nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2828 return exec_list_is_empty(&block
->instr_list
);
2834 uint8_t num_components
;
2838 typedef struct nir_function
{
2839 struct exec_node node
;
2842 struct nir_shader
*shader
;
2844 unsigned num_params
;
2845 nir_parameter
*params
;
2847 /** The implementation of this function.
2849 * If the function is only declared and not implemented, this is NULL.
2851 nir_function_impl
*impl
;
2857 nir_lower_imul64
= (1 << 0),
2858 nir_lower_isign64
= (1 << 1),
2859 /** Lower all int64 modulus and division opcodes */
2860 nir_lower_divmod64
= (1 << 2),
2861 /** Lower all 64-bit umul_high and imul_high opcodes */
2862 nir_lower_imul_high64
= (1 << 3),
2863 nir_lower_mov64
= (1 << 4),
2864 nir_lower_icmp64
= (1 << 5),
2865 nir_lower_iadd64
= (1 << 6),
2866 nir_lower_iabs64
= (1 << 7),
2867 nir_lower_ineg64
= (1 << 8),
2868 nir_lower_logic64
= (1 << 9),
2869 nir_lower_minmax64
= (1 << 10),
2870 nir_lower_shift64
= (1 << 11),
2871 nir_lower_imul_2x32_64
= (1 << 12),
2872 nir_lower_extract64
= (1 << 13),
2873 nir_lower_ufind_msb64
= (1 << 14),
2874 } nir_lower_int64_options
;
2877 nir_lower_drcp
= (1 << 0),
2878 nir_lower_dsqrt
= (1 << 1),
2879 nir_lower_drsq
= (1 << 2),
2880 nir_lower_dtrunc
= (1 << 3),
2881 nir_lower_dfloor
= (1 << 4),
2882 nir_lower_dceil
= (1 << 5),
2883 nir_lower_dfract
= (1 << 6),
2884 nir_lower_dround_even
= (1 << 7),
2885 nir_lower_dmod
= (1 << 8),
2886 nir_lower_dsub
= (1 << 9),
2887 nir_lower_ddiv
= (1 << 10),
2888 nir_lower_fp64_full_software
= (1 << 11),
2889 } nir_lower_doubles_options
;
2892 nir_divergence_single_prim_per_subgroup
= (1 << 0),
2893 nir_divergence_single_patch_per_tcs_subgroup
= (1 << 1),
2894 nir_divergence_single_patch_per_tes_subgroup
= (1 << 2),
2895 nir_divergence_view_index_uniform
= (1 << 3),
2896 } nir_divergence_options
;
2898 typedef struct nir_shader_compiler_options
{
2904 /** Lowers flrp when it does not support doubles */
2911 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2912 bool lower_bitfield_extract
;
2913 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2914 bool lower_bitfield_extract_to_shifts
;
2915 /** Lowers bitfield_insert to bfi/bfm */
2916 bool lower_bitfield_insert
;
2917 /** Lowers bitfield_insert to compares, and shifts. */
2918 bool lower_bitfield_insert_to_shifts
;
2919 /** Lowers bitfield_insert to bfm/bitfield_select. */
2920 bool lower_bitfield_insert_to_bitfield_select
;
2921 /** Lowers bitfield_reverse to shifts. */
2922 bool lower_bitfield_reverse
;
2923 /** Lowers bit_count to shifts. */
2924 bool lower_bit_count
;
2925 /** Lowers ifind_msb to compare and ufind_msb */
2926 bool lower_ifind_msb
;
2927 /** Lowers find_lsb to ufind_msb and logic ops */
2928 bool lower_find_lsb
;
2929 bool lower_uadd_carry
;
2930 bool lower_usub_borrow
;
2931 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2932 bool lower_mul_high
;
2933 /** lowers fneg and ineg to fsub and isub. */
2935 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2938 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2941 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2942 bool lower_vector_cmp
;
2944 /** enables rules to lower idiv by power-of-two: */
2947 /** enable rules to avoid bit ops */
2950 /** enables rules to lower isign to imin+imax */
2953 /** enables rules to lower fsign to fsub and flt */
2956 /* lower fdph to fdot4 */
2959 /** lower fdot to fmul and fsum/fadd. */
2962 /* Does the native fdot instruction replicate its result for four
2963 * components? If so, then opt_algebraic_late will turn all fdotN
2964 * instructions into fdot_replicatedN instructions.
2966 bool fdot_replicates
;
2968 /** lowers ffloor to fsub+ffract: */
2971 /** lowers ffract to fsub+ffloor: */
2974 /** lowers fceil to fneg+ffloor+fneg: */
2981 bool lower_pack_half_2x16
;
2982 bool lower_pack_unorm_2x16
;
2983 bool lower_pack_snorm_2x16
;
2984 bool lower_pack_unorm_4x8
;
2985 bool lower_pack_snorm_4x8
;
2986 bool lower_unpack_half_2x16
;
2987 bool lower_unpack_unorm_2x16
;
2988 bool lower_unpack_snorm_2x16
;
2989 bool lower_unpack_unorm_4x8
;
2990 bool lower_unpack_snorm_4x8
;
2992 bool lower_pack_split
;
2994 bool lower_extract_byte
;
2995 bool lower_extract_word
;
2997 bool lower_all_io_to_temps
;
2998 bool lower_all_io_to_elements
;
3000 /* Indicates that the driver only has zero-based vertex id */
3001 bool vertex_id_zero_based
;
3004 * If enabled, gl_BaseVertex will be lowered as:
3005 * is_indexed_draw (~0/0) & firstvertex
3007 bool lower_base_vertex
;
3010 * If enabled, gl_HelperInvocation will be lowered as:
3012 * !((1 << sample_id) & sample_mask_in))
3014 * This depends on some possibly hw implementation details, which may
3015 * not be true for all hw. In particular that the FS is only executed
3016 * for covered samples or for helper invocations. So, do not blindly
3017 * enable this option.
3019 * Note: See also issue #22 in ARB_shader_image_load_store
3021 bool lower_helper_invocation
;
3024 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
3026 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
3027 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
3029 bool optimize_sample_mask_in
;
3031 bool lower_cs_local_index_from_id
;
3032 bool lower_cs_local_id_from_index
;
3034 bool lower_device_index_to_zero
;
3036 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
3037 bool lower_wpos_pntc
;
3040 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
3041 * lowered to simple arithmetic.
3043 * If this flag is set, the lowering will be applied to all bit-sizes of
3044 * these instructions.
3046 * \sa ::lower_hadd64
3051 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
3052 * should be lowered to simple arithmetic.
3054 * If this flag is set, the lowering will be applied to only 64-bit
3055 * versions of these instructions.
3062 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
3065 * If this flag is set, the lowering will be applied to all bit-sizes of
3066 * these instructions.
3068 * \sa ::lower_usub_sat64
3073 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
3076 * \sa ::lower_add_sat
3078 bool lower_usub_sat64
;
3081 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
3082 * for IO purposes and would prefer loads/stores be vectorized.
3085 bool lower_to_scalar
;
3088 * Should the linker unify inputs_read/outputs_written between adjacent
3089 * shader stages which are linked into a single program?
3091 bool unify_interfaces
;
3094 * Should nir_lower_io() create load_interpolated_input intrinsics?
3096 * If not, it generates regular load_input intrinsics and interpolation
3097 * information must be inferred from the list of input nir_variables.
3099 bool use_interpolated_input_intrinsics
;
3101 /* Lowers when 32x32->64 bit multiplication is not supported */
3102 bool lower_mul_2x32_64
;
3104 /* Lowers when rotate instruction is not supported */
3108 * Backend supports imul24, and would like to use it (when possible)
3109 * for address/offset calculation. If true, driver should call
3110 * nir_lower_amul(). (If not set, amul will automatically be lowered
3115 /** Backend supports umul24, if not set umul24 will automatically be lowered
3116 * to imul with masked inputs */
3119 /** Backend supports umad24, if not set umad24 will automatically be lowered
3120 * to imul with masked inputs and iadd */
3123 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
3124 * set of memory barrier intrinsics based on GLSL.
3126 bool use_scoped_memory_barrier
;
3129 * Is this the Intel vec4 backend?
3131 * Used to inhibit algebraic optimizations that are known to be harmful on
3132 * the Intel vec4 backend. This is generally applicable to any
3133 * optimization that might cause more immediate values to be used in
3134 * 3-source (e.g., ffma and flrp) instructions.
3138 /** Lower nir_op_ibfe and nir_op_ubfe that have two constant sources. */
3139 bool lower_bfe_with_two_constants
;
3141 /** Whether 8-bit ALU is supported. */
3142 bool support_8bit_alu
;
3144 /** Whether 16-bit ALU is supported. */
3145 bool support_16bit_alu
;
3147 unsigned max_unroll_iterations
;
3149 nir_lower_int64_options lower_int64_options
;
3150 nir_lower_doubles_options lower_doubles_options
;
3151 } nir_shader_compiler_options
;
3153 typedef struct nir_shader
{
3154 /** list of uniforms (nir_variable) */
3155 struct exec_list uniforms
;
3157 /** list of inputs (nir_variable) */
3158 struct exec_list inputs
;
3160 /** list of outputs (nir_variable) */
3161 struct exec_list outputs
;
3163 /** list of shared compute variables (nir_variable) */
3164 struct exec_list shared
;
3166 /** Set of driver-specific options for the shader.
3168 * The memory for the options is expected to be kept in a single static
3169 * copy by the driver.
3171 const struct nir_shader_compiler_options
*options
;
3173 /** Various bits of compile-time information about a given shader */
3174 struct shader_info info
;
3176 /** list of global variables in the shader (nir_variable) */
3177 struct exec_list globals
;
3179 /** list of system value variables in the shader (nir_variable) */
3180 struct exec_list system_values
;
3182 struct exec_list functions
; /** < list of nir_function */
3185 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3188 unsigned num_inputs
, num_uniforms
, num_outputs
, num_shared
;
3190 /** Size in bytes of required scratch space */
3191 unsigned scratch_size
;
3193 /** Constant data associated with this shader.
3195 * Constant data is loaded through load_constant intrinsics. See also
3196 * nir_opt_large_constants.
3198 void *constant_data
;
3199 unsigned constant_data_size
;
3202 #define nir_foreach_function(func, shader) \
3203 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3205 static inline nir_function_impl
*
3206 nir_shader_get_entrypoint(nir_shader
*shader
)
3208 nir_function
*func
= NULL
;
3210 nir_foreach_function(function
, shader
) {
3211 assert(func
== NULL
);
3212 if (function
->is_entrypoint
) {
3223 assert(func
->num_params
== 0);
3228 nir_shader
*nir_shader_create(void *mem_ctx
,
3229 gl_shader_stage stage
,
3230 const nir_shader_compiler_options
*options
,
3233 nir_register
*nir_local_reg_create(nir_function_impl
*impl
);
3235 void nir_reg_remove(nir_register
*reg
);
3237 /** Adds a variable to the appropriate list in nir_shader */
3238 void nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
);
3241 nir_function_impl_add_variable(nir_function_impl
*impl
, nir_variable
*var
)
3243 assert(var
->data
.mode
== nir_var_function_temp
);
3244 exec_list_push_tail(&impl
->locals
, &var
->node
);
3247 /** creates a variable, sets a few defaults, and adds it to the list */
3248 nir_variable
*nir_variable_create(nir_shader
*shader
,
3249 nir_variable_mode mode
,
3250 const struct glsl_type
*type
,
3252 /** creates a local variable and adds it to the list */
3253 nir_variable
*nir_local_variable_create(nir_function_impl
*impl
,
3254 const struct glsl_type
*type
,
3257 /** creates a function and adds it to the shader's list of functions */
3258 nir_function
*nir_function_create(nir_shader
*shader
, const char *name
);
3260 nir_function_impl
*nir_function_impl_create(nir_function
*func
);
3261 /** creates a function_impl that isn't tied to any particular function */
3262 nir_function_impl
*nir_function_impl_create_bare(nir_shader
*shader
);
3264 nir_block
*nir_block_create(nir_shader
*shader
);
3265 nir_if
*nir_if_create(nir_shader
*shader
);
3266 nir_loop
*nir_loop_create(nir_shader
*shader
);
3268 nir_function_impl
*nir_cf_node_get_function(nir_cf_node
*node
);
3270 /** requests that the given pieces of metadata be generated */
3271 void nir_metadata_require(nir_function_impl
*impl
, nir_metadata required
, ...);
3272 /** dirties all but the preserved metadata */
3273 void nir_metadata_preserve(nir_function_impl
*impl
, nir_metadata preserved
);
3275 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3276 nir_alu_instr
*nir_alu_instr_create(nir_shader
*shader
, nir_op op
);
3278 nir_deref_instr
*nir_deref_instr_create(nir_shader
*shader
,
3279 nir_deref_type deref_type
);
3281 nir_jump_instr
*nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
);
3283 nir_load_const_instr
*nir_load_const_instr_create(nir_shader
*shader
,
3284 unsigned num_components
,
3287 nir_intrinsic_instr
*nir_intrinsic_instr_create(nir_shader
*shader
,
3288 nir_intrinsic_op op
);
3290 nir_call_instr
*nir_call_instr_create(nir_shader
*shader
,
3291 nir_function
*callee
);
3293 nir_tex_instr
*nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
);
3295 nir_phi_instr
*nir_phi_instr_create(nir_shader
*shader
);
3297 nir_parallel_copy_instr
*nir_parallel_copy_instr_create(nir_shader
*shader
);
3299 nir_ssa_undef_instr
*nir_ssa_undef_instr_create(nir_shader
*shader
,
3300 unsigned num_components
,
3303 nir_const_value
nir_alu_binop_identity(nir_op binop
, unsigned bit_size
);
3306 * NIR Cursors and Instruction Insertion API
3309 * A tiny struct representing a point to insert/extract instructions or
3310 * control flow nodes. Helps reduce the combinatorial explosion of possible
3311 * points to insert/extract.
3313 * \sa nir_control_flow.h
3316 nir_cursor_before_block
,
3317 nir_cursor_after_block
,
3318 nir_cursor_before_instr
,
3319 nir_cursor_after_instr
,
3320 } nir_cursor_option
;
3323 nir_cursor_option option
;
3330 static inline nir_block
*
3331 nir_cursor_current_block(nir_cursor cursor
)
3333 if (cursor
.option
== nir_cursor_before_instr
||
3334 cursor
.option
== nir_cursor_after_instr
) {
3335 return cursor
.instr
->block
;
3337 return cursor
.block
;
3341 bool nir_cursors_equal(nir_cursor a
, nir_cursor b
);
3343 static inline nir_cursor
3344 nir_before_block(nir_block
*block
)
3347 cursor
.option
= nir_cursor_before_block
;
3348 cursor
.block
= block
;
3352 static inline nir_cursor
3353 nir_after_block(nir_block
*block
)
3356 cursor
.option
= nir_cursor_after_block
;
3357 cursor
.block
= block
;
3361 static inline nir_cursor
3362 nir_before_instr(nir_instr
*instr
)
3365 cursor
.option
= nir_cursor_before_instr
;
3366 cursor
.instr
= instr
;
3370 static inline nir_cursor
3371 nir_after_instr(nir_instr
*instr
)
3374 cursor
.option
= nir_cursor_after_instr
;
3375 cursor
.instr
= instr
;
3379 static inline nir_cursor
3380 nir_after_block_before_jump(nir_block
*block
)
3382 nir_instr
*last_instr
= nir_block_last_instr(block
);
3383 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
3384 return nir_before_instr(last_instr
);
3386 return nir_after_block(block
);
3390 static inline nir_cursor
3391 nir_before_src(nir_src
*src
, bool is_if_condition
)
3393 if (is_if_condition
) {
3394 nir_block
*prev_block
=
3395 nir_cf_node_as_block(nir_cf_node_prev(&src
->parent_if
->cf_node
));
3396 assert(!nir_block_ends_in_jump(prev_block
));
3397 return nir_after_block(prev_block
);
3398 } else if (src
->parent_instr
->type
== nir_instr_type_phi
) {
3400 nir_phi_instr
*cond_phi
= nir_instr_as_phi(src
->parent_instr
);
3402 nir_foreach_phi_src(phi_src
, cond_phi
) {
3403 if (phi_src
->src
.ssa
== src
->ssa
) {
3410 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3411 * to have a more specific name.
3413 nir_phi_src
*phi_src
= LIST_ENTRY(nir_phi_src
, src
, src
);
3414 return nir_after_block_before_jump(phi_src
->pred
);
3416 return nir_before_instr(src
->parent_instr
);
3420 static inline nir_cursor
3421 nir_before_cf_node(nir_cf_node
*node
)
3423 if (node
->type
== nir_cf_node_block
)
3424 return nir_before_block(nir_cf_node_as_block(node
));
3426 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node
)));
3429 static inline nir_cursor
3430 nir_after_cf_node(nir_cf_node
*node
)
3432 if (node
->type
== nir_cf_node_block
)
3433 return nir_after_block(nir_cf_node_as_block(node
));
3435 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node
)));
3438 static inline nir_cursor
3439 nir_after_phis(nir_block
*block
)
3441 nir_foreach_instr(instr
, block
) {
3442 if (instr
->type
!= nir_instr_type_phi
)
3443 return nir_before_instr(instr
);
3445 return nir_after_block(block
);
3448 static inline nir_cursor
3449 nir_after_cf_node_and_phis(nir_cf_node
*node
)
3451 if (node
->type
== nir_cf_node_block
)
3452 return nir_after_block(nir_cf_node_as_block(node
));
3454 nir_block
*block
= nir_cf_node_as_block(nir_cf_node_next(node
));
3456 return nir_after_phis(block
);
3459 static inline nir_cursor
3460 nir_before_cf_list(struct exec_list
*cf_list
)
3462 nir_cf_node
*first_node
= exec_node_data(nir_cf_node
,
3463 exec_list_get_head(cf_list
), node
);
3464 return nir_before_cf_node(first_node
);
3467 static inline nir_cursor
3468 nir_after_cf_list(struct exec_list
*cf_list
)
3470 nir_cf_node
*last_node
= exec_node_data(nir_cf_node
,
3471 exec_list_get_tail(cf_list
), node
);
3472 return nir_after_cf_node(last_node
);
3476 * Insert a NIR instruction at the given cursor.
3478 * Note: This does not update the cursor.
3480 void nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
);
3483 nir_instr_insert_before(nir_instr
*instr
, nir_instr
*before
)
3485 nir_instr_insert(nir_before_instr(instr
), before
);
3489 nir_instr_insert_after(nir_instr
*instr
, nir_instr
*after
)
3491 nir_instr_insert(nir_after_instr(instr
), after
);
3495 nir_instr_insert_before_block(nir_block
*block
, nir_instr
*before
)
3497 nir_instr_insert(nir_before_block(block
), before
);
3501 nir_instr_insert_after_block(nir_block
*block
, nir_instr
*after
)
3503 nir_instr_insert(nir_after_block(block
), after
);
3507 nir_instr_insert_before_cf(nir_cf_node
*node
, nir_instr
*before
)
3509 nir_instr_insert(nir_before_cf_node(node
), before
);
3513 nir_instr_insert_after_cf(nir_cf_node
*node
, nir_instr
*after
)
3515 nir_instr_insert(nir_after_cf_node(node
), after
);
3519 nir_instr_insert_before_cf_list(struct exec_list
*list
, nir_instr
*before
)
3521 nir_instr_insert(nir_before_cf_list(list
), before
);
3525 nir_instr_insert_after_cf_list(struct exec_list
*list
, nir_instr
*after
)
3527 nir_instr_insert(nir_after_cf_list(list
), after
);
3530 void nir_instr_remove_v(nir_instr
*instr
);
3532 static inline nir_cursor
3533 nir_instr_remove(nir_instr
*instr
)
3536 nir_instr
*prev
= nir_instr_prev(instr
);
3538 cursor
= nir_after_instr(prev
);
3540 cursor
= nir_before_block(instr
->block
);
3542 nir_instr_remove_v(instr
);
3548 nir_ssa_def
*nir_instr_ssa_def(nir_instr
*instr
);
3550 typedef bool (*nir_foreach_ssa_def_cb
)(nir_ssa_def
*def
, void *state
);
3551 typedef bool (*nir_foreach_dest_cb
)(nir_dest
*dest
, void *state
);
3552 typedef bool (*nir_foreach_src_cb
)(nir_src
*src
, void *state
);
3553 bool nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
,
3555 bool nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
);
3556 bool nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
);
3557 bool nir_foreach_phi_src_leaving_block(nir_block
*instr
,
3558 nir_foreach_src_cb cb
,
3561 nir_const_value
*nir_src_as_const_value(nir_src src
);
3563 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3564 static inline c_type * \
3565 nir_src_as_ ## name (nir_src src) \
3567 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3568 ? cast_macro(src.ssa->parent_instr) : NULL; \
3571 NIR_SRC_AS_(alu_instr
, nir_alu_instr
, nir_instr_type_alu
, nir_instr_as_alu
)
3572 NIR_SRC_AS_(intrinsic
, nir_intrinsic_instr
,
3573 nir_instr_type_intrinsic
, nir_instr_as_intrinsic
)
3574 NIR_SRC_AS_(deref
, nir_deref_instr
, nir_instr_type_deref
, nir_instr_as_deref
)
3576 bool nir_src_is_dynamically_uniform(nir_src src
);
3577 bool nir_srcs_equal(nir_src src1
, nir_src src2
);
3578 bool nir_instrs_equal(const nir_instr
*instr1
, const nir_instr
*instr2
);
3579 void nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
);
3580 void nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
);
3581 void nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
);
3582 void nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
,
3585 void nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
3586 unsigned num_components
, unsigned bit_size
,
3588 void nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
3589 unsigned num_components
, unsigned bit_size
,
3592 nir_ssa_dest_init_for_type(nir_instr
*instr
, nir_dest
*dest
,
3593 const struct glsl_type
*type
,
3596 assert(glsl_type_is_vector_or_scalar(type
));
3597 nir_ssa_dest_init(instr
, dest
, glsl_get_components(type
),
3598 glsl_get_bit_size(type
), name
);
3600 void nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
);
3601 void nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
3602 nir_instr
*after_me
);
3604 nir_component_mask_t
nir_ssa_def_components_read(const nir_ssa_def
*def
);
3607 * finds the next basic block in source-code order, returns NULL if there is
3611 nir_block
*nir_block_cf_tree_next(nir_block
*block
);
3613 /* Performs the opposite of nir_block_cf_tree_next() */
3615 nir_block
*nir_block_cf_tree_prev(nir_block
*block
);
3617 /* Gets the first block in a CF node in source-code order */
3619 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
);
3621 /* Gets the last block in a CF node in source-code order */
3623 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
);
3625 /* Gets the next block after a CF node in source-code order */
3627 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
);
3629 /* Macros for loops that visit blocks in source-code order */
3631 #define nir_foreach_block(block, impl) \
3632 for (nir_block *block = nir_start_block(impl); block != NULL; \
3633 block = nir_block_cf_tree_next(block))
3635 #define nir_foreach_block_safe(block, impl) \
3636 for (nir_block *block = nir_start_block(impl), \
3637 *next = nir_block_cf_tree_next(block); \
3639 block = next, next = nir_block_cf_tree_next(block))
3641 #define nir_foreach_block_reverse(block, impl) \
3642 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3643 block = nir_block_cf_tree_prev(block))
3645 #define nir_foreach_block_reverse_safe(block, impl) \
3646 for (nir_block *block = nir_impl_last_block(impl), \
3647 *prev = nir_block_cf_tree_prev(block); \
3649 block = prev, prev = nir_block_cf_tree_prev(block))
3651 #define nir_foreach_block_in_cf_node(block, node) \
3652 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3653 block != nir_cf_node_cf_tree_next(node); \
3654 block = nir_block_cf_tree_next(block))
3656 /* If the following CF node is an if, this function returns that if.
3657 * Otherwise, it returns NULL.
3659 nir_if
*nir_block_get_following_if(nir_block
*block
);
3661 nir_loop
*nir_block_get_following_loop(nir_block
*block
);
3663 void nir_index_local_regs(nir_function_impl
*impl
);
3664 void nir_index_ssa_defs(nir_function_impl
*impl
);
3665 unsigned nir_index_instrs(nir_function_impl
*impl
);
3667 void nir_index_blocks(nir_function_impl
*impl
);
3669 void nir_index_vars(nir_shader
*shader
, nir_function_impl
*impl
, nir_variable_mode modes
);
3671 void nir_print_shader(nir_shader
*shader
, FILE *fp
);
3672 void nir_print_shader_annotated(nir_shader
*shader
, FILE *fp
, struct hash_table
*errors
);
3673 void nir_print_instr(const nir_instr
*instr
, FILE *fp
);
3674 void nir_print_deref(const nir_deref_instr
*deref
, FILE *fp
);
3676 /** Shallow clone of a single ALU instruction. */
3677 nir_alu_instr
*nir_alu_instr_clone(nir_shader
*s
, const nir_alu_instr
*orig
);
3679 nir_shader
*nir_shader_clone(void *mem_ctx
, const nir_shader
*s
);
3680 nir_function_impl
*nir_function_impl_clone(nir_shader
*shader
,
3681 const nir_function_impl
*fi
);
3682 nir_constant
*nir_constant_clone(const nir_constant
*c
, nir_variable
*var
);
3683 nir_variable
*nir_variable_clone(const nir_variable
*c
, nir_shader
*shader
);
3685 void nir_shader_replace(nir_shader
*dest
, nir_shader
*src
);
3687 void nir_shader_serialize_deserialize(nir_shader
*s
);
3690 void nir_validate_shader(nir_shader
*shader
, const char *when
);
3691 void nir_metadata_set_validation_flag(nir_shader
*shader
);
3692 void nir_metadata_check_validation_flag(nir_shader
*shader
);
3695 should_skip_nir(const char *name
)
3697 static const char *list
= NULL
;
3699 /* Comma separated list of names to skip. */
3700 list
= getenv("NIR_SKIP");
3708 return comma_separated_list_contains(list
, name
);
3712 should_clone_nir(void)
3714 static int should_clone
= -1;
3715 if (should_clone
< 0)
3716 should_clone
= env_var_as_boolean("NIR_TEST_CLONE", false);
3718 return should_clone
;
3722 should_serialize_deserialize_nir(void)
3724 static int test_serialize
= -1;
3725 if (test_serialize
< 0)
3726 test_serialize
= env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3728 return test_serialize
;
3732 should_print_nir(void)
3734 static int should_print
= -1;
3735 if (should_print
< 0)
3736 should_print
= env_var_as_boolean("NIR_PRINT", false);
3738 return should_print
;
3741 static inline void nir_validate_shader(nir_shader
*shader
, const char *when
) { (void) shader
; (void)when
; }
3742 static inline void nir_metadata_set_validation_flag(nir_shader
*shader
) { (void) shader
; }
3743 static inline void nir_metadata_check_validation_flag(nir_shader
*shader
) { (void) shader
; }
3744 static inline bool should_skip_nir(UNUSED
const char *pass_name
) { return false; }
3745 static inline bool should_clone_nir(void) { return false; }
3746 static inline bool should_serialize_deserialize_nir(void) { return false; }
3747 static inline bool should_print_nir(void) { return false; }
3750 #define _PASS(pass, nir, do_pass) do { \
3751 if (should_skip_nir(#pass)) { \
3752 printf("skipping %s\n", #pass); \
3756 nir_validate_shader(nir, "after " #pass); \
3757 if (should_clone_nir()) { \
3758 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3759 nir_shader_replace(nir, clone); \
3761 if (should_serialize_deserialize_nir()) { \
3762 nir_shader_serialize_deserialize(nir); \
3766 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3767 nir_metadata_set_validation_flag(nir); \
3768 if (should_print_nir()) \
3769 printf("%s\n", #pass); \
3770 if (pass(nir, ##__VA_ARGS__)) { \
3772 if (should_print_nir()) \
3773 nir_print_shader(nir, stdout); \
3774 nir_metadata_check_validation_flag(nir); \
3778 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3779 if (should_print_nir()) \
3780 printf("%s\n", #pass); \
3781 pass(nir, ##__VA_ARGS__); \
3782 if (should_print_nir()) \
3783 nir_print_shader(nir, stdout); \
3786 #define NIR_SKIP(name) should_skip_nir(#name)
3788 /** An instruction filtering callback
3790 * Returns true if the instruction should be processed and false otherwise.
3792 typedef bool (*nir_instr_filter_cb
)(const nir_instr
*, const void *);
3794 /** A simple instruction lowering callback
3796 * Many instruction lowering passes can be written as a simple function which
3797 * takes an instruction as its input and returns a sequence of instructions
3798 * that implement the consumed instruction. This function type represents
3799 * such a lowering function. When called, a function with this prototype
3800 * should either return NULL indicating that no lowering needs to be done or
3801 * emit a sequence of instructions using the provided builder (whose cursor
3802 * will already be placed after the instruction to be lowered) and return the
3803 * resulting nir_ssa_def.
3805 typedef nir_ssa_def
*(*nir_lower_instr_cb
)(struct nir_builder
*,
3806 nir_instr
*, void *);
3809 * Special return value for nir_lower_instr_cb when some progress occurred
3810 * (like changing an input to the instr) that didn't result in a replacement
3811 * SSA def being generated.
3813 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3815 /** Iterate over all the instructions in a nir_function_impl and lower them
3816 * using the provided callbacks
3818 * This function implements the guts of a standard lowering pass for you. It
3819 * iterates over all of the instructions in a nir_function_impl and calls the
3820 * filter callback on each one. If the filter callback returns true, it then
3821 * calls the lowering call back on the instruction. (Splitting it this way
3822 * allows us to avoid some save/restore work for instructions we know won't be
3823 * lowered.) If the instruction is dead after the lowering is complete, it
3824 * will be removed. If new instructions are added, the lowering callback will
3825 * also be called on them in case multiple lowerings are required.
3827 * The metadata for the nir_function_impl will also be updated. If any blocks
3828 * are added (they cannot be removed), dominance and block indices will be
3831 bool nir_function_impl_lower_instructions(nir_function_impl
*impl
,
3832 nir_instr_filter_cb filter
,
3833 nir_lower_instr_cb lower
,
3835 bool nir_shader_lower_instructions(nir_shader
*shader
,
3836 nir_instr_filter_cb filter
,
3837 nir_lower_instr_cb lower
,
3840 void nir_calc_dominance_impl(nir_function_impl
*impl
);
3841 void nir_calc_dominance(nir_shader
*shader
);
3843 nir_block
*nir_dominance_lca(nir_block
*b1
, nir_block
*b2
);
3844 bool nir_block_dominates(nir_block
*parent
, nir_block
*child
);
3845 bool nir_block_is_unreachable(nir_block
*block
);
3847 void nir_dump_dom_tree_impl(nir_function_impl
*impl
, FILE *fp
);
3848 void nir_dump_dom_tree(nir_shader
*shader
, FILE *fp
);
3850 void nir_dump_dom_frontier_impl(nir_function_impl
*impl
, FILE *fp
);
3851 void nir_dump_dom_frontier(nir_shader
*shader
, FILE *fp
);
3853 void nir_dump_cfg_impl(nir_function_impl
*impl
, FILE *fp
);
3854 void nir_dump_cfg(nir_shader
*shader
, FILE *fp
);
3856 int nir_gs_count_vertices(const nir_shader
*shader
);
3858 bool nir_shrink_vec_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3859 bool nir_split_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3860 bool nir_split_var_copies(nir_shader
*shader
);
3861 bool nir_split_per_member_structs(nir_shader
*shader
);
3862 bool nir_split_struct_vars(nir_shader
*shader
, nir_variable_mode modes
);
3864 bool nir_lower_returns_impl(nir_function_impl
*impl
);
3865 bool nir_lower_returns(nir_shader
*shader
);
3867 void nir_inline_function_impl(struct nir_builder
*b
,
3868 const nir_function_impl
*impl
,
3869 nir_ssa_def
**params
);
3870 bool nir_inline_functions(nir_shader
*shader
);
3872 bool nir_propagate_invariant(nir_shader
*shader
);
3874 void nir_lower_var_copy_instr(nir_intrinsic_instr
*copy
, nir_shader
*shader
);
3875 void nir_lower_deref_copy_instr(struct nir_builder
*b
,
3876 nir_intrinsic_instr
*copy
);
3877 bool nir_lower_var_copies(nir_shader
*shader
);
3879 void nir_fixup_deref_modes(nir_shader
*shader
);
3881 bool nir_lower_global_vars_to_local(nir_shader
*shader
);
3884 nir_lower_direct_array_deref_of_vec_load
= (1 << 0),
3885 nir_lower_indirect_array_deref_of_vec_load
= (1 << 1),
3886 nir_lower_direct_array_deref_of_vec_store
= (1 << 2),
3887 nir_lower_indirect_array_deref_of_vec_store
= (1 << 3),
3888 } nir_lower_array_deref_of_vec_options
;
3890 bool nir_lower_array_deref_of_vec(nir_shader
*shader
, nir_variable_mode modes
,
3891 nir_lower_array_deref_of_vec_options options
);
3893 bool nir_lower_indirect_derefs(nir_shader
*shader
, nir_variable_mode modes
);
3895 bool nir_lower_locals_to_regs(nir_shader
*shader
);
3897 void nir_lower_io_to_temporaries(nir_shader
*shader
,
3898 nir_function_impl
*entrypoint
,
3899 bool outputs
, bool inputs
);
3901 bool nir_lower_vars_to_scratch(nir_shader
*shader
,
3902 nir_variable_mode modes
,
3904 glsl_type_size_align_func size_align
);
3906 void nir_lower_clip_halfz(nir_shader
*shader
);
3908 void nir_shader_gather_info(nir_shader
*shader
, nir_function_impl
*entrypoint
);
3910 void nir_gather_ssa_types(nir_function_impl
*impl
,
3911 BITSET_WORD
*float_types
,
3912 BITSET_WORD
*int_types
);
3914 void nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
3915 int (*type_size
)(const struct glsl_type
*, bool));
3917 /* Some helpers to do very simple linking */
3918 bool nir_remove_unused_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3919 bool nir_remove_unused_io_vars(nir_shader
*shader
, struct exec_list
*var_list
,
3920 uint64_t *used_by_other_stage
,
3921 uint64_t *used_by_other_stage_patches
);
3922 void nir_compact_varyings(nir_shader
*producer
, nir_shader
*consumer
,
3923 bool default_to_smooth_interp
);
3924 void nir_link_xfb_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3925 bool nir_link_opt_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3927 bool nir_lower_amul(nir_shader
*shader
,
3928 int (*type_size
)(const struct glsl_type
*, bool));
3930 void nir_assign_io_var_locations(struct exec_list
*var_list
,
3932 gl_shader_stage stage
);
3935 uint8_t num_linked_io_vars
;
3936 uint8_t num_linked_patch_io_vars
;
3937 } nir_linked_io_var_info
;
3939 nir_linked_io_var_info
3940 nir_assign_linked_io_var_locations(nir_shader
*producer
,
3941 nir_shader
*consumer
);
3944 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3945 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3948 nir_lower_io_lower_64bit_to_32
= (1 << 0),
3950 /* If set, this forces all non-flat fragment shader inputs to be
3951 * interpolated as if with the "sample" qualifier. This requires
3952 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3954 nir_lower_io_force_sample_interpolation
= (1 << 1),
3955 } nir_lower_io_options
;
3956 bool nir_lower_io(nir_shader
*shader
,
3957 nir_variable_mode modes
,
3958 int (*type_size
)(const struct glsl_type
*, bool),
3959 nir_lower_io_options
);
3961 bool nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
);
3964 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
3965 nir_variable_mode modes
,
3966 glsl_type_size_align_func type_info
);
3970 * An address format which is a simple 32-bit global GPU address.
3972 nir_address_format_32bit_global
,
3975 * An address format which is a simple 64-bit global GPU address.
3977 nir_address_format_64bit_global
,
3980 * An address format which is a bounds-checked 64-bit global GPU address.
3982 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3983 * address stored with the low bits in .x and high bits in .y, .z is a
3984 * size, and .w is an offset. When the final I/O operation is lowered, .w
3985 * is checked against .z and the operation is predicated on the result.
3987 nir_address_format_64bit_bounded_global
,
3990 * An address format which is comprised of a vec2 where the first
3991 * component is a buffer index and the second is an offset.
3993 nir_address_format_32bit_index_offset
,
3996 * An address format which is a simple 32-bit offset.
3998 nir_address_format_32bit_offset
,
4001 * An address format representing a purely logical addressing model. In
4002 * this model, all deref chains must be complete from the dereference
4003 * operation to the variable. Cast derefs are not allowed. These
4004 * addresses will be 32-bit scalars but the format is immaterial because
4005 * you can always chase the chain.
4007 nir_address_format_logical
,
4008 } nir_address_format
;
4010 static inline unsigned
4011 nir_address_format_bit_size(nir_address_format addr_format
)
4013 switch (addr_format
) {
4014 case nir_address_format_32bit_global
: return 32;
4015 case nir_address_format_64bit_global
: return 64;
4016 case nir_address_format_64bit_bounded_global
: return 32;
4017 case nir_address_format_32bit_index_offset
: return 32;
4018 case nir_address_format_32bit_offset
: return 32;
4019 case nir_address_format_logical
: return 32;
4021 unreachable("Invalid address format");
4024 static inline unsigned
4025 nir_address_format_num_components(nir_address_format addr_format
)
4027 switch (addr_format
) {
4028 case nir_address_format_32bit_global
: return 1;
4029 case nir_address_format_64bit_global
: return 1;
4030 case nir_address_format_64bit_bounded_global
: return 4;
4031 case nir_address_format_32bit_index_offset
: return 2;
4032 case nir_address_format_32bit_offset
: return 1;
4033 case nir_address_format_logical
: return 1;
4035 unreachable("Invalid address format");
4038 static inline const struct glsl_type
*
4039 nir_address_format_to_glsl_type(nir_address_format addr_format
)
4041 unsigned bit_size
= nir_address_format_bit_size(addr_format
);
4042 assert(bit_size
== 32 || bit_size
== 64);
4043 return glsl_vector_type(bit_size
== 32 ? GLSL_TYPE_UINT
: GLSL_TYPE_UINT64
,
4044 nir_address_format_num_components(addr_format
));
4047 const nir_const_value
*nir_address_format_null_value(nir_address_format addr_format
);
4049 nir_ssa_def
*nir_build_addr_ieq(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
4050 nir_address_format addr_format
);
4052 nir_ssa_def
*nir_build_addr_isub(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
4053 nir_address_format addr_format
);
4055 nir_ssa_def
* nir_explicit_io_address_from_deref(struct nir_builder
*b
,
4056 nir_deref_instr
*deref
,
4057 nir_ssa_def
*base_addr
,
4058 nir_address_format addr_format
);
4059 void nir_lower_explicit_io_instr(struct nir_builder
*b
,
4060 nir_intrinsic_instr
*io_instr
,
4062 nir_address_format addr_format
);
4064 bool nir_lower_explicit_io(nir_shader
*shader
,
4065 nir_variable_mode modes
,
4066 nir_address_format
);
4068 nir_src
*nir_get_io_offset_src(nir_intrinsic_instr
*instr
);
4069 nir_src
*nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
);
4071 bool nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
);
4073 bool nir_lower_regs_to_ssa_impl(nir_function_impl
*impl
);
4074 bool nir_lower_regs_to_ssa(nir_shader
*shader
);
4075 bool nir_lower_vars_to_ssa(nir_shader
*shader
);
4077 bool nir_remove_dead_derefs(nir_shader
*shader
);
4078 bool nir_remove_dead_derefs_impl(nir_function_impl
*impl
);
4079 bool nir_remove_dead_variables(nir_shader
*shader
, nir_variable_mode modes
);
4080 bool nir_lower_variable_initializers(nir_shader
*shader
,
4081 nir_variable_mode modes
);
4083 bool nir_move_vec_src_uses_to_dest(nir_shader
*shader
);
4084 bool nir_lower_vec_to_movs(nir_shader
*shader
);
4085 void nir_lower_alpha_test(nir_shader
*shader
, enum compare_func func
,
4087 const gl_state_index16
*alpha_ref_state_tokens
);
4088 bool nir_lower_alu(nir_shader
*shader
);
4090 bool nir_lower_flrp(nir_shader
*shader
, unsigned lowering_mask
,
4091 bool always_precise
, bool have_ffma
);
4093 bool nir_lower_alu_to_scalar(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
4094 bool nir_lower_bool_to_bitsize(nir_shader
*shader
);
4095 bool nir_lower_bool_to_float(nir_shader
*shader
);
4096 bool nir_lower_bool_to_int32(nir_shader
*shader
);
4097 bool nir_lower_int_to_float(nir_shader
*shader
);
4098 bool nir_lower_load_const_to_scalar(nir_shader
*shader
);
4099 bool nir_lower_read_invocation_to_scalar(nir_shader
*shader
);
4100 bool nir_lower_phis_to_scalar(nir_shader
*shader
);
4101 void nir_lower_io_arrays_to_elements(nir_shader
*producer
, nir_shader
*consumer
);
4102 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader
*shader
,
4104 void nir_lower_io_to_scalar(nir_shader
*shader
, nir_variable_mode mask
);
4105 void nir_lower_io_to_scalar_early(nir_shader
*shader
, nir_variable_mode mask
);
4106 bool nir_lower_io_to_vector(nir_shader
*shader
, nir_variable_mode mask
);
4108 void nir_lower_fragcoord_wtrans(nir_shader
*shader
);
4109 void nir_lower_viewport_transform(nir_shader
*shader
);
4110 bool nir_lower_uniforms_to_ubo(nir_shader
*shader
, int multiplier
);
4112 typedef struct nir_lower_subgroups_options
{
4113 uint8_t subgroup_size
;
4114 uint8_t ballot_bit_size
;
4115 bool lower_to_scalar
:1;
4116 bool lower_vote_trivial
:1;
4117 bool lower_vote_eq_to_ballot
:1;
4118 bool lower_subgroup_masks
:1;
4119 bool lower_shuffle
:1;
4120 bool lower_shuffle_to_32bit
:1;
4122 bool lower_quad_broadcast_dynamic
:1;
4123 bool lower_quad_broadcast_dynamic_to_const
:1;
4124 } nir_lower_subgroups_options
;
4126 bool nir_lower_subgroups(nir_shader
*shader
,
4127 const nir_lower_subgroups_options
*options
);
4129 bool nir_lower_system_values(nir_shader
*shader
);
4131 enum PACKED nir_lower_tex_packing
{
4132 nir_lower_tex_packing_none
= 0,
4133 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
4134 * or unsigned ints based on the sampler type
4136 nir_lower_tex_packing_16
,
4137 /* The sampler returns 1 32-bit word of 4x8 unorm */
4138 nir_lower_tex_packing_8
,
4141 typedef struct nir_lower_tex_options
{
4143 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
4144 * sampler types a texture projector is lowered.
4149 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
4151 bool lower_txf_offset
;
4154 * If true, lower away nir_tex_src_offset for all rect textures.
4156 bool lower_rect_offset
;
4159 * If true, lower rect textures to 2D, using txs to fetch the
4160 * texture dimensions and dividing the texture coords by the
4161 * texture dims to normalize.
4166 * If true, convert yuv to rgb.
4168 unsigned lower_y_uv_external
;
4169 unsigned lower_y_u_v_external
;
4170 unsigned lower_yx_xuxv_external
;
4171 unsigned lower_xy_uxvx_external
;
4172 unsigned lower_ayuv_external
;
4173 unsigned lower_xyuv_external
;
4176 * To emulate certain texture wrap modes, this can be used
4177 * to saturate the specified tex coord to [0.0, 1.0]. The
4178 * bits are according to sampler #, ie. if, for example:
4180 * (conf->saturate_s & (1 << n))
4182 * is true, then the s coord for sampler n is saturated.
4184 * Note that clamping must happen *after* projector lowering
4185 * so any projected texture sample instruction with a clamped
4186 * coordinate gets automatically lowered, regardless of the
4187 * 'lower_txp' setting.
4189 unsigned saturate_s
;
4190 unsigned saturate_t
;
4191 unsigned saturate_r
;
4193 /* Bitmask of textures that need swizzling.
4195 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4196 * swizzles[texture_index] is applied to the result of the texturing
4199 unsigned swizzle_result
;
4201 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4202 * while 4 and 5 represent 0 and 1 respectively.
4204 uint8_t swizzles
[32][4];
4206 /* Can be used to scale sampled values in range required by the format. */
4207 float scale_factors
[32];
4210 * Bitmap of textures that need srgb to linear conversion. If
4211 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4212 * of the texture are lowered to linear.
4214 unsigned lower_srgb
;
4217 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4218 * LODs to nir_texop_txl.
4220 bool lower_tex_without_implicit_lod
;
4223 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4225 bool lower_txd_cube_map
;
4228 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4233 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4234 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4235 * with lower_txd_cube_map.
4237 bool lower_txd_shadow
;
4240 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4241 * Implies lower_txd_cube_map and lower_txd_shadow.
4246 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4247 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4249 bool lower_txb_shadow_clamp
;
4252 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4253 * with nir_texop_txl. This includes cube maps.
4255 bool lower_txd_shadow_clamp
;
4258 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4259 * with nir_texop_txl. This includes cube maps.
4261 bool lower_txd_offset_clamp
;
4264 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4265 * sampler is bindless.
4267 bool lower_txd_clamp_bindless_sampler
;
4270 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4271 * sampler index is not statically determinable to be less than 16.
4273 bool lower_txd_clamp_if_sampler_index_not_lt_16
;
4276 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4277 * 0-lod followed by a nir_ishr.
4282 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4283 * mixed-up tg4 locations.
4285 bool lower_tg4_broadcom_swizzle
;
4288 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4290 bool lower_tg4_offsets
;
4292 enum nir_lower_tex_packing lower_tex_packing
[32];
4293 } nir_lower_tex_options
;
4295 bool nir_lower_tex(nir_shader
*shader
,
4296 const nir_lower_tex_options
*options
);
4298 enum nir_lower_non_uniform_access_type
{
4299 nir_lower_non_uniform_ubo_access
= (1 << 0),
4300 nir_lower_non_uniform_ssbo_access
= (1 << 1),
4301 nir_lower_non_uniform_texture_access
= (1 << 2),
4302 nir_lower_non_uniform_image_access
= (1 << 3),
4305 bool nir_lower_non_uniform_access(nir_shader
*shader
,
4306 enum nir_lower_non_uniform_access_type
);
4308 enum nir_lower_idiv_path
{
4309 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4310 * the two but it is not exact in some cases (for example, 1091317713u /
4311 * 1034u gives 5209173 instead of 1055432) */
4312 nir_lower_idiv_fast
,
4313 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4314 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4315 * the nv50 path and many of them are integer multiplications, so it is
4316 * probably slower. It should always return the correct result, though. */
4317 nir_lower_idiv_precise
,
4320 bool nir_lower_idiv(nir_shader
*shader
, enum nir_lower_idiv_path path
);
4322 bool nir_lower_input_attachments(nir_shader
*shader
, bool use_fragcoord_sysval
);
4324 bool nir_lower_clip_vs(nir_shader
*shader
, unsigned ucp_enables
,
4326 bool use_clipdist_array
,
4327 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4328 bool nir_lower_clip_gs(nir_shader
*shader
, unsigned ucp_enables
,
4329 bool use_clipdist_array
,
4330 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4331 bool nir_lower_clip_fs(nir_shader
*shader
, unsigned ucp_enables
,
4332 bool use_clipdist_array
);
4333 bool nir_lower_clip_cull_distance_arrays(nir_shader
*nir
);
4335 void nir_lower_point_size_mov(nir_shader
*shader
,
4336 const gl_state_index16
*pointsize_state_tokens
);
4338 bool nir_lower_frexp(nir_shader
*nir
);
4340 void nir_lower_two_sided_color(nir_shader
*shader
);
4342 bool nir_lower_clamp_color_outputs(nir_shader
*shader
);
4344 bool nir_lower_flatshade(nir_shader
*shader
);
4346 void nir_lower_passthrough_edgeflags(nir_shader
*shader
);
4347 bool nir_lower_patch_vertices(nir_shader
*nir
, unsigned static_count
,
4348 const gl_state_index16
*uniform_state_tokens
);
4350 typedef struct nir_lower_wpos_ytransform_options
{
4351 gl_state_index16 state_tokens
[STATE_LENGTH
];
4352 bool fs_coord_origin_upper_left
:1;
4353 bool fs_coord_origin_lower_left
:1;
4354 bool fs_coord_pixel_center_integer
:1;
4355 bool fs_coord_pixel_center_half_integer
:1;
4356 } nir_lower_wpos_ytransform_options
;
4358 bool nir_lower_wpos_ytransform(nir_shader
*shader
,
4359 const nir_lower_wpos_ytransform_options
*options
);
4360 bool nir_lower_wpos_center(nir_shader
*shader
, const bool for_sample_shading
);
4362 bool nir_lower_wrmasks(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
4364 bool nir_lower_fb_read(nir_shader
*shader
);
4366 typedef struct nir_lower_drawpixels_options
{
4367 gl_state_index16 texcoord_state_tokens
[STATE_LENGTH
];
4368 gl_state_index16 scale_state_tokens
[STATE_LENGTH
];
4369 gl_state_index16 bias_state_tokens
[STATE_LENGTH
];
4370 unsigned drawpix_sampler
;
4371 unsigned pixelmap_sampler
;
4373 bool scale_and_bias
:1;
4374 } nir_lower_drawpixels_options
;
4376 void nir_lower_drawpixels(nir_shader
*shader
,
4377 const nir_lower_drawpixels_options
*options
);
4379 typedef struct nir_lower_bitmap_options
{
4382 } nir_lower_bitmap_options
;
4384 void nir_lower_bitmap(nir_shader
*shader
, const nir_lower_bitmap_options
*options
);
4386 bool nir_lower_atomics_to_ssbo(nir_shader
*shader
);
4389 nir_lower_int_source_mods
= 1 << 0,
4390 nir_lower_float_source_mods
= 1 << 1,
4391 nir_lower_triop_abs
= 1 << 2,
4392 nir_lower_all_source_mods
= (1 << 3) - 1
4393 } nir_lower_to_source_mods_flags
;
4396 bool nir_lower_to_source_mods(nir_shader
*shader
, nir_lower_to_source_mods_flags options
);
4398 bool nir_lower_gs_intrinsics(nir_shader
*shader
, bool per_stream
);
4400 typedef unsigned (*nir_lower_bit_size_callback
)(const nir_alu_instr
*, void *);
4402 bool nir_lower_bit_size(nir_shader
*shader
,
4403 nir_lower_bit_size_callback callback
,
4404 void *callback_data
);
4406 nir_lower_int64_options
nir_lower_int64_op_to_options_mask(nir_op opcode
);
4407 bool nir_lower_int64(nir_shader
*shader
, nir_lower_int64_options options
);
4409 nir_lower_doubles_options
nir_lower_doubles_op_to_options_mask(nir_op opcode
);
4410 bool nir_lower_doubles(nir_shader
*shader
, const nir_shader
*softfp64
,
4411 nir_lower_doubles_options options
);
4412 bool nir_lower_pack(nir_shader
*shader
);
4414 void nir_lower_mediump_outputs(nir_shader
*nir
);
4416 bool nir_lower_point_size(nir_shader
*shader
, float min
, float max
);
4419 nir_lower_interpolation_at_sample
= (1 << 1),
4420 nir_lower_interpolation_at_offset
= (1 << 2),
4421 nir_lower_interpolation_centroid
= (1 << 3),
4422 nir_lower_interpolation_pixel
= (1 << 4),
4423 nir_lower_interpolation_sample
= (1 << 5),
4424 } nir_lower_interpolation_options
;
4426 bool nir_lower_interpolation(nir_shader
*shader
,
4427 nir_lower_interpolation_options options
);
4429 bool nir_lower_discard_to_demote(nir_shader
*shader
);
4431 bool nir_normalize_cubemap_coords(nir_shader
*shader
);
4433 void nir_live_ssa_defs_impl(nir_function_impl
*impl
);
4435 void nir_loop_analyze_impl(nir_function_impl
*impl
,
4436 nir_variable_mode indirect_mask
);
4438 bool nir_ssa_defs_interfere(nir_ssa_def
*a
, nir_ssa_def
*b
);
4440 bool nir_repair_ssa_impl(nir_function_impl
*impl
);
4441 bool nir_repair_ssa(nir_shader
*shader
);
4443 void nir_convert_loop_to_lcssa(nir_loop
*loop
);
4444 bool nir_convert_to_lcssa(nir_shader
*shader
, bool skip_invariants
, bool skip_bool_invariants
);
4445 void nir_divergence_analysis(nir_shader
*shader
, nir_divergence_options options
);
4447 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4448 * registers. If false, convert all values (even those not involved in a phi
4449 * node) to registers.
4451 bool nir_convert_from_ssa(nir_shader
*shader
, bool phi_webs_only
);
4453 bool nir_lower_phis_to_regs_block(nir_block
*block
);
4454 bool nir_lower_ssa_defs_to_regs_block(nir_block
*block
);
4455 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl
*impl
);
4457 bool nir_lower_samplers(nir_shader
*shader
);
4458 bool nir_lower_ssbo(nir_shader
*shader
);
4460 /* This is here for unit tests. */
4461 bool nir_opt_comparison_pre_impl(nir_function_impl
*impl
);
4463 bool nir_opt_comparison_pre(nir_shader
*shader
);
4465 bool nir_opt_access(nir_shader
*shader
);
4466 bool nir_opt_algebraic(nir_shader
*shader
);
4467 bool nir_opt_algebraic_before_ffma(nir_shader
*shader
);
4468 bool nir_opt_algebraic_late(nir_shader
*shader
);
4469 bool nir_opt_algebraic_distribute_src_mods(nir_shader
*shader
);
4470 bool nir_opt_constant_folding(nir_shader
*shader
);
4472 /* Try to combine a and b into a. Return true if combination was possible,
4473 * which will result in b being removed by the pass. Return false if
4474 * combination wasn't possible.
4476 typedef bool (*nir_combine_memory_barrier_cb
)(
4477 nir_intrinsic_instr
*a
, nir_intrinsic_instr
*b
, void *data
);
4479 bool nir_opt_combine_memory_barriers(nir_shader
*shader
,
4480 nir_combine_memory_barrier_cb combine_cb
,
4483 bool nir_opt_combine_stores(nir_shader
*shader
, nir_variable_mode modes
);
4485 bool nir_copy_prop(nir_shader
*shader
);
4487 bool nir_opt_copy_prop_vars(nir_shader
*shader
);
4489 bool nir_opt_cse(nir_shader
*shader
);
4491 bool nir_opt_dce(nir_shader
*shader
);
4493 bool nir_opt_dead_cf(nir_shader
*shader
);
4495 bool nir_opt_dead_write_vars(nir_shader
*shader
);
4497 bool nir_opt_deref_impl(nir_function_impl
*impl
);
4498 bool nir_opt_deref(nir_shader
*shader
);
4500 bool nir_opt_find_array_copies(nir_shader
*shader
);
4502 bool nir_opt_gcm(nir_shader
*shader
, bool value_number
);
4504 bool nir_opt_idiv_const(nir_shader
*shader
, unsigned min_bit_size
);
4506 bool nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
);
4508 bool nir_opt_intrinsics(nir_shader
*shader
);
4510 bool nir_opt_large_constants(nir_shader
*shader
,
4511 glsl_type_size_align_func size_align
,
4512 unsigned threshold
);
4514 bool nir_opt_loop_unroll(nir_shader
*shader
, nir_variable_mode indirect_mask
);
4517 nir_move_const_undef
= (1 << 0),
4518 nir_move_load_ubo
= (1 << 1),
4519 nir_move_load_input
= (1 << 2),
4520 nir_move_comparisons
= (1 << 3),
4521 nir_move_copies
= (1 << 4),
4524 bool nir_can_move_instr(nir_instr
*instr
, nir_move_options options
);
4526 bool nir_opt_sink(nir_shader
*shader
, nir_move_options options
);
4528 bool nir_opt_move(nir_shader
*shader
, nir_move_options options
);
4530 bool nir_opt_peephole_select(nir_shader
*shader
, unsigned limit
,
4531 bool indirect_load_ok
, bool expensive_alu_ok
);
4533 bool nir_opt_rematerialize_compares(nir_shader
*shader
);
4535 bool nir_opt_remove_phis(nir_shader
*shader
);
4536 bool nir_opt_remove_phis_block(nir_block
*block
);
4538 bool nir_opt_shrink_load(nir_shader
*shader
);
4540 bool nir_opt_trivial_continues(nir_shader
*shader
);
4542 bool nir_opt_undef(nir_shader
*shader
);
4544 bool nir_opt_vectorize(nir_shader
*shader
);
4546 bool nir_opt_conditional_discard(nir_shader
*shader
);
4548 typedef bool (*nir_should_vectorize_mem_func
)(unsigned align
, unsigned bit_size
,
4549 unsigned num_components
, unsigned high_offset
,
4550 nir_intrinsic_instr
*low
, nir_intrinsic_instr
*high
);
4552 bool nir_opt_load_store_vectorize(nir_shader
*shader
, nir_variable_mode modes
,
4553 nir_should_vectorize_mem_func callback
,
4554 nir_variable_mode robust_modes
);
4556 void nir_schedule(nir_shader
*shader
, int threshold
);
4558 void nir_strip(nir_shader
*shader
);
4560 void nir_sweep(nir_shader
*shader
);
4562 void nir_remap_dual_slot_attributes(nir_shader
*shader
,
4563 uint64_t *dual_slot_inputs
);
4564 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
);
4566 nir_intrinsic_op
nir_intrinsic_from_system_value(gl_system_value val
);
4567 gl_system_value
nir_system_value_from_intrinsic(nir_intrinsic_op intrin
);
4570 nir_variable_is_in_ubo(const nir_variable
*var
)
4572 return (var
->data
.mode
== nir_var_mem_ubo
&&
4573 var
->interface_type
!= NULL
);
4577 nir_variable_is_in_ssbo(const nir_variable
*var
)
4579 return (var
->data
.mode
== nir_var_mem_ssbo
&&
4580 var
->interface_type
!= NULL
);
4584 nir_variable_is_in_block(const nir_variable
*var
)
4586 return nir_variable_is_in_ubo(var
) || nir_variable_is_in_ssbo(var
);