nir: add two new texture ops for multisample fragment color/mask fetches
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 16
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint16_t nir_component_mask_t;
65
66 static inline bool
67 nir_num_components_valid(unsigned num_components)
68 {
69 return (num_components >= 1 &&
70 num_components <= 4) ||
71 num_components == 8 ||
72 num_components == 16;
73 }
74
75 /** Defines a cast function
76 *
77 * This macro defines a cast function from in_type to out_type where
78 * out_type is some structure type that contains a field of type out_type.
79 *
80 * Note that you have to be a bit careful as the generated cast function
81 * destroys constness.
82 */
83 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
84 type_field, type_value) \
85 static inline out_type * \
86 name(const in_type *parent) \
87 { \
88 assert(parent && parent->type_field == type_value); \
89 return exec_node_data(out_type, parent, field); \
90 }
91
92 struct nir_function;
93 struct nir_shader;
94 struct nir_instr;
95 struct nir_builder;
96
97
98 /**
99 * Description of built-in state associated with a uniform
100 *
101 * \sa nir_variable::state_slots
102 */
103 typedef struct {
104 gl_state_index16 tokens[STATE_LENGTH];
105 uint16_t swizzle;
106 } nir_state_slot;
107
108 typedef enum {
109 nir_var_shader_in = (1 << 0),
110 nir_var_shader_out = (1 << 1),
111 nir_var_shader_temp = (1 << 2),
112 nir_var_function_temp = (1 << 3),
113 nir_var_uniform = (1 << 4),
114 nir_var_mem_ubo = (1 << 5),
115 nir_var_system_value = (1 << 6),
116 nir_var_mem_ssbo = (1 << 7),
117 nir_var_mem_shared = (1 << 8),
118 nir_var_mem_global = (1 << 9),
119 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
120 nir_num_variable_modes = 11,
121 nir_var_all = (1 << nir_num_variable_modes) - 1,
122 } nir_variable_mode;
123
124 /**
125 * Rounding modes.
126 */
127 typedef enum {
128 nir_rounding_mode_undef = 0,
129 nir_rounding_mode_rtne = 1, /* round to nearest even */
130 nir_rounding_mode_ru = 2, /* round up */
131 nir_rounding_mode_rd = 3, /* round down */
132 nir_rounding_mode_rtz = 4, /* round towards zero */
133 } nir_rounding_mode;
134
135 typedef union {
136 bool b;
137 float f32;
138 double f64;
139 int8_t i8;
140 uint8_t u8;
141 int16_t i16;
142 uint16_t u16;
143 int32_t i32;
144 uint32_t u32;
145 int64_t i64;
146 uint64_t u64;
147 } nir_const_value;
148
149 #define nir_const_value_to_array(arr, c, components, m) \
150 { \
151 for (unsigned i = 0; i < components; ++i) \
152 arr[i] = c[i].m; \
153 } while (false)
154
155 static inline nir_const_value
156 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
157 {
158 nir_const_value v;
159 memset(&v, 0, sizeof(v));
160
161 switch (bit_size) {
162 case 1: v.b = x; break;
163 case 8: v.u8 = x; break;
164 case 16: v.u16 = x; break;
165 case 32: v.u32 = x; break;
166 case 64: v.u64 = x; break;
167 default:
168 unreachable("Invalid bit size");
169 }
170
171 return v;
172 }
173
174 static inline nir_const_value
175 nir_const_value_for_int(int64_t i, unsigned bit_size)
176 {
177 nir_const_value v;
178 memset(&v, 0, sizeof(v));
179
180 assert(bit_size <= 64);
181 if (bit_size < 64) {
182 assert(i >= (-(1ll << (bit_size - 1))));
183 assert(i < (1ll << (bit_size - 1)));
184 }
185
186 return nir_const_value_for_raw_uint(i, bit_size);
187 }
188
189 static inline nir_const_value
190 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
191 {
192 nir_const_value v;
193 memset(&v, 0, sizeof(v));
194
195 assert(bit_size <= 64);
196 if (bit_size < 64)
197 assert(u < (1ull << bit_size));
198
199 return nir_const_value_for_raw_uint(u, bit_size);
200 }
201
202 static inline nir_const_value
203 nir_const_value_for_bool(bool b, unsigned bit_size)
204 {
205 /* Booleans use a 0/-1 convention */
206 return nir_const_value_for_int(-(int)b, bit_size);
207 }
208
209 /* This one isn't inline because it requires half-float conversion */
210 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
211
212 static inline int64_t
213 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
214 {
215 switch (bit_size) {
216 /* int1_t uses 0/-1 convention */
217 case 1: return -(int)value.b;
218 case 8: return value.i8;
219 case 16: return value.i16;
220 case 32: return value.i32;
221 case 64: return value.i64;
222 default:
223 unreachable("Invalid bit size");
224 }
225 }
226
227 static inline uint64_t
228 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
229 {
230 switch (bit_size) {
231 case 1: return value.b;
232 case 8: return value.u8;
233 case 16: return value.u16;
234 case 32: return value.u32;
235 case 64: return value.u64;
236 default:
237 unreachable("Invalid bit size");
238 }
239 }
240
241 static inline bool
242 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
243 {
244 int64_t i = nir_const_value_as_int(value, bit_size);
245
246 /* Booleans of any size use 0/-1 convention */
247 assert(i == 0 || i == -1);
248
249 return i;
250 }
251
252 /* This one isn't inline because it requires half-float conversion */
253 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
254
255 typedef struct nir_constant {
256 /**
257 * Value of the constant.
258 *
259 * The field used to back the values supplied by the constant is determined
260 * by the type associated with the \c nir_variable. Constants may be
261 * scalars, vectors, or matrices.
262 */
263 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
264
265 /* we could get this from the var->type but makes clone *much* easier to
266 * not have to care about the type.
267 */
268 unsigned num_elements;
269
270 /* Array elements / Structure Fields */
271 struct nir_constant **elements;
272 } nir_constant;
273
274 /**
275 * \brief Layout qualifiers for gl_FragDepth.
276 *
277 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
278 * with a layout qualifier.
279 */
280 typedef enum {
281 nir_depth_layout_none, /**< No depth layout is specified. */
282 nir_depth_layout_any,
283 nir_depth_layout_greater,
284 nir_depth_layout_less,
285 nir_depth_layout_unchanged
286 } nir_depth_layout;
287
288 /**
289 * Enum keeping track of how a variable was declared.
290 */
291 typedef enum {
292 /**
293 * Normal declaration.
294 */
295 nir_var_declared_normally = 0,
296
297 /**
298 * Variable is implicitly generated by the compiler and should not be
299 * visible via the API.
300 */
301 nir_var_hidden,
302 } nir_var_declaration_type;
303
304 /**
305 * Either a uniform, global variable, shader input, or shader output. Based on
306 * ir_variable - it should be easy to translate between the two.
307 */
308
309 typedef struct nir_variable {
310 struct exec_node node;
311
312 /**
313 * Declared type of the variable
314 */
315 const struct glsl_type *type;
316
317 /**
318 * Declared name of the variable
319 */
320 char *name;
321
322 struct nir_variable_data {
323 /**
324 * Storage class of the variable.
325 *
326 * \sa nir_variable_mode
327 */
328 nir_variable_mode mode:11;
329
330 /**
331 * Is the variable read-only?
332 *
333 * This is set for variables declared as \c const, shader inputs,
334 * and uniforms.
335 */
336 unsigned read_only:1;
337 unsigned centroid:1;
338 unsigned sample:1;
339 unsigned patch:1;
340 unsigned invariant:1;
341
342 /**
343 * Precision qualifier.
344 *
345 * In desktop GLSL we do not care about precision qualifiers at all, in
346 * fact, the spec says that precision qualifiers are ignored.
347 *
348 * To make things easy, we make it so that this field is always
349 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
350 * have the same precision value and the checks we add in the compiler
351 * for this field will never break a desktop shader compile.
352 */
353 unsigned precision:2;
354
355 /**
356 * Can this variable be coalesced with another?
357 *
358 * This is set by nir_lower_io_to_temporaries to say that any
359 * copies involving this variable should stay put. Propagating it can
360 * duplicate the resulting load/store, which is not wanted, and may
361 * result in a load/store of the variable with an indirect offset which
362 * the backend may not be able to handle.
363 */
364 unsigned cannot_coalesce:1;
365
366 /**
367 * When separate shader programs are enabled, only input/outputs between
368 * the stages of a multi-stage separate program can be safely removed
369 * from the shader interface. Other input/outputs must remains active.
370 *
371 * This is also used to make sure xfb varyings that are unused by the
372 * fragment shader are not removed.
373 */
374 unsigned always_active_io:1;
375
376 /**
377 * Interpolation mode for shader inputs / outputs
378 *
379 * \sa glsl_interp_mode
380 */
381 unsigned interpolation:2;
382
383 /**
384 * If non-zero, then this variable may be packed along with other variables
385 * into a single varying slot, so this offset should be applied when
386 * accessing components. For example, an offset of 1 means that the x
387 * component of this variable is actually stored in component y of the
388 * location specified by \c location.
389 */
390 unsigned location_frac:2;
391
392 /**
393 * If true, this variable represents an array of scalars that should
394 * be tightly packed. In other words, consecutive array elements
395 * should be stored one component apart, rather than one slot apart.
396 */
397 unsigned compact:1;
398
399 /**
400 * Whether this is a fragment shader output implicitly initialized with
401 * the previous contents of the specified render target at the
402 * framebuffer location corresponding to this shader invocation.
403 */
404 unsigned fb_fetch_output:1;
405
406 /**
407 * Non-zero if this variable is considered bindless as defined by
408 * ARB_bindless_texture.
409 */
410 unsigned bindless:1;
411
412 /**
413 * Was an explicit binding set in the shader?
414 */
415 unsigned explicit_binding:1;
416
417 /**
418 * Was the location explicitly set in the shader?
419 *
420 * If the location is explicitly set in the shader, it \b cannot be changed
421 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
422 * no effect).
423 */
424 unsigned explicit_location:1;
425
426 /**
427 * Was a transfer feedback buffer set in the shader?
428 */
429 unsigned explicit_xfb_buffer:1;
430
431 /**
432 * Was a transfer feedback stride set in the shader?
433 */
434 unsigned explicit_xfb_stride:1;
435
436 /**
437 * Was an explicit offset set in the shader?
438 */
439 unsigned explicit_offset:1;
440
441 /**
442 * Non-zero if this variable was created by lowering a named interface
443 * block.
444 */
445 unsigned from_named_ifc_block:1;
446
447 /**
448 * How the variable was declared. See nir_var_declaration_type.
449 *
450 * This is used to detect variables generated by the compiler, so should
451 * not be visible via the API.
452 */
453 unsigned how_declared:2;
454
455 /**
456 * \brief Layout qualifier for gl_FragDepth.
457 *
458 * This is not equal to \c ir_depth_layout_none if and only if this
459 * variable is \c gl_FragDepth and a layout qualifier is specified.
460 */
461 nir_depth_layout depth_layout:3;
462
463 /**
464 * Vertex stream output identifier.
465 *
466 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
467 * indicate the stream of the i-th component.
468 */
469 unsigned stream:9;
470
471 /**
472 * Access flags for memory variables (SSBO/global), image uniforms, and
473 * bindless images in uniforms/inputs/outputs.
474 */
475 enum gl_access_qualifier access:8;
476
477 /**
478 * Descriptor set binding for sampler or UBO.
479 */
480 unsigned descriptor_set:5;
481
482 /**
483 * output index for dual source blending.
484 */
485 unsigned index;
486
487 /**
488 * Initial binding point for a sampler or UBO.
489 *
490 * For array types, this represents the binding point for the first element.
491 */
492 unsigned binding;
493
494 /**
495 * Storage location of the base of this variable
496 *
497 * The precise meaning of this field depends on the nature of the variable.
498 *
499 * - Vertex shader input: one of the values from \c gl_vert_attrib.
500 * - Vertex shader output: one of the values from \c gl_varying_slot.
501 * - Geometry shader input: one of the values from \c gl_varying_slot.
502 * - Geometry shader output: one of the values from \c gl_varying_slot.
503 * - Fragment shader input: one of the values from \c gl_varying_slot.
504 * - Fragment shader output: one of the values from \c gl_frag_result.
505 * - Uniforms: Per-stage uniform slot number for default uniform block.
506 * - Uniforms: Index within the uniform block definition for UBO members.
507 * - Non-UBO Uniforms: uniform slot number.
508 * - Other: This field is not currently used.
509 *
510 * If the variable is a uniform, shader input, or shader output, and the
511 * slot has not been assigned, the value will be -1.
512 */
513 int location;
514
515 /**
516 * The actual location of the variable in the IR. Only valid for inputs,
517 * outputs, and uniforms (including samplers and images).
518 */
519 unsigned driver_location;
520
521 /**
522 * Location an atomic counter or transform feedback is stored at.
523 */
524 unsigned offset;
525
526 union {
527 struct {
528 /** Image internal format if specified explicitly, otherwise GL_NONE. */
529 uint16_t format; /* GLenum */
530 } image;
531
532 struct {
533 /**
534 * Transform feedback buffer.
535 */
536 uint16_t buffer:2;
537
538 /**
539 * Transform feedback stride.
540 */
541 uint16_t stride;
542 } xfb;
543 };
544 } data;
545
546 /**
547 * Identifier for this variable generated by nir_index_vars() that is unique
548 * among other variables in the same exec_list.
549 */
550 unsigned index;
551
552 /* Number of nir_variable_data members */
553 uint16_t num_members;
554
555 /**
556 * Built-in state that backs this uniform
557 *
558 * Once set at variable creation, \c state_slots must remain invariant.
559 * This is because, ideally, this array would be shared by all clones of
560 * this variable in the IR tree. In other words, we'd really like for it
561 * to be a fly-weight.
562 *
563 * If the variable is not a uniform, \c num_state_slots will be zero and
564 * \c state_slots will be \c NULL.
565 */
566 /*@{*/
567 uint16_t num_state_slots; /**< Number of state slots used */
568 nir_state_slot *state_slots; /**< State descriptors. */
569 /*@}*/
570
571 /**
572 * Constant expression assigned in the initializer of the variable
573 *
574 * This field should only be used temporarily by creators of NIR shaders
575 * and then lower_constant_initializers can be used to get rid of them.
576 * Most of the rest of NIR ignores this field or asserts that it's NULL.
577 */
578 nir_constant *constant_initializer;
579
580 /**
581 * For variables that are in an interface block or are an instance of an
582 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
583 *
584 * \sa ir_variable::location
585 */
586 const struct glsl_type *interface_type;
587
588 /**
589 * Description of per-member data for per-member struct variables
590 *
591 * This is used for variables which are actually an amalgamation of
592 * multiple entities such as a struct of built-in values or a struct of
593 * inputs each with their own layout specifier. This is only allowed on
594 * variables with a struct or array of array of struct type.
595 */
596 struct nir_variable_data *members;
597 } nir_variable;
598
599 #define nir_foreach_variable(var, var_list) \
600 foreach_list_typed(nir_variable, var, node, var_list)
601
602 #define nir_foreach_variable_safe(var, var_list) \
603 foreach_list_typed_safe(nir_variable, var, node, var_list)
604
605 static inline bool
606 nir_variable_is_global(const nir_variable *var)
607 {
608 return var->data.mode != nir_var_function_temp;
609 }
610
611 typedef struct nir_register {
612 struct exec_node node;
613
614 unsigned num_components; /** < number of vector components */
615 unsigned num_array_elems; /** < size of array (0 for no array) */
616
617 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
618 uint8_t bit_size;
619
620 /** generic register index. */
621 unsigned index;
622
623 /** only for debug purposes, can be NULL */
624 const char *name;
625
626 /** set of nir_srcs where this register is used (read from) */
627 struct list_head uses;
628
629 /** set of nir_dests where this register is defined (written to) */
630 struct list_head defs;
631
632 /** set of nir_ifs where this register is used as a condition */
633 struct list_head if_uses;
634 } nir_register;
635
636 #define nir_foreach_register(reg, reg_list) \
637 foreach_list_typed(nir_register, reg, node, reg_list)
638 #define nir_foreach_register_safe(reg, reg_list) \
639 foreach_list_typed_safe(nir_register, reg, node, reg_list)
640
641 typedef enum PACKED {
642 nir_instr_type_alu,
643 nir_instr_type_deref,
644 nir_instr_type_call,
645 nir_instr_type_tex,
646 nir_instr_type_intrinsic,
647 nir_instr_type_load_const,
648 nir_instr_type_jump,
649 nir_instr_type_ssa_undef,
650 nir_instr_type_phi,
651 nir_instr_type_parallel_copy,
652 } nir_instr_type;
653
654 typedef struct nir_instr {
655 struct exec_node node;
656 struct nir_block *block;
657 nir_instr_type type;
658
659 /* A temporary for optimization and analysis passes to use for storing
660 * flags. For instance, DCE uses this to store the "dead/live" info.
661 */
662 uint8_t pass_flags;
663
664 /** generic instruction index. */
665 unsigned index;
666 } nir_instr;
667
668 static inline nir_instr *
669 nir_instr_next(nir_instr *instr)
670 {
671 struct exec_node *next = exec_node_get_next(&instr->node);
672 if (exec_node_is_tail_sentinel(next))
673 return NULL;
674 else
675 return exec_node_data(nir_instr, next, node);
676 }
677
678 static inline nir_instr *
679 nir_instr_prev(nir_instr *instr)
680 {
681 struct exec_node *prev = exec_node_get_prev(&instr->node);
682 if (exec_node_is_head_sentinel(prev))
683 return NULL;
684 else
685 return exec_node_data(nir_instr, prev, node);
686 }
687
688 static inline bool
689 nir_instr_is_first(const nir_instr *instr)
690 {
691 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
692 }
693
694 static inline bool
695 nir_instr_is_last(const nir_instr *instr)
696 {
697 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
698 }
699
700 typedef struct nir_ssa_def {
701 /** for debugging only, can be NULL */
702 const char* name;
703
704 /** generic SSA definition index. */
705 unsigned index;
706
707 /** Index into the live_in and live_out bitfields */
708 unsigned live_index;
709
710 /** Instruction which produces this SSA value. */
711 nir_instr *parent_instr;
712
713 /** set of nir_instrs where this register is used (read from) */
714 struct list_head uses;
715
716 /** set of nir_ifs where this register is used as a condition */
717 struct list_head if_uses;
718
719 uint8_t num_components;
720
721 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
722 uint8_t bit_size;
723 } nir_ssa_def;
724
725 struct nir_src;
726
727 typedef struct {
728 nir_register *reg;
729 struct nir_src *indirect; /** < NULL for no indirect offset */
730 unsigned base_offset;
731
732 /* TODO use-def chain goes here */
733 } nir_reg_src;
734
735 typedef struct {
736 nir_instr *parent_instr;
737 struct list_head def_link;
738
739 nir_register *reg;
740 struct nir_src *indirect; /** < NULL for no indirect offset */
741 unsigned base_offset;
742
743 /* TODO def-use chain goes here */
744 } nir_reg_dest;
745
746 struct nir_if;
747
748 typedef struct nir_src {
749 union {
750 /** Instruction that consumes this value as a source. */
751 nir_instr *parent_instr;
752 struct nir_if *parent_if;
753 };
754
755 struct list_head use_link;
756
757 union {
758 nir_reg_src reg;
759 nir_ssa_def *ssa;
760 };
761
762 bool is_ssa;
763 } nir_src;
764
765 static inline nir_src
766 nir_src_init(void)
767 {
768 nir_src src = { { NULL } };
769 return src;
770 }
771
772 #define NIR_SRC_INIT nir_src_init()
773
774 #define nir_foreach_use(src, reg_or_ssa_def) \
775 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
776
777 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
778 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
779
780 #define nir_foreach_if_use(src, reg_or_ssa_def) \
781 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
782
783 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
784 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
785
786 typedef struct {
787 union {
788 nir_reg_dest reg;
789 nir_ssa_def ssa;
790 };
791
792 bool is_ssa;
793 } nir_dest;
794
795 static inline nir_dest
796 nir_dest_init(void)
797 {
798 nir_dest dest = { { { NULL } } };
799 return dest;
800 }
801
802 #define NIR_DEST_INIT nir_dest_init()
803
804 #define nir_foreach_def(dest, reg) \
805 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
806
807 #define nir_foreach_def_safe(dest, reg) \
808 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
809
810 static inline nir_src
811 nir_src_for_ssa(nir_ssa_def *def)
812 {
813 nir_src src = NIR_SRC_INIT;
814
815 src.is_ssa = true;
816 src.ssa = def;
817
818 return src;
819 }
820
821 static inline nir_src
822 nir_src_for_reg(nir_register *reg)
823 {
824 nir_src src = NIR_SRC_INIT;
825
826 src.is_ssa = false;
827 src.reg.reg = reg;
828 src.reg.indirect = NULL;
829 src.reg.base_offset = 0;
830
831 return src;
832 }
833
834 static inline nir_dest
835 nir_dest_for_reg(nir_register *reg)
836 {
837 nir_dest dest = NIR_DEST_INIT;
838
839 dest.reg.reg = reg;
840
841 return dest;
842 }
843
844 static inline unsigned
845 nir_src_bit_size(nir_src src)
846 {
847 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
848 }
849
850 static inline unsigned
851 nir_src_num_components(nir_src src)
852 {
853 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
854 }
855
856 static inline bool
857 nir_src_is_const(nir_src src)
858 {
859 return src.is_ssa &&
860 src.ssa->parent_instr->type == nir_instr_type_load_const;
861 }
862
863 static inline unsigned
864 nir_dest_bit_size(nir_dest dest)
865 {
866 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
867 }
868
869 static inline unsigned
870 nir_dest_num_components(nir_dest dest)
871 {
872 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
873 }
874
875 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
876 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
877
878 typedef struct {
879 nir_src src;
880
881 /**
882 * \name input modifiers
883 */
884 /*@{*/
885 /**
886 * For inputs interpreted as floating point, flips the sign bit. For
887 * inputs interpreted as integers, performs the two's complement negation.
888 */
889 bool negate;
890
891 /**
892 * Clears the sign bit for floating point values, and computes the integer
893 * absolute value for integers. Note that the negate modifier acts after
894 * the absolute value modifier, therefore if both are set then all inputs
895 * will become negative.
896 */
897 bool abs;
898 /*@}*/
899
900 /**
901 * For each input component, says which component of the register it is
902 * chosen from. Note that which elements of the swizzle are used and which
903 * are ignored are based on the write mask for most opcodes - for example,
904 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
905 * a swizzle of {2, x, 1, 0} where x means "don't care."
906 */
907 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
908 } nir_alu_src;
909
910 typedef struct {
911 nir_dest dest;
912
913 /**
914 * \name saturate output modifier
915 *
916 * Only valid for opcodes that output floating-point numbers. Clamps the
917 * output to between 0.0 and 1.0 inclusive.
918 */
919
920 bool saturate;
921
922 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
923 } nir_alu_dest;
924
925 /** NIR sized and unsized types
926 *
927 * The values in this enum are carefully chosen so that the sized type is
928 * just the unsized type OR the number of bits.
929 */
930 typedef enum {
931 nir_type_invalid = 0, /* Not a valid type */
932 nir_type_int = 2,
933 nir_type_uint = 4,
934 nir_type_bool = 6,
935 nir_type_float = 128,
936 nir_type_bool1 = 1 | nir_type_bool,
937 nir_type_bool8 = 8 | nir_type_bool,
938 nir_type_bool16 = 16 | nir_type_bool,
939 nir_type_bool32 = 32 | nir_type_bool,
940 nir_type_int1 = 1 | nir_type_int,
941 nir_type_int8 = 8 | nir_type_int,
942 nir_type_int16 = 16 | nir_type_int,
943 nir_type_int32 = 32 | nir_type_int,
944 nir_type_int64 = 64 | nir_type_int,
945 nir_type_uint1 = 1 | nir_type_uint,
946 nir_type_uint8 = 8 | nir_type_uint,
947 nir_type_uint16 = 16 | nir_type_uint,
948 nir_type_uint32 = 32 | nir_type_uint,
949 nir_type_uint64 = 64 | nir_type_uint,
950 nir_type_float16 = 16 | nir_type_float,
951 nir_type_float32 = 32 | nir_type_float,
952 nir_type_float64 = 64 | nir_type_float,
953 } nir_alu_type;
954
955 #define NIR_ALU_TYPE_SIZE_MASK 0x79
956 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
957
958 static inline unsigned
959 nir_alu_type_get_type_size(nir_alu_type type)
960 {
961 return type & NIR_ALU_TYPE_SIZE_MASK;
962 }
963
964 static inline unsigned
965 nir_alu_type_get_base_type(nir_alu_type type)
966 {
967 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
968 }
969
970 static inline nir_alu_type
971 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
972 {
973 switch (base_type) {
974 case GLSL_TYPE_BOOL:
975 return nir_type_bool1;
976 break;
977 case GLSL_TYPE_UINT:
978 return nir_type_uint32;
979 break;
980 case GLSL_TYPE_INT:
981 return nir_type_int32;
982 break;
983 case GLSL_TYPE_UINT16:
984 return nir_type_uint16;
985 break;
986 case GLSL_TYPE_INT16:
987 return nir_type_int16;
988 break;
989 case GLSL_TYPE_UINT8:
990 return nir_type_uint8;
991 case GLSL_TYPE_INT8:
992 return nir_type_int8;
993 case GLSL_TYPE_UINT64:
994 return nir_type_uint64;
995 break;
996 case GLSL_TYPE_INT64:
997 return nir_type_int64;
998 break;
999 case GLSL_TYPE_FLOAT:
1000 return nir_type_float32;
1001 break;
1002 case GLSL_TYPE_FLOAT16:
1003 return nir_type_float16;
1004 break;
1005 case GLSL_TYPE_DOUBLE:
1006 return nir_type_float64;
1007 break;
1008
1009 case GLSL_TYPE_SAMPLER:
1010 case GLSL_TYPE_IMAGE:
1011 case GLSL_TYPE_ATOMIC_UINT:
1012 case GLSL_TYPE_STRUCT:
1013 case GLSL_TYPE_INTERFACE:
1014 case GLSL_TYPE_ARRAY:
1015 case GLSL_TYPE_VOID:
1016 case GLSL_TYPE_SUBROUTINE:
1017 case GLSL_TYPE_FUNCTION:
1018 case GLSL_TYPE_ERROR:
1019 return nir_type_invalid;
1020 }
1021
1022 unreachable("unknown type");
1023 }
1024
1025 static inline nir_alu_type
1026 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1027 {
1028 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1029 }
1030
1031 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1032 nir_rounding_mode rnd);
1033
1034 static inline nir_op
1035 nir_op_vec(unsigned components)
1036 {
1037 switch (components) {
1038 case 1: return nir_op_mov;
1039 case 2: return nir_op_vec2;
1040 case 3: return nir_op_vec3;
1041 case 4: return nir_op_vec4;
1042 case 8: return nir_op_vec8;
1043 case 16: return nir_op_vec16;
1044 default: unreachable("bad component count");
1045 }
1046 }
1047
1048 static inline bool
1049 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1050 {
1051 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1052 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1053 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1054 }
1055
1056 static inline bool
1057 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1058 {
1059 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1060 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1061 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1062 }
1063
1064 static inline bool
1065 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1066 {
1067 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1068 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1069 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1070 }
1071
1072 static inline bool
1073 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1074 {
1075 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1076 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1077 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1078 }
1079
1080 static inline bool
1081 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1082 {
1083 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1084 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1085 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1086 }
1087
1088 static inline bool
1089 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1090 {
1091 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1092 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1093 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1094 }
1095
1096 static inline bool
1097 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1098 {
1099 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1100 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1101 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1102 }
1103
1104 static inline nir_rounding_mode
1105 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1106 nir_alu_type type)
1107 {
1108 if (nir_alu_type_get_base_type(type) != nir_type_float)
1109 return nir_rounding_mode_undef;
1110
1111 unsigned bit_size = nir_alu_type_get_type_size(type);
1112
1113 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1114 return nir_rounding_mode_rtz;
1115 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1116 return nir_rounding_mode_rtne;
1117 return nir_rounding_mode_undef;
1118 }
1119
1120 static inline bool
1121 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1122 {
1123 bool result =
1124 nir_has_any_rounding_mode_rtne(execution_mode) ||
1125 nir_has_any_rounding_mode_rtz(execution_mode);
1126 return result;
1127 }
1128
1129 typedef enum {
1130 /**
1131 * Operation where the first two sources are commutative.
1132 *
1133 * For 2-source operations, this just mathematical commutativity. Some
1134 * 3-source operations, like ffma, are only commutative in the first two
1135 * sources.
1136 */
1137 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1138 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1139 } nir_op_algebraic_property;
1140
1141 typedef struct {
1142 const char *name;
1143
1144 unsigned num_inputs;
1145
1146 /**
1147 * The number of components in the output
1148 *
1149 * If non-zero, this is the size of the output and input sizes are
1150 * explicitly given; swizzle and writemask are still in effect, but if
1151 * the output component is masked out, then the input component may
1152 * still be in use.
1153 *
1154 * If zero, the opcode acts in the standard, per-component manner; the
1155 * operation is performed on each component (except the ones that are
1156 * masked out) with the input being taken from the input swizzle for
1157 * that component.
1158 *
1159 * The size of some of the inputs may be given (i.e. non-zero) even
1160 * though output_size is zero; in that case, the inputs with a zero
1161 * size act per-component, while the inputs with non-zero size don't.
1162 */
1163 unsigned output_size;
1164
1165 /**
1166 * The type of vector that the instruction outputs. Note that the
1167 * staurate modifier is only allowed on outputs with the float type.
1168 */
1169
1170 nir_alu_type output_type;
1171
1172 /**
1173 * The number of components in each input
1174 */
1175 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1176
1177 /**
1178 * The type of vector that each input takes. Note that negate and
1179 * absolute value are only allowed on inputs with int or float type and
1180 * behave differently on the two.
1181 */
1182 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1183
1184 nir_op_algebraic_property algebraic_properties;
1185
1186 /* Whether this represents a numeric conversion opcode */
1187 bool is_conversion;
1188 } nir_op_info;
1189
1190 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1191
1192 typedef struct nir_alu_instr {
1193 nir_instr instr;
1194 nir_op op;
1195
1196 /** Indicates that this ALU instruction generates an exact value
1197 *
1198 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1199 * really equivalent to either. This indicates that the value generated by
1200 * this operation is high-precision and any code transformations that touch
1201 * it must ensure that the resulting value is bit-for-bit identical to the
1202 * original.
1203 */
1204 bool exact:1;
1205
1206 /**
1207 * Indicates that this instruction do not cause wrapping to occur, in the
1208 * form of overflow or underflow.
1209 */
1210 bool no_signed_wrap:1;
1211 bool no_unsigned_wrap:1;
1212
1213 nir_alu_dest dest;
1214 nir_alu_src src[];
1215 } nir_alu_instr;
1216
1217 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1218 nir_alu_instr *instr);
1219 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1220 nir_alu_instr *instr);
1221
1222 /* is this source channel used? */
1223 static inline bool
1224 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1225 unsigned channel)
1226 {
1227 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1228 return channel < nir_op_infos[instr->op].input_sizes[src];
1229
1230 return (instr->dest.write_mask >> channel) & 1;
1231 }
1232
1233 static inline nir_component_mask_t
1234 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1235 {
1236 nir_component_mask_t read_mask = 0;
1237 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1238 if (!nir_alu_instr_channel_used(instr, src, c))
1239 continue;
1240
1241 read_mask |= (1 << instr->src[src].swizzle[c]);
1242 }
1243 return read_mask;
1244 }
1245
1246 /**
1247 * Get the number of channels used for a source
1248 */
1249 static inline unsigned
1250 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1251 {
1252 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1253 return nir_op_infos[instr->op].input_sizes[src];
1254
1255 return nir_dest_num_components(instr->dest.dest);
1256 }
1257
1258 static inline bool
1259 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1260 {
1261 switch (instr->op) {
1262 case nir_op_flt:
1263 case nir_op_fge:
1264 case nir_op_feq:
1265 case nir_op_fne:
1266 case nir_op_ilt:
1267 case nir_op_ult:
1268 case nir_op_ige:
1269 case nir_op_uge:
1270 case nir_op_ieq:
1271 case nir_op_ine:
1272 case nir_op_i2b1:
1273 case nir_op_f2b1:
1274 case nir_op_inot:
1275 return true;
1276 default:
1277 return false;
1278 }
1279 }
1280
1281 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1282 nir_alu_type full_type);
1283
1284 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1285 unsigned src1, unsigned src2);
1286
1287 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1288 const nir_alu_instr *alu2,
1289 unsigned src1, unsigned src2);
1290
1291 typedef enum {
1292 nir_deref_type_var,
1293 nir_deref_type_array,
1294 nir_deref_type_array_wildcard,
1295 nir_deref_type_ptr_as_array,
1296 nir_deref_type_struct,
1297 nir_deref_type_cast,
1298 } nir_deref_type;
1299
1300 typedef struct {
1301 nir_instr instr;
1302
1303 /** The type of this deref instruction */
1304 nir_deref_type deref_type;
1305
1306 /** The mode of the underlying variable */
1307 nir_variable_mode mode;
1308
1309 /** The dereferenced type of the resulting pointer value */
1310 const struct glsl_type *type;
1311
1312 union {
1313 /** Variable being dereferenced if deref_type is a deref_var */
1314 nir_variable *var;
1315
1316 /** Parent deref if deref_type is not deref_var */
1317 nir_src parent;
1318 };
1319
1320 /** Additional deref parameters */
1321 union {
1322 struct {
1323 nir_src index;
1324 } arr;
1325
1326 struct {
1327 unsigned index;
1328 } strct;
1329
1330 struct {
1331 unsigned ptr_stride;
1332 } cast;
1333 };
1334
1335 /** Destination to store the resulting "pointer" */
1336 nir_dest dest;
1337 } nir_deref_instr;
1338
1339 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1340
1341 static inline nir_deref_instr *
1342 nir_deref_instr_parent(const nir_deref_instr *instr)
1343 {
1344 if (instr->deref_type == nir_deref_type_var)
1345 return NULL;
1346 else
1347 return nir_src_as_deref(instr->parent);
1348 }
1349
1350 static inline nir_variable *
1351 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1352 {
1353 while (instr->deref_type != nir_deref_type_var) {
1354 if (instr->deref_type == nir_deref_type_cast)
1355 return NULL;
1356
1357 instr = nir_deref_instr_parent(instr);
1358 }
1359
1360 return instr->var;
1361 }
1362
1363 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1364 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1365 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1366
1367 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1368
1369 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1370
1371 typedef struct {
1372 nir_instr instr;
1373
1374 struct nir_function *callee;
1375
1376 unsigned num_params;
1377 nir_src params[];
1378 } nir_call_instr;
1379
1380 #include "nir_intrinsics.h"
1381
1382 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1383
1384 /** Represents an intrinsic
1385 *
1386 * An intrinsic is an instruction type for handling things that are
1387 * more-or-less regular operations but don't just consume and produce SSA
1388 * values like ALU operations do. Intrinsics are not for things that have
1389 * special semantic meaning such as phi nodes and parallel copies.
1390 * Examples of intrinsics include variable load/store operations, system
1391 * value loads, and the like. Even though texturing more-or-less falls
1392 * under this category, texturing is its own instruction type because
1393 * trying to represent texturing with intrinsics would lead to a
1394 * combinatorial explosion of intrinsic opcodes.
1395 *
1396 * By having a single instruction type for handling a lot of different
1397 * cases, optimization passes can look for intrinsics and, for the most
1398 * part, completely ignore them. Each intrinsic type also has a few
1399 * possible flags that govern whether or not they can be reordered or
1400 * eliminated. That way passes like dead code elimination can still work
1401 * on intrisics without understanding the meaning of each.
1402 *
1403 * Each intrinsic has some number of constant indices, some number of
1404 * variables, and some number of sources. What these sources, variables,
1405 * and indices mean depends on the intrinsic and is documented with the
1406 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1407 * instructions are the only types of instruction that can operate on
1408 * variables.
1409 */
1410 typedef struct {
1411 nir_instr instr;
1412
1413 nir_intrinsic_op intrinsic;
1414
1415 nir_dest dest;
1416
1417 /** number of components if this is a vectorized intrinsic
1418 *
1419 * Similarly to ALU operations, some intrinsics are vectorized.
1420 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1421 * For vectorized intrinsics, the num_components field specifies the
1422 * number of destination components and the number of source components
1423 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1424 */
1425 uint8_t num_components;
1426
1427 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1428
1429 nir_src src[];
1430 } nir_intrinsic_instr;
1431
1432 static inline nir_variable *
1433 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1434 {
1435 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1436 }
1437
1438 typedef enum {
1439 /* Memory ordering. */
1440 NIR_MEMORY_ACQUIRE = 1 << 0,
1441 NIR_MEMORY_RELEASE = 1 << 1,
1442
1443 /* Memory visibility operations. */
1444 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1445 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1446 } nir_memory_semantics;
1447
1448 typedef enum {
1449 NIR_SCOPE_DEVICE,
1450 NIR_SCOPE_QUEUE_FAMILY,
1451 NIR_SCOPE_WORKGROUP,
1452 NIR_SCOPE_SUBGROUP,
1453 NIR_SCOPE_INVOCATION,
1454 } nir_scope;
1455
1456 /**
1457 * \name NIR intrinsics semantic flags
1458 *
1459 * information about what the compiler can do with the intrinsics.
1460 *
1461 * \sa nir_intrinsic_info::flags
1462 */
1463 typedef enum {
1464 /**
1465 * whether the intrinsic can be safely eliminated if none of its output
1466 * value is not being used.
1467 */
1468 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1469
1470 /**
1471 * Whether the intrinsic can be reordered with respect to any other
1472 * intrinsic, i.e. whether the only reordering dependencies of the
1473 * intrinsic are due to the register reads/writes.
1474 */
1475 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1476 } nir_intrinsic_semantic_flag;
1477
1478 /**
1479 * \name NIR intrinsics const-index flag
1480 *
1481 * Indicates the usage of a const_index slot.
1482 *
1483 * \sa nir_intrinsic_info::index_map
1484 */
1485 typedef enum {
1486 /**
1487 * Generally instructions that take a offset src argument, can encode
1488 * a constant 'base' value which is added to the offset.
1489 */
1490 NIR_INTRINSIC_BASE = 1,
1491
1492 /**
1493 * For store instructions, a writemask for the store.
1494 */
1495 NIR_INTRINSIC_WRMASK,
1496
1497 /**
1498 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1499 */
1500 NIR_INTRINSIC_STREAM_ID,
1501
1502 /**
1503 * The clip-plane id for load_user_clip_plane intrinsic.
1504 */
1505 NIR_INTRINSIC_UCP_ID,
1506
1507 /**
1508 * The amount of data, starting from BASE, that this instruction may
1509 * access. This is used to provide bounds if the offset is not constant.
1510 */
1511 NIR_INTRINSIC_RANGE,
1512
1513 /**
1514 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1515 */
1516 NIR_INTRINSIC_DESC_SET,
1517
1518 /**
1519 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1520 */
1521 NIR_INTRINSIC_BINDING,
1522
1523 /**
1524 * Component offset.
1525 */
1526 NIR_INTRINSIC_COMPONENT,
1527
1528 /**
1529 * Interpolation mode (only meaningful for FS inputs).
1530 */
1531 NIR_INTRINSIC_INTERP_MODE,
1532
1533 /**
1534 * A binary nir_op to use when performing a reduction or scan operation
1535 */
1536 NIR_INTRINSIC_REDUCTION_OP,
1537
1538 /**
1539 * Cluster size for reduction operations
1540 */
1541 NIR_INTRINSIC_CLUSTER_SIZE,
1542
1543 /**
1544 * Parameter index for a load_param intrinsic
1545 */
1546 NIR_INTRINSIC_PARAM_IDX,
1547
1548 /**
1549 * Image dimensionality for image intrinsics
1550 *
1551 * One of GLSL_SAMPLER_DIM_*
1552 */
1553 NIR_INTRINSIC_IMAGE_DIM,
1554
1555 /**
1556 * Non-zero if we are accessing an array image
1557 */
1558 NIR_INTRINSIC_IMAGE_ARRAY,
1559
1560 /**
1561 * Image format for image intrinsics
1562 */
1563 NIR_INTRINSIC_FORMAT,
1564
1565 /**
1566 * Access qualifiers for image and memory access intrinsics
1567 */
1568 NIR_INTRINSIC_ACCESS,
1569
1570 /**
1571 * Alignment for offsets and addresses
1572 *
1573 * These two parameters, specify an alignment in terms of a multiplier and
1574 * an offset. The offset or address parameter X of the intrinsic is
1575 * guaranteed to satisfy the following:
1576 *
1577 * (X - align_offset) % align_mul == 0
1578 */
1579 NIR_INTRINSIC_ALIGN_MUL,
1580 NIR_INTRINSIC_ALIGN_OFFSET,
1581
1582 /**
1583 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1584 */
1585 NIR_INTRINSIC_DESC_TYPE,
1586
1587 /**
1588 * The nir_alu_type of a uniform/input/output
1589 */
1590 NIR_INTRINSIC_TYPE,
1591
1592 /**
1593 * The swizzle mask for the instructions
1594 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1595 */
1596 NIR_INTRINSIC_SWIZZLE_MASK,
1597
1598 /* Separate source/dest access flags for copies */
1599 NIR_INTRINSIC_SRC_ACCESS,
1600 NIR_INTRINSIC_DST_ACCESS,
1601
1602 /* Driver location for nir_load_patch_location_ir3 */
1603 NIR_INTRINSIC_DRIVER_LOCATION,
1604
1605 /**
1606 * Mask of nir_memory_semantics, includes ordering and visibility.
1607 */
1608 NIR_INTRINSIC_MEMORY_SEMANTICS,
1609
1610 /**
1611 * Mask of nir_variable_modes affected by the memory operation.
1612 */
1613 NIR_INTRINSIC_MEMORY_MODES,
1614
1615 /**
1616 * Value of nir_scope.
1617 */
1618 NIR_INTRINSIC_MEMORY_SCOPE,
1619
1620 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1621
1622 } nir_intrinsic_index_flag;
1623
1624 #define NIR_INTRINSIC_MAX_INPUTS 5
1625
1626 typedef struct {
1627 const char *name;
1628
1629 unsigned num_srcs; /** < number of register/SSA inputs */
1630
1631 /** number of components of each input register
1632 *
1633 * If this value is 0, the number of components is given by the
1634 * num_components field of nir_intrinsic_instr. If this value is -1, the
1635 * intrinsic consumes however many components are provided and it is not
1636 * validated at all.
1637 */
1638 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1639
1640 bool has_dest;
1641
1642 /** number of components of the output register
1643 *
1644 * If this value is 0, the number of components is given by the
1645 * num_components field of nir_intrinsic_instr.
1646 */
1647 unsigned dest_components;
1648
1649 /** bitfield of legal bit sizes */
1650 unsigned dest_bit_sizes;
1651
1652 /** the number of constant indices used by the intrinsic */
1653 unsigned num_indices;
1654
1655 /** indicates the usage of intr->const_index[n] */
1656 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1657
1658 /** semantic flags for calls to this intrinsic */
1659 nir_intrinsic_semantic_flag flags;
1660 } nir_intrinsic_info;
1661
1662 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1663
1664 static inline unsigned
1665 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1666 {
1667 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1668 assert(srcn < info->num_srcs);
1669 if (info->src_components[srcn] > 0)
1670 return info->src_components[srcn];
1671 else if (info->src_components[srcn] == 0)
1672 return intr->num_components;
1673 else
1674 return nir_src_num_components(intr->src[srcn]);
1675 }
1676
1677 static inline unsigned
1678 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1679 {
1680 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1681 if (!info->has_dest)
1682 return 0;
1683 else if (info->dest_components)
1684 return info->dest_components;
1685 else
1686 return intr->num_components;
1687 }
1688
1689 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1690 static inline type \
1691 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1692 { \
1693 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1694 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1695 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1696 } \
1697 static inline void \
1698 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1699 { \
1700 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1701 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1702 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1703 }
1704
1705 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1706 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1707 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1708 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1709 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1710 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1711 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1712 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1713 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1714 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1715 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1716 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1717 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1718 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1719 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1720 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1721 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1722 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1723 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1724 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1725 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1726 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1727 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1728 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1729 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1730 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1731 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1732
1733 static inline void
1734 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1735 unsigned align_mul, unsigned align_offset)
1736 {
1737 assert(util_is_power_of_two_nonzero(align_mul));
1738 assert(align_offset < align_mul);
1739 nir_intrinsic_set_align_mul(intrin, align_mul);
1740 nir_intrinsic_set_align_offset(intrin, align_offset);
1741 }
1742
1743 /** Returns a simple alignment for a load/store intrinsic offset
1744 *
1745 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1746 * and ALIGN_OFFSET parameters, this helper takes both into account and
1747 * provides a single simple alignment parameter. The offset X is guaranteed
1748 * to satisfy X % align == 0.
1749 */
1750 static inline unsigned
1751 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1752 {
1753 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1754 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1755 assert(align_offset < align_mul);
1756 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1757 }
1758
1759 /* Converts a image_deref_* intrinsic into a image_* one */
1760 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1761 nir_ssa_def *handle, bool bindless);
1762
1763 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1764 static inline bool
1765 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1766 {
1767 if (instr->intrinsic == nir_intrinsic_load_deref ||
1768 instr->intrinsic == nir_intrinsic_load_ssbo ||
1769 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1770 instr->intrinsic == nir_intrinsic_image_deref_load ||
1771 instr->intrinsic == nir_intrinsic_image_load) {
1772 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1773 } else {
1774 const nir_intrinsic_info *info =
1775 &nir_intrinsic_infos[instr->intrinsic];
1776 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1777 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1778 }
1779 }
1780
1781 /**
1782 * \group texture information
1783 *
1784 * This gives semantic information about textures which is useful to the
1785 * frontend, the backend, and lowering passes, but not the optimizer.
1786 */
1787
1788 typedef enum {
1789 nir_tex_src_coord,
1790 nir_tex_src_projector,
1791 nir_tex_src_comparator, /* shadow comparator */
1792 nir_tex_src_offset,
1793 nir_tex_src_bias,
1794 nir_tex_src_lod,
1795 nir_tex_src_min_lod,
1796 nir_tex_src_ms_index, /* MSAA sample index */
1797 nir_tex_src_ms_mcs, /* MSAA compression value */
1798 nir_tex_src_ddx,
1799 nir_tex_src_ddy,
1800 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1801 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1802 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1803 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1804 nir_tex_src_texture_handle, /* < bindless texture handle */
1805 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1806 nir_tex_src_plane, /* < selects plane for planar textures */
1807 nir_num_tex_src_types
1808 } nir_tex_src_type;
1809
1810 typedef struct {
1811 nir_src src;
1812 nir_tex_src_type src_type;
1813 } nir_tex_src;
1814
1815 typedef enum {
1816 nir_texop_tex, /**< Regular texture look-up */
1817 nir_texop_txb, /**< Texture look-up with LOD bias */
1818 nir_texop_txl, /**< Texture look-up with explicit LOD */
1819 nir_texop_txd, /**< Texture look-up with partial derivatives */
1820 nir_texop_txf, /**< Texel fetch with explicit LOD */
1821 nir_texop_txf_ms, /**< Multisample texture fetch */
1822 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1823 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1824 nir_texop_txs, /**< Texture size */
1825 nir_texop_lod, /**< Texture lod query */
1826 nir_texop_tg4, /**< Texture gather */
1827 nir_texop_query_levels, /**< Texture levels query */
1828 nir_texop_texture_samples, /**< Texture samples query */
1829 nir_texop_samples_identical, /**< Query whether all samples are definitely
1830 * identical.
1831 */
1832 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1833 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1834 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1835 } nir_texop;
1836
1837 typedef struct {
1838 nir_instr instr;
1839
1840 enum glsl_sampler_dim sampler_dim;
1841 nir_alu_type dest_type;
1842
1843 nir_texop op;
1844 nir_dest dest;
1845 nir_tex_src *src;
1846 unsigned num_srcs, coord_components;
1847 bool is_array, is_shadow;
1848
1849 /**
1850 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1851 * components or the new-style shadow that outputs 1 component.
1852 */
1853 bool is_new_style_shadow;
1854
1855 /* gather component selector */
1856 unsigned component : 2;
1857
1858 /* gather offsets */
1859 int8_t tg4_offsets[4][2];
1860
1861 /* True if the texture index or handle is not dynamically uniform */
1862 bool texture_non_uniform;
1863
1864 /* True if the sampler index or handle is not dynamically uniform */
1865 bool sampler_non_uniform;
1866
1867 /** The texture index
1868 *
1869 * If this texture instruction has a nir_tex_src_texture_offset source,
1870 * then the texture index is given by texture_index + texture_offset.
1871 */
1872 unsigned texture_index;
1873
1874 /** The size of the texture array or 0 if it's not an array */
1875 unsigned texture_array_size;
1876
1877 /** The sampler index
1878 *
1879 * The following operations do not require a sampler and, as such, this
1880 * field should be ignored:
1881 * - nir_texop_txf
1882 * - nir_texop_txf_ms
1883 * - nir_texop_txs
1884 * - nir_texop_lod
1885 * - nir_texop_query_levels
1886 * - nir_texop_texture_samples
1887 * - nir_texop_samples_identical
1888 *
1889 * If this texture instruction has a nir_tex_src_sampler_offset source,
1890 * then the sampler index is given by sampler_index + sampler_offset.
1891 */
1892 unsigned sampler_index;
1893 } nir_tex_instr;
1894
1895 static inline unsigned
1896 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1897 {
1898 switch (instr->op) {
1899 case nir_texop_txs: {
1900 unsigned ret;
1901 switch (instr->sampler_dim) {
1902 case GLSL_SAMPLER_DIM_1D:
1903 case GLSL_SAMPLER_DIM_BUF:
1904 ret = 1;
1905 break;
1906 case GLSL_SAMPLER_DIM_2D:
1907 case GLSL_SAMPLER_DIM_CUBE:
1908 case GLSL_SAMPLER_DIM_MS:
1909 case GLSL_SAMPLER_DIM_RECT:
1910 case GLSL_SAMPLER_DIM_EXTERNAL:
1911 case GLSL_SAMPLER_DIM_SUBPASS:
1912 ret = 2;
1913 break;
1914 case GLSL_SAMPLER_DIM_3D:
1915 ret = 3;
1916 break;
1917 default:
1918 unreachable("not reached");
1919 }
1920 if (instr->is_array)
1921 ret++;
1922 return ret;
1923 }
1924
1925 case nir_texop_lod:
1926 return 2;
1927
1928 case nir_texop_texture_samples:
1929 case nir_texop_query_levels:
1930 case nir_texop_samples_identical:
1931 case nir_texop_fragment_mask_fetch:
1932 return 1;
1933
1934 default:
1935 if (instr->is_shadow && instr->is_new_style_shadow)
1936 return 1;
1937
1938 return 4;
1939 }
1940 }
1941
1942 /* Returns true if this texture operation queries something about the texture
1943 * rather than actually sampling it.
1944 */
1945 static inline bool
1946 nir_tex_instr_is_query(const nir_tex_instr *instr)
1947 {
1948 switch (instr->op) {
1949 case nir_texop_txs:
1950 case nir_texop_lod:
1951 case nir_texop_texture_samples:
1952 case nir_texop_query_levels:
1953 case nir_texop_txf_ms_mcs:
1954 return true;
1955 case nir_texop_tex:
1956 case nir_texop_txb:
1957 case nir_texop_txl:
1958 case nir_texop_txd:
1959 case nir_texop_txf:
1960 case nir_texop_txf_ms:
1961 case nir_texop_txf_ms_fb:
1962 case nir_texop_tg4:
1963 return false;
1964 default:
1965 unreachable("Invalid texture opcode");
1966 }
1967 }
1968
1969 static inline bool
1970 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1971 {
1972 switch (instr->op) {
1973 case nir_texop_tex:
1974 case nir_texop_txb:
1975 case nir_texop_lod:
1976 return true;
1977 default:
1978 return false;
1979 }
1980 }
1981
1982 static inline nir_alu_type
1983 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1984 {
1985 switch (instr->src[src].src_type) {
1986 case nir_tex_src_coord:
1987 switch (instr->op) {
1988 case nir_texop_txf:
1989 case nir_texop_txf_ms:
1990 case nir_texop_txf_ms_fb:
1991 case nir_texop_txf_ms_mcs:
1992 case nir_texop_samples_identical:
1993 return nir_type_int;
1994
1995 default:
1996 return nir_type_float;
1997 }
1998
1999 case nir_tex_src_lod:
2000 switch (instr->op) {
2001 case nir_texop_txs:
2002 case nir_texop_txf:
2003 return nir_type_int;
2004
2005 default:
2006 return nir_type_float;
2007 }
2008
2009 case nir_tex_src_projector:
2010 case nir_tex_src_comparator:
2011 case nir_tex_src_bias:
2012 case nir_tex_src_min_lod:
2013 case nir_tex_src_ddx:
2014 case nir_tex_src_ddy:
2015 return nir_type_float;
2016
2017 case nir_tex_src_offset:
2018 case nir_tex_src_ms_index:
2019 case nir_tex_src_plane:
2020 return nir_type_int;
2021
2022 case nir_tex_src_ms_mcs:
2023 case nir_tex_src_texture_deref:
2024 case nir_tex_src_sampler_deref:
2025 case nir_tex_src_texture_offset:
2026 case nir_tex_src_sampler_offset:
2027 case nir_tex_src_texture_handle:
2028 case nir_tex_src_sampler_handle:
2029 return nir_type_uint;
2030
2031 case nir_num_tex_src_types:
2032 unreachable("nir_num_tex_src_types is not a valid source type");
2033 }
2034
2035 unreachable("Invalid texture source type");
2036 }
2037
2038 static inline unsigned
2039 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2040 {
2041 if (instr->src[src].src_type == nir_tex_src_coord)
2042 return instr->coord_components;
2043
2044 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2045 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2046 return 4;
2047
2048 if (instr->src[src].src_type == nir_tex_src_ddx ||
2049 instr->src[src].src_type == nir_tex_src_ddy) {
2050 if (instr->is_array)
2051 return instr->coord_components - 1;
2052 else
2053 return instr->coord_components;
2054 }
2055
2056 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2057 * the offset, since a cube maps to a single face.
2058 */
2059 if (instr->src[src].src_type == nir_tex_src_offset) {
2060 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2061 return 2;
2062 else if (instr->is_array)
2063 return instr->coord_components - 1;
2064 else
2065 return instr->coord_components;
2066 }
2067
2068 return 1;
2069 }
2070
2071 static inline int
2072 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2073 {
2074 for (unsigned i = 0; i < instr->num_srcs; i++)
2075 if (instr->src[i].src_type == type)
2076 return (int) i;
2077
2078 return -1;
2079 }
2080
2081 void nir_tex_instr_add_src(nir_tex_instr *tex,
2082 nir_tex_src_type src_type,
2083 nir_src src);
2084
2085 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2086
2087 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2088
2089 typedef struct {
2090 nir_instr instr;
2091
2092 nir_ssa_def def;
2093
2094 nir_const_value value[];
2095 } nir_load_const_instr;
2096
2097 typedef enum {
2098 nir_jump_return,
2099 nir_jump_break,
2100 nir_jump_continue,
2101 } nir_jump_type;
2102
2103 typedef struct {
2104 nir_instr instr;
2105 nir_jump_type type;
2106 } nir_jump_instr;
2107
2108 /* creates a new SSA variable in an undefined state */
2109
2110 typedef struct {
2111 nir_instr instr;
2112 nir_ssa_def def;
2113 } nir_ssa_undef_instr;
2114
2115 typedef struct {
2116 struct exec_node node;
2117
2118 /* The predecessor block corresponding to this source */
2119 struct nir_block *pred;
2120
2121 nir_src src;
2122 } nir_phi_src;
2123
2124 #define nir_foreach_phi_src(phi_src, phi) \
2125 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2126 #define nir_foreach_phi_src_safe(phi_src, phi) \
2127 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2128
2129 typedef struct {
2130 nir_instr instr;
2131
2132 struct exec_list srcs; /** < list of nir_phi_src */
2133
2134 nir_dest dest;
2135 } nir_phi_instr;
2136
2137 typedef struct {
2138 struct exec_node node;
2139 nir_src src;
2140 nir_dest dest;
2141 } nir_parallel_copy_entry;
2142
2143 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2144 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2145
2146 typedef struct {
2147 nir_instr instr;
2148
2149 /* A list of nir_parallel_copy_entrys. The sources of all of the
2150 * entries are copied to the corresponding destinations "in parallel".
2151 * In other words, if we have two entries: a -> b and b -> a, the values
2152 * get swapped.
2153 */
2154 struct exec_list entries;
2155 } nir_parallel_copy_instr;
2156
2157 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2158 type, nir_instr_type_alu)
2159 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2160 type, nir_instr_type_deref)
2161 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2162 type, nir_instr_type_call)
2163 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2164 type, nir_instr_type_jump)
2165 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2166 type, nir_instr_type_tex)
2167 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2168 type, nir_instr_type_intrinsic)
2169 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2170 type, nir_instr_type_load_const)
2171 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2172 type, nir_instr_type_ssa_undef)
2173 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2174 type, nir_instr_type_phi)
2175 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2176 nir_parallel_copy_instr, instr,
2177 type, nir_instr_type_parallel_copy)
2178
2179
2180 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2181 static inline type \
2182 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2183 { \
2184 assert(nir_src_is_const(src)); \
2185 nir_load_const_instr *load = \
2186 nir_instr_as_load_const(src.ssa->parent_instr); \
2187 assert(comp < load->def.num_components); \
2188 return nir_const_value_as_##suffix(load->value[comp], \
2189 load->def.bit_size); \
2190 } \
2191 \
2192 static inline type \
2193 nir_src_as_##suffix(nir_src src) \
2194 { \
2195 assert(nir_src_num_components(src) == 1); \
2196 return nir_src_comp_as_##suffix(src, 0); \
2197 }
2198
2199 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2200 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2201 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2202 NIR_DEFINE_SRC_AS_CONST(double, float)
2203
2204 #undef NIR_DEFINE_SRC_AS_CONST
2205
2206
2207 typedef struct {
2208 nir_ssa_def *def;
2209 unsigned comp;
2210 } nir_ssa_scalar;
2211
2212 static inline bool
2213 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2214 {
2215 return s.def->parent_instr->type == nir_instr_type_load_const;
2216 }
2217
2218 static inline nir_const_value
2219 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2220 {
2221 assert(s.comp < s.def->num_components);
2222 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2223 return load->value[s.comp];
2224 }
2225
2226 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2227 static inline type \
2228 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2229 { \
2230 return nir_const_value_as_##suffix( \
2231 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2232 }
2233
2234 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2235 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2236 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2237 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2238
2239 #undef NIR_DEFINE_SCALAR_AS_CONST
2240
2241 static inline bool
2242 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2243 {
2244 return s.def->parent_instr->type == nir_instr_type_alu;
2245 }
2246
2247 static inline nir_op
2248 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2249 {
2250 return nir_instr_as_alu(s.def->parent_instr)->op;
2251 }
2252
2253 static inline nir_ssa_scalar
2254 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2255 {
2256 nir_ssa_scalar out = { NULL, 0 };
2257
2258 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2259 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2260
2261 /* Our component must be written */
2262 assert(s.comp < s.def->num_components);
2263 assert(alu->dest.write_mask & (1u << s.comp));
2264
2265 assert(alu->src[alu_src_idx].src.is_ssa);
2266 out.def = alu->src[alu_src_idx].src.ssa;
2267
2268 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2269 /* The ALU src is unsized so the source component follows the
2270 * destination component.
2271 */
2272 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2273 } else {
2274 /* This is a sized source so all source components work together to
2275 * produce all the destination components. Since we need to return a
2276 * scalar, this only works if the source is a scalar.
2277 */
2278 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2279 out.comp = alu->src[alu_src_idx].swizzle[0];
2280 }
2281 assert(out.comp < out.def->num_components);
2282
2283 return out;
2284 }
2285
2286
2287 /*
2288 * Control flow
2289 *
2290 * Control flow consists of a tree of control flow nodes, which include
2291 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2292 * instructions that always run start-to-finish. Each basic block also keeps
2293 * track of its successors (blocks which may run immediately after the current
2294 * block) and predecessors (blocks which could have run immediately before the
2295 * current block). Each function also has a start block and an end block which
2296 * all return statements point to (which is always empty). Together, all the
2297 * blocks with their predecessors and successors make up the control flow
2298 * graph (CFG) of the function. There are helpers that modify the tree of
2299 * control flow nodes while modifying the CFG appropriately; these should be
2300 * used instead of modifying the tree directly.
2301 */
2302
2303 typedef enum {
2304 nir_cf_node_block,
2305 nir_cf_node_if,
2306 nir_cf_node_loop,
2307 nir_cf_node_function
2308 } nir_cf_node_type;
2309
2310 typedef struct nir_cf_node {
2311 struct exec_node node;
2312 nir_cf_node_type type;
2313 struct nir_cf_node *parent;
2314 } nir_cf_node;
2315
2316 typedef struct nir_block {
2317 nir_cf_node cf_node;
2318
2319 struct exec_list instr_list; /** < list of nir_instr */
2320
2321 /** generic block index; generated by nir_index_blocks */
2322 unsigned index;
2323
2324 /*
2325 * Each block can only have up to 2 successors, so we put them in a simple
2326 * array - no need for anything more complicated.
2327 */
2328 struct nir_block *successors[2];
2329
2330 /* Set of nir_block predecessors in the CFG */
2331 struct set *predecessors;
2332
2333 /*
2334 * this node's immediate dominator in the dominance tree - set to NULL for
2335 * the start block.
2336 */
2337 struct nir_block *imm_dom;
2338
2339 /* This node's children in the dominance tree */
2340 unsigned num_dom_children;
2341 struct nir_block **dom_children;
2342
2343 /* Set of nir_blocks on the dominance frontier of this block */
2344 struct set *dom_frontier;
2345
2346 /*
2347 * These two indices have the property that dom_{pre,post}_index for each
2348 * child of this block in the dominance tree will always be between
2349 * dom_pre_index and dom_post_index for this block, which makes testing if
2350 * a given block is dominated by another block an O(1) operation.
2351 */
2352 unsigned dom_pre_index, dom_post_index;
2353
2354 /* live in and out for this block; used for liveness analysis */
2355 BITSET_WORD *live_in;
2356 BITSET_WORD *live_out;
2357 } nir_block;
2358
2359 static inline nir_instr *
2360 nir_block_first_instr(nir_block *block)
2361 {
2362 struct exec_node *head = exec_list_get_head(&block->instr_list);
2363 return exec_node_data(nir_instr, head, node);
2364 }
2365
2366 static inline nir_instr *
2367 nir_block_last_instr(nir_block *block)
2368 {
2369 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2370 return exec_node_data(nir_instr, tail, node);
2371 }
2372
2373 static inline bool
2374 nir_block_ends_in_jump(nir_block *block)
2375 {
2376 return !exec_list_is_empty(&block->instr_list) &&
2377 nir_block_last_instr(block)->type == nir_instr_type_jump;
2378 }
2379
2380 #define nir_foreach_instr(instr, block) \
2381 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2382 #define nir_foreach_instr_reverse(instr, block) \
2383 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2384 #define nir_foreach_instr_safe(instr, block) \
2385 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2386 #define nir_foreach_instr_reverse_safe(instr, block) \
2387 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2388
2389 typedef enum {
2390 nir_selection_control_none = 0x0,
2391 nir_selection_control_flatten = 0x1,
2392 nir_selection_control_dont_flatten = 0x2,
2393 } nir_selection_control;
2394
2395 typedef struct nir_if {
2396 nir_cf_node cf_node;
2397 nir_src condition;
2398 nir_selection_control control;
2399
2400 struct exec_list then_list; /** < list of nir_cf_node */
2401 struct exec_list else_list; /** < list of nir_cf_node */
2402 } nir_if;
2403
2404 typedef struct {
2405 nir_if *nif;
2406
2407 /** Instruction that generates nif::condition. */
2408 nir_instr *conditional_instr;
2409
2410 /** Block within ::nif that has the break instruction. */
2411 nir_block *break_block;
2412
2413 /** Last block for the then- or else-path that does not contain the break. */
2414 nir_block *continue_from_block;
2415
2416 /** True when ::break_block is in the else-path of ::nif. */
2417 bool continue_from_then;
2418 bool induction_rhs;
2419
2420 /* This is true if the terminators exact trip count is unknown. For
2421 * example:
2422 *
2423 * for (int i = 0; i < imin(x, 4); i++)
2424 * ...
2425 *
2426 * Here loop analysis would have set a max_trip_count of 4 however we dont
2427 * know for sure that this is the exact trip count.
2428 */
2429 bool exact_trip_count_unknown;
2430
2431 struct list_head loop_terminator_link;
2432 } nir_loop_terminator;
2433
2434 typedef struct {
2435 /* Estimated cost (in number of instructions) of the loop */
2436 unsigned instr_cost;
2437
2438 /* Guessed trip count based on array indexing */
2439 unsigned guessed_trip_count;
2440
2441 /* Maximum number of times the loop is run (if known) */
2442 unsigned max_trip_count;
2443
2444 /* Do we know the exact number of times the loop will be run */
2445 bool exact_trip_count_known;
2446
2447 /* Unroll the loop regardless of its size */
2448 bool force_unroll;
2449
2450 /* Does the loop contain complex loop terminators, continues or other
2451 * complex behaviours? If this is true we can't rely on
2452 * loop_terminator_list to be complete or accurate.
2453 */
2454 bool complex_loop;
2455
2456 nir_loop_terminator *limiting_terminator;
2457
2458 /* A list of loop_terminators terminating this loop. */
2459 struct list_head loop_terminator_list;
2460 } nir_loop_info;
2461
2462 typedef enum {
2463 nir_loop_control_none = 0x0,
2464 nir_loop_control_unroll = 0x1,
2465 nir_loop_control_dont_unroll = 0x2,
2466 } nir_loop_control;
2467
2468 typedef struct {
2469 nir_cf_node cf_node;
2470
2471 struct exec_list body; /** < list of nir_cf_node */
2472
2473 nir_loop_info *info;
2474 nir_loop_control control;
2475 bool partially_unrolled;
2476 } nir_loop;
2477
2478 /**
2479 * Various bits of metadata that can may be created or required by
2480 * optimization and analysis passes
2481 */
2482 typedef enum {
2483 nir_metadata_none = 0x0,
2484 nir_metadata_block_index = 0x1,
2485 nir_metadata_dominance = 0x2,
2486 nir_metadata_live_ssa_defs = 0x4,
2487 nir_metadata_not_properly_reset = 0x8,
2488 nir_metadata_loop_analysis = 0x10,
2489 } nir_metadata;
2490
2491 typedef struct {
2492 nir_cf_node cf_node;
2493
2494 /** pointer to the function of which this is an implementation */
2495 struct nir_function *function;
2496
2497 struct exec_list body; /** < list of nir_cf_node */
2498
2499 nir_block *end_block;
2500
2501 /** list for all local variables in the function */
2502 struct exec_list locals;
2503
2504 /** list of local registers in the function */
2505 struct exec_list registers;
2506
2507 /** next available local register index */
2508 unsigned reg_alloc;
2509
2510 /** next available SSA value index */
2511 unsigned ssa_alloc;
2512
2513 /* total number of basic blocks, only valid when block_index_dirty = false */
2514 unsigned num_blocks;
2515
2516 nir_metadata valid_metadata;
2517 } nir_function_impl;
2518
2519 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2520 nir_start_block(nir_function_impl *impl)
2521 {
2522 return (nir_block *) impl->body.head_sentinel.next;
2523 }
2524
2525 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2526 nir_impl_last_block(nir_function_impl *impl)
2527 {
2528 return (nir_block *) impl->body.tail_sentinel.prev;
2529 }
2530
2531 static inline nir_cf_node *
2532 nir_cf_node_next(nir_cf_node *node)
2533 {
2534 struct exec_node *next = exec_node_get_next(&node->node);
2535 if (exec_node_is_tail_sentinel(next))
2536 return NULL;
2537 else
2538 return exec_node_data(nir_cf_node, next, node);
2539 }
2540
2541 static inline nir_cf_node *
2542 nir_cf_node_prev(nir_cf_node *node)
2543 {
2544 struct exec_node *prev = exec_node_get_prev(&node->node);
2545 if (exec_node_is_head_sentinel(prev))
2546 return NULL;
2547 else
2548 return exec_node_data(nir_cf_node, prev, node);
2549 }
2550
2551 static inline bool
2552 nir_cf_node_is_first(const nir_cf_node *node)
2553 {
2554 return exec_node_is_head_sentinel(node->node.prev);
2555 }
2556
2557 static inline bool
2558 nir_cf_node_is_last(const nir_cf_node *node)
2559 {
2560 return exec_node_is_tail_sentinel(node->node.next);
2561 }
2562
2563 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2564 type, nir_cf_node_block)
2565 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2566 type, nir_cf_node_if)
2567 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2568 type, nir_cf_node_loop)
2569 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2570 nir_function_impl, cf_node, type, nir_cf_node_function)
2571
2572 static inline nir_block *
2573 nir_if_first_then_block(nir_if *if_stmt)
2574 {
2575 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2576 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2577 }
2578
2579 static inline nir_block *
2580 nir_if_last_then_block(nir_if *if_stmt)
2581 {
2582 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2583 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2584 }
2585
2586 static inline nir_block *
2587 nir_if_first_else_block(nir_if *if_stmt)
2588 {
2589 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2590 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2591 }
2592
2593 static inline nir_block *
2594 nir_if_last_else_block(nir_if *if_stmt)
2595 {
2596 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2597 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2598 }
2599
2600 static inline nir_block *
2601 nir_loop_first_block(nir_loop *loop)
2602 {
2603 struct exec_node *head = exec_list_get_head(&loop->body);
2604 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2605 }
2606
2607 static inline nir_block *
2608 nir_loop_last_block(nir_loop *loop)
2609 {
2610 struct exec_node *tail = exec_list_get_tail(&loop->body);
2611 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2612 }
2613
2614 /**
2615 * Return true if this list of cf_nodes contains a single empty block.
2616 */
2617 static inline bool
2618 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2619 {
2620 if (exec_list_is_singular(cf_list)) {
2621 struct exec_node *head = exec_list_get_head(cf_list);
2622 nir_block *block =
2623 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2624 return exec_list_is_empty(&block->instr_list);
2625 }
2626 return false;
2627 }
2628
2629 typedef struct {
2630 uint8_t num_components;
2631 uint8_t bit_size;
2632 } nir_parameter;
2633
2634 typedef struct nir_function {
2635 struct exec_node node;
2636
2637 const char *name;
2638 struct nir_shader *shader;
2639
2640 unsigned num_params;
2641 nir_parameter *params;
2642
2643 /** The implementation of this function.
2644 *
2645 * If the function is only declared and not implemented, this is NULL.
2646 */
2647 nir_function_impl *impl;
2648
2649 bool is_entrypoint;
2650 } nir_function;
2651
2652 typedef enum {
2653 nir_lower_imul64 = (1 << 0),
2654 nir_lower_isign64 = (1 << 1),
2655 /** Lower all int64 modulus and division opcodes */
2656 nir_lower_divmod64 = (1 << 2),
2657 /** Lower all 64-bit umul_high and imul_high opcodes */
2658 nir_lower_imul_high64 = (1 << 3),
2659 nir_lower_mov64 = (1 << 4),
2660 nir_lower_icmp64 = (1 << 5),
2661 nir_lower_iadd64 = (1 << 6),
2662 nir_lower_iabs64 = (1 << 7),
2663 nir_lower_ineg64 = (1 << 8),
2664 nir_lower_logic64 = (1 << 9),
2665 nir_lower_minmax64 = (1 << 10),
2666 nir_lower_shift64 = (1 << 11),
2667 nir_lower_imul_2x32_64 = (1 << 12),
2668 nir_lower_extract64 = (1 << 13),
2669 nir_lower_ufind_msb64 = (1 << 14),
2670 } nir_lower_int64_options;
2671
2672 typedef enum {
2673 nir_lower_drcp = (1 << 0),
2674 nir_lower_dsqrt = (1 << 1),
2675 nir_lower_drsq = (1 << 2),
2676 nir_lower_dtrunc = (1 << 3),
2677 nir_lower_dfloor = (1 << 4),
2678 nir_lower_dceil = (1 << 5),
2679 nir_lower_dfract = (1 << 6),
2680 nir_lower_dround_even = (1 << 7),
2681 nir_lower_dmod = (1 << 8),
2682 nir_lower_dsub = (1 << 9),
2683 nir_lower_ddiv = (1 << 10),
2684 nir_lower_fp64_full_software = (1 << 11),
2685 } nir_lower_doubles_options;
2686
2687 typedef enum {
2688 nir_divergence_single_prim_per_subgroup = (1 << 0),
2689 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2690 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2691 nir_divergence_view_index_uniform = (1 << 3),
2692 } nir_divergence_options;
2693
2694 typedef struct nir_shader_compiler_options {
2695 bool lower_fdiv;
2696 bool lower_ffma;
2697 bool fuse_ffma;
2698 bool lower_flrp16;
2699 bool lower_flrp32;
2700 /** Lowers flrp when it does not support doubles */
2701 bool lower_flrp64;
2702 bool lower_fpow;
2703 bool lower_fsat;
2704 bool lower_fsqrt;
2705 bool lower_sincos;
2706 bool lower_fmod;
2707 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2708 bool lower_bitfield_extract;
2709 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2710 bool lower_bitfield_extract_to_shifts;
2711 /** Lowers bitfield_insert to bfi/bfm */
2712 bool lower_bitfield_insert;
2713 /** Lowers bitfield_insert to compares, and shifts. */
2714 bool lower_bitfield_insert_to_shifts;
2715 /** Lowers bitfield_insert to bfm/bitfield_select. */
2716 bool lower_bitfield_insert_to_bitfield_select;
2717 /** Lowers bitfield_reverse to shifts. */
2718 bool lower_bitfield_reverse;
2719 /** Lowers bit_count to shifts. */
2720 bool lower_bit_count;
2721 /** Lowers ifind_msb to compare and ufind_msb */
2722 bool lower_ifind_msb;
2723 /** Lowers find_lsb to ufind_msb and logic ops */
2724 bool lower_find_lsb;
2725 bool lower_uadd_carry;
2726 bool lower_usub_borrow;
2727 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2728 bool lower_mul_high;
2729 /** lowers fneg and ineg to fsub and isub. */
2730 bool lower_negate;
2731 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2732 bool lower_sub;
2733
2734 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2735 bool lower_scmp;
2736
2737 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2738 bool lower_vector_cmp;
2739
2740 /** enables rules to lower idiv by power-of-two: */
2741 bool lower_idiv;
2742
2743 /** enable rules to avoid bit ops */
2744 bool lower_bitops;
2745
2746 /** enables rules to lower isign to imin+imax */
2747 bool lower_isign;
2748
2749 /** enables rules to lower fsign to fsub and flt */
2750 bool lower_fsign;
2751
2752 /* lower fdph to fdot4 */
2753 bool lower_fdph;
2754
2755 /** lower fdot to fmul and fsum/fadd. */
2756 bool lower_fdot;
2757
2758 /* Does the native fdot instruction replicate its result for four
2759 * components? If so, then opt_algebraic_late will turn all fdotN
2760 * instructions into fdot_replicatedN instructions.
2761 */
2762 bool fdot_replicates;
2763
2764 /** lowers ffloor to fsub+ffract: */
2765 bool lower_ffloor;
2766
2767 /** lowers ffract to fsub+ffloor: */
2768 bool lower_ffract;
2769
2770 /** lowers fceil to fneg+ffloor+fneg: */
2771 bool lower_fceil;
2772
2773 bool lower_ftrunc;
2774
2775 bool lower_ldexp;
2776
2777 bool lower_pack_half_2x16;
2778 bool lower_pack_half_2x16_split;
2779 bool lower_pack_unorm_2x16;
2780 bool lower_pack_snorm_2x16;
2781 bool lower_pack_unorm_4x8;
2782 bool lower_pack_snorm_4x8;
2783 bool lower_unpack_half_2x16;
2784 bool lower_unpack_half_2x16_split;
2785 bool lower_unpack_unorm_2x16;
2786 bool lower_unpack_snorm_2x16;
2787 bool lower_unpack_unorm_4x8;
2788 bool lower_unpack_snorm_4x8;
2789
2790 bool lower_extract_byte;
2791 bool lower_extract_word;
2792
2793 bool lower_all_io_to_temps;
2794 bool lower_all_io_to_elements;
2795
2796 /* Indicates that the driver only has zero-based vertex id */
2797 bool vertex_id_zero_based;
2798
2799 /**
2800 * If enabled, gl_BaseVertex will be lowered as:
2801 * is_indexed_draw (~0/0) & firstvertex
2802 */
2803 bool lower_base_vertex;
2804
2805 /**
2806 * If enabled, gl_HelperInvocation will be lowered as:
2807 *
2808 * !((1 << sample_id) & sample_mask_in))
2809 *
2810 * This depends on some possibly hw implementation details, which may
2811 * not be true for all hw. In particular that the FS is only executed
2812 * for covered samples or for helper invocations. So, do not blindly
2813 * enable this option.
2814 *
2815 * Note: See also issue #22 in ARB_shader_image_load_store
2816 */
2817 bool lower_helper_invocation;
2818
2819 /**
2820 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2821 *
2822 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2823 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2824 */
2825 bool optimize_sample_mask_in;
2826
2827 bool lower_cs_local_index_from_id;
2828 bool lower_cs_local_id_from_index;
2829
2830 bool lower_device_index_to_zero;
2831
2832 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2833 bool lower_wpos_pntc;
2834
2835 /**
2836 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2837 * lowered to simple arithmetic.
2838 *
2839 * If this flag is set, the lowering will be applied to all bit-sizes of
2840 * these instructions.
2841 *
2842 * \sa ::lower_hadd64
2843 */
2844 bool lower_hadd;
2845
2846 /**
2847 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2848 * should be lowered to simple arithmetic.
2849 *
2850 * If this flag is set, the lowering will be applied to only 64-bit
2851 * versions of these instructions.
2852 *
2853 * \sa ::lower_hadd
2854 */
2855 bool lower_hadd64;
2856
2857 /**
2858 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2859 * arithmetic.
2860 *
2861 * If this flag is set, the lowering will be applied to all bit-sizes of
2862 * these instructions.
2863 *
2864 * \sa ::lower_usub_sat64
2865 */
2866 bool lower_add_sat;
2867
2868 /**
2869 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2870 * arithmetic.
2871 *
2872 * \sa ::lower_add_sat
2873 */
2874 bool lower_usub_sat64;
2875
2876 /**
2877 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2878 * for IO purposes and would prefer loads/stores be vectorized.
2879 */
2880 bool vectorize_io;
2881 bool lower_to_scalar;
2882
2883 /**
2884 * Should the linker unify inputs_read/outputs_written between adjacent
2885 * shader stages which are linked into a single program?
2886 */
2887 bool unify_interfaces;
2888
2889 /**
2890 * Should nir_lower_io() create load_interpolated_input intrinsics?
2891 *
2892 * If not, it generates regular load_input intrinsics and interpolation
2893 * information must be inferred from the list of input nir_variables.
2894 */
2895 bool use_interpolated_input_intrinsics;
2896
2897 /* Lowers when 32x32->64 bit multiplication is not supported */
2898 bool lower_mul_2x32_64;
2899
2900 /* Lowers when rotate instruction is not supported */
2901 bool lower_rotate;
2902
2903 /**
2904 * Backend supports imul24, and would like to use it (when possible)
2905 * for address/offset calculation. If true, driver should call
2906 * nir_lower_amul(). (If not set, amul will automatically be lowered
2907 * to imul.)
2908 */
2909 bool has_imul24;
2910
2911 /**
2912 * Is this the Intel vec4 backend?
2913 *
2914 * Used to inhibit algebraic optimizations that are known to be harmful on
2915 * the Intel vec4 backend. This is generally applicable to any
2916 * optimization that might cause more immediate values to be used in
2917 * 3-source (e.g., ffma and flrp) instructions.
2918 */
2919 bool intel_vec4;
2920
2921 unsigned max_unroll_iterations;
2922
2923 nir_lower_int64_options lower_int64_options;
2924 nir_lower_doubles_options lower_doubles_options;
2925 } nir_shader_compiler_options;
2926
2927 typedef struct nir_shader {
2928 /** list of uniforms (nir_variable) */
2929 struct exec_list uniforms;
2930
2931 /** list of inputs (nir_variable) */
2932 struct exec_list inputs;
2933
2934 /** list of outputs (nir_variable) */
2935 struct exec_list outputs;
2936
2937 /** list of shared compute variables (nir_variable) */
2938 struct exec_list shared;
2939
2940 /** Set of driver-specific options for the shader.
2941 *
2942 * The memory for the options is expected to be kept in a single static
2943 * copy by the driver.
2944 */
2945 const struct nir_shader_compiler_options *options;
2946
2947 /** Various bits of compile-time information about a given shader */
2948 struct shader_info info;
2949
2950 /** list of global variables in the shader (nir_variable) */
2951 struct exec_list globals;
2952
2953 /** list of system value variables in the shader (nir_variable) */
2954 struct exec_list system_values;
2955
2956 struct exec_list functions; /** < list of nir_function */
2957
2958 /**
2959 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2960 * access plus one
2961 */
2962 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2963
2964 /** Size in bytes of required scratch space */
2965 unsigned scratch_size;
2966
2967 /** Constant data associated with this shader.
2968 *
2969 * Constant data is loaded through load_constant intrinsics. See also
2970 * nir_opt_large_constants.
2971 */
2972 void *constant_data;
2973 unsigned constant_data_size;
2974 } nir_shader;
2975
2976 #define nir_foreach_function(func, shader) \
2977 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2978
2979 static inline nir_function_impl *
2980 nir_shader_get_entrypoint(nir_shader *shader)
2981 {
2982 nir_function *func = NULL;
2983
2984 nir_foreach_function(function, shader) {
2985 assert(func == NULL);
2986 if (function->is_entrypoint) {
2987 func = function;
2988 #ifndef NDEBUG
2989 break;
2990 #endif
2991 }
2992 }
2993
2994 if (!func)
2995 return NULL;
2996
2997 assert(func->num_params == 0);
2998 assert(func->impl);
2999 return func->impl;
3000 }
3001
3002 nir_shader *nir_shader_create(void *mem_ctx,
3003 gl_shader_stage stage,
3004 const nir_shader_compiler_options *options,
3005 shader_info *si);
3006
3007 nir_register *nir_local_reg_create(nir_function_impl *impl);
3008
3009 void nir_reg_remove(nir_register *reg);
3010
3011 /** Adds a variable to the appropriate list in nir_shader */
3012 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3013
3014 static inline void
3015 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3016 {
3017 assert(var->data.mode == nir_var_function_temp);
3018 exec_list_push_tail(&impl->locals, &var->node);
3019 }
3020
3021 /** creates a variable, sets a few defaults, and adds it to the list */
3022 nir_variable *nir_variable_create(nir_shader *shader,
3023 nir_variable_mode mode,
3024 const struct glsl_type *type,
3025 const char *name);
3026 /** creates a local variable and adds it to the list */
3027 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3028 const struct glsl_type *type,
3029 const char *name);
3030
3031 /** creates a function and adds it to the shader's list of functions */
3032 nir_function *nir_function_create(nir_shader *shader, const char *name);
3033
3034 nir_function_impl *nir_function_impl_create(nir_function *func);
3035 /** creates a function_impl that isn't tied to any particular function */
3036 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3037
3038 nir_block *nir_block_create(nir_shader *shader);
3039 nir_if *nir_if_create(nir_shader *shader);
3040 nir_loop *nir_loop_create(nir_shader *shader);
3041
3042 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3043
3044 /** requests that the given pieces of metadata be generated */
3045 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3046 /** dirties all but the preserved metadata */
3047 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3048
3049 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3050 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3051
3052 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3053 nir_deref_type deref_type);
3054
3055 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3056
3057 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3058 unsigned num_components,
3059 unsigned bit_size);
3060
3061 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3062 nir_intrinsic_op op);
3063
3064 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3065 nir_function *callee);
3066
3067 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3068
3069 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3070
3071 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3072
3073 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3074 unsigned num_components,
3075 unsigned bit_size);
3076
3077 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3078
3079 /**
3080 * NIR Cursors and Instruction Insertion API
3081 * @{
3082 *
3083 * A tiny struct representing a point to insert/extract instructions or
3084 * control flow nodes. Helps reduce the combinatorial explosion of possible
3085 * points to insert/extract.
3086 *
3087 * \sa nir_control_flow.h
3088 */
3089 typedef enum {
3090 nir_cursor_before_block,
3091 nir_cursor_after_block,
3092 nir_cursor_before_instr,
3093 nir_cursor_after_instr,
3094 } nir_cursor_option;
3095
3096 typedef struct {
3097 nir_cursor_option option;
3098 union {
3099 nir_block *block;
3100 nir_instr *instr;
3101 };
3102 } nir_cursor;
3103
3104 static inline nir_block *
3105 nir_cursor_current_block(nir_cursor cursor)
3106 {
3107 if (cursor.option == nir_cursor_before_instr ||
3108 cursor.option == nir_cursor_after_instr) {
3109 return cursor.instr->block;
3110 } else {
3111 return cursor.block;
3112 }
3113 }
3114
3115 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3116
3117 static inline nir_cursor
3118 nir_before_block(nir_block *block)
3119 {
3120 nir_cursor cursor;
3121 cursor.option = nir_cursor_before_block;
3122 cursor.block = block;
3123 return cursor;
3124 }
3125
3126 static inline nir_cursor
3127 nir_after_block(nir_block *block)
3128 {
3129 nir_cursor cursor;
3130 cursor.option = nir_cursor_after_block;
3131 cursor.block = block;
3132 return cursor;
3133 }
3134
3135 static inline nir_cursor
3136 nir_before_instr(nir_instr *instr)
3137 {
3138 nir_cursor cursor;
3139 cursor.option = nir_cursor_before_instr;
3140 cursor.instr = instr;
3141 return cursor;
3142 }
3143
3144 static inline nir_cursor
3145 nir_after_instr(nir_instr *instr)
3146 {
3147 nir_cursor cursor;
3148 cursor.option = nir_cursor_after_instr;
3149 cursor.instr = instr;
3150 return cursor;
3151 }
3152
3153 static inline nir_cursor
3154 nir_after_block_before_jump(nir_block *block)
3155 {
3156 nir_instr *last_instr = nir_block_last_instr(block);
3157 if (last_instr && last_instr->type == nir_instr_type_jump) {
3158 return nir_before_instr(last_instr);
3159 } else {
3160 return nir_after_block(block);
3161 }
3162 }
3163
3164 static inline nir_cursor
3165 nir_before_src(nir_src *src, bool is_if_condition)
3166 {
3167 if (is_if_condition) {
3168 nir_block *prev_block =
3169 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3170 assert(!nir_block_ends_in_jump(prev_block));
3171 return nir_after_block(prev_block);
3172 } else if (src->parent_instr->type == nir_instr_type_phi) {
3173 #ifndef NDEBUG
3174 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3175 bool found = false;
3176 nir_foreach_phi_src(phi_src, cond_phi) {
3177 if (phi_src->src.ssa == src->ssa) {
3178 found = true;
3179 break;
3180 }
3181 }
3182 assert(found);
3183 #endif
3184 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3185 * to have a more specific name.
3186 */
3187 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3188 return nir_after_block_before_jump(phi_src->pred);
3189 } else {
3190 return nir_before_instr(src->parent_instr);
3191 }
3192 }
3193
3194 static inline nir_cursor
3195 nir_before_cf_node(nir_cf_node *node)
3196 {
3197 if (node->type == nir_cf_node_block)
3198 return nir_before_block(nir_cf_node_as_block(node));
3199
3200 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3201 }
3202
3203 static inline nir_cursor
3204 nir_after_cf_node(nir_cf_node *node)
3205 {
3206 if (node->type == nir_cf_node_block)
3207 return nir_after_block(nir_cf_node_as_block(node));
3208
3209 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3210 }
3211
3212 static inline nir_cursor
3213 nir_after_phis(nir_block *block)
3214 {
3215 nir_foreach_instr(instr, block) {
3216 if (instr->type != nir_instr_type_phi)
3217 return nir_before_instr(instr);
3218 }
3219 return nir_after_block(block);
3220 }
3221
3222 static inline nir_cursor
3223 nir_after_cf_node_and_phis(nir_cf_node *node)
3224 {
3225 if (node->type == nir_cf_node_block)
3226 return nir_after_block(nir_cf_node_as_block(node));
3227
3228 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3229
3230 return nir_after_phis(block);
3231 }
3232
3233 static inline nir_cursor
3234 nir_before_cf_list(struct exec_list *cf_list)
3235 {
3236 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3237 exec_list_get_head(cf_list), node);
3238 return nir_before_cf_node(first_node);
3239 }
3240
3241 static inline nir_cursor
3242 nir_after_cf_list(struct exec_list *cf_list)
3243 {
3244 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3245 exec_list_get_tail(cf_list), node);
3246 return nir_after_cf_node(last_node);
3247 }
3248
3249 /**
3250 * Insert a NIR instruction at the given cursor.
3251 *
3252 * Note: This does not update the cursor.
3253 */
3254 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3255
3256 static inline void
3257 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3258 {
3259 nir_instr_insert(nir_before_instr(instr), before);
3260 }
3261
3262 static inline void
3263 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3264 {
3265 nir_instr_insert(nir_after_instr(instr), after);
3266 }
3267
3268 static inline void
3269 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3270 {
3271 nir_instr_insert(nir_before_block(block), before);
3272 }
3273
3274 static inline void
3275 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3276 {
3277 nir_instr_insert(nir_after_block(block), after);
3278 }
3279
3280 static inline void
3281 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3282 {
3283 nir_instr_insert(nir_before_cf_node(node), before);
3284 }
3285
3286 static inline void
3287 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3288 {
3289 nir_instr_insert(nir_after_cf_node(node), after);
3290 }
3291
3292 static inline void
3293 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3294 {
3295 nir_instr_insert(nir_before_cf_list(list), before);
3296 }
3297
3298 static inline void
3299 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3300 {
3301 nir_instr_insert(nir_after_cf_list(list), after);
3302 }
3303
3304 void nir_instr_remove_v(nir_instr *instr);
3305
3306 static inline nir_cursor
3307 nir_instr_remove(nir_instr *instr)
3308 {
3309 nir_cursor cursor;
3310 nir_instr *prev = nir_instr_prev(instr);
3311 if (prev) {
3312 cursor = nir_after_instr(prev);
3313 } else {
3314 cursor = nir_before_block(instr->block);
3315 }
3316 nir_instr_remove_v(instr);
3317 return cursor;
3318 }
3319
3320 /** @} */
3321
3322 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3323
3324 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3325 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3326 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3327 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3328 void *state);
3329 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3330 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3331
3332 nir_const_value *nir_src_as_const_value(nir_src src);
3333
3334 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3335 static inline c_type * \
3336 nir_src_as_ ## name (nir_src src) \
3337 { \
3338 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3339 ? cast_macro(src.ssa->parent_instr) : NULL; \
3340 }
3341
3342 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3343 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3344 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3345 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3346
3347 bool nir_src_is_dynamically_uniform(nir_src src);
3348 bool nir_srcs_equal(nir_src src1, nir_src src2);
3349 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3350 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3351 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3352 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3353 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3354 nir_dest new_dest);
3355
3356 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3357 unsigned num_components, unsigned bit_size,
3358 const char *name);
3359 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3360 unsigned num_components, unsigned bit_size,
3361 const char *name);
3362 static inline void
3363 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3364 const struct glsl_type *type,
3365 const char *name)
3366 {
3367 assert(glsl_type_is_vector_or_scalar(type));
3368 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3369 glsl_get_bit_size(type), name);
3370 }
3371 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3372 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3373 nir_instr *after_me);
3374
3375 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3376
3377 /*
3378 * finds the next basic block in source-code order, returns NULL if there is
3379 * none
3380 */
3381
3382 nir_block *nir_block_cf_tree_next(nir_block *block);
3383
3384 /* Performs the opposite of nir_block_cf_tree_next() */
3385
3386 nir_block *nir_block_cf_tree_prev(nir_block *block);
3387
3388 /* Gets the first block in a CF node in source-code order */
3389
3390 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3391
3392 /* Gets the last block in a CF node in source-code order */
3393
3394 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3395
3396 /* Gets the next block after a CF node in source-code order */
3397
3398 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3399
3400 /* Macros for loops that visit blocks in source-code order */
3401
3402 #define nir_foreach_block(block, impl) \
3403 for (nir_block *block = nir_start_block(impl); block != NULL; \
3404 block = nir_block_cf_tree_next(block))
3405
3406 #define nir_foreach_block_safe(block, impl) \
3407 for (nir_block *block = nir_start_block(impl), \
3408 *next = nir_block_cf_tree_next(block); \
3409 block != NULL; \
3410 block = next, next = nir_block_cf_tree_next(block))
3411
3412 #define nir_foreach_block_reverse(block, impl) \
3413 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3414 block = nir_block_cf_tree_prev(block))
3415
3416 #define nir_foreach_block_reverse_safe(block, impl) \
3417 for (nir_block *block = nir_impl_last_block(impl), \
3418 *prev = nir_block_cf_tree_prev(block); \
3419 block != NULL; \
3420 block = prev, prev = nir_block_cf_tree_prev(block))
3421
3422 #define nir_foreach_block_in_cf_node(block, node) \
3423 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3424 block != nir_cf_node_cf_tree_next(node); \
3425 block = nir_block_cf_tree_next(block))
3426
3427 /* If the following CF node is an if, this function returns that if.
3428 * Otherwise, it returns NULL.
3429 */
3430 nir_if *nir_block_get_following_if(nir_block *block);
3431
3432 nir_loop *nir_block_get_following_loop(nir_block *block);
3433
3434 void nir_index_local_regs(nir_function_impl *impl);
3435 void nir_index_ssa_defs(nir_function_impl *impl);
3436 unsigned nir_index_instrs(nir_function_impl *impl);
3437
3438 void nir_index_blocks(nir_function_impl *impl);
3439
3440 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3441
3442 void nir_print_shader(nir_shader *shader, FILE *fp);
3443 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3444 void nir_print_instr(const nir_instr *instr, FILE *fp);
3445 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3446
3447 /** Shallow clone of a single ALU instruction. */
3448 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3449
3450 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3451 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3452 const nir_function_impl *fi);
3453 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3454 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3455
3456 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3457
3458 void nir_shader_serialize_deserialize(nir_shader *s);
3459
3460 #ifndef NDEBUG
3461 void nir_validate_shader(nir_shader *shader, const char *when);
3462 void nir_metadata_set_validation_flag(nir_shader *shader);
3463 void nir_metadata_check_validation_flag(nir_shader *shader);
3464
3465 static inline bool
3466 should_skip_nir(const char *name)
3467 {
3468 static const char *list = NULL;
3469 if (!list) {
3470 /* Comma separated list of names to skip. */
3471 list = getenv("NIR_SKIP");
3472 if (!list)
3473 list = "";
3474 }
3475
3476 if (!list[0])
3477 return false;
3478
3479 return comma_separated_list_contains(list, name);
3480 }
3481
3482 static inline bool
3483 should_clone_nir(void)
3484 {
3485 static int should_clone = -1;
3486 if (should_clone < 0)
3487 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3488
3489 return should_clone;
3490 }
3491
3492 static inline bool
3493 should_serialize_deserialize_nir(void)
3494 {
3495 static int test_serialize = -1;
3496 if (test_serialize < 0)
3497 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3498
3499 return test_serialize;
3500 }
3501
3502 static inline bool
3503 should_print_nir(void)
3504 {
3505 static int should_print = -1;
3506 if (should_print < 0)
3507 should_print = env_var_as_boolean("NIR_PRINT", false);
3508
3509 return should_print;
3510 }
3511 #else
3512 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3513 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3514 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3515 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3516 static inline bool should_clone_nir(void) { return false; }
3517 static inline bool should_serialize_deserialize_nir(void) { return false; }
3518 static inline bool should_print_nir(void) { return false; }
3519 #endif /* NDEBUG */
3520
3521 #define _PASS(pass, nir, do_pass) do { \
3522 if (should_skip_nir(#pass)) { \
3523 printf("skipping %s\n", #pass); \
3524 break; \
3525 } \
3526 do_pass \
3527 nir_validate_shader(nir, "after " #pass); \
3528 if (should_clone_nir()) { \
3529 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3530 nir_shader_replace(nir, clone); \
3531 } \
3532 if (should_serialize_deserialize_nir()) { \
3533 nir_shader_serialize_deserialize(nir); \
3534 } \
3535 } while (0)
3536
3537 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3538 nir_metadata_set_validation_flag(nir); \
3539 if (should_print_nir()) \
3540 printf("%s\n", #pass); \
3541 if (pass(nir, ##__VA_ARGS__)) { \
3542 progress = true; \
3543 if (should_print_nir()) \
3544 nir_print_shader(nir, stdout); \
3545 nir_metadata_check_validation_flag(nir); \
3546 } \
3547 )
3548
3549 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3550 if (should_print_nir()) \
3551 printf("%s\n", #pass); \
3552 pass(nir, ##__VA_ARGS__); \
3553 if (should_print_nir()) \
3554 nir_print_shader(nir, stdout); \
3555 )
3556
3557 #define NIR_SKIP(name) should_skip_nir(#name)
3558
3559 /** An instruction filtering callback
3560 *
3561 * Returns true if the instruction should be processed and false otherwise.
3562 */
3563 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3564
3565 /** A simple instruction lowering callback
3566 *
3567 * Many instruction lowering passes can be written as a simple function which
3568 * takes an instruction as its input and returns a sequence of instructions
3569 * that implement the consumed instruction. This function type represents
3570 * such a lowering function. When called, a function with this prototype
3571 * should either return NULL indicating that no lowering needs to be done or
3572 * emit a sequence of instructions using the provided builder (whose cursor
3573 * will already be placed after the instruction to be lowered) and return the
3574 * resulting nir_ssa_def.
3575 */
3576 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3577 nir_instr *, void *);
3578
3579 /**
3580 * Special return value for nir_lower_instr_cb when some progress occurred
3581 * (like changing an input to the instr) that didn't result in a replacement
3582 * SSA def being generated.
3583 */
3584 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3585
3586 /** Iterate over all the instructions in a nir_function_impl and lower them
3587 * using the provided callbacks
3588 *
3589 * This function implements the guts of a standard lowering pass for you. It
3590 * iterates over all of the instructions in a nir_function_impl and calls the
3591 * filter callback on each one. If the filter callback returns true, it then
3592 * calls the lowering call back on the instruction. (Splitting it this way
3593 * allows us to avoid some save/restore work for instructions we know won't be
3594 * lowered.) If the instruction is dead after the lowering is complete, it
3595 * will be removed. If new instructions are added, the lowering callback will
3596 * also be called on them in case multiple lowerings are required.
3597 *
3598 * The metadata for the nir_function_impl will also be updated. If any blocks
3599 * are added (they cannot be removed), dominance and block indices will be
3600 * invalidated.
3601 */
3602 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3603 nir_instr_filter_cb filter,
3604 nir_lower_instr_cb lower,
3605 void *cb_data);
3606 bool nir_shader_lower_instructions(nir_shader *shader,
3607 nir_instr_filter_cb filter,
3608 nir_lower_instr_cb lower,
3609 void *cb_data);
3610
3611 void nir_calc_dominance_impl(nir_function_impl *impl);
3612 void nir_calc_dominance(nir_shader *shader);
3613
3614 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3615 bool nir_block_dominates(nir_block *parent, nir_block *child);
3616 bool nir_block_is_unreachable(nir_block *block);
3617
3618 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3619 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3620
3621 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3622 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3623
3624 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3625 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3626
3627 int nir_gs_count_vertices(const nir_shader *shader);
3628
3629 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3630 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3631 bool nir_split_var_copies(nir_shader *shader);
3632 bool nir_split_per_member_structs(nir_shader *shader);
3633 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3634
3635 bool nir_lower_returns_impl(nir_function_impl *impl);
3636 bool nir_lower_returns(nir_shader *shader);
3637
3638 void nir_inline_function_impl(struct nir_builder *b,
3639 const nir_function_impl *impl,
3640 nir_ssa_def **params);
3641 bool nir_inline_functions(nir_shader *shader);
3642
3643 bool nir_propagate_invariant(nir_shader *shader);
3644
3645 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3646 void nir_lower_deref_copy_instr(struct nir_builder *b,
3647 nir_intrinsic_instr *copy);
3648 bool nir_lower_var_copies(nir_shader *shader);
3649
3650 void nir_fixup_deref_modes(nir_shader *shader);
3651
3652 bool nir_lower_global_vars_to_local(nir_shader *shader);
3653
3654 typedef enum {
3655 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3656 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3657 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3658 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3659 } nir_lower_array_deref_of_vec_options;
3660
3661 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3662 nir_lower_array_deref_of_vec_options options);
3663
3664 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3665
3666 bool nir_lower_locals_to_regs(nir_shader *shader);
3667
3668 void nir_lower_io_to_temporaries(nir_shader *shader,
3669 nir_function_impl *entrypoint,
3670 bool outputs, bool inputs);
3671
3672 bool nir_lower_vars_to_scratch(nir_shader *shader,
3673 nir_variable_mode modes,
3674 int size_threshold,
3675 glsl_type_size_align_func size_align);
3676
3677 void nir_lower_clip_halfz(nir_shader *shader);
3678
3679 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3680
3681 void nir_gather_ssa_types(nir_function_impl *impl,
3682 BITSET_WORD *float_types,
3683 BITSET_WORD *int_types);
3684
3685 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3686 int (*type_size)(const struct glsl_type *, bool));
3687
3688 /* Some helpers to do very simple linking */
3689 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3690 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3691 uint64_t *used_by_other_stage,
3692 uint64_t *used_by_other_stage_patches);
3693 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3694 bool default_to_smooth_interp);
3695 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3696 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3697
3698 bool nir_lower_amul(nir_shader *shader,
3699 int (*type_size)(const struct glsl_type *, bool));
3700
3701 void nir_assign_io_var_locations(struct exec_list *var_list,
3702 unsigned *size,
3703 gl_shader_stage stage);
3704
3705 typedef enum {
3706 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3707 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3708 * modes.
3709 */
3710 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3711
3712 /* If set, this forces all non-flat fragment shader inputs to be
3713 * interpolated as if with the "sample" qualifier. This requires
3714 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3715 */
3716 nir_lower_io_force_sample_interpolation = (1 << 1),
3717 } nir_lower_io_options;
3718 bool nir_lower_io(nir_shader *shader,
3719 nir_variable_mode modes,
3720 int (*type_size)(const struct glsl_type *, bool),
3721 nir_lower_io_options);
3722
3723 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3724
3725 bool
3726 nir_lower_vars_to_explicit_types(nir_shader *shader,
3727 nir_variable_mode modes,
3728 glsl_type_size_align_func type_info);
3729
3730 typedef enum {
3731 /**
3732 * An address format which is a simple 32-bit global GPU address.
3733 */
3734 nir_address_format_32bit_global,
3735
3736 /**
3737 * An address format which is a simple 64-bit global GPU address.
3738 */
3739 nir_address_format_64bit_global,
3740
3741 /**
3742 * An address format which is a bounds-checked 64-bit global GPU address.
3743 *
3744 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3745 * address stored with the low bits in .x and high bits in .y, .z is a
3746 * size, and .w is an offset. When the final I/O operation is lowered, .w
3747 * is checked against .z and the operation is predicated on the result.
3748 */
3749 nir_address_format_64bit_bounded_global,
3750
3751 /**
3752 * An address format which is comprised of a vec2 where the first
3753 * component is a buffer index and the second is an offset.
3754 */
3755 nir_address_format_32bit_index_offset,
3756
3757 /**
3758 * An address format which is a simple 32-bit offset.
3759 */
3760 nir_address_format_32bit_offset,
3761
3762 /**
3763 * An address format representing a purely logical addressing model. In
3764 * this model, all deref chains must be complete from the dereference
3765 * operation to the variable. Cast derefs are not allowed. These
3766 * addresses will be 32-bit scalars but the format is immaterial because
3767 * you can always chase the chain.
3768 */
3769 nir_address_format_logical,
3770 } nir_address_format;
3771
3772 static inline unsigned
3773 nir_address_format_bit_size(nir_address_format addr_format)
3774 {
3775 switch (addr_format) {
3776 case nir_address_format_32bit_global: return 32;
3777 case nir_address_format_64bit_global: return 64;
3778 case nir_address_format_64bit_bounded_global: return 32;
3779 case nir_address_format_32bit_index_offset: return 32;
3780 case nir_address_format_32bit_offset: return 32;
3781 case nir_address_format_logical: return 32;
3782 }
3783 unreachable("Invalid address format");
3784 }
3785
3786 static inline unsigned
3787 nir_address_format_num_components(nir_address_format addr_format)
3788 {
3789 switch (addr_format) {
3790 case nir_address_format_32bit_global: return 1;
3791 case nir_address_format_64bit_global: return 1;
3792 case nir_address_format_64bit_bounded_global: return 4;
3793 case nir_address_format_32bit_index_offset: return 2;
3794 case nir_address_format_32bit_offset: return 1;
3795 case nir_address_format_logical: return 1;
3796 }
3797 unreachable("Invalid address format");
3798 }
3799
3800 static inline const struct glsl_type *
3801 nir_address_format_to_glsl_type(nir_address_format addr_format)
3802 {
3803 unsigned bit_size = nir_address_format_bit_size(addr_format);
3804 assert(bit_size == 32 || bit_size == 64);
3805 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3806 nir_address_format_num_components(addr_format));
3807 }
3808
3809 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3810
3811 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3812 nir_address_format addr_format);
3813
3814 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3815 nir_address_format addr_format);
3816
3817 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3818 nir_deref_instr *deref,
3819 nir_ssa_def *base_addr,
3820 nir_address_format addr_format);
3821 void nir_lower_explicit_io_instr(struct nir_builder *b,
3822 nir_intrinsic_instr *io_instr,
3823 nir_ssa_def *addr,
3824 nir_address_format addr_format);
3825
3826 bool nir_lower_explicit_io(nir_shader *shader,
3827 nir_variable_mode modes,
3828 nir_address_format);
3829
3830 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3831 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3832
3833 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3834
3835 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3836 bool nir_lower_regs_to_ssa(nir_shader *shader);
3837 bool nir_lower_vars_to_ssa(nir_shader *shader);
3838
3839 bool nir_remove_dead_derefs(nir_shader *shader);
3840 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3841 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3842 bool nir_lower_constant_initializers(nir_shader *shader,
3843 nir_variable_mode modes);
3844
3845 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3846 bool nir_lower_vec_to_movs(nir_shader *shader);
3847 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3848 bool alpha_to_one,
3849 const gl_state_index16 *alpha_ref_state_tokens);
3850 bool nir_lower_alu(nir_shader *shader);
3851
3852 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3853 bool always_precise, bool have_ffma);
3854
3855 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3856 bool nir_lower_bool_to_float(nir_shader *shader);
3857 bool nir_lower_bool_to_int32(nir_shader *shader);
3858 bool nir_lower_int_to_float(nir_shader *shader);
3859 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3860 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3861 bool nir_lower_phis_to_scalar(nir_shader *shader);
3862 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3863 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3864 bool outputs_only);
3865 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3866 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3867 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3868
3869 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3870 void nir_lower_viewport_transform(nir_shader *shader);
3871 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3872
3873 typedef struct nir_lower_subgroups_options {
3874 uint8_t subgroup_size;
3875 uint8_t ballot_bit_size;
3876 bool lower_to_scalar:1;
3877 bool lower_vote_trivial:1;
3878 bool lower_vote_eq_to_ballot:1;
3879 bool lower_subgroup_masks:1;
3880 bool lower_shuffle:1;
3881 bool lower_shuffle_to_32bit:1;
3882 bool lower_quad:1;
3883 bool lower_quad_broadcast_dynamic:1;
3884 } nir_lower_subgroups_options;
3885
3886 bool nir_lower_subgroups(nir_shader *shader,
3887 const nir_lower_subgroups_options *options);
3888
3889 bool nir_lower_system_values(nir_shader *shader);
3890
3891 enum PACKED nir_lower_tex_packing {
3892 nir_lower_tex_packing_none = 0,
3893 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3894 * or unsigned ints based on the sampler type
3895 */
3896 nir_lower_tex_packing_16,
3897 /* The sampler returns 1 32-bit word of 4x8 unorm */
3898 nir_lower_tex_packing_8,
3899 };
3900
3901 typedef struct nir_lower_tex_options {
3902 /**
3903 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3904 * sampler types a texture projector is lowered.
3905 */
3906 unsigned lower_txp;
3907
3908 /**
3909 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3910 */
3911 bool lower_txf_offset;
3912
3913 /**
3914 * If true, lower away nir_tex_src_offset for all rect textures.
3915 */
3916 bool lower_rect_offset;
3917
3918 /**
3919 * If true, lower rect textures to 2D, using txs to fetch the
3920 * texture dimensions and dividing the texture coords by the
3921 * texture dims to normalize.
3922 */
3923 bool lower_rect;
3924
3925 /**
3926 * If true, convert yuv to rgb.
3927 */
3928 unsigned lower_y_uv_external;
3929 unsigned lower_y_u_v_external;
3930 unsigned lower_yx_xuxv_external;
3931 unsigned lower_xy_uxvx_external;
3932 unsigned lower_ayuv_external;
3933 unsigned lower_xyuv_external;
3934
3935 /**
3936 * To emulate certain texture wrap modes, this can be used
3937 * to saturate the specified tex coord to [0.0, 1.0]. The
3938 * bits are according to sampler #, ie. if, for example:
3939 *
3940 * (conf->saturate_s & (1 << n))
3941 *
3942 * is true, then the s coord for sampler n is saturated.
3943 *
3944 * Note that clamping must happen *after* projector lowering
3945 * so any projected texture sample instruction with a clamped
3946 * coordinate gets automatically lowered, regardless of the
3947 * 'lower_txp' setting.
3948 */
3949 unsigned saturate_s;
3950 unsigned saturate_t;
3951 unsigned saturate_r;
3952
3953 /* Bitmask of textures that need swizzling.
3954 *
3955 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3956 * swizzles[texture_index] is applied to the result of the texturing
3957 * operation.
3958 */
3959 unsigned swizzle_result;
3960
3961 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3962 * while 4 and 5 represent 0 and 1 respectively.
3963 */
3964 uint8_t swizzles[32][4];
3965
3966 /* Can be used to scale sampled values in range required by the format. */
3967 float scale_factors[32];
3968
3969 /**
3970 * Bitmap of textures that need srgb to linear conversion. If
3971 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3972 * of the texture are lowered to linear.
3973 */
3974 unsigned lower_srgb;
3975
3976 /**
3977 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3978 * LODs to nir_texop_txl.
3979 */
3980 bool lower_tex_without_implicit_lod;
3981
3982 /**
3983 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3984 */
3985 bool lower_txd_cube_map;
3986
3987 /**
3988 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3989 */
3990 bool lower_txd_3d;
3991
3992 /**
3993 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3994 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3995 * with lower_txd_cube_map.
3996 */
3997 bool lower_txd_shadow;
3998
3999 /**
4000 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4001 * Implies lower_txd_cube_map and lower_txd_shadow.
4002 */
4003 bool lower_txd;
4004
4005 /**
4006 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4007 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4008 */
4009 bool lower_txb_shadow_clamp;
4010
4011 /**
4012 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4013 * with nir_texop_txl. This includes cube maps.
4014 */
4015 bool lower_txd_shadow_clamp;
4016
4017 /**
4018 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4019 * with nir_texop_txl. This includes cube maps.
4020 */
4021 bool lower_txd_offset_clamp;
4022
4023 /**
4024 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4025 * sampler is bindless.
4026 */
4027 bool lower_txd_clamp_bindless_sampler;
4028
4029 /**
4030 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4031 * sampler index is not statically determinable to be less than 16.
4032 */
4033 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4034
4035 /**
4036 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4037 * 0-lod followed by a nir_ishr.
4038 */
4039 bool lower_txs_lod;
4040
4041 /**
4042 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4043 * mixed-up tg4 locations.
4044 */
4045 bool lower_tg4_broadcom_swizzle;
4046
4047 /**
4048 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4049 */
4050 bool lower_tg4_offsets;
4051
4052 enum nir_lower_tex_packing lower_tex_packing[32];
4053 } nir_lower_tex_options;
4054
4055 bool nir_lower_tex(nir_shader *shader,
4056 const nir_lower_tex_options *options);
4057
4058 enum nir_lower_non_uniform_access_type {
4059 nir_lower_non_uniform_ubo_access = (1 << 0),
4060 nir_lower_non_uniform_ssbo_access = (1 << 1),
4061 nir_lower_non_uniform_texture_access = (1 << 2),
4062 nir_lower_non_uniform_image_access = (1 << 3),
4063 };
4064
4065 bool nir_lower_non_uniform_access(nir_shader *shader,
4066 enum nir_lower_non_uniform_access_type);
4067
4068 enum nir_lower_idiv_path {
4069 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4070 * the two but it is not exact in some cases (for example, 1091317713u /
4071 * 1034u gives 5209173 instead of 1055432) */
4072 nir_lower_idiv_fast,
4073 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4074 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4075 * the nv50 path and many of them are integer multiplications, so it is
4076 * probably slower. It should always return the correct result, though. */
4077 nir_lower_idiv_precise,
4078 };
4079
4080 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4081
4082 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4083
4084 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4085 bool use_vars,
4086 bool use_clipdist_array,
4087 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4088 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4089 bool use_clipdist_array,
4090 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4091 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4092 bool use_clipdist_array);
4093 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4094
4095 void nir_lower_point_size_mov(nir_shader *shader,
4096 const gl_state_index16 *pointsize_state_tokens);
4097
4098 bool nir_lower_frexp(nir_shader *nir);
4099
4100 void nir_lower_two_sided_color(nir_shader *shader);
4101
4102 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4103
4104 bool nir_lower_flatshade(nir_shader *shader);
4105
4106 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4107 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4108 const gl_state_index16 *uniform_state_tokens);
4109
4110 typedef struct nir_lower_wpos_ytransform_options {
4111 gl_state_index16 state_tokens[STATE_LENGTH];
4112 bool fs_coord_origin_upper_left :1;
4113 bool fs_coord_origin_lower_left :1;
4114 bool fs_coord_pixel_center_integer :1;
4115 bool fs_coord_pixel_center_half_integer :1;
4116 } nir_lower_wpos_ytransform_options;
4117
4118 bool nir_lower_wpos_ytransform(nir_shader *shader,
4119 const nir_lower_wpos_ytransform_options *options);
4120 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4121
4122 bool nir_lower_fb_read(nir_shader *shader);
4123
4124 typedef struct nir_lower_drawpixels_options {
4125 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4126 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4127 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4128 unsigned drawpix_sampler;
4129 unsigned pixelmap_sampler;
4130 bool pixel_maps :1;
4131 bool scale_and_bias :1;
4132 } nir_lower_drawpixels_options;
4133
4134 void nir_lower_drawpixels(nir_shader *shader,
4135 const nir_lower_drawpixels_options *options);
4136
4137 typedef struct nir_lower_bitmap_options {
4138 unsigned sampler;
4139 bool swizzle_xxxx;
4140 } nir_lower_bitmap_options;
4141
4142 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4143
4144 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4145
4146 typedef enum {
4147 nir_lower_int_source_mods = 1 << 0,
4148 nir_lower_float_source_mods = 1 << 1,
4149 nir_lower_triop_abs = 1 << 2,
4150 nir_lower_all_source_mods = (1 << 3) - 1
4151 } nir_lower_to_source_mods_flags;
4152
4153
4154 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4155
4156 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4157
4158 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4159
4160 bool nir_lower_bit_size(nir_shader *shader,
4161 nir_lower_bit_size_callback callback,
4162 void *callback_data);
4163
4164 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4165 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4166
4167 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4168 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4169 nir_lower_doubles_options options);
4170 bool nir_lower_pack(nir_shader *shader);
4171
4172 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4173
4174 typedef enum {
4175 nir_lower_interpolation_at_sample = (1 << 1),
4176 nir_lower_interpolation_at_offset = (1 << 2),
4177 nir_lower_interpolation_centroid = (1 << 3),
4178 nir_lower_interpolation_pixel = (1 << 4),
4179 nir_lower_interpolation_sample = (1 << 5),
4180 } nir_lower_interpolation_options;
4181
4182 bool nir_lower_interpolation(nir_shader *shader,
4183 nir_lower_interpolation_options options);
4184
4185 bool nir_normalize_cubemap_coords(nir_shader *shader);
4186
4187 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4188
4189 void nir_loop_analyze_impl(nir_function_impl *impl,
4190 nir_variable_mode indirect_mask);
4191
4192 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4193
4194 bool nir_repair_ssa_impl(nir_function_impl *impl);
4195 bool nir_repair_ssa(nir_shader *shader);
4196
4197 void nir_convert_loop_to_lcssa(nir_loop *loop);
4198 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4199 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4200
4201 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4202 * registers. If false, convert all values (even those not involved in a phi
4203 * node) to registers.
4204 */
4205 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4206
4207 bool nir_lower_phis_to_regs_block(nir_block *block);
4208 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4209 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4210
4211 bool nir_lower_samplers(nir_shader *shader);
4212
4213 /* This is here for unit tests. */
4214 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4215
4216 bool nir_opt_comparison_pre(nir_shader *shader);
4217
4218 bool nir_opt_access(nir_shader *shader);
4219 bool nir_opt_algebraic(nir_shader *shader);
4220 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4221 bool nir_opt_algebraic_late(nir_shader *shader);
4222 bool nir_opt_constant_folding(nir_shader *shader);
4223
4224 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4225
4226 bool nir_copy_prop(nir_shader *shader);
4227
4228 bool nir_opt_copy_prop_vars(nir_shader *shader);
4229
4230 bool nir_opt_cse(nir_shader *shader);
4231
4232 bool nir_opt_dce(nir_shader *shader);
4233
4234 bool nir_opt_dead_cf(nir_shader *shader);
4235
4236 bool nir_opt_dead_write_vars(nir_shader *shader);
4237
4238 bool nir_opt_deref_impl(nir_function_impl *impl);
4239 bool nir_opt_deref(nir_shader *shader);
4240
4241 bool nir_opt_find_array_copies(nir_shader *shader);
4242
4243 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4244
4245 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4246
4247 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4248
4249 bool nir_opt_intrinsics(nir_shader *shader);
4250
4251 bool nir_opt_large_constants(nir_shader *shader,
4252 glsl_type_size_align_func size_align,
4253 unsigned threshold);
4254
4255 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4256
4257 typedef enum {
4258 nir_move_const_undef = (1 << 0),
4259 nir_move_load_ubo = (1 << 1),
4260 nir_move_load_input = (1 << 2),
4261 nir_move_comparisons = (1 << 3),
4262 nir_move_copies = (1 << 4),
4263 } nir_move_options;
4264
4265 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4266
4267 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4268
4269 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4270
4271 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4272 bool indirect_load_ok, bool expensive_alu_ok);
4273
4274 bool nir_opt_rematerialize_compares(nir_shader *shader);
4275
4276 bool nir_opt_remove_phis(nir_shader *shader);
4277 bool nir_opt_remove_phis_block(nir_block *block);
4278
4279 bool nir_opt_shrink_load(nir_shader *shader);
4280
4281 bool nir_opt_trivial_continues(nir_shader *shader);
4282
4283 bool nir_opt_undef(nir_shader *shader);
4284
4285 bool nir_opt_vectorize(nir_shader *shader);
4286
4287 bool nir_opt_conditional_discard(nir_shader *shader);
4288
4289 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4290 unsigned num_components, unsigned high_offset,
4291 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4292
4293 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4294 nir_should_vectorize_mem_func callback);
4295
4296 void nir_schedule(nir_shader *shader, int threshold);
4297
4298 void nir_strip(nir_shader *shader);
4299
4300 void nir_sweep(nir_shader *shader);
4301
4302 void nir_remap_dual_slot_attributes(nir_shader *shader,
4303 uint64_t *dual_slot_inputs);
4304 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4305
4306 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4307 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4308
4309 static inline bool
4310 nir_variable_is_in_ubo(const nir_variable *var)
4311 {
4312 return (var->data.mode == nir_var_mem_ubo &&
4313 var->interface_type != NULL);
4314 }
4315
4316 static inline bool
4317 nir_variable_is_in_ssbo(const nir_variable *var)
4318 {
4319 return (var->data.mode == nir_var_mem_ssbo &&
4320 var->interface_type != NULL);
4321 }
4322
4323 static inline bool
4324 nir_variable_is_in_block(const nir_variable *var)
4325 {
4326 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4327 }
4328
4329 #ifdef __cplusplus
4330 } /* extern "C" */
4331 #endif
4332
4333 #endif /* NIR_H */