nir/algebraic: Distribute source modifiers into instructions
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Non-zero if this variable was created by lowering a named interface
444 * block.
445 */
446 unsigned from_named_ifc_block:1;
447
448 /**
449 * How the variable was declared. See nir_var_declaration_type.
450 *
451 * This is used to detect variables generated by the compiler, so should
452 * not be visible via the API.
453 */
454 unsigned how_declared:2;
455
456 /**
457 * \brief Layout qualifier for gl_FragDepth.
458 *
459 * This is not equal to \c ir_depth_layout_none if and only if this
460 * variable is \c gl_FragDepth and a layout qualifier is specified.
461 */
462 nir_depth_layout depth_layout:3;
463
464 /**
465 * Vertex stream output identifier.
466 *
467 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
468 * indicate the stream of the i-th component.
469 */
470 unsigned stream:9;
471
472 /**
473 * Access flags for memory variables (SSBO/global), image uniforms, and
474 * bindless images in uniforms/inputs/outputs.
475 */
476 enum gl_access_qualifier access:8;
477
478 /**
479 * Descriptor set binding for sampler or UBO.
480 */
481 unsigned descriptor_set:5;
482
483 /**
484 * output index for dual source blending.
485 */
486 unsigned index;
487
488 /**
489 * Initial binding point for a sampler or UBO.
490 *
491 * For array types, this represents the binding point for the first element.
492 */
493 unsigned binding;
494
495 /**
496 * Storage location of the base of this variable
497 *
498 * The precise meaning of this field depends on the nature of the variable.
499 *
500 * - Vertex shader input: one of the values from \c gl_vert_attrib.
501 * - Vertex shader output: one of the values from \c gl_varying_slot.
502 * - Geometry shader input: one of the values from \c gl_varying_slot.
503 * - Geometry shader output: one of the values from \c gl_varying_slot.
504 * - Fragment shader input: one of the values from \c gl_varying_slot.
505 * - Fragment shader output: one of the values from \c gl_frag_result.
506 * - Uniforms: Per-stage uniform slot number for default uniform block.
507 * - Uniforms: Index within the uniform block definition for UBO members.
508 * - Non-UBO Uniforms: uniform slot number.
509 * - Other: This field is not currently used.
510 *
511 * If the variable is a uniform, shader input, or shader output, and the
512 * slot has not been assigned, the value will be -1.
513 */
514 int location;
515
516 /**
517 * The actual location of the variable in the IR. Only valid for inputs,
518 * outputs, and uniforms (including samplers and images).
519 */
520 unsigned driver_location;
521
522 /**
523 * Location an atomic counter or transform feedback is stored at.
524 */
525 unsigned offset;
526
527 union {
528 struct {
529 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
530 enum pipe_format format;
531 } image;
532
533 struct {
534 /**
535 * Transform feedback buffer.
536 */
537 uint16_t buffer:2;
538
539 /**
540 * Transform feedback stride.
541 */
542 uint16_t stride;
543 } xfb;
544 };
545 } data;
546
547 /**
548 * Identifier for this variable generated by nir_index_vars() that is unique
549 * among other variables in the same exec_list.
550 */
551 unsigned index;
552
553 /* Number of nir_variable_data members */
554 uint16_t num_members;
555
556 /**
557 * Built-in state that backs this uniform
558 *
559 * Once set at variable creation, \c state_slots must remain invariant.
560 * This is because, ideally, this array would be shared by all clones of
561 * this variable in the IR tree. In other words, we'd really like for it
562 * to be a fly-weight.
563 *
564 * If the variable is not a uniform, \c num_state_slots will be zero and
565 * \c state_slots will be \c NULL.
566 */
567 /*@{*/
568 uint16_t num_state_slots; /**< Number of state slots used */
569 nir_state_slot *state_slots; /**< State descriptors. */
570 /*@}*/
571
572 /**
573 * Constant expression assigned in the initializer of the variable
574 *
575 * This field should only be used temporarily by creators of NIR shaders
576 * and then lower_constant_initializers can be used to get rid of them.
577 * Most of the rest of NIR ignores this field or asserts that it's NULL.
578 */
579 nir_constant *constant_initializer;
580
581 /**
582 * Global variable assigned in the initializer of the variable
583 * This field should only be used temporarily by creators of NIR shaders
584 * and then lower_constant_initializers can be used to get rid of them.
585 * Most of the rest of NIR ignores this field or asserts that it's NULL.
586 */
587 struct nir_variable *pointer_initializer;
588
589 /**
590 * For variables that are in an interface block or are an instance of an
591 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
592 *
593 * \sa ir_variable::location
594 */
595 const struct glsl_type *interface_type;
596
597 /**
598 * Description of per-member data for per-member struct variables
599 *
600 * This is used for variables which are actually an amalgamation of
601 * multiple entities such as a struct of built-in values or a struct of
602 * inputs each with their own layout specifier. This is only allowed on
603 * variables with a struct or array of array of struct type.
604 */
605 struct nir_variable_data *members;
606 } nir_variable;
607
608 #define nir_foreach_variable(var, var_list) \
609 foreach_list_typed(nir_variable, var, node, var_list)
610
611 #define nir_foreach_variable_safe(var, var_list) \
612 foreach_list_typed_safe(nir_variable, var, node, var_list)
613
614 static inline bool
615 nir_variable_is_global(const nir_variable *var)
616 {
617 return var->data.mode != nir_var_function_temp;
618 }
619
620 typedef struct nir_register {
621 struct exec_node node;
622
623 unsigned num_components; /** < number of vector components */
624 unsigned num_array_elems; /** < size of array (0 for no array) */
625
626 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
627 uint8_t bit_size;
628
629 /** generic register index. */
630 unsigned index;
631
632 /** only for debug purposes, can be NULL */
633 const char *name;
634
635 /** set of nir_srcs where this register is used (read from) */
636 struct list_head uses;
637
638 /** set of nir_dests where this register is defined (written to) */
639 struct list_head defs;
640
641 /** set of nir_ifs where this register is used as a condition */
642 struct list_head if_uses;
643 } nir_register;
644
645 #define nir_foreach_register(reg, reg_list) \
646 foreach_list_typed(nir_register, reg, node, reg_list)
647 #define nir_foreach_register_safe(reg, reg_list) \
648 foreach_list_typed_safe(nir_register, reg, node, reg_list)
649
650 typedef enum PACKED {
651 nir_instr_type_alu,
652 nir_instr_type_deref,
653 nir_instr_type_call,
654 nir_instr_type_tex,
655 nir_instr_type_intrinsic,
656 nir_instr_type_load_const,
657 nir_instr_type_jump,
658 nir_instr_type_ssa_undef,
659 nir_instr_type_phi,
660 nir_instr_type_parallel_copy,
661 } nir_instr_type;
662
663 typedef struct nir_instr {
664 struct exec_node node;
665 struct nir_block *block;
666 nir_instr_type type;
667
668 /* A temporary for optimization and analysis passes to use for storing
669 * flags. For instance, DCE uses this to store the "dead/live" info.
670 */
671 uint8_t pass_flags;
672
673 /** generic instruction index. */
674 unsigned index;
675 } nir_instr;
676
677 static inline nir_instr *
678 nir_instr_next(nir_instr *instr)
679 {
680 struct exec_node *next = exec_node_get_next(&instr->node);
681 if (exec_node_is_tail_sentinel(next))
682 return NULL;
683 else
684 return exec_node_data(nir_instr, next, node);
685 }
686
687 static inline nir_instr *
688 nir_instr_prev(nir_instr *instr)
689 {
690 struct exec_node *prev = exec_node_get_prev(&instr->node);
691 if (exec_node_is_head_sentinel(prev))
692 return NULL;
693 else
694 return exec_node_data(nir_instr, prev, node);
695 }
696
697 static inline bool
698 nir_instr_is_first(const nir_instr *instr)
699 {
700 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
701 }
702
703 static inline bool
704 nir_instr_is_last(const nir_instr *instr)
705 {
706 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
707 }
708
709 typedef struct nir_ssa_def {
710 /** for debugging only, can be NULL */
711 const char* name;
712
713 /** generic SSA definition index. */
714 unsigned index;
715
716 /** Index into the live_in and live_out bitfields */
717 unsigned live_index;
718
719 /** Instruction which produces this SSA value. */
720 nir_instr *parent_instr;
721
722 /** set of nir_instrs where this register is used (read from) */
723 struct list_head uses;
724
725 /** set of nir_ifs where this register is used as a condition */
726 struct list_head if_uses;
727
728 uint8_t num_components;
729
730 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
731 uint8_t bit_size;
732 } nir_ssa_def;
733
734 struct nir_src;
735
736 typedef struct {
737 nir_register *reg;
738 struct nir_src *indirect; /** < NULL for no indirect offset */
739 unsigned base_offset;
740
741 /* TODO use-def chain goes here */
742 } nir_reg_src;
743
744 typedef struct {
745 nir_instr *parent_instr;
746 struct list_head def_link;
747
748 nir_register *reg;
749 struct nir_src *indirect; /** < NULL for no indirect offset */
750 unsigned base_offset;
751
752 /* TODO def-use chain goes here */
753 } nir_reg_dest;
754
755 struct nir_if;
756
757 typedef struct nir_src {
758 union {
759 /** Instruction that consumes this value as a source. */
760 nir_instr *parent_instr;
761 struct nir_if *parent_if;
762 };
763
764 struct list_head use_link;
765
766 union {
767 nir_reg_src reg;
768 nir_ssa_def *ssa;
769 };
770
771 bool is_ssa;
772 } nir_src;
773
774 static inline nir_src
775 nir_src_init(void)
776 {
777 nir_src src = { { NULL } };
778 return src;
779 }
780
781 #define NIR_SRC_INIT nir_src_init()
782
783 #define nir_foreach_use(src, reg_or_ssa_def) \
784 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
785
786 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
787 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
788
789 #define nir_foreach_if_use(src, reg_or_ssa_def) \
790 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
791
792 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
793 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
794
795 typedef struct {
796 union {
797 nir_reg_dest reg;
798 nir_ssa_def ssa;
799 };
800
801 bool is_ssa;
802 } nir_dest;
803
804 static inline nir_dest
805 nir_dest_init(void)
806 {
807 nir_dest dest = { { { NULL } } };
808 return dest;
809 }
810
811 #define NIR_DEST_INIT nir_dest_init()
812
813 #define nir_foreach_def(dest, reg) \
814 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
815
816 #define nir_foreach_def_safe(dest, reg) \
817 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
818
819 static inline nir_src
820 nir_src_for_ssa(nir_ssa_def *def)
821 {
822 nir_src src = NIR_SRC_INIT;
823
824 src.is_ssa = true;
825 src.ssa = def;
826
827 return src;
828 }
829
830 static inline nir_src
831 nir_src_for_reg(nir_register *reg)
832 {
833 nir_src src = NIR_SRC_INIT;
834
835 src.is_ssa = false;
836 src.reg.reg = reg;
837 src.reg.indirect = NULL;
838 src.reg.base_offset = 0;
839
840 return src;
841 }
842
843 static inline nir_dest
844 nir_dest_for_reg(nir_register *reg)
845 {
846 nir_dest dest = NIR_DEST_INIT;
847
848 dest.reg.reg = reg;
849
850 return dest;
851 }
852
853 static inline unsigned
854 nir_src_bit_size(nir_src src)
855 {
856 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
857 }
858
859 static inline unsigned
860 nir_src_num_components(nir_src src)
861 {
862 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
863 }
864
865 static inline bool
866 nir_src_is_const(nir_src src)
867 {
868 return src.is_ssa &&
869 src.ssa->parent_instr->type == nir_instr_type_load_const;
870 }
871
872 static inline unsigned
873 nir_dest_bit_size(nir_dest dest)
874 {
875 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
876 }
877
878 static inline unsigned
879 nir_dest_num_components(nir_dest dest)
880 {
881 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
882 }
883
884 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
885 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
886
887 typedef struct {
888 nir_src src;
889
890 /**
891 * \name input modifiers
892 */
893 /*@{*/
894 /**
895 * For inputs interpreted as floating point, flips the sign bit. For
896 * inputs interpreted as integers, performs the two's complement negation.
897 */
898 bool negate;
899
900 /**
901 * Clears the sign bit for floating point values, and computes the integer
902 * absolute value for integers. Note that the negate modifier acts after
903 * the absolute value modifier, therefore if both are set then all inputs
904 * will become negative.
905 */
906 bool abs;
907 /*@}*/
908
909 /**
910 * For each input component, says which component of the register it is
911 * chosen from. Note that which elements of the swizzle are used and which
912 * are ignored are based on the write mask for most opcodes - for example,
913 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
914 * a swizzle of {2, x, 1, 0} where x means "don't care."
915 */
916 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
917 } nir_alu_src;
918
919 typedef struct {
920 nir_dest dest;
921
922 /**
923 * \name saturate output modifier
924 *
925 * Only valid for opcodes that output floating-point numbers. Clamps the
926 * output to between 0.0 and 1.0 inclusive.
927 */
928
929 bool saturate;
930
931 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
932 } nir_alu_dest;
933
934 /** NIR sized and unsized types
935 *
936 * The values in this enum are carefully chosen so that the sized type is
937 * just the unsized type OR the number of bits.
938 */
939 typedef enum {
940 nir_type_invalid = 0, /* Not a valid type */
941 nir_type_int = 2,
942 nir_type_uint = 4,
943 nir_type_bool = 6,
944 nir_type_float = 128,
945 nir_type_bool1 = 1 | nir_type_bool,
946 nir_type_bool8 = 8 | nir_type_bool,
947 nir_type_bool16 = 16 | nir_type_bool,
948 nir_type_bool32 = 32 | nir_type_bool,
949 nir_type_int1 = 1 | nir_type_int,
950 nir_type_int8 = 8 | nir_type_int,
951 nir_type_int16 = 16 | nir_type_int,
952 nir_type_int32 = 32 | nir_type_int,
953 nir_type_int64 = 64 | nir_type_int,
954 nir_type_uint1 = 1 | nir_type_uint,
955 nir_type_uint8 = 8 | nir_type_uint,
956 nir_type_uint16 = 16 | nir_type_uint,
957 nir_type_uint32 = 32 | nir_type_uint,
958 nir_type_uint64 = 64 | nir_type_uint,
959 nir_type_float16 = 16 | nir_type_float,
960 nir_type_float32 = 32 | nir_type_float,
961 nir_type_float64 = 64 | nir_type_float,
962 } nir_alu_type;
963
964 #define NIR_ALU_TYPE_SIZE_MASK 0x79
965 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
966
967 static inline unsigned
968 nir_alu_type_get_type_size(nir_alu_type type)
969 {
970 return type & NIR_ALU_TYPE_SIZE_MASK;
971 }
972
973 static inline unsigned
974 nir_alu_type_get_base_type(nir_alu_type type)
975 {
976 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
977 }
978
979 static inline nir_alu_type
980 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
981 {
982 switch (base_type) {
983 case GLSL_TYPE_BOOL:
984 return nir_type_bool1;
985 break;
986 case GLSL_TYPE_UINT:
987 return nir_type_uint32;
988 break;
989 case GLSL_TYPE_INT:
990 return nir_type_int32;
991 break;
992 case GLSL_TYPE_UINT16:
993 return nir_type_uint16;
994 break;
995 case GLSL_TYPE_INT16:
996 return nir_type_int16;
997 break;
998 case GLSL_TYPE_UINT8:
999 return nir_type_uint8;
1000 case GLSL_TYPE_INT8:
1001 return nir_type_int8;
1002 case GLSL_TYPE_UINT64:
1003 return nir_type_uint64;
1004 break;
1005 case GLSL_TYPE_INT64:
1006 return nir_type_int64;
1007 break;
1008 case GLSL_TYPE_FLOAT:
1009 return nir_type_float32;
1010 break;
1011 case GLSL_TYPE_FLOAT16:
1012 return nir_type_float16;
1013 break;
1014 case GLSL_TYPE_DOUBLE:
1015 return nir_type_float64;
1016 break;
1017
1018 case GLSL_TYPE_SAMPLER:
1019 case GLSL_TYPE_IMAGE:
1020 case GLSL_TYPE_ATOMIC_UINT:
1021 case GLSL_TYPE_STRUCT:
1022 case GLSL_TYPE_INTERFACE:
1023 case GLSL_TYPE_ARRAY:
1024 case GLSL_TYPE_VOID:
1025 case GLSL_TYPE_SUBROUTINE:
1026 case GLSL_TYPE_FUNCTION:
1027 case GLSL_TYPE_ERROR:
1028 return nir_type_invalid;
1029 }
1030
1031 unreachable("unknown type");
1032 }
1033
1034 static inline nir_alu_type
1035 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1036 {
1037 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1038 }
1039
1040 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1041 nir_rounding_mode rnd);
1042
1043 static inline nir_op
1044 nir_op_vec(unsigned components)
1045 {
1046 switch (components) {
1047 case 1: return nir_op_mov;
1048 case 2: return nir_op_vec2;
1049 case 3: return nir_op_vec3;
1050 case 4: return nir_op_vec4;
1051 case 8: return nir_op_vec8;
1052 case 16: return nir_op_vec16;
1053 default: unreachable("bad component count");
1054 }
1055 }
1056
1057 static inline bool
1058 nir_op_is_vec(nir_op op)
1059 {
1060 switch (op) {
1061 case nir_op_mov:
1062 case nir_op_vec2:
1063 case nir_op_vec3:
1064 case nir_op_vec4:
1065 case nir_op_vec8:
1066 case nir_op_vec16:
1067 return true;
1068 default:
1069 return false;
1070 }
1071 }
1072
1073 static inline bool
1074 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1075 {
1076 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1077 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1078 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1079 }
1080
1081 static inline bool
1082 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1083 {
1084 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1085 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1086 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1087 }
1088
1089 static inline bool
1090 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1091 {
1092 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1093 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1094 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1095 }
1096
1097 static inline bool
1098 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1099 {
1100 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1101 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1102 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1103 }
1104
1105 static inline bool
1106 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1107 {
1108 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1109 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1110 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1111 }
1112
1113 static inline bool
1114 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1115 {
1116 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1117 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1118 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1119 }
1120
1121 static inline bool
1122 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1123 {
1124 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1125 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1126 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1127 }
1128
1129 static inline nir_rounding_mode
1130 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1131 nir_alu_type type)
1132 {
1133 if (nir_alu_type_get_base_type(type) != nir_type_float)
1134 return nir_rounding_mode_undef;
1135
1136 unsigned bit_size = nir_alu_type_get_type_size(type);
1137
1138 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1139 return nir_rounding_mode_rtz;
1140 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1141 return nir_rounding_mode_rtne;
1142 return nir_rounding_mode_undef;
1143 }
1144
1145 static inline bool
1146 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1147 {
1148 bool result =
1149 nir_has_any_rounding_mode_rtne(execution_mode) ||
1150 nir_has_any_rounding_mode_rtz(execution_mode);
1151 return result;
1152 }
1153
1154 typedef enum {
1155 /**
1156 * Operation where the first two sources are commutative.
1157 *
1158 * For 2-source operations, this just mathematical commutativity. Some
1159 * 3-source operations, like ffma, are only commutative in the first two
1160 * sources.
1161 */
1162 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1163 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1164 } nir_op_algebraic_property;
1165
1166 typedef struct {
1167 const char *name;
1168
1169 unsigned num_inputs;
1170
1171 /**
1172 * The number of components in the output
1173 *
1174 * If non-zero, this is the size of the output and input sizes are
1175 * explicitly given; swizzle and writemask are still in effect, but if
1176 * the output component is masked out, then the input component may
1177 * still be in use.
1178 *
1179 * If zero, the opcode acts in the standard, per-component manner; the
1180 * operation is performed on each component (except the ones that are
1181 * masked out) with the input being taken from the input swizzle for
1182 * that component.
1183 *
1184 * The size of some of the inputs may be given (i.e. non-zero) even
1185 * though output_size is zero; in that case, the inputs with a zero
1186 * size act per-component, while the inputs with non-zero size don't.
1187 */
1188 unsigned output_size;
1189
1190 /**
1191 * The type of vector that the instruction outputs. Note that the
1192 * staurate modifier is only allowed on outputs with the float type.
1193 */
1194
1195 nir_alu_type output_type;
1196
1197 /**
1198 * The number of components in each input
1199 */
1200 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1201
1202 /**
1203 * The type of vector that each input takes. Note that negate and
1204 * absolute value are only allowed on inputs with int or float type and
1205 * behave differently on the two.
1206 */
1207 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1208
1209 nir_op_algebraic_property algebraic_properties;
1210
1211 /* Whether this represents a numeric conversion opcode */
1212 bool is_conversion;
1213 } nir_op_info;
1214
1215 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1216
1217 typedef struct nir_alu_instr {
1218 nir_instr instr;
1219 nir_op op;
1220
1221 /** Indicates that this ALU instruction generates an exact value
1222 *
1223 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1224 * really equivalent to either. This indicates that the value generated by
1225 * this operation is high-precision and any code transformations that touch
1226 * it must ensure that the resulting value is bit-for-bit identical to the
1227 * original.
1228 */
1229 bool exact:1;
1230
1231 /**
1232 * Indicates that this instruction do not cause wrapping to occur, in the
1233 * form of overflow or underflow.
1234 */
1235 bool no_signed_wrap:1;
1236 bool no_unsigned_wrap:1;
1237
1238 nir_alu_dest dest;
1239 nir_alu_src src[];
1240 } nir_alu_instr;
1241
1242 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1243 nir_alu_instr *instr);
1244 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1245 nir_alu_instr *instr);
1246
1247 /* is this source channel used? */
1248 static inline bool
1249 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1250 unsigned channel)
1251 {
1252 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1253 return channel < nir_op_infos[instr->op].input_sizes[src];
1254
1255 return (instr->dest.write_mask >> channel) & 1;
1256 }
1257
1258 static inline nir_component_mask_t
1259 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1260 {
1261 nir_component_mask_t read_mask = 0;
1262 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1263 if (!nir_alu_instr_channel_used(instr, src, c))
1264 continue;
1265
1266 read_mask |= (1 << instr->src[src].swizzle[c]);
1267 }
1268 return read_mask;
1269 }
1270
1271 /**
1272 * Get the number of channels used for a source
1273 */
1274 static inline unsigned
1275 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1276 {
1277 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1278 return nir_op_infos[instr->op].input_sizes[src];
1279
1280 return nir_dest_num_components(instr->dest.dest);
1281 }
1282
1283 static inline bool
1284 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1285 {
1286 switch (instr->op) {
1287 case nir_op_flt:
1288 case nir_op_fge:
1289 case nir_op_feq:
1290 case nir_op_fne:
1291 case nir_op_ilt:
1292 case nir_op_ult:
1293 case nir_op_ige:
1294 case nir_op_uge:
1295 case nir_op_ieq:
1296 case nir_op_ine:
1297 case nir_op_i2b1:
1298 case nir_op_f2b1:
1299 case nir_op_inot:
1300 return true;
1301 default:
1302 return false;
1303 }
1304 }
1305
1306 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1307 nir_alu_type full_type);
1308
1309 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1310 unsigned src1, unsigned src2);
1311
1312 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1313 const nir_alu_instr *alu2,
1314 unsigned src1, unsigned src2);
1315
1316 typedef enum {
1317 nir_deref_type_var,
1318 nir_deref_type_array,
1319 nir_deref_type_array_wildcard,
1320 nir_deref_type_ptr_as_array,
1321 nir_deref_type_struct,
1322 nir_deref_type_cast,
1323 } nir_deref_type;
1324
1325 typedef struct {
1326 nir_instr instr;
1327
1328 /** The type of this deref instruction */
1329 nir_deref_type deref_type;
1330
1331 /** The mode of the underlying variable */
1332 nir_variable_mode mode;
1333
1334 /** The dereferenced type of the resulting pointer value */
1335 const struct glsl_type *type;
1336
1337 union {
1338 /** Variable being dereferenced if deref_type is a deref_var */
1339 nir_variable *var;
1340
1341 /** Parent deref if deref_type is not deref_var */
1342 nir_src parent;
1343 };
1344
1345 /** Additional deref parameters */
1346 union {
1347 struct {
1348 nir_src index;
1349 } arr;
1350
1351 struct {
1352 unsigned index;
1353 } strct;
1354
1355 struct {
1356 unsigned ptr_stride;
1357 } cast;
1358 };
1359
1360 /** Destination to store the resulting "pointer" */
1361 nir_dest dest;
1362 } nir_deref_instr;
1363
1364 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1365
1366 static inline nir_deref_instr *
1367 nir_deref_instr_parent(const nir_deref_instr *instr)
1368 {
1369 if (instr->deref_type == nir_deref_type_var)
1370 return NULL;
1371 else
1372 return nir_src_as_deref(instr->parent);
1373 }
1374
1375 static inline nir_variable *
1376 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1377 {
1378 while (instr->deref_type != nir_deref_type_var) {
1379 if (instr->deref_type == nir_deref_type_cast)
1380 return NULL;
1381
1382 instr = nir_deref_instr_parent(instr);
1383 }
1384
1385 return instr->var;
1386 }
1387
1388 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1389 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1390 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1391
1392 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1393
1394 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1395
1396 typedef struct {
1397 nir_instr instr;
1398
1399 struct nir_function *callee;
1400
1401 unsigned num_params;
1402 nir_src params[];
1403 } nir_call_instr;
1404
1405 #include "nir_intrinsics.h"
1406
1407 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1408
1409 /** Represents an intrinsic
1410 *
1411 * An intrinsic is an instruction type for handling things that are
1412 * more-or-less regular operations but don't just consume and produce SSA
1413 * values like ALU operations do. Intrinsics are not for things that have
1414 * special semantic meaning such as phi nodes and parallel copies.
1415 * Examples of intrinsics include variable load/store operations, system
1416 * value loads, and the like. Even though texturing more-or-less falls
1417 * under this category, texturing is its own instruction type because
1418 * trying to represent texturing with intrinsics would lead to a
1419 * combinatorial explosion of intrinsic opcodes.
1420 *
1421 * By having a single instruction type for handling a lot of different
1422 * cases, optimization passes can look for intrinsics and, for the most
1423 * part, completely ignore them. Each intrinsic type also has a few
1424 * possible flags that govern whether or not they can be reordered or
1425 * eliminated. That way passes like dead code elimination can still work
1426 * on intrisics without understanding the meaning of each.
1427 *
1428 * Each intrinsic has some number of constant indices, some number of
1429 * variables, and some number of sources. What these sources, variables,
1430 * and indices mean depends on the intrinsic and is documented with the
1431 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1432 * instructions are the only types of instruction that can operate on
1433 * variables.
1434 */
1435 typedef struct {
1436 nir_instr instr;
1437
1438 nir_intrinsic_op intrinsic;
1439
1440 nir_dest dest;
1441
1442 /** number of components if this is a vectorized intrinsic
1443 *
1444 * Similarly to ALU operations, some intrinsics are vectorized.
1445 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1446 * For vectorized intrinsics, the num_components field specifies the
1447 * number of destination components and the number of source components
1448 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1449 */
1450 uint8_t num_components;
1451
1452 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1453
1454 nir_src src[];
1455 } nir_intrinsic_instr;
1456
1457 static inline nir_variable *
1458 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1459 {
1460 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1461 }
1462
1463 typedef enum {
1464 /* Memory ordering. */
1465 NIR_MEMORY_ACQUIRE = 1 << 0,
1466 NIR_MEMORY_RELEASE = 1 << 1,
1467 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1468
1469 /* Memory visibility operations. */
1470 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1471 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1472 } nir_memory_semantics;
1473
1474 typedef enum {
1475 NIR_SCOPE_INVOCATION,
1476 NIR_SCOPE_SUBGROUP,
1477 NIR_SCOPE_WORKGROUP,
1478 NIR_SCOPE_QUEUE_FAMILY,
1479 NIR_SCOPE_DEVICE,
1480 } nir_scope;
1481
1482 /**
1483 * \name NIR intrinsics semantic flags
1484 *
1485 * information about what the compiler can do with the intrinsics.
1486 *
1487 * \sa nir_intrinsic_info::flags
1488 */
1489 typedef enum {
1490 /**
1491 * whether the intrinsic can be safely eliminated if none of its output
1492 * value is not being used.
1493 */
1494 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1495
1496 /**
1497 * Whether the intrinsic can be reordered with respect to any other
1498 * intrinsic, i.e. whether the only reordering dependencies of the
1499 * intrinsic are due to the register reads/writes.
1500 */
1501 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1502 } nir_intrinsic_semantic_flag;
1503
1504 /**
1505 * \name NIR intrinsics const-index flag
1506 *
1507 * Indicates the usage of a const_index slot.
1508 *
1509 * \sa nir_intrinsic_info::index_map
1510 */
1511 typedef enum {
1512 /**
1513 * Generally instructions that take a offset src argument, can encode
1514 * a constant 'base' value which is added to the offset.
1515 */
1516 NIR_INTRINSIC_BASE = 1,
1517
1518 /**
1519 * For store instructions, a writemask for the store.
1520 */
1521 NIR_INTRINSIC_WRMASK,
1522
1523 /**
1524 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1525 */
1526 NIR_INTRINSIC_STREAM_ID,
1527
1528 /**
1529 * The clip-plane id for load_user_clip_plane intrinsic.
1530 */
1531 NIR_INTRINSIC_UCP_ID,
1532
1533 /**
1534 * The amount of data, starting from BASE, that this instruction may
1535 * access. This is used to provide bounds if the offset is not constant.
1536 */
1537 NIR_INTRINSIC_RANGE,
1538
1539 /**
1540 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1541 */
1542 NIR_INTRINSIC_DESC_SET,
1543
1544 /**
1545 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1546 */
1547 NIR_INTRINSIC_BINDING,
1548
1549 /**
1550 * Component offset.
1551 */
1552 NIR_INTRINSIC_COMPONENT,
1553
1554 /**
1555 * Interpolation mode (only meaningful for FS inputs).
1556 */
1557 NIR_INTRINSIC_INTERP_MODE,
1558
1559 /**
1560 * A binary nir_op to use when performing a reduction or scan operation
1561 */
1562 NIR_INTRINSIC_REDUCTION_OP,
1563
1564 /**
1565 * Cluster size for reduction operations
1566 */
1567 NIR_INTRINSIC_CLUSTER_SIZE,
1568
1569 /**
1570 * Parameter index for a load_param intrinsic
1571 */
1572 NIR_INTRINSIC_PARAM_IDX,
1573
1574 /**
1575 * Image dimensionality for image intrinsics
1576 *
1577 * One of GLSL_SAMPLER_DIM_*
1578 */
1579 NIR_INTRINSIC_IMAGE_DIM,
1580
1581 /**
1582 * Non-zero if we are accessing an array image
1583 */
1584 NIR_INTRINSIC_IMAGE_ARRAY,
1585
1586 /**
1587 * Image format for image intrinsics
1588 */
1589 NIR_INTRINSIC_FORMAT,
1590
1591 /**
1592 * Access qualifiers for image and memory access intrinsics
1593 */
1594 NIR_INTRINSIC_ACCESS,
1595
1596 /**
1597 * Alignment for offsets and addresses
1598 *
1599 * These two parameters, specify an alignment in terms of a multiplier and
1600 * an offset. The offset or address parameter X of the intrinsic is
1601 * guaranteed to satisfy the following:
1602 *
1603 * (X - align_offset) % align_mul == 0
1604 */
1605 NIR_INTRINSIC_ALIGN_MUL,
1606 NIR_INTRINSIC_ALIGN_OFFSET,
1607
1608 /**
1609 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1610 */
1611 NIR_INTRINSIC_DESC_TYPE,
1612
1613 /**
1614 * The nir_alu_type of a uniform/input/output
1615 */
1616 NIR_INTRINSIC_TYPE,
1617
1618 /**
1619 * The swizzle mask for the instructions
1620 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1621 */
1622 NIR_INTRINSIC_SWIZZLE_MASK,
1623
1624 /* Separate source/dest access flags for copies */
1625 NIR_INTRINSIC_SRC_ACCESS,
1626 NIR_INTRINSIC_DST_ACCESS,
1627
1628 /* Driver location for nir_load_patch_location_ir3 */
1629 NIR_INTRINSIC_DRIVER_LOCATION,
1630
1631 /**
1632 * Mask of nir_memory_semantics, includes ordering and visibility.
1633 */
1634 NIR_INTRINSIC_MEMORY_SEMANTICS,
1635
1636 /**
1637 * Mask of nir_variable_modes affected by the memory operation.
1638 */
1639 NIR_INTRINSIC_MEMORY_MODES,
1640
1641 /**
1642 * Value of nir_scope.
1643 */
1644 NIR_INTRINSIC_MEMORY_SCOPE,
1645
1646 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1647
1648 } nir_intrinsic_index_flag;
1649
1650 #define NIR_INTRINSIC_MAX_INPUTS 5
1651
1652 typedef struct {
1653 const char *name;
1654
1655 unsigned num_srcs; /** < number of register/SSA inputs */
1656
1657 /** number of components of each input register
1658 *
1659 * If this value is 0, the number of components is given by the
1660 * num_components field of nir_intrinsic_instr. If this value is -1, the
1661 * intrinsic consumes however many components are provided and it is not
1662 * validated at all.
1663 */
1664 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1665
1666 bool has_dest;
1667
1668 /** number of components of the output register
1669 *
1670 * If this value is 0, the number of components is given by the
1671 * num_components field of nir_intrinsic_instr.
1672 */
1673 unsigned dest_components;
1674
1675 /** bitfield of legal bit sizes */
1676 unsigned dest_bit_sizes;
1677
1678 /** the number of constant indices used by the intrinsic */
1679 unsigned num_indices;
1680
1681 /** indicates the usage of intr->const_index[n] */
1682 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1683
1684 /** semantic flags for calls to this intrinsic */
1685 nir_intrinsic_semantic_flag flags;
1686 } nir_intrinsic_info;
1687
1688 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1689
1690 static inline unsigned
1691 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1692 {
1693 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1694 assert(srcn < info->num_srcs);
1695 if (info->src_components[srcn] > 0)
1696 return info->src_components[srcn];
1697 else if (info->src_components[srcn] == 0)
1698 return intr->num_components;
1699 else
1700 return nir_src_num_components(intr->src[srcn]);
1701 }
1702
1703 static inline unsigned
1704 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1705 {
1706 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1707 if (!info->has_dest)
1708 return 0;
1709 else if (info->dest_components)
1710 return info->dest_components;
1711 else
1712 return intr->num_components;
1713 }
1714
1715 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1716 static inline type \
1717 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1718 { \
1719 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1720 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1721 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1722 } \
1723 static inline void \
1724 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1725 { \
1726 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1727 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1728 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1729 }
1730
1731 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1732 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1733 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1734 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1735 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1736 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1737 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1738 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1739 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1740 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1741 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1742 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1743 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1744 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1745 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1746 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1747 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1748 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1749 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1750 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1751 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1752 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1753 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1754 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1755 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1756 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1757 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1758
1759 static inline void
1760 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1761 unsigned align_mul, unsigned align_offset)
1762 {
1763 assert(util_is_power_of_two_nonzero(align_mul));
1764 assert(align_offset < align_mul);
1765 nir_intrinsic_set_align_mul(intrin, align_mul);
1766 nir_intrinsic_set_align_offset(intrin, align_offset);
1767 }
1768
1769 /** Returns a simple alignment for a load/store intrinsic offset
1770 *
1771 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1772 * and ALIGN_OFFSET parameters, this helper takes both into account and
1773 * provides a single simple alignment parameter. The offset X is guaranteed
1774 * to satisfy X % align == 0.
1775 */
1776 static inline unsigned
1777 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1778 {
1779 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1780 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1781 assert(align_offset < align_mul);
1782 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1783 }
1784
1785 unsigned
1786 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1787
1788 /* Converts a image_deref_* intrinsic into a image_* one */
1789 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1790 nir_ssa_def *handle, bool bindless);
1791
1792 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1793 static inline bool
1794 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1795 {
1796 if (instr->intrinsic == nir_intrinsic_load_deref ||
1797 instr->intrinsic == nir_intrinsic_load_ssbo ||
1798 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1799 instr->intrinsic == nir_intrinsic_image_deref_load ||
1800 instr->intrinsic == nir_intrinsic_image_load) {
1801 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1802 } else {
1803 const nir_intrinsic_info *info =
1804 &nir_intrinsic_infos[instr->intrinsic];
1805 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1806 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1807 }
1808 }
1809
1810 /**
1811 * \group texture information
1812 *
1813 * This gives semantic information about textures which is useful to the
1814 * frontend, the backend, and lowering passes, but not the optimizer.
1815 */
1816
1817 typedef enum {
1818 nir_tex_src_coord,
1819 nir_tex_src_projector,
1820 nir_tex_src_comparator, /* shadow comparator */
1821 nir_tex_src_offset,
1822 nir_tex_src_bias,
1823 nir_tex_src_lod,
1824 nir_tex_src_min_lod,
1825 nir_tex_src_ms_index, /* MSAA sample index */
1826 nir_tex_src_ms_mcs, /* MSAA compression value */
1827 nir_tex_src_ddx,
1828 nir_tex_src_ddy,
1829 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1830 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1831 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1832 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1833 nir_tex_src_texture_handle, /* < bindless texture handle */
1834 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1835 nir_tex_src_plane, /* < selects plane for planar textures */
1836 nir_num_tex_src_types
1837 } nir_tex_src_type;
1838
1839 typedef struct {
1840 nir_src src;
1841 nir_tex_src_type src_type;
1842 } nir_tex_src;
1843
1844 typedef enum {
1845 nir_texop_tex, /**< Regular texture look-up */
1846 nir_texop_txb, /**< Texture look-up with LOD bias */
1847 nir_texop_txl, /**< Texture look-up with explicit LOD */
1848 nir_texop_txd, /**< Texture look-up with partial derivatives */
1849 nir_texop_txf, /**< Texel fetch with explicit LOD */
1850 nir_texop_txf_ms, /**< Multisample texture fetch */
1851 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1852 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1853 nir_texop_txs, /**< Texture size */
1854 nir_texop_lod, /**< Texture lod query */
1855 nir_texop_tg4, /**< Texture gather */
1856 nir_texop_query_levels, /**< Texture levels query */
1857 nir_texop_texture_samples, /**< Texture samples query */
1858 nir_texop_samples_identical, /**< Query whether all samples are definitely
1859 * identical.
1860 */
1861 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1862 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1863 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1864 } nir_texop;
1865
1866 typedef struct {
1867 nir_instr instr;
1868
1869 enum glsl_sampler_dim sampler_dim;
1870 nir_alu_type dest_type;
1871
1872 nir_texop op;
1873 nir_dest dest;
1874 nir_tex_src *src;
1875 unsigned num_srcs, coord_components;
1876 bool is_array, is_shadow;
1877
1878 /**
1879 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1880 * components or the new-style shadow that outputs 1 component.
1881 */
1882 bool is_new_style_shadow;
1883
1884 /* gather component selector */
1885 unsigned component : 2;
1886
1887 /* gather offsets */
1888 int8_t tg4_offsets[4][2];
1889
1890 /* True if the texture index or handle is not dynamically uniform */
1891 bool texture_non_uniform;
1892
1893 /* True if the sampler index or handle is not dynamically uniform */
1894 bool sampler_non_uniform;
1895
1896 /** The texture index
1897 *
1898 * If this texture instruction has a nir_tex_src_texture_offset source,
1899 * then the texture index is given by texture_index + texture_offset.
1900 */
1901 unsigned texture_index;
1902
1903 /** The sampler index
1904 *
1905 * The following operations do not require a sampler and, as such, this
1906 * field should be ignored:
1907 * - nir_texop_txf
1908 * - nir_texop_txf_ms
1909 * - nir_texop_txs
1910 * - nir_texop_lod
1911 * - nir_texop_query_levels
1912 * - nir_texop_texture_samples
1913 * - nir_texop_samples_identical
1914 *
1915 * If this texture instruction has a nir_tex_src_sampler_offset source,
1916 * then the sampler index is given by sampler_index + sampler_offset.
1917 */
1918 unsigned sampler_index;
1919 } nir_tex_instr;
1920
1921 static inline unsigned
1922 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1923 {
1924 switch (instr->op) {
1925 case nir_texop_txs: {
1926 unsigned ret;
1927 switch (instr->sampler_dim) {
1928 case GLSL_SAMPLER_DIM_1D:
1929 case GLSL_SAMPLER_DIM_BUF:
1930 ret = 1;
1931 break;
1932 case GLSL_SAMPLER_DIM_2D:
1933 case GLSL_SAMPLER_DIM_CUBE:
1934 case GLSL_SAMPLER_DIM_MS:
1935 case GLSL_SAMPLER_DIM_RECT:
1936 case GLSL_SAMPLER_DIM_EXTERNAL:
1937 case GLSL_SAMPLER_DIM_SUBPASS:
1938 ret = 2;
1939 break;
1940 case GLSL_SAMPLER_DIM_3D:
1941 ret = 3;
1942 break;
1943 default:
1944 unreachable("not reached");
1945 }
1946 if (instr->is_array)
1947 ret++;
1948 return ret;
1949 }
1950
1951 case nir_texop_lod:
1952 return 2;
1953
1954 case nir_texop_texture_samples:
1955 case nir_texop_query_levels:
1956 case nir_texop_samples_identical:
1957 case nir_texop_fragment_mask_fetch:
1958 return 1;
1959
1960 default:
1961 if (instr->is_shadow && instr->is_new_style_shadow)
1962 return 1;
1963
1964 return 4;
1965 }
1966 }
1967
1968 /* Returns true if this texture operation queries something about the texture
1969 * rather than actually sampling it.
1970 */
1971 static inline bool
1972 nir_tex_instr_is_query(const nir_tex_instr *instr)
1973 {
1974 switch (instr->op) {
1975 case nir_texop_txs:
1976 case nir_texop_lod:
1977 case nir_texop_texture_samples:
1978 case nir_texop_query_levels:
1979 case nir_texop_txf_ms_mcs:
1980 return true;
1981 case nir_texop_tex:
1982 case nir_texop_txb:
1983 case nir_texop_txl:
1984 case nir_texop_txd:
1985 case nir_texop_txf:
1986 case nir_texop_txf_ms:
1987 case nir_texop_txf_ms_fb:
1988 case nir_texop_tg4:
1989 return false;
1990 default:
1991 unreachable("Invalid texture opcode");
1992 }
1993 }
1994
1995 static inline bool
1996 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1997 {
1998 switch (instr->op) {
1999 case nir_texop_tex:
2000 case nir_texop_txb:
2001 case nir_texop_lod:
2002 return true;
2003 default:
2004 return false;
2005 }
2006 }
2007
2008 static inline nir_alu_type
2009 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2010 {
2011 switch (instr->src[src].src_type) {
2012 case nir_tex_src_coord:
2013 switch (instr->op) {
2014 case nir_texop_txf:
2015 case nir_texop_txf_ms:
2016 case nir_texop_txf_ms_fb:
2017 case nir_texop_txf_ms_mcs:
2018 case nir_texop_samples_identical:
2019 return nir_type_int;
2020
2021 default:
2022 return nir_type_float;
2023 }
2024
2025 case nir_tex_src_lod:
2026 switch (instr->op) {
2027 case nir_texop_txs:
2028 case nir_texop_txf:
2029 return nir_type_int;
2030
2031 default:
2032 return nir_type_float;
2033 }
2034
2035 case nir_tex_src_projector:
2036 case nir_tex_src_comparator:
2037 case nir_tex_src_bias:
2038 case nir_tex_src_min_lod:
2039 case nir_tex_src_ddx:
2040 case nir_tex_src_ddy:
2041 return nir_type_float;
2042
2043 case nir_tex_src_offset:
2044 case nir_tex_src_ms_index:
2045 case nir_tex_src_plane:
2046 return nir_type_int;
2047
2048 case nir_tex_src_ms_mcs:
2049 case nir_tex_src_texture_deref:
2050 case nir_tex_src_sampler_deref:
2051 case nir_tex_src_texture_offset:
2052 case nir_tex_src_sampler_offset:
2053 case nir_tex_src_texture_handle:
2054 case nir_tex_src_sampler_handle:
2055 return nir_type_uint;
2056
2057 case nir_num_tex_src_types:
2058 unreachable("nir_num_tex_src_types is not a valid source type");
2059 }
2060
2061 unreachable("Invalid texture source type");
2062 }
2063
2064 static inline unsigned
2065 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2066 {
2067 if (instr->src[src].src_type == nir_tex_src_coord)
2068 return instr->coord_components;
2069
2070 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2071 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2072 return 4;
2073
2074 if (instr->src[src].src_type == nir_tex_src_ddx ||
2075 instr->src[src].src_type == nir_tex_src_ddy) {
2076 if (instr->is_array)
2077 return instr->coord_components - 1;
2078 else
2079 return instr->coord_components;
2080 }
2081
2082 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2083 * the offset, since a cube maps to a single face.
2084 */
2085 if (instr->src[src].src_type == nir_tex_src_offset) {
2086 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2087 return 2;
2088 else if (instr->is_array)
2089 return instr->coord_components - 1;
2090 else
2091 return instr->coord_components;
2092 }
2093
2094 return 1;
2095 }
2096
2097 static inline int
2098 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2099 {
2100 for (unsigned i = 0; i < instr->num_srcs; i++)
2101 if (instr->src[i].src_type == type)
2102 return (int) i;
2103
2104 return -1;
2105 }
2106
2107 void nir_tex_instr_add_src(nir_tex_instr *tex,
2108 nir_tex_src_type src_type,
2109 nir_src src);
2110
2111 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2112
2113 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2114
2115 typedef struct {
2116 nir_instr instr;
2117
2118 nir_ssa_def def;
2119
2120 nir_const_value value[];
2121 } nir_load_const_instr;
2122
2123 typedef enum {
2124 nir_jump_return,
2125 nir_jump_break,
2126 nir_jump_continue,
2127 } nir_jump_type;
2128
2129 typedef struct {
2130 nir_instr instr;
2131 nir_jump_type type;
2132 } nir_jump_instr;
2133
2134 /* creates a new SSA variable in an undefined state */
2135
2136 typedef struct {
2137 nir_instr instr;
2138 nir_ssa_def def;
2139 } nir_ssa_undef_instr;
2140
2141 typedef struct {
2142 struct exec_node node;
2143
2144 /* The predecessor block corresponding to this source */
2145 struct nir_block *pred;
2146
2147 nir_src src;
2148 } nir_phi_src;
2149
2150 #define nir_foreach_phi_src(phi_src, phi) \
2151 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2152 #define nir_foreach_phi_src_safe(phi_src, phi) \
2153 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2154
2155 typedef struct {
2156 nir_instr instr;
2157
2158 struct exec_list srcs; /** < list of nir_phi_src */
2159
2160 nir_dest dest;
2161 } nir_phi_instr;
2162
2163 typedef struct {
2164 struct exec_node node;
2165 nir_src src;
2166 nir_dest dest;
2167 } nir_parallel_copy_entry;
2168
2169 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2170 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2171
2172 typedef struct {
2173 nir_instr instr;
2174
2175 /* A list of nir_parallel_copy_entrys. The sources of all of the
2176 * entries are copied to the corresponding destinations "in parallel".
2177 * In other words, if we have two entries: a -> b and b -> a, the values
2178 * get swapped.
2179 */
2180 struct exec_list entries;
2181 } nir_parallel_copy_instr;
2182
2183 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2184 type, nir_instr_type_alu)
2185 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2186 type, nir_instr_type_deref)
2187 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2188 type, nir_instr_type_call)
2189 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2190 type, nir_instr_type_jump)
2191 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2192 type, nir_instr_type_tex)
2193 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2194 type, nir_instr_type_intrinsic)
2195 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2196 type, nir_instr_type_load_const)
2197 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2198 type, nir_instr_type_ssa_undef)
2199 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2200 type, nir_instr_type_phi)
2201 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2202 nir_parallel_copy_instr, instr,
2203 type, nir_instr_type_parallel_copy)
2204
2205
2206 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2207 static inline type \
2208 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2209 { \
2210 assert(nir_src_is_const(src)); \
2211 nir_load_const_instr *load = \
2212 nir_instr_as_load_const(src.ssa->parent_instr); \
2213 assert(comp < load->def.num_components); \
2214 return nir_const_value_as_##suffix(load->value[comp], \
2215 load->def.bit_size); \
2216 } \
2217 \
2218 static inline type \
2219 nir_src_as_##suffix(nir_src src) \
2220 { \
2221 assert(nir_src_num_components(src) == 1); \
2222 return nir_src_comp_as_##suffix(src, 0); \
2223 }
2224
2225 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2226 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2227 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2228 NIR_DEFINE_SRC_AS_CONST(double, float)
2229
2230 #undef NIR_DEFINE_SRC_AS_CONST
2231
2232
2233 typedef struct {
2234 nir_ssa_def *def;
2235 unsigned comp;
2236 } nir_ssa_scalar;
2237
2238 static inline bool
2239 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2240 {
2241 return s.def->parent_instr->type == nir_instr_type_load_const;
2242 }
2243
2244 static inline nir_const_value
2245 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2246 {
2247 assert(s.comp < s.def->num_components);
2248 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2249 return load->value[s.comp];
2250 }
2251
2252 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2253 static inline type \
2254 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2255 { \
2256 return nir_const_value_as_##suffix( \
2257 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2258 }
2259
2260 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2261 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2262 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2263 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2264
2265 #undef NIR_DEFINE_SCALAR_AS_CONST
2266
2267 static inline bool
2268 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2269 {
2270 return s.def->parent_instr->type == nir_instr_type_alu;
2271 }
2272
2273 static inline nir_op
2274 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2275 {
2276 return nir_instr_as_alu(s.def->parent_instr)->op;
2277 }
2278
2279 static inline nir_ssa_scalar
2280 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2281 {
2282 nir_ssa_scalar out = { NULL, 0 };
2283
2284 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2285 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2286
2287 /* Our component must be written */
2288 assert(s.comp < s.def->num_components);
2289 assert(alu->dest.write_mask & (1u << s.comp));
2290
2291 assert(alu->src[alu_src_idx].src.is_ssa);
2292 out.def = alu->src[alu_src_idx].src.ssa;
2293
2294 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2295 /* The ALU src is unsized so the source component follows the
2296 * destination component.
2297 */
2298 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2299 } else {
2300 /* This is a sized source so all source components work together to
2301 * produce all the destination components. Since we need to return a
2302 * scalar, this only works if the source is a scalar.
2303 */
2304 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2305 out.comp = alu->src[alu_src_idx].swizzle[0];
2306 }
2307 assert(out.comp < out.def->num_components);
2308
2309 return out;
2310 }
2311
2312
2313 /*
2314 * Control flow
2315 *
2316 * Control flow consists of a tree of control flow nodes, which include
2317 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2318 * instructions that always run start-to-finish. Each basic block also keeps
2319 * track of its successors (blocks which may run immediately after the current
2320 * block) and predecessors (blocks which could have run immediately before the
2321 * current block). Each function also has a start block and an end block which
2322 * all return statements point to (which is always empty). Together, all the
2323 * blocks with their predecessors and successors make up the control flow
2324 * graph (CFG) of the function. There are helpers that modify the tree of
2325 * control flow nodes while modifying the CFG appropriately; these should be
2326 * used instead of modifying the tree directly.
2327 */
2328
2329 typedef enum {
2330 nir_cf_node_block,
2331 nir_cf_node_if,
2332 nir_cf_node_loop,
2333 nir_cf_node_function
2334 } nir_cf_node_type;
2335
2336 typedef struct nir_cf_node {
2337 struct exec_node node;
2338 nir_cf_node_type type;
2339 struct nir_cf_node *parent;
2340 } nir_cf_node;
2341
2342 typedef struct nir_block {
2343 nir_cf_node cf_node;
2344
2345 struct exec_list instr_list; /** < list of nir_instr */
2346
2347 /** generic block index; generated by nir_index_blocks */
2348 unsigned index;
2349
2350 /*
2351 * Each block can only have up to 2 successors, so we put them in a simple
2352 * array - no need for anything more complicated.
2353 */
2354 struct nir_block *successors[2];
2355
2356 /* Set of nir_block predecessors in the CFG */
2357 struct set *predecessors;
2358
2359 /*
2360 * this node's immediate dominator in the dominance tree - set to NULL for
2361 * the start block.
2362 */
2363 struct nir_block *imm_dom;
2364
2365 /* This node's children in the dominance tree */
2366 unsigned num_dom_children;
2367 struct nir_block **dom_children;
2368
2369 /* Set of nir_blocks on the dominance frontier of this block */
2370 struct set *dom_frontier;
2371
2372 /*
2373 * These two indices have the property that dom_{pre,post}_index for each
2374 * child of this block in the dominance tree will always be between
2375 * dom_pre_index and dom_post_index for this block, which makes testing if
2376 * a given block is dominated by another block an O(1) operation.
2377 */
2378 unsigned dom_pre_index, dom_post_index;
2379
2380 /* live in and out for this block; used for liveness analysis */
2381 BITSET_WORD *live_in;
2382 BITSET_WORD *live_out;
2383 } nir_block;
2384
2385 static inline nir_instr *
2386 nir_block_first_instr(nir_block *block)
2387 {
2388 struct exec_node *head = exec_list_get_head(&block->instr_list);
2389 return exec_node_data(nir_instr, head, node);
2390 }
2391
2392 static inline nir_instr *
2393 nir_block_last_instr(nir_block *block)
2394 {
2395 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2396 return exec_node_data(nir_instr, tail, node);
2397 }
2398
2399 static inline bool
2400 nir_block_ends_in_jump(nir_block *block)
2401 {
2402 return !exec_list_is_empty(&block->instr_list) &&
2403 nir_block_last_instr(block)->type == nir_instr_type_jump;
2404 }
2405
2406 #define nir_foreach_instr(instr, block) \
2407 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2408 #define nir_foreach_instr_reverse(instr, block) \
2409 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2410 #define nir_foreach_instr_safe(instr, block) \
2411 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2412 #define nir_foreach_instr_reverse_safe(instr, block) \
2413 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2414
2415 typedef enum {
2416 nir_selection_control_none = 0x0,
2417 nir_selection_control_flatten = 0x1,
2418 nir_selection_control_dont_flatten = 0x2,
2419 } nir_selection_control;
2420
2421 typedef struct nir_if {
2422 nir_cf_node cf_node;
2423 nir_src condition;
2424 nir_selection_control control;
2425
2426 struct exec_list then_list; /** < list of nir_cf_node */
2427 struct exec_list else_list; /** < list of nir_cf_node */
2428 } nir_if;
2429
2430 typedef struct {
2431 nir_if *nif;
2432
2433 /** Instruction that generates nif::condition. */
2434 nir_instr *conditional_instr;
2435
2436 /** Block within ::nif that has the break instruction. */
2437 nir_block *break_block;
2438
2439 /** Last block for the then- or else-path that does not contain the break. */
2440 nir_block *continue_from_block;
2441
2442 /** True when ::break_block is in the else-path of ::nif. */
2443 bool continue_from_then;
2444 bool induction_rhs;
2445
2446 /* This is true if the terminators exact trip count is unknown. For
2447 * example:
2448 *
2449 * for (int i = 0; i < imin(x, 4); i++)
2450 * ...
2451 *
2452 * Here loop analysis would have set a max_trip_count of 4 however we dont
2453 * know for sure that this is the exact trip count.
2454 */
2455 bool exact_trip_count_unknown;
2456
2457 struct list_head loop_terminator_link;
2458 } nir_loop_terminator;
2459
2460 typedef struct {
2461 /* Estimated cost (in number of instructions) of the loop */
2462 unsigned instr_cost;
2463
2464 /* Guessed trip count based on array indexing */
2465 unsigned guessed_trip_count;
2466
2467 /* Maximum number of times the loop is run (if known) */
2468 unsigned max_trip_count;
2469
2470 /* Do we know the exact number of times the loop will be run */
2471 bool exact_trip_count_known;
2472
2473 /* Unroll the loop regardless of its size */
2474 bool force_unroll;
2475
2476 /* Does the loop contain complex loop terminators, continues or other
2477 * complex behaviours? If this is true we can't rely on
2478 * loop_terminator_list to be complete or accurate.
2479 */
2480 bool complex_loop;
2481
2482 nir_loop_terminator *limiting_terminator;
2483
2484 /* A list of loop_terminators terminating this loop. */
2485 struct list_head loop_terminator_list;
2486 } nir_loop_info;
2487
2488 typedef enum {
2489 nir_loop_control_none = 0x0,
2490 nir_loop_control_unroll = 0x1,
2491 nir_loop_control_dont_unroll = 0x2,
2492 } nir_loop_control;
2493
2494 typedef struct {
2495 nir_cf_node cf_node;
2496
2497 struct exec_list body; /** < list of nir_cf_node */
2498
2499 nir_loop_info *info;
2500 nir_loop_control control;
2501 bool partially_unrolled;
2502 } nir_loop;
2503
2504 /**
2505 * Various bits of metadata that can may be created or required by
2506 * optimization and analysis passes
2507 */
2508 typedef enum {
2509 nir_metadata_none = 0x0,
2510 nir_metadata_block_index = 0x1,
2511 nir_metadata_dominance = 0x2,
2512 nir_metadata_live_ssa_defs = 0x4,
2513 nir_metadata_not_properly_reset = 0x8,
2514 nir_metadata_loop_analysis = 0x10,
2515 } nir_metadata;
2516
2517 typedef struct {
2518 nir_cf_node cf_node;
2519
2520 /** pointer to the function of which this is an implementation */
2521 struct nir_function *function;
2522
2523 struct exec_list body; /** < list of nir_cf_node */
2524
2525 nir_block *end_block;
2526
2527 /** list for all local variables in the function */
2528 struct exec_list locals;
2529
2530 /** list of local registers in the function */
2531 struct exec_list registers;
2532
2533 /** next available local register index */
2534 unsigned reg_alloc;
2535
2536 /** next available SSA value index */
2537 unsigned ssa_alloc;
2538
2539 /* total number of basic blocks, only valid when block_index_dirty = false */
2540 unsigned num_blocks;
2541
2542 nir_metadata valid_metadata;
2543 } nir_function_impl;
2544
2545 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2546 nir_start_block(nir_function_impl *impl)
2547 {
2548 return (nir_block *) impl->body.head_sentinel.next;
2549 }
2550
2551 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2552 nir_impl_last_block(nir_function_impl *impl)
2553 {
2554 return (nir_block *) impl->body.tail_sentinel.prev;
2555 }
2556
2557 static inline nir_cf_node *
2558 nir_cf_node_next(nir_cf_node *node)
2559 {
2560 struct exec_node *next = exec_node_get_next(&node->node);
2561 if (exec_node_is_tail_sentinel(next))
2562 return NULL;
2563 else
2564 return exec_node_data(nir_cf_node, next, node);
2565 }
2566
2567 static inline nir_cf_node *
2568 nir_cf_node_prev(nir_cf_node *node)
2569 {
2570 struct exec_node *prev = exec_node_get_prev(&node->node);
2571 if (exec_node_is_head_sentinel(prev))
2572 return NULL;
2573 else
2574 return exec_node_data(nir_cf_node, prev, node);
2575 }
2576
2577 static inline bool
2578 nir_cf_node_is_first(const nir_cf_node *node)
2579 {
2580 return exec_node_is_head_sentinel(node->node.prev);
2581 }
2582
2583 static inline bool
2584 nir_cf_node_is_last(const nir_cf_node *node)
2585 {
2586 return exec_node_is_tail_sentinel(node->node.next);
2587 }
2588
2589 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2590 type, nir_cf_node_block)
2591 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2592 type, nir_cf_node_if)
2593 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2594 type, nir_cf_node_loop)
2595 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2596 nir_function_impl, cf_node, type, nir_cf_node_function)
2597
2598 static inline nir_block *
2599 nir_if_first_then_block(nir_if *if_stmt)
2600 {
2601 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2602 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2603 }
2604
2605 static inline nir_block *
2606 nir_if_last_then_block(nir_if *if_stmt)
2607 {
2608 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2609 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2610 }
2611
2612 static inline nir_block *
2613 nir_if_first_else_block(nir_if *if_stmt)
2614 {
2615 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2616 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2617 }
2618
2619 static inline nir_block *
2620 nir_if_last_else_block(nir_if *if_stmt)
2621 {
2622 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2623 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2624 }
2625
2626 static inline nir_block *
2627 nir_loop_first_block(nir_loop *loop)
2628 {
2629 struct exec_node *head = exec_list_get_head(&loop->body);
2630 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2631 }
2632
2633 static inline nir_block *
2634 nir_loop_last_block(nir_loop *loop)
2635 {
2636 struct exec_node *tail = exec_list_get_tail(&loop->body);
2637 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2638 }
2639
2640 /**
2641 * Return true if this list of cf_nodes contains a single empty block.
2642 */
2643 static inline bool
2644 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2645 {
2646 if (exec_list_is_singular(cf_list)) {
2647 struct exec_node *head = exec_list_get_head(cf_list);
2648 nir_block *block =
2649 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2650 return exec_list_is_empty(&block->instr_list);
2651 }
2652 return false;
2653 }
2654
2655 typedef struct {
2656 uint8_t num_components;
2657 uint8_t bit_size;
2658 } nir_parameter;
2659
2660 typedef struct nir_function {
2661 struct exec_node node;
2662
2663 const char *name;
2664 struct nir_shader *shader;
2665
2666 unsigned num_params;
2667 nir_parameter *params;
2668
2669 /** The implementation of this function.
2670 *
2671 * If the function is only declared and not implemented, this is NULL.
2672 */
2673 nir_function_impl *impl;
2674
2675 bool is_entrypoint;
2676 } nir_function;
2677
2678 typedef enum {
2679 nir_lower_imul64 = (1 << 0),
2680 nir_lower_isign64 = (1 << 1),
2681 /** Lower all int64 modulus and division opcodes */
2682 nir_lower_divmod64 = (1 << 2),
2683 /** Lower all 64-bit umul_high and imul_high opcodes */
2684 nir_lower_imul_high64 = (1 << 3),
2685 nir_lower_mov64 = (1 << 4),
2686 nir_lower_icmp64 = (1 << 5),
2687 nir_lower_iadd64 = (1 << 6),
2688 nir_lower_iabs64 = (1 << 7),
2689 nir_lower_ineg64 = (1 << 8),
2690 nir_lower_logic64 = (1 << 9),
2691 nir_lower_minmax64 = (1 << 10),
2692 nir_lower_shift64 = (1 << 11),
2693 nir_lower_imul_2x32_64 = (1 << 12),
2694 nir_lower_extract64 = (1 << 13),
2695 nir_lower_ufind_msb64 = (1 << 14),
2696 } nir_lower_int64_options;
2697
2698 typedef enum {
2699 nir_lower_drcp = (1 << 0),
2700 nir_lower_dsqrt = (1 << 1),
2701 nir_lower_drsq = (1 << 2),
2702 nir_lower_dtrunc = (1 << 3),
2703 nir_lower_dfloor = (1 << 4),
2704 nir_lower_dceil = (1 << 5),
2705 nir_lower_dfract = (1 << 6),
2706 nir_lower_dround_even = (1 << 7),
2707 nir_lower_dmod = (1 << 8),
2708 nir_lower_dsub = (1 << 9),
2709 nir_lower_ddiv = (1 << 10),
2710 nir_lower_fp64_full_software = (1 << 11),
2711 } nir_lower_doubles_options;
2712
2713 typedef enum {
2714 nir_divergence_single_prim_per_subgroup = (1 << 0),
2715 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2716 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2717 nir_divergence_view_index_uniform = (1 << 3),
2718 } nir_divergence_options;
2719
2720 typedef struct nir_shader_compiler_options {
2721 bool lower_fdiv;
2722 bool lower_ffma;
2723 bool fuse_ffma;
2724 bool lower_flrp16;
2725 bool lower_flrp32;
2726 /** Lowers flrp when it does not support doubles */
2727 bool lower_flrp64;
2728 bool lower_fpow;
2729 bool lower_fsat;
2730 bool lower_fsqrt;
2731 bool lower_sincos;
2732 bool lower_fmod;
2733 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2734 bool lower_bitfield_extract;
2735 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2736 bool lower_bitfield_extract_to_shifts;
2737 /** Lowers bitfield_insert to bfi/bfm */
2738 bool lower_bitfield_insert;
2739 /** Lowers bitfield_insert to compares, and shifts. */
2740 bool lower_bitfield_insert_to_shifts;
2741 /** Lowers bitfield_insert to bfm/bitfield_select. */
2742 bool lower_bitfield_insert_to_bitfield_select;
2743 /** Lowers bitfield_reverse to shifts. */
2744 bool lower_bitfield_reverse;
2745 /** Lowers bit_count to shifts. */
2746 bool lower_bit_count;
2747 /** Lowers ifind_msb to compare and ufind_msb */
2748 bool lower_ifind_msb;
2749 /** Lowers find_lsb to ufind_msb and logic ops */
2750 bool lower_find_lsb;
2751 bool lower_uadd_carry;
2752 bool lower_usub_borrow;
2753 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2754 bool lower_mul_high;
2755 /** lowers fneg and ineg to fsub and isub. */
2756 bool lower_negate;
2757 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2758 bool lower_sub;
2759
2760 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2761 bool lower_scmp;
2762
2763 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2764 bool lower_vector_cmp;
2765
2766 /** enables rules to lower idiv by power-of-two: */
2767 bool lower_idiv;
2768
2769 /** enable rules to avoid bit ops */
2770 bool lower_bitops;
2771
2772 /** enables rules to lower isign to imin+imax */
2773 bool lower_isign;
2774
2775 /** enables rules to lower fsign to fsub and flt */
2776 bool lower_fsign;
2777
2778 /* lower fdph to fdot4 */
2779 bool lower_fdph;
2780
2781 /** lower fdot to fmul and fsum/fadd. */
2782 bool lower_fdot;
2783
2784 /* Does the native fdot instruction replicate its result for four
2785 * components? If so, then opt_algebraic_late will turn all fdotN
2786 * instructions into fdot_replicatedN instructions.
2787 */
2788 bool fdot_replicates;
2789
2790 /** lowers ffloor to fsub+ffract: */
2791 bool lower_ffloor;
2792
2793 /** lowers ffract to fsub+ffloor: */
2794 bool lower_ffract;
2795
2796 /** lowers fceil to fneg+ffloor+fneg: */
2797 bool lower_fceil;
2798
2799 bool lower_ftrunc;
2800
2801 bool lower_ldexp;
2802
2803 bool lower_pack_half_2x16;
2804 bool lower_pack_half_2x16_split;
2805 bool lower_pack_unorm_2x16;
2806 bool lower_pack_snorm_2x16;
2807 bool lower_pack_unorm_4x8;
2808 bool lower_pack_snorm_4x8;
2809 bool lower_unpack_half_2x16;
2810 bool lower_unpack_half_2x16_split;
2811 bool lower_unpack_unorm_2x16;
2812 bool lower_unpack_snorm_2x16;
2813 bool lower_unpack_unorm_4x8;
2814 bool lower_unpack_snorm_4x8;
2815
2816 bool lower_extract_byte;
2817 bool lower_extract_word;
2818
2819 bool lower_all_io_to_temps;
2820 bool lower_all_io_to_elements;
2821
2822 /* Indicates that the driver only has zero-based vertex id */
2823 bool vertex_id_zero_based;
2824
2825 /**
2826 * If enabled, gl_BaseVertex will be lowered as:
2827 * is_indexed_draw (~0/0) & firstvertex
2828 */
2829 bool lower_base_vertex;
2830
2831 /**
2832 * If enabled, gl_HelperInvocation will be lowered as:
2833 *
2834 * !((1 << sample_id) & sample_mask_in))
2835 *
2836 * This depends on some possibly hw implementation details, which may
2837 * not be true for all hw. In particular that the FS is only executed
2838 * for covered samples or for helper invocations. So, do not blindly
2839 * enable this option.
2840 *
2841 * Note: See also issue #22 in ARB_shader_image_load_store
2842 */
2843 bool lower_helper_invocation;
2844
2845 /**
2846 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2847 *
2848 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2849 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2850 */
2851 bool optimize_sample_mask_in;
2852
2853 bool lower_cs_local_index_from_id;
2854 bool lower_cs_local_id_from_index;
2855
2856 bool lower_device_index_to_zero;
2857
2858 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2859 bool lower_wpos_pntc;
2860
2861 /**
2862 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2863 * lowered to simple arithmetic.
2864 *
2865 * If this flag is set, the lowering will be applied to all bit-sizes of
2866 * these instructions.
2867 *
2868 * \sa ::lower_hadd64
2869 */
2870 bool lower_hadd;
2871
2872 /**
2873 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2874 * should be lowered to simple arithmetic.
2875 *
2876 * If this flag is set, the lowering will be applied to only 64-bit
2877 * versions of these instructions.
2878 *
2879 * \sa ::lower_hadd
2880 */
2881 bool lower_hadd64;
2882
2883 /**
2884 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2885 * arithmetic.
2886 *
2887 * If this flag is set, the lowering will be applied to all bit-sizes of
2888 * these instructions.
2889 *
2890 * \sa ::lower_usub_sat64
2891 */
2892 bool lower_add_sat;
2893
2894 /**
2895 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2896 * arithmetic.
2897 *
2898 * \sa ::lower_add_sat
2899 */
2900 bool lower_usub_sat64;
2901
2902 /**
2903 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2904 * for IO purposes and would prefer loads/stores be vectorized.
2905 */
2906 bool vectorize_io;
2907 bool lower_to_scalar;
2908
2909 /**
2910 * Should the linker unify inputs_read/outputs_written between adjacent
2911 * shader stages which are linked into a single program?
2912 */
2913 bool unify_interfaces;
2914
2915 /**
2916 * Should nir_lower_io() create load_interpolated_input intrinsics?
2917 *
2918 * If not, it generates regular load_input intrinsics and interpolation
2919 * information must be inferred from the list of input nir_variables.
2920 */
2921 bool use_interpolated_input_intrinsics;
2922
2923 /* Lowers when 32x32->64 bit multiplication is not supported */
2924 bool lower_mul_2x32_64;
2925
2926 /* Lowers when rotate instruction is not supported */
2927 bool lower_rotate;
2928
2929 /**
2930 * Backend supports imul24, and would like to use it (when possible)
2931 * for address/offset calculation. If true, driver should call
2932 * nir_lower_amul(). (If not set, amul will automatically be lowered
2933 * to imul.)
2934 */
2935 bool has_imul24;
2936
2937 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
2938 * set of memory barrier intrinsics based on GLSL.
2939 */
2940 bool use_scoped_memory_barrier;
2941
2942 /**
2943 * Is this the Intel vec4 backend?
2944 *
2945 * Used to inhibit algebraic optimizations that are known to be harmful on
2946 * the Intel vec4 backend. This is generally applicable to any
2947 * optimization that might cause more immediate values to be used in
2948 * 3-source (e.g., ffma and flrp) instructions.
2949 */
2950 bool intel_vec4;
2951
2952 unsigned max_unroll_iterations;
2953
2954 nir_lower_int64_options lower_int64_options;
2955 nir_lower_doubles_options lower_doubles_options;
2956 } nir_shader_compiler_options;
2957
2958 typedef struct nir_shader {
2959 /** list of uniforms (nir_variable) */
2960 struct exec_list uniforms;
2961
2962 /** list of inputs (nir_variable) */
2963 struct exec_list inputs;
2964
2965 /** list of outputs (nir_variable) */
2966 struct exec_list outputs;
2967
2968 /** list of shared compute variables (nir_variable) */
2969 struct exec_list shared;
2970
2971 /** Set of driver-specific options for the shader.
2972 *
2973 * The memory for the options is expected to be kept in a single static
2974 * copy by the driver.
2975 */
2976 const struct nir_shader_compiler_options *options;
2977
2978 /** Various bits of compile-time information about a given shader */
2979 struct shader_info info;
2980
2981 /** list of global variables in the shader (nir_variable) */
2982 struct exec_list globals;
2983
2984 /** list of system value variables in the shader (nir_variable) */
2985 struct exec_list system_values;
2986
2987 struct exec_list functions; /** < list of nir_function */
2988
2989 /**
2990 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2991 * access plus one
2992 */
2993 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2994
2995 /** Size in bytes of required scratch space */
2996 unsigned scratch_size;
2997
2998 /** Constant data associated with this shader.
2999 *
3000 * Constant data is loaded through load_constant intrinsics. See also
3001 * nir_opt_large_constants.
3002 */
3003 void *constant_data;
3004 unsigned constant_data_size;
3005 } nir_shader;
3006
3007 #define nir_foreach_function(func, shader) \
3008 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3009
3010 static inline nir_function_impl *
3011 nir_shader_get_entrypoint(nir_shader *shader)
3012 {
3013 nir_function *func = NULL;
3014
3015 nir_foreach_function(function, shader) {
3016 assert(func == NULL);
3017 if (function->is_entrypoint) {
3018 func = function;
3019 #ifndef NDEBUG
3020 break;
3021 #endif
3022 }
3023 }
3024
3025 if (!func)
3026 return NULL;
3027
3028 assert(func->num_params == 0);
3029 assert(func->impl);
3030 return func->impl;
3031 }
3032
3033 nir_shader *nir_shader_create(void *mem_ctx,
3034 gl_shader_stage stage,
3035 const nir_shader_compiler_options *options,
3036 shader_info *si);
3037
3038 nir_register *nir_local_reg_create(nir_function_impl *impl);
3039
3040 void nir_reg_remove(nir_register *reg);
3041
3042 /** Adds a variable to the appropriate list in nir_shader */
3043 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3044
3045 static inline void
3046 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3047 {
3048 assert(var->data.mode == nir_var_function_temp);
3049 exec_list_push_tail(&impl->locals, &var->node);
3050 }
3051
3052 /** creates a variable, sets a few defaults, and adds it to the list */
3053 nir_variable *nir_variable_create(nir_shader *shader,
3054 nir_variable_mode mode,
3055 const struct glsl_type *type,
3056 const char *name);
3057 /** creates a local variable and adds it to the list */
3058 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3059 const struct glsl_type *type,
3060 const char *name);
3061
3062 /** creates a function and adds it to the shader's list of functions */
3063 nir_function *nir_function_create(nir_shader *shader, const char *name);
3064
3065 nir_function_impl *nir_function_impl_create(nir_function *func);
3066 /** creates a function_impl that isn't tied to any particular function */
3067 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3068
3069 nir_block *nir_block_create(nir_shader *shader);
3070 nir_if *nir_if_create(nir_shader *shader);
3071 nir_loop *nir_loop_create(nir_shader *shader);
3072
3073 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3074
3075 /** requests that the given pieces of metadata be generated */
3076 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3077 /** dirties all but the preserved metadata */
3078 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3079
3080 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3081 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3082
3083 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3084 nir_deref_type deref_type);
3085
3086 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3087
3088 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3089 unsigned num_components,
3090 unsigned bit_size);
3091
3092 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3093 nir_intrinsic_op op);
3094
3095 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3096 nir_function *callee);
3097
3098 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3099
3100 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3101
3102 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3103
3104 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3105 unsigned num_components,
3106 unsigned bit_size);
3107
3108 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3109
3110 /**
3111 * NIR Cursors and Instruction Insertion API
3112 * @{
3113 *
3114 * A tiny struct representing a point to insert/extract instructions or
3115 * control flow nodes. Helps reduce the combinatorial explosion of possible
3116 * points to insert/extract.
3117 *
3118 * \sa nir_control_flow.h
3119 */
3120 typedef enum {
3121 nir_cursor_before_block,
3122 nir_cursor_after_block,
3123 nir_cursor_before_instr,
3124 nir_cursor_after_instr,
3125 } nir_cursor_option;
3126
3127 typedef struct {
3128 nir_cursor_option option;
3129 union {
3130 nir_block *block;
3131 nir_instr *instr;
3132 };
3133 } nir_cursor;
3134
3135 static inline nir_block *
3136 nir_cursor_current_block(nir_cursor cursor)
3137 {
3138 if (cursor.option == nir_cursor_before_instr ||
3139 cursor.option == nir_cursor_after_instr) {
3140 return cursor.instr->block;
3141 } else {
3142 return cursor.block;
3143 }
3144 }
3145
3146 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3147
3148 static inline nir_cursor
3149 nir_before_block(nir_block *block)
3150 {
3151 nir_cursor cursor;
3152 cursor.option = nir_cursor_before_block;
3153 cursor.block = block;
3154 return cursor;
3155 }
3156
3157 static inline nir_cursor
3158 nir_after_block(nir_block *block)
3159 {
3160 nir_cursor cursor;
3161 cursor.option = nir_cursor_after_block;
3162 cursor.block = block;
3163 return cursor;
3164 }
3165
3166 static inline nir_cursor
3167 nir_before_instr(nir_instr *instr)
3168 {
3169 nir_cursor cursor;
3170 cursor.option = nir_cursor_before_instr;
3171 cursor.instr = instr;
3172 return cursor;
3173 }
3174
3175 static inline nir_cursor
3176 nir_after_instr(nir_instr *instr)
3177 {
3178 nir_cursor cursor;
3179 cursor.option = nir_cursor_after_instr;
3180 cursor.instr = instr;
3181 return cursor;
3182 }
3183
3184 static inline nir_cursor
3185 nir_after_block_before_jump(nir_block *block)
3186 {
3187 nir_instr *last_instr = nir_block_last_instr(block);
3188 if (last_instr && last_instr->type == nir_instr_type_jump) {
3189 return nir_before_instr(last_instr);
3190 } else {
3191 return nir_after_block(block);
3192 }
3193 }
3194
3195 static inline nir_cursor
3196 nir_before_src(nir_src *src, bool is_if_condition)
3197 {
3198 if (is_if_condition) {
3199 nir_block *prev_block =
3200 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3201 assert(!nir_block_ends_in_jump(prev_block));
3202 return nir_after_block(prev_block);
3203 } else if (src->parent_instr->type == nir_instr_type_phi) {
3204 #ifndef NDEBUG
3205 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3206 bool found = false;
3207 nir_foreach_phi_src(phi_src, cond_phi) {
3208 if (phi_src->src.ssa == src->ssa) {
3209 found = true;
3210 break;
3211 }
3212 }
3213 assert(found);
3214 #endif
3215 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3216 * to have a more specific name.
3217 */
3218 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3219 return nir_after_block_before_jump(phi_src->pred);
3220 } else {
3221 return nir_before_instr(src->parent_instr);
3222 }
3223 }
3224
3225 static inline nir_cursor
3226 nir_before_cf_node(nir_cf_node *node)
3227 {
3228 if (node->type == nir_cf_node_block)
3229 return nir_before_block(nir_cf_node_as_block(node));
3230
3231 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3232 }
3233
3234 static inline nir_cursor
3235 nir_after_cf_node(nir_cf_node *node)
3236 {
3237 if (node->type == nir_cf_node_block)
3238 return nir_after_block(nir_cf_node_as_block(node));
3239
3240 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3241 }
3242
3243 static inline nir_cursor
3244 nir_after_phis(nir_block *block)
3245 {
3246 nir_foreach_instr(instr, block) {
3247 if (instr->type != nir_instr_type_phi)
3248 return nir_before_instr(instr);
3249 }
3250 return nir_after_block(block);
3251 }
3252
3253 static inline nir_cursor
3254 nir_after_cf_node_and_phis(nir_cf_node *node)
3255 {
3256 if (node->type == nir_cf_node_block)
3257 return nir_after_block(nir_cf_node_as_block(node));
3258
3259 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3260
3261 return nir_after_phis(block);
3262 }
3263
3264 static inline nir_cursor
3265 nir_before_cf_list(struct exec_list *cf_list)
3266 {
3267 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3268 exec_list_get_head(cf_list), node);
3269 return nir_before_cf_node(first_node);
3270 }
3271
3272 static inline nir_cursor
3273 nir_after_cf_list(struct exec_list *cf_list)
3274 {
3275 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3276 exec_list_get_tail(cf_list), node);
3277 return nir_after_cf_node(last_node);
3278 }
3279
3280 /**
3281 * Insert a NIR instruction at the given cursor.
3282 *
3283 * Note: This does not update the cursor.
3284 */
3285 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3286
3287 static inline void
3288 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3289 {
3290 nir_instr_insert(nir_before_instr(instr), before);
3291 }
3292
3293 static inline void
3294 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3295 {
3296 nir_instr_insert(nir_after_instr(instr), after);
3297 }
3298
3299 static inline void
3300 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3301 {
3302 nir_instr_insert(nir_before_block(block), before);
3303 }
3304
3305 static inline void
3306 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3307 {
3308 nir_instr_insert(nir_after_block(block), after);
3309 }
3310
3311 static inline void
3312 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3313 {
3314 nir_instr_insert(nir_before_cf_node(node), before);
3315 }
3316
3317 static inline void
3318 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3319 {
3320 nir_instr_insert(nir_after_cf_node(node), after);
3321 }
3322
3323 static inline void
3324 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3325 {
3326 nir_instr_insert(nir_before_cf_list(list), before);
3327 }
3328
3329 static inline void
3330 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3331 {
3332 nir_instr_insert(nir_after_cf_list(list), after);
3333 }
3334
3335 void nir_instr_remove_v(nir_instr *instr);
3336
3337 static inline nir_cursor
3338 nir_instr_remove(nir_instr *instr)
3339 {
3340 nir_cursor cursor;
3341 nir_instr *prev = nir_instr_prev(instr);
3342 if (prev) {
3343 cursor = nir_after_instr(prev);
3344 } else {
3345 cursor = nir_before_block(instr->block);
3346 }
3347 nir_instr_remove_v(instr);
3348 return cursor;
3349 }
3350
3351 /** @} */
3352
3353 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3354
3355 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3356 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3357 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3358 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3359 void *state);
3360 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3361 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3362
3363 nir_const_value *nir_src_as_const_value(nir_src src);
3364
3365 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3366 static inline c_type * \
3367 nir_src_as_ ## name (nir_src src) \
3368 { \
3369 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3370 ? cast_macro(src.ssa->parent_instr) : NULL; \
3371 }
3372
3373 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3374 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3375 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3376 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3377
3378 bool nir_src_is_dynamically_uniform(nir_src src);
3379 bool nir_srcs_equal(nir_src src1, nir_src src2);
3380 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3381 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3382 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3383 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3384 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3385 nir_dest new_dest);
3386
3387 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3388 unsigned num_components, unsigned bit_size,
3389 const char *name);
3390 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3391 unsigned num_components, unsigned bit_size,
3392 const char *name);
3393 static inline void
3394 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3395 const struct glsl_type *type,
3396 const char *name)
3397 {
3398 assert(glsl_type_is_vector_or_scalar(type));
3399 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3400 glsl_get_bit_size(type), name);
3401 }
3402 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3403 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3404 nir_instr *after_me);
3405
3406 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3407
3408 /*
3409 * finds the next basic block in source-code order, returns NULL if there is
3410 * none
3411 */
3412
3413 nir_block *nir_block_cf_tree_next(nir_block *block);
3414
3415 /* Performs the opposite of nir_block_cf_tree_next() */
3416
3417 nir_block *nir_block_cf_tree_prev(nir_block *block);
3418
3419 /* Gets the first block in a CF node in source-code order */
3420
3421 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3422
3423 /* Gets the last block in a CF node in source-code order */
3424
3425 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3426
3427 /* Gets the next block after a CF node in source-code order */
3428
3429 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3430
3431 /* Macros for loops that visit blocks in source-code order */
3432
3433 #define nir_foreach_block(block, impl) \
3434 for (nir_block *block = nir_start_block(impl); block != NULL; \
3435 block = nir_block_cf_tree_next(block))
3436
3437 #define nir_foreach_block_safe(block, impl) \
3438 for (nir_block *block = nir_start_block(impl), \
3439 *next = nir_block_cf_tree_next(block); \
3440 block != NULL; \
3441 block = next, next = nir_block_cf_tree_next(block))
3442
3443 #define nir_foreach_block_reverse(block, impl) \
3444 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3445 block = nir_block_cf_tree_prev(block))
3446
3447 #define nir_foreach_block_reverse_safe(block, impl) \
3448 for (nir_block *block = nir_impl_last_block(impl), \
3449 *prev = nir_block_cf_tree_prev(block); \
3450 block != NULL; \
3451 block = prev, prev = nir_block_cf_tree_prev(block))
3452
3453 #define nir_foreach_block_in_cf_node(block, node) \
3454 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3455 block != nir_cf_node_cf_tree_next(node); \
3456 block = nir_block_cf_tree_next(block))
3457
3458 /* If the following CF node is an if, this function returns that if.
3459 * Otherwise, it returns NULL.
3460 */
3461 nir_if *nir_block_get_following_if(nir_block *block);
3462
3463 nir_loop *nir_block_get_following_loop(nir_block *block);
3464
3465 void nir_index_local_regs(nir_function_impl *impl);
3466 void nir_index_ssa_defs(nir_function_impl *impl);
3467 unsigned nir_index_instrs(nir_function_impl *impl);
3468
3469 void nir_index_blocks(nir_function_impl *impl);
3470
3471 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3472
3473 void nir_print_shader(nir_shader *shader, FILE *fp);
3474 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3475 void nir_print_instr(const nir_instr *instr, FILE *fp);
3476 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3477
3478 /** Shallow clone of a single ALU instruction. */
3479 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3480
3481 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3482 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3483 const nir_function_impl *fi);
3484 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3485 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3486
3487 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3488
3489 void nir_shader_serialize_deserialize(nir_shader *s);
3490
3491 #ifndef NDEBUG
3492 void nir_validate_shader(nir_shader *shader, const char *when);
3493 void nir_metadata_set_validation_flag(nir_shader *shader);
3494 void nir_metadata_check_validation_flag(nir_shader *shader);
3495
3496 static inline bool
3497 should_skip_nir(const char *name)
3498 {
3499 static const char *list = NULL;
3500 if (!list) {
3501 /* Comma separated list of names to skip. */
3502 list = getenv("NIR_SKIP");
3503 if (!list)
3504 list = "";
3505 }
3506
3507 if (!list[0])
3508 return false;
3509
3510 return comma_separated_list_contains(list, name);
3511 }
3512
3513 static inline bool
3514 should_clone_nir(void)
3515 {
3516 static int should_clone = -1;
3517 if (should_clone < 0)
3518 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3519
3520 return should_clone;
3521 }
3522
3523 static inline bool
3524 should_serialize_deserialize_nir(void)
3525 {
3526 static int test_serialize = -1;
3527 if (test_serialize < 0)
3528 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3529
3530 return test_serialize;
3531 }
3532
3533 static inline bool
3534 should_print_nir(void)
3535 {
3536 static int should_print = -1;
3537 if (should_print < 0)
3538 should_print = env_var_as_boolean("NIR_PRINT", false);
3539
3540 return should_print;
3541 }
3542 #else
3543 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3544 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3545 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3546 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3547 static inline bool should_clone_nir(void) { return false; }
3548 static inline bool should_serialize_deserialize_nir(void) { return false; }
3549 static inline bool should_print_nir(void) { return false; }
3550 #endif /* NDEBUG */
3551
3552 #define _PASS(pass, nir, do_pass) do { \
3553 if (should_skip_nir(#pass)) { \
3554 printf("skipping %s\n", #pass); \
3555 break; \
3556 } \
3557 do_pass \
3558 nir_validate_shader(nir, "after " #pass); \
3559 if (should_clone_nir()) { \
3560 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3561 nir_shader_replace(nir, clone); \
3562 } \
3563 if (should_serialize_deserialize_nir()) { \
3564 nir_shader_serialize_deserialize(nir); \
3565 } \
3566 } while (0)
3567
3568 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3569 nir_metadata_set_validation_flag(nir); \
3570 if (should_print_nir()) \
3571 printf("%s\n", #pass); \
3572 if (pass(nir, ##__VA_ARGS__)) { \
3573 progress = true; \
3574 if (should_print_nir()) \
3575 nir_print_shader(nir, stdout); \
3576 nir_metadata_check_validation_flag(nir); \
3577 } \
3578 )
3579
3580 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3581 if (should_print_nir()) \
3582 printf("%s\n", #pass); \
3583 pass(nir, ##__VA_ARGS__); \
3584 if (should_print_nir()) \
3585 nir_print_shader(nir, stdout); \
3586 )
3587
3588 #define NIR_SKIP(name) should_skip_nir(#name)
3589
3590 /** An instruction filtering callback
3591 *
3592 * Returns true if the instruction should be processed and false otherwise.
3593 */
3594 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3595
3596 /** A simple instruction lowering callback
3597 *
3598 * Many instruction lowering passes can be written as a simple function which
3599 * takes an instruction as its input and returns a sequence of instructions
3600 * that implement the consumed instruction. This function type represents
3601 * such a lowering function. When called, a function with this prototype
3602 * should either return NULL indicating that no lowering needs to be done or
3603 * emit a sequence of instructions using the provided builder (whose cursor
3604 * will already be placed after the instruction to be lowered) and return the
3605 * resulting nir_ssa_def.
3606 */
3607 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3608 nir_instr *, void *);
3609
3610 /**
3611 * Special return value for nir_lower_instr_cb when some progress occurred
3612 * (like changing an input to the instr) that didn't result in a replacement
3613 * SSA def being generated.
3614 */
3615 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3616
3617 /** Iterate over all the instructions in a nir_function_impl and lower them
3618 * using the provided callbacks
3619 *
3620 * This function implements the guts of a standard lowering pass for you. It
3621 * iterates over all of the instructions in a nir_function_impl and calls the
3622 * filter callback on each one. If the filter callback returns true, it then
3623 * calls the lowering call back on the instruction. (Splitting it this way
3624 * allows us to avoid some save/restore work for instructions we know won't be
3625 * lowered.) If the instruction is dead after the lowering is complete, it
3626 * will be removed. If new instructions are added, the lowering callback will
3627 * also be called on them in case multiple lowerings are required.
3628 *
3629 * The metadata for the nir_function_impl will also be updated. If any blocks
3630 * are added (they cannot be removed), dominance and block indices will be
3631 * invalidated.
3632 */
3633 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3634 nir_instr_filter_cb filter,
3635 nir_lower_instr_cb lower,
3636 void *cb_data);
3637 bool nir_shader_lower_instructions(nir_shader *shader,
3638 nir_instr_filter_cb filter,
3639 nir_lower_instr_cb lower,
3640 void *cb_data);
3641
3642 void nir_calc_dominance_impl(nir_function_impl *impl);
3643 void nir_calc_dominance(nir_shader *shader);
3644
3645 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3646 bool nir_block_dominates(nir_block *parent, nir_block *child);
3647 bool nir_block_is_unreachable(nir_block *block);
3648
3649 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3650 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3651
3652 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3653 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3654
3655 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3656 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3657
3658 int nir_gs_count_vertices(const nir_shader *shader);
3659
3660 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3661 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3662 bool nir_split_var_copies(nir_shader *shader);
3663 bool nir_split_per_member_structs(nir_shader *shader);
3664 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3665
3666 bool nir_lower_returns_impl(nir_function_impl *impl);
3667 bool nir_lower_returns(nir_shader *shader);
3668
3669 void nir_inline_function_impl(struct nir_builder *b,
3670 const nir_function_impl *impl,
3671 nir_ssa_def **params);
3672 bool nir_inline_functions(nir_shader *shader);
3673
3674 bool nir_propagate_invariant(nir_shader *shader);
3675
3676 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3677 void nir_lower_deref_copy_instr(struct nir_builder *b,
3678 nir_intrinsic_instr *copy);
3679 bool nir_lower_var_copies(nir_shader *shader);
3680
3681 void nir_fixup_deref_modes(nir_shader *shader);
3682
3683 bool nir_lower_global_vars_to_local(nir_shader *shader);
3684
3685 typedef enum {
3686 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3687 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3688 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3689 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3690 } nir_lower_array_deref_of_vec_options;
3691
3692 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3693 nir_lower_array_deref_of_vec_options options);
3694
3695 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3696
3697 bool nir_lower_locals_to_regs(nir_shader *shader);
3698
3699 void nir_lower_io_to_temporaries(nir_shader *shader,
3700 nir_function_impl *entrypoint,
3701 bool outputs, bool inputs);
3702
3703 bool nir_lower_vars_to_scratch(nir_shader *shader,
3704 nir_variable_mode modes,
3705 int size_threshold,
3706 glsl_type_size_align_func size_align);
3707
3708 void nir_lower_clip_halfz(nir_shader *shader);
3709
3710 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3711
3712 void nir_gather_ssa_types(nir_function_impl *impl,
3713 BITSET_WORD *float_types,
3714 BITSET_WORD *int_types);
3715
3716 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3717 int (*type_size)(const struct glsl_type *, bool));
3718
3719 /* Some helpers to do very simple linking */
3720 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3721 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3722 uint64_t *used_by_other_stage,
3723 uint64_t *used_by_other_stage_patches);
3724 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3725 bool default_to_smooth_interp);
3726 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3727 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3728
3729 bool nir_lower_amul(nir_shader *shader,
3730 int (*type_size)(const struct glsl_type *, bool));
3731
3732 void nir_assign_io_var_locations(struct exec_list *var_list,
3733 unsigned *size,
3734 gl_shader_stage stage);
3735
3736 typedef enum {
3737 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3738 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3739 * modes.
3740 */
3741 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3742
3743 /* If set, this forces all non-flat fragment shader inputs to be
3744 * interpolated as if with the "sample" qualifier. This requires
3745 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3746 */
3747 nir_lower_io_force_sample_interpolation = (1 << 1),
3748 } nir_lower_io_options;
3749 bool nir_lower_io(nir_shader *shader,
3750 nir_variable_mode modes,
3751 int (*type_size)(const struct glsl_type *, bool),
3752 nir_lower_io_options);
3753
3754 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3755
3756 bool
3757 nir_lower_vars_to_explicit_types(nir_shader *shader,
3758 nir_variable_mode modes,
3759 glsl_type_size_align_func type_info);
3760
3761 typedef enum {
3762 /**
3763 * An address format which is a simple 32-bit global GPU address.
3764 */
3765 nir_address_format_32bit_global,
3766
3767 /**
3768 * An address format which is a simple 64-bit global GPU address.
3769 */
3770 nir_address_format_64bit_global,
3771
3772 /**
3773 * An address format which is a bounds-checked 64-bit global GPU address.
3774 *
3775 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3776 * address stored with the low bits in .x and high bits in .y, .z is a
3777 * size, and .w is an offset. When the final I/O operation is lowered, .w
3778 * is checked against .z and the operation is predicated on the result.
3779 */
3780 nir_address_format_64bit_bounded_global,
3781
3782 /**
3783 * An address format which is comprised of a vec2 where the first
3784 * component is a buffer index and the second is an offset.
3785 */
3786 nir_address_format_32bit_index_offset,
3787
3788 /**
3789 * An address format which is a simple 32-bit offset.
3790 */
3791 nir_address_format_32bit_offset,
3792
3793 /**
3794 * An address format representing a purely logical addressing model. In
3795 * this model, all deref chains must be complete from the dereference
3796 * operation to the variable. Cast derefs are not allowed. These
3797 * addresses will be 32-bit scalars but the format is immaterial because
3798 * you can always chase the chain.
3799 */
3800 nir_address_format_logical,
3801 } nir_address_format;
3802
3803 static inline unsigned
3804 nir_address_format_bit_size(nir_address_format addr_format)
3805 {
3806 switch (addr_format) {
3807 case nir_address_format_32bit_global: return 32;
3808 case nir_address_format_64bit_global: return 64;
3809 case nir_address_format_64bit_bounded_global: return 32;
3810 case nir_address_format_32bit_index_offset: return 32;
3811 case nir_address_format_32bit_offset: return 32;
3812 case nir_address_format_logical: return 32;
3813 }
3814 unreachable("Invalid address format");
3815 }
3816
3817 static inline unsigned
3818 nir_address_format_num_components(nir_address_format addr_format)
3819 {
3820 switch (addr_format) {
3821 case nir_address_format_32bit_global: return 1;
3822 case nir_address_format_64bit_global: return 1;
3823 case nir_address_format_64bit_bounded_global: return 4;
3824 case nir_address_format_32bit_index_offset: return 2;
3825 case nir_address_format_32bit_offset: return 1;
3826 case nir_address_format_logical: return 1;
3827 }
3828 unreachable("Invalid address format");
3829 }
3830
3831 static inline const struct glsl_type *
3832 nir_address_format_to_glsl_type(nir_address_format addr_format)
3833 {
3834 unsigned bit_size = nir_address_format_bit_size(addr_format);
3835 assert(bit_size == 32 || bit_size == 64);
3836 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3837 nir_address_format_num_components(addr_format));
3838 }
3839
3840 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3841
3842 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3843 nir_address_format addr_format);
3844
3845 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3846 nir_address_format addr_format);
3847
3848 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3849 nir_deref_instr *deref,
3850 nir_ssa_def *base_addr,
3851 nir_address_format addr_format);
3852 void nir_lower_explicit_io_instr(struct nir_builder *b,
3853 nir_intrinsic_instr *io_instr,
3854 nir_ssa_def *addr,
3855 nir_address_format addr_format);
3856
3857 bool nir_lower_explicit_io(nir_shader *shader,
3858 nir_variable_mode modes,
3859 nir_address_format);
3860
3861 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3862 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3863
3864 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3865
3866 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3867 bool nir_lower_regs_to_ssa(nir_shader *shader);
3868 bool nir_lower_vars_to_ssa(nir_shader *shader);
3869
3870 bool nir_remove_dead_derefs(nir_shader *shader);
3871 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3872 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3873 bool nir_lower_variable_initializers(nir_shader *shader,
3874 nir_variable_mode modes);
3875
3876 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3877 bool nir_lower_vec_to_movs(nir_shader *shader);
3878 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3879 bool alpha_to_one,
3880 const gl_state_index16 *alpha_ref_state_tokens);
3881 bool nir_lower_alu(nir_shader *shader);
3882
3883 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3884 bool always_precise, bool have_ffma);
3885
3886 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3887 bool nir_lower_bool_to_bitsize(nir_shader *shader);
3888 bool nir_lower_bool_to_float(nir_shader *shader);
3889 bool nir_lower_bool_to_int32(nir_shader *shader);
3890 bool nir_lower_int_to_float(nir_shader *shader);
3891 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3892 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3893 bool nir_lower_phis_to_scalar(nir_shader *shader);
3894 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3895 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3896 bool outputs_only);
3897 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3898 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3899 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3900
3901 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3902 void nir_lower_viewport_transform(nir_shader *shader);
3903 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3904
3905 typedef struct nir_lower_subgroups_options {
3906 uint8_t subgroup_size;
3907 uint8_t ballot_bit_size;
3908 bool lower_to_scalar:1;
3909 bool lower_vote_trivial:1;
3910 bool lower_vote_eq_to_ballot:1;
3911 bool lower_subgroup_masks:1;
3912 bool lower_shuffle:1;
3913 bool lower_shuffle_to_32bit:1;
3914 bool lower_quad:1;
3915 bool lower_quad_broadcast_dynamic:1;
3916 bool lower_quad_broadcast_dynamic_to_const:1;
3917 } nir_lower_subgroups_options;
3918
3919 bool nir_lower_subgroups(nir_shader *shader,
3920 const nir_lower_subgroups_options *options);
3921
3922 bool nir_lower_system_values(nir_shader *shader);
3923
3924 enum PACKED nir_lower_tex_packing {
3925 nir_lower_tex_packing_none = 0,
3926 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3927 * or unsigned ints based on the sampler type
3928 */
3929 nir_lower_tex_packing_16,
3930 /* The sampler returns 1 32-bit word of 4x8 unorm */
3931 nir_lower_tex_packing_8,
3932 };
3933
3934 typedef struct nir_lower_tex_options {
3935 /**
3936 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3937 * sampler types a texture projector is lowered.
3938 */
3939 unsigned lower_txp;
3940
3941 /**
3942 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3943 */
3944 bool lower_txf_offset;
3945
3946 /**
3947 * If true, lower away nir_tex_src_offset for all rect textures.
3948 */
3949 bool lower_rect_offset;
3950
3951 /**
3952 * If true, lower rect textures to 2D, using txs to fetch the
3953 * texture dimensions and dividing the texture coords by the
3954 * texture dims to normalize.
3955 */
3956 bool lower_rect;
3957
3958 /**
3959 * If true, convert yuv to rgb.
3960 */
3961 unsigned lower_y_uv_external;
3962 unsigned lower_y_u_v_external;
3963 unsigned lower_yx_xuxv_external;
3964 unsigned lower_xy_uxvx_external;
3965 unsigned lower_ayuv_external;
3966 unsigned lower_xyuv_external;
3967
3968 /**
3969 * To emulate certain texture wrap modes, this can be used
3970 * to saturate the specified tex coord to [0.0, 1.0]. The
3971 * bits are according to sampler #, ie. if, for example:
3972 *
3973 * (conf->saturate_s & (1 << n))
3974 *
3975 * is true, then the s coord for sampler n is saturated.
3976 *
3977 * Note that clamping must happen *after* projector lowering
3978 * so any projected texture sample instruction with a clamped
3979 * coordinate gets automatically lowered, regardless of the
3980 * 'lower_txp' setting.
3981 */
3982 unsigned saturate_s;
3983 unsigned saturate_t;
3984 unsigned saturate_r;
3985
3986 /* Bitmask of textures that need swizzling.
3987 *
3988 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3989 * swizzles[texture_index] is applied to the result of the texturing
3990 * operation.
3991 */
3992 unsigned swizzle_result;
3993
3994 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3995 * while 4 and 5 represent 0 and 1 respectively.
3996 */
3997 uint8_t swizzles[32][4];
3998
3999 /* Can be used to scale sampled values in range required by the format. */
4000 float scale_factors[32];
4001
4002 /**
4003 * Bitmap of textures that need srgb to linear conversion. If
4004 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4005 * of the texture are lowered to linear.
4006 */
4007 unsigned lower_srgb;
4008
4009 /**
4010 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4011 * LODs to nir_texop_txl.
4012 */
4013 bool lower_tex_without_implicit_lod;
4014
4015 /**
4016 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4017 */
4018 bool lower_txd_cube_map;
4019
4020 /**
4021 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4022 */
4023 bool lower_txd_3d;
4024
4025 /**
4026 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4027 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4028 * with lower_txd_cube_map.
4029 */
4030 bool lower_txd_shadow;
4031
4032 /**
4033 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4034 * Implies lower_txd_cube_map and lower_txd_shadow.
4035 */
4036 bool lower_txd;
4037
4038 /**
4039 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4040 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4041 */
4042 bool lower_txb_shadow_clamp;
4043
4044 /**
4045 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4046 * with nir_texop_txl. This includes cube maps.
4047 */
4048 bool lower_txd_shadow_clamp;
4049
4050 /**
4051 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4052 * with nir_texop_txl. This includes cube maps.
4053 */
4054 bool lower_txd_offset_clamp;
4055
4056 /**
4057 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4058 * sampler is bindless.
4059 */
4060 bool lower_txd_clamp_bindless_sampler;
4061
4062 /**
4063 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4064 * sampler index is not statically determinable to be less than 16.
4065 */
4066 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4067
4068 /**
4069 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4070 * 0-lod followed by a nir_ishr.
4071 */
4072 bool lower_txs_lod;
4073
4074 /**
4075 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4076 * mixed-up tg4 locations.
4077 */
4078 bool lower_tg4_broadcom_swizzle;
4079
4080 /**
4081 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4082 */
4083 bool lower_tg4_offsets;
4084
4085 enum nir_lower_tex_packing lower_tex_packing[32];
4086 } nir_lower_tex_options;
4087
4088 bool nir_lower_tex(nir_shader *shader,
4089 const nir_lower_tex_options *options);
4090
4091 enum nir_lower_non_uniform_access_type {
4092 nir_lower_non_uniform_ubo_access = (1 << 0),
4093 nir_lower_non_uniform_ssbo_access = (1 << 1),
4094 nir_lower_non_uniform_texture_access = (1 << 2),
4095 nir_lower_non_uniform_image_access = (1 << 3),
4096 };
4097
4098 bool nir_lower_non_uniform_access(nir_shader *shader,
4099 enum nir_lower_non_uniform_access_type);
4100
4101 enum nir_lower_idiv_path {
4102 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4103 * the two but it is not exact in some cases (for example, 1091317713u /
4104 * 1034u gives 5209173 instead of 1055432) */
4105 nir_lower_idiv_fast,
4106 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4107 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4108 * the nv50 path and many of them are integer multiplications, so it is
4109 * probably slower. It should always return the correct result, though. */
4110 nir_lower_idiv_precise,
4111 };
4112
4113 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4114
4115 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4116
4117 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4118 bool use_vars,
4119 bool use_clipdist_array,
4120 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4121 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4122 bool use_clipdist_array,
4123 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4124 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4125 bool use_clipdist_array);
4126 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4127
4128 void nir_lower_point_size_mov(nir_shader *shader,
4129 const gl_state_index16 *pointsize_state_tokens);
4130
4131 bool nir_lower_frexp(nir_shader *nir);
4132
4133 void nir_lower_two_sided_color(nir_shader *shader);
4134
4135 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4136
4137 bool nir_lower_flatshade(nir_shader *shader);
4138
4139 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4140 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4141 const gl_state_index16 *uniform_state_tokens);
4142
4143 typedef struct nir_lower_wpos_ytransform_options {
4144 gl_state_index16 state_tokens[STATE_LENGTH];
4145 bool fs_coord_origin_upper_left :1;
4146 bool fs_coord_origin_lower_left :1;
4147 bool fs_coord_pixel_center_integer :1;
4148 bool fs_coord_pixel_center_half_integer :1;
4149 } nir_lower_wpos_ytransform_options;
4150
4151 bool nir_lower_wpos_ytransform(nir_shader *shader,
4152 const nir_lower_wpos_ytransform_options *options);
4153 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4154
4155 bool nir_lower_fb_read(nir_shader *shader);
4156
4157 typedef struct nir_lower_drawpixels_options {
4158 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4159 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4160 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4161 unsigned drawpix_sampler;
4162 unsigned pixelmap_sampler;
4163 bool pixel_maps :1;
4164 bool scale_and_bias :1;
4165 } nir_lower_drawpixels_options;
4166
4167 void nir_lower_drawpixels(nir_shader *shader,
4168 const nir_lower_drawpixels_options *options);
4169
4170 typedef struct nir_lower_bitmap_options {
4171 unsigned sampler;
4172 bool swizzle_xxxx;
4173 } nir_lower_bitmap_options;
4174
4175 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4176
4177 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4178
4179 typedef enum {
4180 nir_lower_int_source_mods = 1 << 0,
4181 nir_lower_float_source_mods = 1 << 1,
4182 nir_lower_triop_abs = 1 << 2,
4183 nir_lower_all_source_mods = (1 << 3) - 1
4184 } nir_lower_to_source_mods_flags;
4185
4186
4187 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4188
4189 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4190
4191 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4192
4193 bool nir_lower_bit_size(nir_shader *shader,
4194 nir_lower_bit_size_callback callback,
4195 void *callback_data);
4196
4197 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4198 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4199
4200 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4201 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4202 nir_lower_doubles_options options);
4203 bool nir_lower_pack(nir_shader *shader);
4204
4205 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4206
4207 typedef enum {
4208 nir_lower_interpolation_at_sample = (1 << 1),
4209 nir_lower_interpolation_at_offset = (1 << 2),
4210 nir_lower_interpolation_centroid = (1 << 3),
4211 nir_lower_interpolation_pixel = (1 << 4),
4212 nir_lower_interpolation_sample = (1 << 5),
4213 } nir_lower_interpolation_options;
4214
4215 bool nir_lower_interpolation(nir_shader *shader,
4216 nir_lower_interpolation_options options);
4217
4218 bool nir_lower_discard_to_demote(nir_shader *shader);
4219
4220 bool nir_normalize_cubemap_coords(nir_shader *shader);
4221
4222 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4223
4224 void nir_loop_analyze_impl(nir_function_impl *impl,
4225 nir_variable_mode indirect_mask);
4226
4227 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4228
4229 bool nir_repair_ssa_impl(nir_function_impl *impl);
4230 bool nir_repair_ssa(nir_shader *shader);
4231
4232 void nir_convert_loop_to_lcssa(nir_loop *loop);
4233 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4234 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4235
4236 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4237 * registers. If false, convert all values (even those not involved in a phi
4238 * node) to registers.
4239 */
4240 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4241
4242 bool nir_lower_phis_to_regs_block(nir_block *block);
4243 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4244 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4245
4246 bool nir_lower_samplers(nir_shader *shader);
4247 bool nir_lower_ssbo(nir_shader *shader);
4248
4249 /* This is here for unit tests. */
4250 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4251
4252 bool nir_opt_comparison_pre(nir_shader *shader);
4253
4254 bool nir_opt_access(nir_shader *shader);
4255 bool nir_opt_algebraic(nir_shader *shader);
4256 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4257 bool nir_opt_algebraic_late(nir_shader *shader);
4258 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4259 bool nir_opt_constant_folding(nir_shader *shader);
4260
4261 /* Try to combine a and b into a. Return true if combination was possible,
4262 * which will result in b being removed by the pass. Return false if
4263 * combination wasn't possible.
4264 */
4265 typedef bool (*nir_combine_memory_barrier_cb)(
4266 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4267
4268 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4269 nir_combine_memory_barrier_cb combine_cb,
4270 void *data);
4271
4272 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4273
4274 bool nir_copy_prop(nir_shader *shader);
4275
4276 bool nir_opt_copy_prop_vars(nir_shader *shader);
4277
4278 bool nir_opt_cse(nir_shader *shader);
4279
4280 bool nir_opt_dce(nir_shader *shader);
4281
4282 bool nir_opt_dead_cf(nir_shader *shader);
4283
4284 bool nir_opt_dead_write_vars(nir_shader *shader);
4285
4286 bool nir_opt_deref_impl(nir_function_impl *impl);
4287 bool nir_opt_deref(nir_shader *shader);
4288
4289 bool nir_opt_find_array_copies(nir_shader *shader);
4290
4291 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4292
4293 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4294
4295 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4296
4297 bool nir_opt_intrinsics(nir_shader *shader);
4298
4299 bool nir_opt_large_constants(nir_shader *shader,
4300 glsl_type_size_align_func size_align,
4301 unsigned threshold);
4302
4303 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4304
4305 typedef enum {
4306 nir_move_const_undef = (1 << 0),
4307 nir_move_load_ubo = (1 << 1),
4308 nir_move_load_input = (1 << 2),
4309 nir_move_comparisons = (1 << 3),
4310 nir_move_copies = (1 << 4),
4311 } nir_move_options;
4312
4313 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4314
4315 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4316
4317 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4318
4319 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4320 bool indirect_load_ok, bool expensive_alu_ok);
4321
4322 bool nir_opt_rematerialize_compares(nir_shader *shader);
4323
4324 bool nir_opt_remove_phis(nir_shader *shader);
4325 bool nir_opt_remove_phis_block(nir_block *block);
4326
4327 bool nir_opt_shrink_load(nir_shader *shader);
4328
4329 bool nir_opt_trivial_continues(nir_shader *shader);
4330
4331 bool nir_opt_undef(nir_shader *shader);
4332
4333 bool nir_opt_vectorize(nir_shader *shader);
4334
4335 bool nir_opt_conditional_discard(nir_shader *shader);
4336
4337 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4338 unsigned num_components, unsigned high_offset,
4339 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4340
4341 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4342 nir_should_vectorize_mem_func callback);
4343
4344 void nir_schedule(nir_shader *shader, int threshold);
4345
4346 void nir_strip(nir_shader *shader);
4347
4348 void nir_sweep(nir_shader *shader);
4349
4350 void nir_remap_dual_slot_attributes(nir_shader *shader,
4351 uint64_t *dual_slot_inputs);
4352 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4353
4354 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4355 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4356
4357 static inline bool
4358 nir_variable_is_in_ubo(const nir_variable *var)
4359 {
4360 return (var->data.mode == nir_var_mem_ubo &&
4361 var->interface_type != NULL);
4362 }
4363
4364 static inline bool
4365 nir_variable_is_in_ssbo(const nir_variable *var)
4366 {
4367 return (var->data.mode == nir_var_mem_ssbo &&
4368 var->interface_type != NULL);
4369 }
4370
4371 static inline bool
4372 nir_variable_is_in_block(const nir_variable *var)
4373 {
4374 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4375 }
4376
4377 #ifdef __cplusplus
4378 } /* extern "C" */
4379 #endif
4380
4381 #endif /* NIR_H */