nir: Add a 8-bit bool type
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint8_t nir_component_mask_t;
65
66 /** Defines a cast function
67 *
68 * This macro defines a cast function from in_type to out_type where
69 * out_type is some structure type that contains a field of type out_type.
70 *
71 * Note that you have to be a bit careful as the generated cast function
72 * destroys constness.
73 */
74 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
75 type_field, type_value) \
76 static inline out_type * \
77 name(const in_type *parent) \
78 { \
79 assert(parent && parent->type_field == type_value); \
80 return exec_node_data(out_type, parent, field); \
81 }
82
83 struct nir_function;
84 struct nir_shader;
85 struct nir_instr;
86 struct nir_builder;
87
88
89 /**
90 * Description of built-in state associated with a uniform
91 *
92 * \sa nir_variable::state_slots
93 */
94 typedef struct {
95 gl_state_index16 tokens[STATE_LENGTH];
96 uint16_t swizzle;
97 } nir_state_slot;
98
99 typedef enum {
100 nir_var_shader_in = (1 << 0),
101 nir_var_shader_out = (1 << 1),
102 nir_var_shader_temp = (1 << 2),
103 nir_var_function_temp = (1 << 3),
104 nir_var_uniform = (1 << 4),
105 nir_var_mem_ubo = (1 << 5),
106 nir_var_system_value = (1 << 6),
107 nir_var_mem_ssbo = (1 << 7),
108 nir_var_mem_shared = (1 << 8),
109 nir_var_mem_global = (1 << 9),
110 nir_var_all = (1 << 10) - 1,
111 } nir_variable_mode;
112
113 /**
114 * Rounding modes.
115 */
116 typedef enum {
117 nir_rounding_mode_undef = 0,
118 nir_rounding_mode_rtne = 1, /* round to nearest even */
119 nir_rounding_mode_ru = 2, /* round up */
120 nir_rounding_mode_rd = 3, /* round down */
121 nir_rounding_mode_rtz = 4, /* round towards zero */
122 } nir_rounding_mode;
123
124 typedef union {
125 bool b;
126 float f32;
127 double f64;
128 int8_t i8;
129 uint8_t u8;
130 int16_t i16;
131 uint16_t u16;
132 int32_t i32;
133 uint32_t u32;
134 int64_t i64;
135 uint64_t u64;
136 } nir_const_value;
137
138 #define nir_const_value_to_array(arr, c, components, m) \
139 { \
140 for (unsigned i = 0; i < components; ++i) \
141 arr[i] = c[i].m; \
142 } while (false)
143
144 static inline nir_const_value
145 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
146 {
147 nir_const_value v;
148 memset(&v, 0, sizeof(v));
149
150 switch (bit_size) {
151 case 1: v.b = x; break;
152 case 8: v.u8 = x; break;
153 case 16: v.u16 = x; break;
154 case 32: v.u32 = x; break;
155 case 64: v.u64 = x; break;
156 default:
157 unreachable("Invalid bit size");
158 }
159
160 return v;
161 }
162
163 static inline nir_const_value
164 nir_const_value_for_int(int64_t i, unsigned bit_size)
165 {
166 nir_const_value v;
167 memset(&v, 0, sizeof(v));
168
169 assert(bit_size <= 64);
170 if (bit_size < 64) {
171 assert(i >= (-(1ll << (bit_size - 1))));
172 assert(i < (1ll << (bit_size - 1)));
173 }
174
175 return nir_const_value_for_raw_uint(i, bit_size);
176 }
177
178 static inline nir_const_value
179 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
180 {
181 nir_const_value v;
182 memset(&v, 0, sizeof(v));
183
184 assert(bit_size <= 64);
185 if (bit_size < 64)
186 assert(u < (1ull << bit_size));
187
188 return nir_const_value_for_raw_uint(u, bit_size);
189 }
190
191 static inline nir_const_value
192 nir_const_value_for_bool(bool b, unsigned bit_size)
193 {
194 /* Booleans use a 0/-1 convention */
195 return nir_const_value_for_int(-(int)b, bit_size);
196 }
197
198 /* This one isn't inline because it requires half-float conversion */
199 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
200
201 static inline int64_t
202 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
203 {
204 switch (bit_size) {
205 /* int1_t uses 0/-1 convention */
206 case 1: return -(int)value.b;
207 case 8: return value.i8;
208 case 16: return value.i16;
209 case 32: return value.i32;
210 case 64: return value.i64;
211 default:
212 unreachable("Invalid bit size");
213 }
214 }
215
216 static inline uint64_t
217 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
218 {
219 switch (bit_size) {
220 case 1: return value.b;
221 case 8: return value.u8;
222 case 16: return value.u16;
223 case 32: return value.u32;
224 case 64: return value.u64;
225 default:
226 unreachable("Invalid bit size");
227 }
228 }
229
230 static inline bool
231 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
232 {
233 int64_t i = nir_const_value_as_int(value, bit_size);
234
235 /* Booleans of any size use 0/-1 convention */
236 assert(i == 0 || i == -1);
237
238 return i;
239 }
240
241 /* This one isn't inline because it requires half-float conversion */
242 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
243
244 typedef struct nir_constant {
245 /**
246 * Value of the constant.
247 *
248 * The field used to back the values supplied by the constant is determined
249 * by the type associated with the \c nir_variable. Constants may be
250 * scalars, vectors, or matrices.
251 */
252 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
253
254 /* we could get this from the var->type but makes clone *much* easier to
255 * not have to care about the type.
256 */
257 unsigned num_elements;
258
259 /* Array elements / Structure Fields */
260 struct nir_constant **elements;
261 } nir_constant;
262
263 /**
264 * \brief Layout qualifiers for gl_FragDepth.
265 *
266 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
267 * with a layout qualifier.
268 */
269 typedef enum {
270 nir_depth_layout_none, /**< No depth layout is specified. */
271 nir_depth_layout_any,
272 nir_depth_layout_greater,
273 nir_depth_layout_less,
274 nir_depth_layout_unchanged
275 } nir_depth_layout;
276
277 /**
278 * Enum keeping track of how a variable was declared.
279 */
280 typedef enum {
281 /**
282 * Normal declaration.
283 */
284 nir_var_declared_normally = 0,
285
286 /**
287 * Variable is implicitly generated by the compiler and should not be
288 * visible via the API.
289 */
290 nir_var_hidden,
291 } nir_var_declaration_type;
292
293 /**
294 * Either a uniform, global variable, shader input, or shader output. Based on
295 * ir_variable - it should be easy to translate between the two.
296 */
297
298 typedef struct nir_variable {
299 struct exec_node node;
300
301 /**
302 * Declared type of the variable
303 */
304 const struct glsl_type *type;
305
306 /**
307 * Declared name of the variable
308 */
309 char *name;
310
311 struct nir_variable_data {
312 /**
313 * Storage class of the variable.
314 *
315 * \sa nir_variable_mode
316 */
317 nir_variable_mode mode:10;
318
319 /**
320 * Is the variable read-only?
321 *
322 * This is set for variables declared as \c const, shader inputs,
323 * and uniforms.
324 */
325 unsigned read_only:1;
326 unsigned centroid:1;
327 unsigned sample:1;
328 unsigned patch:1;
329 unsigned invariant:1;
330
331 /**
332 * Can this variable be coalesced with another?
333 *
334 * This is set by nir_lower_io_to_temporaries to say that any
335 * copies involving this variable should stay put. Propagating it can
336 * duplicate the resulting load/store, which is not wanted, and may
337 * result in a load/store of the variable with an indirect offset which
338 * the backend may not be able to handle.
339 */
340 unsigned cannot_coalesce:1;
341
342 /**
343 * When separate shader programs are enabled, only input/outputs between
344 * the stages of a multi-stage separate program can be safely removed
345 * from the shader interface. Other input/outputs must remains active.
346 *
347 * This is also used to make sure xfb varyings that are unused by the
348 * fragment shader are not removed.
349 */
350 unsigned always_active_io:1;
351
352 /**
353 * Interpolation mode for shader inputs / outputs
354 *
355 * \sa glsl_interp_mode
356 */
357 unsigned interpolation:2;
358
359 /**
360 * If non-zero, then this variable may be packed along with other variables
361 * into a single varying slot, so this offset should be applied when
362 * accessing components. For example, an offset of 1 means that the x
363 * component of this variable is actually stored in component y of the
364 * location specified by \c location.
365 */
366 unsigned location_frac:2;
367
368 /**
369 * If true, this variable represents an array of scalars that should
370 * be tightly packed. In other words, consecutive array elements
371 * should be stored one component apart, rather than one slot apart.
372 */
373 unsigned compact:1;
374
375 /**
376 * Whether this is a fragment shader output implicitly initialized with
377 * the previous contents of the specified render target at the
378 * framebuffer location corresponding to this shader invocation.
379 */
380 unsigned fb_fetch_output:1;
381
382 /**
383 * Non-zero if this variable is considered bindless as defined by
384 * ARB_bindless_texture.
385 */
386 unsigned bindless:1;
387
388 /**
389 * Was an explicit binding set in the shader?
390 */
391 unsigned explicit_binding:1;
392
393 /**
394 * Was a transfer feedback buffer set in the shader?
395 */
396 unsigned explicit_xfb_buffer:1;
397
398 /**
399 * Was a transfer feedback stride set in the shader?
400 */
401 unsigned explicit_xfb_stride:1;
402
403 /**
404 * Was an explicit offset set in the shader?
405 */
406 unsigned explicit_offset:1;
407
408 /**
409 * How the variable was declared. See nir_var_declaration_type.
410 *
411 * This is used to detect variables generated by the compiler, so should
412 * not be visible via the API.
413 */
414 unsigned how_declared:2;
415
416 /**
417 * \brief Layout qualifier for gl_FragDepth.
418 *
419 * This is not equal to \c ir_depth_layout_none if and only if this
420 * variable is \c gl_FragDepth and a layout qualifier is specified.
421 */
422 nir_depth_layout depth_layout:3;
423
424 /**
425 * Vertex stream output identifier.
426 *
427 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
428 * indicate the stream of the i-th component.
429 */
430 unsigned stream:9;
431
432 /**
433 * Access flags for memory variables (SSBO/global), image uniforms, and
434 * bindless images in uniforms/inputs/outputs.
435 */
436 enum gl_access_qualifier access:8;
437
438 /**
439 * Descriptor set binding for sampler or UBO.
440 */
441 unsigned descriptor_set:5;
442
443 /**
444 * output index for dual source blending.
445 */
446 unsigned index;
447
448 /**
449 * Initial binding point for a sampler or UBO.
450 *
451 * For array types, this represents the binding point for the first element.
452 */
453 unsigned binding;
454
455 /**
456 * Storage location of the base of this variable
457 *
458 * The precise meaning of this field depends on the nature of the variable.
459 *
460 * - Vertex shader input: one of the values from \c gl_vert_attrib.
461 * - Vertex shader output: one of the values from \c gl_varying_slot.
462 * - Geometry shader input: one of the values from \c gl_varying_slot.
463 * - Geometry shader output: one of the values from \c gl_varying_slot.
464 * - Fragment shader input: one of the values from \c gl_varying_slot.
465 * - Fragment shader output: one of the values from \c gl_frag_result.
466 * - Uniforms: Per-stage uniform slot number for default uniform block.
467 * - Uniforms: Index within the uniform block definition for UBO members.
468 * - Non-UBO Uniforms: uniform slot number.
469 * - Other: This field is not currently used.
470 *
471 * If the variable is a uniform, shader input, or shader output, and the
472 * slot has not been assigned, the value will be -1.
473 */
474 int location;
475
476 /**
477 * The actual location of the variable in the IR. Only valid for inputs,
478 * outputs, and uniforms (including samplers and images).
479 */
480 unsigned driver_location;
481
482 /**
483 * Location an atomic counter or transform feedback is stored at.
484 */
485 unsigned offset;
486
487 union {
488 struct {
489 /** Image internal format if specified explicitly, otherwise GL_NONE. */
490 uint16_t format; /* GLenum */
491 } image;
492
493 struct {
494 /**
495 * Transform feedback buffer.
496 */
497 uint16_t buffer:2;
498
499 /**
500 * Transform feedback stride.
501 */
502 uint16_t stride;
503 } xfb;
504 };
505 } data;
506
507 /* Number of nir_variable_data members */
508 unsigned num_members;
509
510 /**
511 * Built-in state that backs this uniform
512 *
513 * Once set at variable creation, \c state_slots must remain invariant.
514 * This is because, ideally, this array would be shared by all clones of
515 * this variable in the IR tree. In other words, we'd really like for it
516 * to be a fly-weight.
517 *
518 * If the variable is not a uniform, \c num_state_slots will be zero and
519 * \c state_slots will be \c NULL.
520 */
521 /*@{*/
522 unsigned num_state_slots; /**< Number of state slots used */
523 nir_state_slot *state_slots; /**< State descriptors. */
524 /*@}*/
525
526 /**
527 * Constant expression assigned in the initializer of the variable
528 *
529 * This field should only be used temporarily by creators of NIR shaders
530 * and then lower_constant_initializers can be used to get rid of them.
531 * Most of the rest of NIR ignores this field or asserts that it's NULL.
532 */
533 nir_constant *constant_initializer;
534
535 /**
536 * For variables that are in an interface block or are an instance of an
537 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
538 *
539 * \sa ir_variable::location
540 */
541 const struct glsl_type *interface_type;
542
543 /**
544 * Description of per-member data for per-member struct variables
545 *
546 * This is used for variables which are actually an amalgamation of
547 * multiple entities such as a struct of built-in values or a struct of
548 * inputs each with their own layout specifier. This is only allowed on
549 * variables with a struct or array of array of struct type.
550 */
551 struct nir_variable_data *members;
552 } nir_variable;
553
554 #define nir_foreach_variable(var, var_list) \
555 foreach_list_typed(nir_variable, var, node, var_list)
556
557 #define nir_foreach_variable_safe(var, var_list) \
558 foreach_list_typed_safe(nir_variable, var, node, var_list)
559
560 static inline bool
561 nir_variable_is_global(const nir_variable *var)
562 {
563 return var->data.mode != nir_var_function_temp;
564 }
565
566 typedef struct nir_register {
567 struct exec_node node;
568
569 unsigned num_components; /** < number of vector components */
570 unsigned num_array_elems; /** < size of array (0 for no array) */
571
572 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
573 uint8_t bit_size;
574
575 /** generic register index. */
576 unsigned index;
577
578 /** only for debug purposes, can be NULL */
579 const char *name;
580
581 /** set of nir_srcs where this register is used (read from) */
582 struct list_head uses;
583
584 /** set of nir_dests where this register is defined (written to) */
585 struct list_head defs;
586
587 /** set of nir_ifs where this register is used as a condition */
588 struct list_head if_uses;
589 } nir_register;
590
591 #define nir_foreach_register(reg, reg_list) \
592 foreach_list_typed(nir_register, reg, node, reg_list)
593 #define nir_foreach_register_safe(reg, reg_list) \
594 foreach_list_typed_safe(nir_register, reg, node, reg_list)
595
596 typedef enum PACKED {
597 nir_instr_type_alu,
598 nir_instr_type_deref,
599 nir_instr_type_call,
600 nir_instr_type_tex,
601 nir_instr_type_intrinsic,
602 nir_instr_type_load_const,
603 nir_instr_type_jump,
604 nir_instr_type_ssa_undef,
605 nir_instr_type_phi,
606 nir_instr_type_parallel_copy,
607 } nir_instr_type;
608
609 typedef struct nir_instr {
610 struct exec_node node;
611 struct nir_block *block;
612 nir_instr_type type;
613
614 /* A temporary for optimization and analysis passes to use for storing
615 * flags. For instance, DCE uses this to store the "dead/live" info.
616 */
617 uint8_t pass_flags;
618
619 /** generic instruction index. */
620 unsigned index;
621 } nir_instr;
622
623 static inline nir_instr *
624 nir_instr_next(nir_instr *instr)
625 {
626 struct exec_node *next = exec_node_get_next(&instr->node);
627 if (exec_node_is_tail_sentinel(next))
628 return NULL;
629 else
630 return exec_node_data(nir_instr, next, node);
631 }
632
633 static inline nir_instr *
634 nir_instr_prev(nir_instr *instr)
635 {
636 struct exec_node *prev = exec_node_get_prev(&instr->node);
637 if (exec_node_is_head_sentinel(prev))
638 return NULL;
639 else
640 return exec_node_data(nir_instr, prev, node);
641 }
642
643 static inline bool
644 nir_instr_is_first(const nir_instr *instr)
645 {
646 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
647 }
648
649 static inline bool
650 nir_instr_is_last(const nir_instr *instr)
651 {
652 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
653 }
654
655 typedef struct nir_ssa_def {
656 /** for debugging only, can be NULL */
657 const char* name;
658
659 /** generic SSA definition index. */
660 unsigned index;
661
662 /** Index into the live_in and live_out bitfields */
663 unsigned live_index;
664
665 /** Instruction which produces this SSA value. */
666 nir_instr *parent_instr;
667
668 /** set of nir_instrs where this register is used (read from) */
669 struct list_head uses;
670
671 /** set of nir_ifs where this register is used as a condition */
672 struct list_head if_uses;
673
674 uint8_t num_components;
675
676 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
677 uint8_t bit_size;
678 } nir_ssa_def;
679
680 struct nir_src;
681
682 typedef struct {
683 nir_register *reg;
684 struct nir_src *indirect; /** < NULL for no indirect offset */
685 unsigned base_offset;
686
687 /* TODO use-def chain goes here */
688 } nir_reg_src;
689
690 typedef struct {
691 nir_instr *parent_instr;
692 struct list_head def_link;
693
694 nir_register *reg;
695 struct nir_src *indirect; /** < NULL for no indirect offset */
696 unsigned base_offset;
697
698 /* TODO def-use chain goes here */
699 } nir_reg_dest;
700
701 struct nir_if;
702
703 typedef struct nir_src {
704 union {
705 /** Instruction that consumes this value as a source. */
706 nir_instr *parent_instr;
707 struct nir_if *parent_if;
708 };
709
710 struct list_head use_link;
711
712 union {
713 nir_reg_src reg;
714 nir_ssa_def *ssa;
715 };
716
717 bool is_ssa;
718 } nir_src;
719
720 static inline nir_src
721 nir_src_init(void)
722 {
723 nir_src src = { { NULL } };
724 return src;
725 }
726
727 #define NIR_SRC_INIT nir_src_init()
728
729 #define nir_foreach_use(src, reg_or_ssa_def) \
730 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
731
732 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
733 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
734
735 #define nir_foreach_if_use(src, reg_or_ssa_def) \
736 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
737
738 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
739 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
740
741 typedef struct {
742 union {
743 nir_reg_dest reg;
744 nir_ssa_def ssa;
745 };
746
747 bool is_ssa;
748 } nir_dest;
749
750 static inline nir_dest
751 nir_dest_init(void)
752 {
753 nir_dest dest = { { { NULL } } };
754 return dest;
755 }
756
757 #define NIR_DEST_INIT nir_dest_init()
758
759 #define nir_foreach_def(dest, reg) \
760 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
761
762 #define nir_foreach_def_safe(dest, reg) \
763 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
764
765 static inline nir_src
766 nir_src_for_ssa(nir_ssa_def *def)
767 {
768 nir_src src = NIR_SRC_INIT;
769
770 src.is_ssa = true;
771 src.ssa = def;
772
773 return src;
774 }
775
776 static inline nir_src
777 nir_src_for_reg(nir_register *reg)
778 {
779 nir_src src = NIR_SRC_INIT;
780
781 src.is_ssa = false;
782 src.reg.reg = reg;
783 src.reg.indirect = NULL;
784 src.reg.base_offset = 0;
785
786 return src;
787 }
788
789 static inline nir_dest
790 nir_dest_for_reg(nir_register *reg)
791 {
792 nir_dest dest = NIR_DEST_INIT;
793
794 dest.reg.reg = reg;
795
796 return dest;
797 }
798
799 static inline unsigned
800 nir_src_bit_size(nir_src src)
801 {
802 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
803 }
804
805 static inline unsigned
806 nir_src_num_components(nir_src src)
807 {
808 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
809 }
810
811 static inline bool
812 nir_src_is_const(nir_src src)
813 {
814 return src.is_ssa &&
815 src.ssa->parent_instr->type == nir_instr_type_load_const;
816 }
817
818 static inline unsigned
819 nir_dest_bit_size(nir_dest dest)
820 {
821 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
822 }
823
824 static inline unsigned
825 nir_dest_num_components(nir_dest dest)
826 {
827 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
828 }
829
830 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
831 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
832
833 typedef struct {
834 nir_src src;
835
836 /**
837 * \name input modifiers
838 */
839 /*@{*/
840 /**
841 * For inputs interpreted as floating point, flips the sign bit. For
842 * inputs interpreted as integers, performs the two's complement negation.
843 */
844 bool negate;
845
846 /**
847 * Clears the sign bit for floating point values, and computes the integer
848 * absolute value for integers. Note that the negate modifier acts after
849 * the absolute value modifier, therefore if both are set then all inputs
850 * will become negative.
851 */
852 bool abs;
853 /*@}*/
854
855 /**
856 * For each input component, says which component of the register it is
857 * chosen from. Note that which elements of the swizzle are used and which
858 * are ignored are based on the write mask for most opcodes - for example,
859 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
860 * a swizzle of {2, x, 1, 0} where x means "don't care."
861 */
862 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
863 } nir_alu_src;
864
865 typedef struct {
866 nir_dest dest;
867
868 /**
869 * \name saturate output modifier
870 *
871 * Only valid for opcodes that output floating-point numbers. Clamps the
872 * output to between 0.0 and 1.0 inclusive.
873 */
874
875 bool saturate;
876
877 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
878 } nir_alu_dest;
879
880 /** NIR sized and unsized types
881 *
882 * The values in this enum are carefully chosen so that the sized type is
883 * just the unsized type OR the number of bits.
884 */
885 typedef enum {
886 nir_type_invalid = 0, /* Not a valid type */
887 nir_type_int = 2,
888 nir_type_uint = 4,
889 nir_type_bool = 6,
890 nir_type_float = 128,
891 nir_type_bool1 = 1 | nir_type_bool,
892 nir_type_bool8 = 8 | nir_type_bool,
893 nir_type_bool16 = 16 | nir_type_bool,
894 nir_type_bool32 = 32 | nir_type_bool,
895 nir_type_int1 = 1 | nir_type_int,
896 nir_type_int8 = 8 | nir_type_int,
897 nir_type_int16 = 16 | nir_type_int,
898 nir_type_int32 = 32 | nir_type_int,
899 nir_type_int64 = 64 | nir_type_int,
900 nir_type_uint1 = 1 | nir_type_uint,
901 nir_type_uint8 = 8 | nir_type_uint,
902 nir_type_uint16 = 16 | nir_type_uint,
903 nir_type_uint32 = 32 | nir_type_uint,
904 nir_type_uint64 = 64 | nir_type_uint,
905 nir_type_float16 = 16 | nir_type_float,
906 nir_type_float32 = 32 | nir_type_float,
907 nir_type_float64 = 64 | nir_type_float,
908 } nir_alu_type;
909
910 #define NIR_ALU_TYPE_SIZE_MASK 0x79
911 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
912
913 static inline unsigned
914 nir_alu_type_get_type_size(nir_alu_type type)
915 {
916 return type & NIR_ALU_TYPE_SIZE_MASK;
917 }
918
919 static inline unsigned
920 nir_alu_type_get_base_type(nir_alu_type type)
921 {
922 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
923 }
924
925 static inline nir_alu_type
926 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
927 {
928 switch (base_type) {
929 case GLSL_TYPE_BOOL:
930 return nir_type_bool1;
931 break;
932 case GLSL_TYPE_UINT:
933 return nir_type_uint32;
934 break;
935 case GLSL_TYPE_INT:
936 return nir_type_int32;
937 break;
938 case GLSL_TYPE_UINT16:
939 return nir_type_uint16;
940 break;
941 case GLSL_TYPE_INT16:
942 return nir_type_int16;
943 break;
944 case GLSL_TYPE_UINT8:
945 return nir_type_uint8;
946 case GLSL_TYPE_INT8:
947 return nir_type_int8;
948 case GLSL_TYPE_UINT64:
949 return nir_type_uint64;
950 break;
951 case GLSL_TYPE_INT64:
952 return nir_type_int64;
953 break;
954 case GLSL_TYPE_FLOAT:
955 return nir_type_float32;
956 break;
957 case GLSL_TYPE_FLOAT16:
958 return nir_type_float16;
959 break;
960 case GLSL_TYPE_DOUBLE:
961 return nir_type_float64;
962 break;
963
964 case GLSL_TYPE_SAMPLER:
965 case GLSL_TYPE_IMAGE:
966 case GLSL_TYPE_ATOMIC_UINT:
967 case GLSL_TYPE_STRUCT:
968 case GLSL_TYPE_INTERFACE:
969 case GLSL_TYPE_ARRAY:
970 case GLSL_TYPE_VOID:
971 case GLSL_TYPE_SUBROUTINE:
972 case GLSL_TYPE_FUNCTION:
973 case GLSL_TYPE_ERROR:
974 return nir_type_invalid;
975 }
976
977 unreachable("unknown type");
978 }
979
980 static inline nir_alu_type
981 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
982 {
983 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
984 }
985
986 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
987 nir_rounding_mode rnd);
988
989 static inline nir_op
990 nir_op_vec(unsigned components)
991 {
992 switch (components) {
993 case 1: return nir_op_mov;
994 case 2: return nir_op_vec2;
995 case 3: return nir_op_vec3;
996 case 4: return nir_op_vec4;
997 default: unreachable("bad component count");
998 }
999 }
1000
1001 static inline bool
1002 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1003 {
1004 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1005 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1006 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1007 }
1008
1009 static inline bool
1010 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1011 {
1012 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1013 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1014 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1015 }
1016
1017 static inline bool
1018 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1019 {
1020 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1021 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1022 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1023 }
1024
1025 static inline bool
1026 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1027 {
1028 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1029 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1030 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1031 }
1032
1033 static inline bool
1034 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1035 {
1036 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1037 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1038 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1039 }
1040
1041 static inline bool
1042 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1043 {
1044 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1045 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1046 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1047 }
1048
1049 static inline bool
1050 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1051 {
1052 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1053 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1054 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1055 }
1056
1057 static inline nir_rounding_mode
1058 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1059 nir_alu_type type)
1060 {
1061 if (nir_alu_type_get_base_type(type) != nir_type_float)
1062 return nir_rounding_mode_undef;
1063
1064 unsigned bit_size = nir_alu_type_get_type_size(type);
1065
1066 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1067 return nir_rounding_mode_rtz;
1068 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1069 return nir_rounding_mode_rtne;
1070 return nir_rounding_mode_undef;
1071 }
1072
1073 static inline bool
1074 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1075 {
1076 bool result =
1077 nir_has_any_rounding_mode_rtne(execution_mode) ||
1078 nir_has_any_rounding_mode_rtz(execution_mode);
1079 return result;
1080 }
1081
1082 typedef enum {
1083 /**
1084 * Operation where the first two sources are commutative.
1085 *
1086 * For 2-source operations, this just mathematical commutativity. Some
1087 * 3-source operations, like ffma, are only commutative in the first two
1088 * sources.
1089 */
1090 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1091 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1092 } nir_op_algebraic_property;
1093
1094 typedef struct {
1095 const char *name;
1096
1097 unsigned num_inputs;
1098
1099 /**
1100 * The number of components in the output
1101 *
1102 * If non-zero, this is the size of the output and input sizes are
1103 * explicitly given; swizzle and writemask are still in effect, but if
1104 * the output component is masked out, then the input component may
1105 * still be in use.
1106 *
1107 * If zero, the opcode acts in the standard, per-component manner; the
1108 * operation is performed on each component (except the ones that are
1109 * masked out) with the input being taken from the input swizzle for
1110 * that component.
1111 *
1112 * The size of some of the inputs may be given (i.e. non-zero) even
1113 * though output_size is zero; in that case, the inputs with a zero
1114 * size act per-component, while the inputs with non-zero size don't.
1115 */
1116 unsigned output_size;
1117
1118 /**
1119 * The type of vector that the instruction outputs. Note that the
1120 * staurate modifier is only allowed on outputs with the float type.
1121 */
1122
1123 nir_alu_type output_type;
1124
1125 /**
1126 * The number of components in each input
1127 */
1128 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1129
1130 /**
1131 * The type of vector that each input takes. Note that negate and
1132 * absolute value are only allowed on inputs with int or float type and
1133 * behave differently on the two.
1134 */
1135 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1136
1137 nir_op_algebraic_property algebraic_properties;
1138
1139 /* Whether this represents a numeric conversion opcode */
1140 bool is_conversion;
1141 } nir_op_info;
1142
1143 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1144
1145 typedef struct nir_alu_instr {
1146 nir_instr instr;
1147 nir_op op;
1148
1149 /** Indicates that this ALU instruction generates an exact value
1150 *
1151 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1152 * really equivalent to either. This indicates that the value generated by
1153 * this operation is high-precision and any code transformations that touch
1154 * it must ensure that the resulting value is bit-for-bit identical to the
1155 * original.
1156 */
1157 bool exact:1;
1158
1159 /**
1160 * Indicates that this instruction do not cause wrapping to occur, in the
1161 * form of overflow or underflow.
1162 */
1163 bool no_signed_wrap:1;
1164 bool no_unsigned_wrap:1;
1165
1166 nir_alu_dest dest;
1167 nir_alu_src src[];
1168 } nir_alu_instr;
1169
1170 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1171 nir_alu_instr *instr);
1172 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1173 nir_alu_instr *instr);
1174
1175 /* is this source channel used? */
1176 static inline bool
1177 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1178 unsigned channel)
1179 {
1180 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1181 return channel < nir_op_infos[instr->op].input_sizes[src];
1182
1183 return (instr->dest.write_mask >> channel) & 1;
1184 }
1185
1186 static inline nir_component_mask_t
1187 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1188 {
1189 nir_component_mask_t read_mask = 0;
1190 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1191 if (!nir_alu_instr_channel_used(instr, src, c))
1192 continue;
1193
1194 read_mask |= (1 << instr->src[src].swizzle[c]);
1195 }
1196 return read_mask;
1197 }
1198
1199 /**
1200 * Get the number of channels used for a source
1201 */
1202 static inline unsigned
1203 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1204 {
1205 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1206 return nir_op_infos[instr->op].input_sizes[src];
1207
1208 return nir_dest_num_components(instr->dest.dest);
1209 }
1210
1211 static inline bool
1212 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1213 {
1214 switch (instr->op) {
1215 case nir_op_flt:
1216 case nir_op_fge:
1217 case nir_op_feq:
1218 case nir_op_fne:
1219 case nir_op_ilt:
1220 case nir_op_ult:
1221 case nir_op_ige:
1222 case nir_op_uge:
1223 case nir_op_ieq:
1224 case nir_op_ine:
1225 case nir_op_i2b1:
1226 case nir_op_f2b1:
1227 case nir_op_inot:
1228 return true;
1229 default:
1230 return false;
1231 }
1232 }
1233
1234 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1235 nir_alu_type full_type);
1236
1237 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1238 unsigned src1, unsigned src2);
1239
1240 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1241 const nir_alu_instr *alu2,
1242 unsigned src1, unsigned src2);
1243
1244 typedef enum {
1245 nir_deref_type_var,
1246 nir_deref_type_array,
1247 nir_deref_type_array_wildcard,
1248 nir_deref_type_ptr_as_array,
1249 nir_deref_type_struct,
1250 nir_deref_type_cast,
1251 } nir_deref_type;
1252
1253 typedef struct {
1254 nir_instr instr;
1255
1256 /** The type of this deref instruction */
1257 nir_deref_type deref_type;
1258
1259 /** The mode of the underlying variable */
1260 nir_variable_mode mode;
1261
1262 /** The dereferenced type of the resulting pointer value */
1263 const struct glsl_type *type;
1264
1265 union {
1266 /** Variable being dereferenced if deref_type is a deref_var */
1267 nir_variable *var;
1268
1269 /** Parent deref if deref_type is not deref_var */
1270 nir_src parent;
1271 };
1272
1273 /** Additional deref parameters */
1274 union {
1275 struct {
1276 nir_src index;
1277 } arr;
1278
1279 struct {
1280 unsigned index;
1281 } strct;
1282
1283 struct {
1284 unsigned ptr_stride;
1285 } cast;
1286 };
1287
1288 /** Destination to store the resulting "pointer" */
1289 nir_dest dest;
1290 } nir_deref_instr;
1291
1292 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1293
1294 static inline nir_deref_instr *
1295 nir_deref_instr_parent(const nir_deref_instr *instr)
1296 {
1297 if (instr->deref_type == nir_deref_type_var)
1298 return NULL;
1299 else
1300 return nir_src_as_deref(instr->parent);
1301 }
1302
1303 static inline nir_variable *
1304 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1305 {
1306 while (instr->deref_type != nir_deref_type_var) {
1307 if (instr->deref_type == nir_deref_type_cast)
1308 return NULL;
1309
1310 instr = nir_deref_instr_parent(instr);
1311 }
1312
1313 return instr->var;
1314 }
1315
1316 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1317 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1318 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1319
1320 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1321
1322 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1323
1324 typedef struct {
1325 nir_instr instr;
1326
1327 struct nir_function *callee;
1328
1329 unsigned num_params;
1330 nir_src params[];
1331 } nir_call_instr;
1332
1333 #include "nir_intrinsics.h"
1334
1335 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1336
1337 /** Represents an intrinsic
1338 *
1339 * An intrinsic is an instruction type for handling things that are
1340 * more-or-less regular operations but don't just consume and produce SSA
1341 * values like ALU operations do. Intrinsics are not for things that have
1342 * special semantic meaning such as phi nodes and parallel copies.
1343 * Examples of intrinsics include variable load/store operations, system
1344 * value loads, and the like. Even though texturing more-or-less falls
1345 * under this category, texturing is its own instruction type because
1346 * trying to represent texturing with intrinsics would lead to a
1347 * combinatorial explosion of intrinsic opcodes.
1348 *
1349 * By having a single instruction type for handling a lot of different
1350 * cases, optimization passes can look for intrinsics and, for the most
1351 * part, completely ignore them. Each intrinsic type also has a few
1352 * possible flags that govern whether or not they can be reordered or
1353 * eliminated. That way passes like dead code elimination can still work
1354 * on intrisics without understanding the meaning of each.
1355 *
1356 * Each intrinsic has some number of constant indices, some number of
1357 * variables, and some number of sources. What these sources, variables,
1358 * and indices mean depends on the intrinsic and is documented with the
1359 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1360 * instructions are the only types of instruction that can operate on
1361 * variables.
1362 */
1363 typedef struct {
1364 nir_instr instr;
1365
1366 nir_intrinsic_op intrinsic;
1367
1368 nir_dest dest;
1369
1370 /** number of components if this is a vectorized intrinsic
1371 *
1372 * Similarly to ALU operations, some intrinsics are vectorized.
1373 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1374 * For vectorized intrinsics, the num_components field specifies the
1375 * number of destination components and the number of source components
1376 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1377 */
1378 uint8_t num_components;
1379
1380 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1381
1382 nir_src src[];
1383 } nir_intrinsic_instr;
1384
1385 static inline nir_variable *
1386 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1387 {
1388 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1389 }
1390
1391 typedef enum {
1392 /* Memory ordering. */
1393 NIR_MEMORY_ACQUIRE = 1 << 0,
1394 NIR_MEMORY_RELEASE = 1 << 1,
1395
1396 /* Memory visibility operations. */
1397 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1398 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1399 } nir_memory_semantics;
1400
1401 typedef enum {
1402 NIR_SCOPE_DEVICE,
1403 NIR_SCOPE_QUEUE_FAMILY,
1404 NIR_SCOPE_WORKGROUP,
1405 NIR_SCOPE_SUBGROUP,
1406 NIR_SCOPE_INVOCATION,
1407 } nir_scope;
1408
1409 /**
1410 * \name NIR intrinsics semantic flags
1411 *
1412 * information about what the compiler can do with the intrinsics.
1413 *
1414 * \sa nir_intrinsic_info::flags
1415 */
1416 typedef enum {
1417 /**
1418 * whether the intrinsic can be safely eliminated if none of its output
1419 * value is not being used.
1420 */
1421 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1422
1423 /**
1424 * Whether the intrinsic can be reordered with respect to any other
1425 * intrinsic, i.e. whether the only reordering dependencies of the
1426 * intrinsic are due to the register reads/writes.
1427 */
1428 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1429 } nir_intrinsic_semantic_flag;
1430
1431 /**
1432 * \name NIR intrinsics const-index flag
1433 *
1434 * Indicates the usage of a const_index slot.
1435 *
1436 * \sa nir_intrinsic_info::index_map
1437 */
1438 typedef enum {
1439 /**
1440 * Generally instructions that take a offset src argument, can encode
1441 * a constant 'base' value which is added to the offset.
1442 */
1443 NIR_INTRINSIC_BASE = 1,
1444
1445 /**
1446 * For store instructions, a writemask for the store.
1447 */
1448 NIR_INTRINSIC_WRMASK,
1449
1450 /**
1451 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1452 */
1453 NIR_INTRINSIC_STREAM_ID,
1454
1455 /**
1456 * The clip-plane id for load_user_clip_plane intrinsic.
1457 */
1458 NIR_INTRINSIC_UCP_ID,
1459
1460 /**
1461 * The amount of data, starting from BASE, that this instruction may
1462 * access. This is used to provide bounds if the offset is not constant.
1463 */
1464 NIR_INTRINSIC_RANGE,
1465
1466 /**
1467 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1468 */
1469 NIR_INTRINSIC_DESC_SET,
1470
1471 /**
1472 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1473 */
1474 NIR_INTRINSIC_BINDING,
1475
1476 /**
1477 * Component offset.
1478 */
1479 NIR_INTRINSIC_COMPONENT,
1480
1481 /**
1482 * Interpolation mode (only meaningful for FS inputs).
1483 */
1484 NIR_INTRINSIC_INTERP_MODE,
1485
1486 /**
1487 * A binary nir_op to use when performing a reduction or scan operation
1488 */
1489 NIR_INTRINSIC_REDUCTION_OP,
1490
1491 /**
1492 * Cluster size for reduction operations
1493 */
1494 NIR_INTRINSIC_CLUSTER_SIZE,
1495
1496 /**
1497 * Parameter index for a load_param intrinsic
1498 */
1499 NIR_INTRINSIC_PARAM_IDX,
1500
1501 /**
1502 * Image dimensionality for image intrinsics
1503 *
1504 * One of GLSL_SAMPLER_DIM_*
1505 */
1506 NIR_INTRINSIC_IMAGE_DIM,
1507
1508 /**
1509 * Non-zero if we are accessing an array image
1510 */
1511 NIR_INTRINSIC_IMAGE_ARRAY,
1512
1513 /**
1514 * Image format for image intrinsics
1515 */
1516 NIR_INTRINSIC_FORMAT,
1517
1518 /**
1519 * Access qualifiers for image and memory access intrinsics
1520 */
1521 NIR_INTRINSIC_ACCESS,
1522
1523 /**
1524 * Alignment for offsets and addresses
1525 *
1526 * These two parameters, specify an alignment in terms of a multiplier and
1527 * an offset. The offset or address parameter X of the intrinsic is
1528 * guaranteed to satisfy the following:
1529 *
1530 * (X - align_offset) % align_mul == 0
1531 */
1532 NIR_INTRINSIC_ALIGN_MUL,
1533 NIR_INTRINSIC_ALIGN_OFFSET,
1534
1535 /**
1536 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1537 */
1538 NIR_INTRINSIC_DESC_TYPE,
1539
1540 /**
1541 * The nir_alu_type of a uniform/input/output
1542 */
1543 NIR_INTRINSIC_TYPE,
1544
1545 /**
1546 * The swizzle mask for the instructions
1547 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1548 */
1549 NIR_INTRINSIC_SWIZZLE_MASK,
1550
1551 /* Separate source/dest access flags for copies */
1552 NIR_INTRINSIC_SRC_ACCESS,
1553 NIR_INTRINSIC_DST_ACCESS,
1554
1555 /* Driver location for nir_load_patch_location_ir3 */
1556 NIR_INTRINSIC_DRIVER_LOCATION,
1557
1558 /**
1559 * Mask of nir_memory_semantics, includes ordering and visibility.
1560 */
1561 NIR_INTRINSIC_MEMORY_SEMANTICS,
1562
1563 /**
1564 * Mask of nir_variable_modes affected by the memory operation.
1565 */
1566 NIR_INTRINSIC_MEMORY_MODES,
1567
1568 /**
1569 * Value of nir_scope.
1570 */
1571 NIR_INTRINSIC_MEMORY_SCOPE,
1572
1573 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1574
1575 } nir_intrinsic_index_flag;
1576
1577 #define NIR_INTRINSIC_MAX_INPUTS 5
1578
1579 typedef struct {
1580 const char *name;
1581
1582 unsigned num_srcs; /** < number of register/SSA inputs */
1583
1584 /** number of components of each input register
1585 *
1586 * If this value is 0, the number of components is given by the
1587 * num_components field of nir_intrinsic_instr. If this value is -1, the
1588 * intrinsic consumes however many components are provided and it is not
1589 * validated at all.
1590 */
1591 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1592
1593 bool has_dest;
1594
1595 /** number of components of the output register
1596 *
1597 * If this value is 0, the number of components is given by the
1598 * num_components field of nir_intrinsic_instr.
1599 */
1600 unsigned dest_components;
1601
1602 /** bitfield of legal bit sizes */
1603 unsigned dest_bit_sizes;
1604
1605 /** the number of constant indices used by the intrinsic */
1606 unsigned num_indices;
1607
1608 /** indicates the usage of intr->const_index[n] */
1609 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1610
1611 /** semantic flags for calls to this intrinsic */
1612 nir_intrinsic_semantic_flag flags;
1613 } nir_intrinsic_info;
1614
1615 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1616
1617 static inline unsigned
1618 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1619 {
1620 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1621 assert(srcn < info->num_srcs);
1622 if (info->src_components[srcn] > 0)
1623 return info->src_components[srcn];
1624 else if (info->src_components[srcn] == 0)
1625 return intr->num_components;
1626 else
1627 return nir_src_num_components(intr->src[srcn]);
1628 }
1629
1630 static inline unsigned
1631 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1632 {
1633 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1634 if (!info->has_dest)
1635 return 0;
1636 else if (info->dest_components)
1637 return info->dest_components;
1638 else
1639 return intr->num_components;
1640 }
1641
1642 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1643 static inline type \
1644 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1645 { \
1646 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1647 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1648 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1649 } \
1650 static inline void \
1651 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1652 { \
1653 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1654 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1655 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1656 }
1657
1658 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1659 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1660 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1661 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1662 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1663 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1664 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1665 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1666 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1667 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1668 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1669 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1670 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1671 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1672 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1673 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1674 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1675 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1676 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1677 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1678 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1679 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1680 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1681 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1682 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1683 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1684 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1685
1686 static inline void
1687 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1688 unsigned align_mul, unsigned align_offset)
1689 {
1690 assert(util_is_power_of_two_nonzero(align_mul));
1691 assert(align_offset < align_mul);
1692 nir_intrinsic_set_align_mul(intrin, align_mul);
1693 nir_intrinsic_set_align_offset(intrin, align_offset);
1694 }
1695
1696 /** Returns a simple alignment for a load/store intrinsic offset
1697 *
1698 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1699 * and ALIGN_OFFSET parameters, this helper takes both into account and
1700 * provides a single simple alignment parameter. The offset X is guaranteed
1701 * to satisfy X % align == 0.
1702 */
1703 static inline unsigned
1704 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1705 {
1706 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1707 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1708 assert(align_offset < align_mul);
1709 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1710 }
1711
1712 /* Converts a image_deref_* intrinsic into a image_* one */
1713 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1714 nir_ssa_def *handle, bool bindless);
1715
1716 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1717 static inline bool
1718 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1719 {
1720 if (instr->intrinsic == nir_intrinsic_load_deref ||
1721 instr->intrinsic == nir_intrinsic_load_ssbo ||
1722 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1723 instr->intrinsic == nir_intrinsic_image_deref_load ||
1724 instr->intrinsic == nir_intrinsic_image_load) {
1725 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1726 } else {
1727 const nir_intrinsic_info *info =
1728 &nir_intrinsic_infos[instr->intrinsic];
1729 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1730 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1731 }
1732 }
1733
1734 /**
1735 * \group texture information
1736 *
1737 * This gives semantic information about textures which is useful to the
1738 * frontend, the backend, and lowering passes, but not the optimizer.
1739 */
1740
1741 typedef enum {
1742 nir_tex_src_coord,
1743 nir_tex_src_projector,
1744 nir_tex_src_comparator, /* shadow comparator */
1745 nir_tex_src_offset,
1746 nir_tex_src_bias,
1747 nir_tex_src_lod,
1748 nir_tex_src_min_lod,
1749 nir_tex_src_ms_index, /* MSAA sample index */
1750 nir_tex_src_ms_mcs, /* MSAA compression value */
1751 nir_tex_src_ddx,
1752 nir_tex_src_ddy,
1753 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1754 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1755 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1756 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1757 nir_tex_src_texture_handle, /* < bindless texture handle */
1758 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1759 nir_tex_src_plane, /* < selects plane for planar textures */
1760 nir_num_tex_src_types
1761 } nir_tex_src_type;
1762
1763 typedef struct {
1764 nir_src src;
1765 nir_tex_src_type src_type;
1766 } nir_tex_src;
1767
1768 typedef enum {
1769 nir_texop_tex, /**< Regular texture look-up */
1770 nir_texop_txb, /**< Texture look-up with LOD bias */
1771 nir_texop_txl, /**< Texture look-up with explicit LOD */
1772 nir_texop_txd, /**< Texture look-up with partial derivatives */
1773 nir_texop_txf, /**< Texel fetch with explicit LOD */
1774 nir_texop_txf_ms, /**< Multisample texture fetch */
1775 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1776 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1777 nir_texop_txs, /**< Texture size */
1778 nir_texop_lod, /**< Texture lod query */
1779 nir_texop_tg4, /**< Texture gather */
1780 nir_texop_query_levels, /**< Texture levels query */
1781 nir_texop_texture_samples, /**< Texture samples query */
1782 nir_texop_samples_identical, /**< Query whether all samples are definitely
1783 * identical.
1784 */
1785 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1786 } nir_texop;
1787
1788 typedef struct {
1789 nir_instr instr;
1790
1791 enum glsl_sampler_dim sampler_dim;
1792 nir_alu_type dest_type;
1793
1794 nir_texop op;
1795 nir_dest dest;
1796 nir_tex_src *src;
1797 unsigned num_srcs, coord_components;
1798 bool is_array, is_shadow;
1799
1800 /**
1801 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1802 * components or the new-style shadow that outputs 1 component.
1803 */
1804 bool is_new_style_shadow;
1805
1806 /* gather component selector */
1807 unsigned component : 2;
1808
1809 /* gather offsets */
1810 int8_t tg4_offsets[4][2];
1811
1812 /* True if the texture index or handle is not dynamically uniform */
1813 bool texture_non_uniform;
1814
1815 /* True if the sampler index or handle is not dynamically uniform */
1816 bool sampler_non_uniform;
1817
1818 /** The texture index
1819 *
1820 * If this texture instruction has a nir_tex_src_texture_offset source,
1821 * then the texture index is given by texture_index + texture_offset.
1822 */
1823 unsigned texture_index;
1824
1825 /** The size of the texture array or 0 if it's not an array */
1826 unsigned texture_array_size;
1827
1828 /** The sampler index
1829 *
1830 * The following operations do not require a sampler and, as such, this
1831 * field should be ignored:
1832 * - nir_texop_txf
1833 * - nir_texop_txf_ms
1834 * - nir_texop_txs
1835 * - nir_texop_lod
1836 * - nir_texop_query_levels
1837 * - nir_texop_texture_samples
1838 * - nir_texop_samples_identical
1839 *
1840 * If this texture instruction has a nir_tex_src_sampler_offset source,
1841 * then the sampler index is given by sampler_index + sampler_offset.
1842 */
1843 unsigned sampler_index;
1844 } nir_tex_instr;
1845
1846 static inline unsigned
1847 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1848 {
1849 switch (instr->op) {
1850 case nir_texop_txs: {
1851 unsigned ret;
1852 switch (instr->sampler_dim) {
1853 case GLSL_SAMPLER_DIM_1D:
1854 case GLSL_SAMPLER_DIM_BUF:
1855 ret = 1;
1856 break;
1857 case GLSL_SAMPLER_DIM_2D:
1858 case GLSL_SAMPLER_DIM_CUBE:
1859 case GLSL_SAMPLER_DIM_MS:
1860 case GLSL_SAMPLER_DIM_RECT:
1861 case GLSL_SAMPLER_DIM_EXTERNAL:
1862 case GLSL_SAMPLER_DIM_SUBPASS:
1863 ret = 2;
1864 break;
1865 case GLSL_SAMPLER_DIM_3D:
1866 ret = 3;
1867 break;
1868 default:
1869 unreachable("not reached");
1870 }
1871 if (instr->is_array)
1872 ret++;
1873 return ret;
1874 }
1875
1876 case nir_texop_lod:
1877 return 2;
1878
1879 case nir_texop_texture_samples:
1880 case nir_texop_query_levels:
1881 case nir_texop_samples_identical:
1882 return 1;
1883
1884 default:
1885 if (instr->is_shadow && instr->is_new_style_shadow)
1886 return 1;
1887
1888 return 4;
1889 }
1890 }
1891
1892 /* Returns true if this texture operation queries something about the texture
1893 * rather than actually sampling it.
1894 */
1895 static inline bool
1896 nir_tex_instr_is_query(const nir_tex_instr *instr)
1897 {
1898 switch (instr->op) {
1899 case nir_texop_txs:
1900 case nir_texop_lod:
1901 case nir_texop_texture_samples:
1902 case nir_texop_query_levels:
1903 case nir_texop_txf_ms_mcs:
1904 return true;
1905 case nir_texop_tex:
1906 case nir_texop_txb:
1907 case nir_texop_txl:
1908 case nir_texop_txd:
1909 case nir_texop_txf:
1910 case nir_texop_txf_ms:
1911 case nir_texop_txf_ms_fb:
1912 case nir_texop_tg4:
1913 return false;
1914 default:
1915 unreachable("Invalid texture opcode");
1916 }
1917 }
1918
1919 static inline bool
1920 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1921 {
1922 switch (instr->op) {
1923 case nir_texop_tex:
1924 case nir_texop_txb:
1925 case nir_texop_lod:
1926 return true;
1927 default:
1928 return false;
1929 }
1930 }
1931
1932 static inline nir_alu_type
1933 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1934 {
1935 switch (instr->src[src].src_type) {
1936 case nir_tex_src_coord:
1937 switch (instr->op) {
1938 case nir_texop_txf:
1939 case nir_texop_txf_ms:
1940 case nir_texop_txf_ms_fb:
1941 case nir_texop_txf_ms_mcs:
1942 case nir_texop_samples_identical:
1943 return nir_type_int;
1944
1945 default:
1946 return nir_type_float;
1947 }
1948
1949 case nir_tex_src_lod:
1950 switch (instr->op) {
1951 case nir_texop_txs:
1952 case nir_texop_txf:
1953 return nir_type_int;
1954
1955 default:
1956 return nir_type_float;
1957 }
1958
1959 case nir_tex_src_projector:
1960 case nir_tex_src_comparator:
1961 case nir_tex_src_bias:
1962 case nir_tex_src_min_lod:
1963 case nir_tex_src_ddx:
1964 case nir_tex_src_ddy:
1965 return nir_type_float;
1966
1967 case nir_tex_src_offset:
1968 case nir_tex_src_ms_index:
1969 case nir_tex_src_plane:
1970 return nir_type_int;
1971
1972 case nir_tex_src_ms_mcs:
1973 case nir_tex_src_texture_deref:
1974 case nir_tex_src_sampler_deref:
1975 case nir_tex_src_texture_offset:
1976 case nir_tex_src_sampler_offset:
1977 case nir_tex_src_texture_handle:
1978 case nir_tex_src_sampler_handle:
1979 return nir_type_uint;
1980
1981 case nir_num_tex_src_types:
1982 unreachable("nir_num_tex_src_types is not a valid source type");
1983 }
1984
1985 unreachable("Invalid texture source type");
1986 }
1987
1988 static inline unsigned
1989 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
1990 {
1991 if (instr->src[src].src_type == nir_tex_src_coord)
1992 return instr->coord_components;
1993
1994 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
1995 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
1996 return 4;
1997
1998 if (instr->src[src].src_type == nir_tex_src_ddx ||
1999 instr->src[src].src_type == nir_tex_src_ddy) {
2000 if (instr->is_array)
2001 return instr->coord_components - 1;
2002 else
2003 return instr->coord_components;
2004 }
2005
2006 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2007 * the offset, since a cube maps to a single face.
2008 */
2009 if (instr->src[src].src_type == nir_tex_src_offset) {
2010 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2011 return 2;
2012 else if (instr->is_array)
2013 return instr->coord_components - 1;
2014 else
2015 return instr->coord_components;
2016 }
2017
2018 return 1;
2019 }
2020
2021 static inline int
2022 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2023 {
2024 for (unsigned i = 0; i < instr->num_srcs; i++)
2025 if (instr->src[i].src_type == type)
2026 return (int) i;
2027
2028 return -1;
2029 }
2030
2031 void nir_tex_instr_add_src(nir_tex_instr *tex,
2032 nir_tex_src_type src_type,
2033 nir_src src);
2034
2035 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2036
2037 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2038
2039 typedef struct {
2040 nir_instr instr;
2041
2042 nir_ssa_def def;
2043
2044 nir_const_value value[];
2045 } nir_load_const_instr;
2046
2047 typedef enum {
2048 nir_jump_return,
2049 nir_jump_break,
2050 nir_jump_continue,
2051 } nir_jump_type;
2052
2053 typedef struct {
2054 nir_instr instr;
2055 nir_jump_type type;
2056 } nir_jump_instr;
2057
2058 /* creates a new SSA variable in an undefined state */
2059
2060 typedef struct {
2061 nir_instr instr;
2062 nir_ssa_def def;
2063 } nir_ssa_undef_instr;
2064
2065 typedef struct {
2066 struct exec_node node;
2067
2068 /* The predecessor block corresponding to this source */
2069 struct nir_block *pred;
2070
2071 nir_src src;
2072 } nir_phi_src;
2073
2074 #define nir_foreach_phi_src(phi_src, phi) \
2075 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2076 #define nir_foreach_phi_src_safe(phi_src, phi) \
2077 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2078
2079 typedef struct {
2080 nir_instr instr;
2081
2082 struct exec_list srcs; /** < list of nir_phi_src */
2083
2084 nir_dest dest;
2085 } nir_phi_instr;
2086
2087 typedef struct {
2088 struct exec_node node;
2089 nir_src src;
2090 nir_dest dest;
2091 } nir_parallel_copy_entry;
2092
2093 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2094 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2095
2096 typedef struct {
2097 nir_instr instr;
2098
2099 /* A list of nir_parallel_copy_entrys. The sources of all of the
2100 * entries are copied to the corresponding destinations "in parallel".
2101 * In other words, if we have two entries: a -> b and b -> a, the values
2102 * get swapped.
2103 */
2104 struct exec_list entries;
2105 } nir_parallel_copy_instr;
2106
2107 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2108 type, nir_instr_type_alu)
2109 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2110 type, nir_instr_type_deref)
2111 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2112 type, nir_instr_type_call)
2113 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2114 type, nir_instr_type_jump)
2115 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2116 type, nir_instr_type_tex)
2117 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2118 type, nir_instr_type_intrinsic)
2119 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2120 type, nir_instr_type_load_const)
2121 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2122 type, nir_instr_type_ssa_undef)
2123 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2124 type, nir_instr_type_phi)
2125 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2126 nir_parallel_copy_instr, instr,
2127 type, nir_instr_type_parallel_copy)
2128
2129
2130 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2131 static inline type \
2132 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2133 { \
2134 assert(nir_src_is_const(src)); \
2135 nir_load_const_instr *load = \
2136 nir_instr_as_load_const(src.ssa->parent_instr); \
2137 assert(comp < load->def.num_components); \
2138 return nir_const_value_as_##suffix(load->value[comp], \
2139 load->def.bit_size); \
2140 } \
2141 \
2142 static inline type \
2143 nir_src_as_##suffix(nir_src src) \
2144 { \
2145 assert(nir_src_num_components(src) == 1); \
2146 return nir_src_comp_as_##suffix(src, 0); \
2147 }
2148
2149 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2150 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2151 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2152 NIR_DEFINE_SRC_AS_CONST(double, float)
2153
2154 #undef NIR_DEFINE_SRC_AS_CONST
2155
2156
2157 typedef struct {
2158 nir_ssa_def *def;
2159 unsigned comp;
2160 } nir_ssa_scalar;
2161
2162 static inline bool
2163 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2164 {
2165 return s.def->parent_instr->type == nir_instr_type_load_const;
2166 }
2167
2168 static inline nir_const_value
2169 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2170 {
2171 assert(s.comp < s.def->num_components);
2172 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2173 return load->value[s.comp];
2174 }
2175
2176 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2177 static inline type \
2178 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2179 { \
2180 return nir_const_value_as_##suffix( \
2181 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2182 }
2183
2184 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2185 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2186 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2187 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2188
2189 #undef NIR_DEFINE_SCALAR_AS_CONST
2190
2191 static inline bool
2192 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2193 {
2194 return s.def->parent_instr->type == nir_instr_type_alu;
2195 }
2196
2197 static inline nir_op
2198 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2199 {
2200 return nir_instr_as_alu(s.def->parent_instr)->op;
2201 }
2202
2203 static inline nir_ssa_scalar
2204 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2205 {
2206 nir_ssa_scalar out = { NULL, 0 };
2207
2208 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2209 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2210
2211 /* Our component must be written */
2212 assert(s.comp < s.def->num_components);
2213 assert(alu->dest.write_mask & (1u << s.comp));
2214
2215 assert(alu->src[alu_src_idx].src.is_ssa);
2216 out.def = alu->src[alu_src_idx].src.ssa;
2217
2218 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2219 /* The ALU src is unsized so the source component follows the
2220 * destination component.
2221 */
2222 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2223 } else {
2224 /* This is a sized source so all source components work together to
2225 * produce all the destination components. Since we need to return a
2226 * scalar, this only works if the source is a scalar.
2227 */
2228 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2229 out.comp = alu->src[alu_src_idx].swizzle[0];
2230 }
2231 assert(out.comp < out.def->num_components);
2232
2233 return out;
2234 }
2235
2236
2237 /*
2238 * Control flow
2239 *
2240 * Control flow consists of a tree of control flow nodes, which include
2241 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2242 * instructions that always run start-to-finish. Each basic block also keeps
2243 * track of its successors (blocks which may run immediately after the current
2244 * block) and predecessors (blocks which could have run immediately before the
2245 * current block). Each function also has a start block and an end block which
2246 * all return statements point to (which is always empty). Together, all the
2247 * blocks with their predecessors and successors make up the control flow
2248 * graph (CFG) of the function. There are helpers that modify the tree of
2249 * control flow nodes while modifying the CFG appropriately; these should be
2250 * used instead of modifying the tree directly.
2251 */
2252
2253 typedef enum {
2254 nir_cf_node_block,
2255 nir_cf_node_if,
2256 nir_cf_node_loop,
2257 nir_cf_node_function
2258 } nir_cf_node_type;
2259
2260 typedef struct nir_cf_node {
2261 struct exec_node node;
2262 nir_cf_node_type type;
2263 struct nir_cf_node *parent;
2264 } nir_cf_node;
2265
2266 typedef struct nir_block {
2267 nir_cf_node cf_node;
2268
2269 struct exec_list instr_list; /** < list of nir_instr */
2270
2271 /** generic block index; generated by nir_index_blocks */
2272 unsigned index;
2273
2274 /*
2275 * Each block can only have up to 2 successors, so we put them in a simple
2276 * array - no need for anything more complicated.
2277 */
2278 struct nir_block *successors[2];
2279
2280 /* Set of nir_block predecessors in the CFG */
2281 struct set *predecessors;
2282
2283 /*
2284 * this node's immediate dominator in the dominance tree - set to NULL for
2285 * the start block.
2286 */
2287 struct nir_block *imm_dom;
2288
2289 /* This node's children in the dominance tree */
2290 unsigned num_dom_children;
2291 struct nir_block **dom_children;
2292
2293 /* Set of nir_blocks on the dominance frontier of this block */
2294 struct set *dom_frontier;
2295
2296 /*
2297 * These two indices have the property that dom_{pre,post}_index for each
2298 * child of this block in the dominance tree will always be between
2299 * dom_pre_index and dom_post_index for this block, which makes testing if
2300 * a given block is dominated by another block an O(1) operation.
2301 */
2302 unsigned dom_pre_index, dom_post_index;
2303
2304 /* live in and out for this block; used for liveness analysis */
2305 BITSET_WORD *live_in;
2306 BITSET_WORD *live_out;
2307 } nir_block;
2308
2309 static inline nir_instr *
2310 nir_block_first_instr(nir_block *block)
2311 {
2312 struct exec_node *head = exec_list_get_head(&block->instr_list);
2313 return exec_node_data(nir_instr, head, node);
2314 }
2315
2316 static inline nir_instr *
2317 nir_block_last_instr(nir_block *block)
2318 {
2319 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2320 return exec_node_data(nir_instr, tail, node);
2321 }
2322
2323 static inline bool
2324 nir_block_ends_in_jump(nir_block *block)
2325 {
2326 return !exec_list_is_empty(&block->instr_list) &&
2327 nir_block_last_instr(block)->type == nir_instr_type_jump;
2328 }
2329
2330 #define nir_foreach_instr(instr, block) \
2331 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2332 #define nir_foreach_instr_reverse(instr, block) \
2333 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2334 #define nir_foreach_instr_safe(instr, block) \
2335 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2336 #define nir_foreach_instr_reverse_safe(instr, block) \
2337 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2338
2339 typedef enum {
2340 nir_selection_control_none = 0x0,
2341 nir_selection_control_flatten = 0x1,
2342 nir_selection_control_dont_flatten = 0x2,
2343 } nir_selection_control;
2344
2345 typedef struct nir_if {
2346 nir_cf_node cf_node;
2347 nir_src condition;
2348 nir_selection_control control;
2349
2350 struct exec_list then_list; /** < list of nir_cf_node */
2351 struct exec_list else_list; /** < list of nir_cf_node */
2352 } nir_if;
2353
2354 typedef struct {
2355 nir_if *nif;
2356
2357 /** Instruction that generates nif::condition. */
2358 nir_instr *conditional_instr;
2359
2360 /** Block within ::nif that has the break instruction. */
2361 nir_block *break_block;
2362
2363 /** Last block for the then- or else-path that does not contain the break. */
2364 nir_block *continue_from_block;
2365
2366 /** True when ::break_block is in the else-path of ::nif. */
2367 bool continue_from_then;
2368 bool induction_rhs;
2369
2370 /* This is true if the terminators exact trip count is unknown. For
2371 * example:
2372 *
2373 * for (int i = 0; i < imin(x, 4); i++)
2374 * ...
2375 *
2376 * Here loop analysis would have set a max_trip_count of 4 however we dont
2377 * know for sure that this is the exact trip count.
2378 */
2379 bool exact_trip_count_unknown;
2380
2381 struct list_head loop_terminator_link;
2382 } nir_loop_terminator;
2383
2384 typedef struct {
2385 /* Estimated cost (in number of instructions) of the loop */
2386 unsigned instr_cost;
2387
2388 /* Guessed trip count based on array indexing */
2389 unsigned guessed_trip_count;
2390
2391 /* Maximum number of times the loop is run (if known) */
2392 unsigned max_trip_count;
2393
2394 /* Do we know the exact number of times the loop will be run */
2395 bool exact_trip_count_known;
2396
2397 /* Unroll the loop regardless of its size */
2398 bool force_unroll;
2399
2400 /* Does the loop contain complex loop terminators, continues or other
2401 * complex behaviours? If this is true we can't rely on
2402 * loop_terminator_list to be complete or accurate.
2403 */
2404 bool complex_loop;
2405
2406 nir_loop_terminator *limiting_terminator;
2407
2408 /* A list of loop_terminators terminating this loop. */
2409 struct list_head loop_terminator_list;
2410 } nir_loop_info;
2411
2412 typedef enum {
2413 nir_loop_control_none = 0x0,
2414 nir_loop_control_unroll = 0x1,
2415 nir_loop_control_dont_unroll = 0x2,
2416 } nir_loop_control;
2417
2418 typedef struct {
2419 nir_cf_node cf_node;
2420
2421 struct exec_list body; /** < list of nir_cf_node */
2422
2423 nir_loop_info *info;
2424 nir_loop_control control;
2425 bool partially_unrolled;
2426 } nir_loop;
2427
2428 /**
2429 * Various bits of metadata that can may be created or required by
2430 * optimization and analysis passes
2431 */
2432 typedef enum {
2433 nir_metadata_none = 0x0,
2434 nir_metadata_block_index = 0x1,
2435 nir_metadata_dominance = 0x2,
2436 nir_metadata_live_ssa_defs = 0x4,
2437 nir_metadata_not_properly_reset = 0x8,
2438 nir_metadata_loop_analysis = 0x10,
2439 } nir_metadata;
2440
2441 typedef struct {
2442 nir_cf_node cf_node;
2443
2444 /** pointer to the function of which this is an implementation */
2445 struct nir_function *function;
2446
2447 struct exec_list body; /** < list of nir_cf_node */
2448
2449 nir_block *end_block;
2450
2451 /** list for all local variables in the function */
2452 struct exec_list locals;
2453
2454 /** list of local registers in the function */
2455 struct exec_list registers;
2456
2457 /** next available local register index */
2458 unsigned reg_alloc;
2459
2460 /** next available SSA value index */
2461 unsigned ssa_alloc;
2462
2463 /* total number of basic blocks, only valid when block_index_dirty = false */
2464 unsigned num_blocks;
2465
2466 nir_metadata valid_metadata;
2467 } nir_function_impl;
2468
2469 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2470 nir_start_block(nir_function_impl *impl)
2471 {
2472 return (nir_block *) impl->body.head_sentinel.next;
2473 }
2474
2475 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2476 nir_impl_last_block(nir_function_impl *impl)
2477 {
2478 return (nir_block *) impl->body.tail_sentinel.prev;
2479 }
2480
2481 static inline nir_cf_node *
2482 nir_cf_node_next(nir_cf_node *node)
2483 {
2484 struct exec_node *next = exec_node_get_next(&node->node);
2485 if (exec_node_is_tail_sentinel(next))
2486 return NULL;
2487 else
2488 return exec_node_data(nir_cf_node, next, node);
2489 }
2490
2491 static inline nir_cf_node *
2492 nir_cf_node_prev(nir_cf_node *node)
2493 {
2494 struct exec_node *prev = exec_node_get_prev(&node->node);
2495 if (exec_node_is_head_sentinel(prev))
2496 return NULL;
2497 else
2498 return exec_node_data(nir_cf_node, prev, node);
2499 }
2500
2501 static inline bool
2502 nir_cf_node_is_first(const nir_cf_node *node)
2503 {
2504 return exec_node_is_head_sentinel(node->node.prev);
2505 }
2506
2507 static inline bool
2508 nir_cf_node_is_last(const nir_cf_node *node)
2509 {
2510 return exec_node_is_tail_sentinel(node->node.next);
2511 }
2512
2513 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2514 type, nir_cf_node_block)
2515 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2516 type, nir_cf_node_if)
2517 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2518 type, nir_cf_node_loop)
2519 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2520 nir_function_impl, cf_node, type, nir_cf_node_function)
2521
2522 static inline nir_block *
2523 nir_if_first_then_block(nir_if *if_stmt)
2524 {
2525 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2526 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2527 }
2528
2529 static inline nir_block *
2530 nir_if_last_then_block(nir_if *if_stmt)
2531 {
2532 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2533 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2534 }
2535
2536 static inline nir_block *
2537 nir_if_first_else_block(nir_if *if_stmt)
2538 {
2539 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2540 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2541 }
2542
2543 static inline nir_block *
2544 nir_if_last_else_block(nir_if *if_stmt)
2545 {
2546 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2547 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2548 }
2549
2550 static inline nir_block *
2551 nir_loop_first_block(nir_loop *loop)
2552 {
2553 struct exec_node *head = exec_list_get_head(&loop->body);
2554 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2555 }
2556
2557 static inline nir_block *
2558 nir_loop_last_block(nir_loop *loop)
2559 {
2560 struct exec_node *tail = exec_list_get_tail(&loop->body);
2561 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2562 }
2563
2564 /**
2565 * Return true if this list of cf_nodes contains a single empty block.
2566 */
2567 static inline bool
2568 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2569 {
2570 if (exec_list_is_singular(cf_list)) {
2571 struct exec_node *head = exec_list_get_head(cf_list);
2572 nir_block *block =
2573 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2574 return exec_list_is_empty(&block->instr_list);
2575 }
2576 return false;
2577 }
2578
2579 typedef struct {
2580 uint8_t num_components;
2581 uint8_t bit_size;
2582 } nir_parameter;
2583
2584 typedef struct nir_function {
2585 struct exec_node node;
2586
2587 const char *name;
2588 struct nir_shader *shader;
2589
2590 unsigned num_params;
2591 nir_parameter *params;
2592
2593 /** The implementation of this function.
2594 *
2595 * If the function is only declared and not implemented, this is NULL.
2596 */
2597 nir_function_impl *impl;
2598
2599 bool is_entrypoint;
2600 } nir_function;
2601
2602 typedef enum {
2603 nir_lower_imul64 = (1 << 0),
2604 nir_lower_isign64 = (1 << 1),
2605 /** Lower all int64 modulus and division opcodes */
2606 nir_lower_divmod64 = (1 << 2),
2607 /** Lower all 64-bit umul_high and imul_high opcodes */
2608 nir_lower_imul_high64 = (1 << 3),
2609 nir_lower_mov64 = (1 << 4),
2610 nir_lower_icmp64 = (1 << 5),
2611 nir_lower_iadd64 = (1 << 6),
2612 nir_lower_iabs64 = (1 << 7),
2613 nir_lower_ineg64 = (1 << 8),
2614 nir_lower_logic64 = (1 << 9),
2615 nir_lower_minmax64 = (1 << 10),
2616 nir_lower_shift64 = (1 << 11),
2617 nir_lower_imul_2x32_64 = (1 << 12),
2618 nir_lower_extract64 = (1 << 13),
2619 } nir_lower_int64_options;
2620
2621 typedef enum {
2622 nir_lower_drcp = (1 << 0),
2623 nir_lower_dsqrt = (1 << 1),
2624 nir_lower_drsq = (1 << 2),
2625 nir_lower_dtrunc = (1 << 3),
2626 nir_lower_dfloor = (1 << 4),
2627 nir_lower_dceil = (1 << 5),
2628 nir_lower_dfract = (1 << 6),
2629 nir_lower_dround_even = (1 << 7),
2630 nir_lower_dmod = (1 << 8),
2631 nir_lower_dsub = (1 << 9),
2632 nir_lower_ddiv = (1 << 10),
2633 nir_lower_fp64_full_software = (1 << 11),
2634 } nir_lower_doubles_options;
2635
2636 typedef enum {
2637 nir_divergence_single_prim_per_subgroup = (1 << 0),
2638 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2639 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2640 nir_divergence_view_index_uniform = (1 << 3),
2641 } nir_divergence_options;
2642
2643 typedef struct nir_shader_compiler_options {
2644 bool lower_fdiv;
2645 bool lower_ffma;
2646 bool fuse_ffma;
2647 bool lower_flrp16;
2648 bool lower_flrp32;
2649 /** Lowers flrp when it does not support doubles */
2650 bool lower_flrp64;
2651 bool lower_fpow;
2652 bool lower_fsat;
2653 bool lower_fsqrt;
2654 bool lower_sincos;
2655 bool lower_fmod;
2656 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2657 bool lower_bitfield_extract;
2658 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2659 bool lower_bitfield_extract_to_shifts;
2660 /** Lowers bitfield_insert to bfi/bfm */
2661 bool lower_bitfield_insert;
2662 /** Lowers bitfield_insert to compares, and shifts. */
2663 bool lower_bitfield_insert_to_shifts;
2664 /** Lowers bitfield_insert to bfm/bitfield_select. */
2665 bool lower_bitfield_insert_to_bitfield_select;
2666 /** Lowers bitfield_reverse to shifts. */
2667 bool lower_bitfield_reverse;
2668 /** Lowers bit_count to shifts. */
2669 bool lower_bit_count;
2670 /** Lowers ifind_msb to compare and ufind_msb */
2671 bool lower_ifind_msb;
2672 /** Lowers find_lsb to ufind_msb and logic ops */
2673 bool lower_find_lsb;
2674 bool lower_uadd_carry;
2675 bool lower_usub_borrow;
2676 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2677 bool lower_mul_high;
2678 /** lowers fneg and ineg to fsub and isub. */
2679 bool lower_negate;
2680 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2681 bool lower_sub;
2682
2683 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2684 bool lower_scmp;
2685
2686 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2687 bool lower_vector_cmp;
2688
2689 /** enables rules to lower idiv by power-of-two: */
2690 bool lower_idiv;
2691
2692 /** enable rules to avoid bit ops */
2693 bool lower_bitops;
2694
2695 /** enables rules to lower isign to imin+imax */
2696 bool lower_isign;
2697
2698 /** enables rules to lower fsign to fsub and flt */
2699 bool lower_fsign;
2700
2701 /* lower fdph to fdot4 */
2702 bool lower_fdph;
2703
2704 /** lower fdot to fmul and fsum/fadd. */
2705 bool lower_fdot;
2706
2707 /* Does the native fdot instruction replicate its result for four
2708 * components? If so, then opt_algebraic_late will turn all fdotN
2709 * instructions into fdot_replicatedN instructions.
2710 */
2711 bool fdot_replicates;
2712
2713 /** lowers ffloor to fsub+ffract: */
2714 bool lower_ffloor;
2715
2716 /** lowers ffract to fsub+ffloor: */
2717 bool lower_ffract;
2718
2719 /** lowers fceil to fneg+ffloor+fneg: */
2720 bool lower_fceil;
2721
2722 bool lower_ftrunc;
2723
2724 bool lower_ldexp;
2725
2726 bool lower_pack_half_2x16;
2727 bool lower_pack_unorm_2x16;
2728 bool lower_pack_snorm_2x16;
2729 bool lower_pack_unorm_4x8;
2730 bool lower_pack_snorm_4x8;
2731 bool lower_unpack_half_2x16;
2732 bool lower_unpack_unorm_2x16;
2733 bool lower_unpack_snorm_2x16;
2734 bool lower_unpack_unorm_4x8;
2735 bool lower_unpack_snorm_4x8;
2736
2737 bool lower_extract_byte;
2738 bool lower_extract_word;
2739
2740 bool lower_all_io_to_temps;
2741 bool lower_all_io_to_elements;
2742
2743 /* Indicates that the driver only has zero-based vertex id */
2744 bool vertex_id_zero_based;
2745
2746 /**
2747 * If enabled, gl_BaseVertex will be lowered as:
2748 * is_indexed_draw (~0/0) & firstvertex
2749 */
2750 bool lower_base_vertex;
2751
2752 /**
2753 * If enabled, gl_HelperInvocation will be lowered as:
2754 *
2755 * !((1 << sample_id) & sample_mask_in))
2756 *
2757 * This depends on some possibly hw implementation details, which may
2758 * not be true for all hw. In particular that the FS is only executed
2759 * for covered samples or for helper invocations. So, do not blindly
2760 * enable this option.
2761 *
2762 * Note: See also issue #22 in ARB_shader_image_load_store
2763 */
2764 bool lower_helper_invocation;
2765
2766 /**
2767 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2768 *
2769 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2770 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2771 */
2772 bool optimize_sample_mask_in;
2773
2774 bool lower_cs_local_index_from_id;
2775 bool lower_cs_local_id_from_index;
2776
2777 bool lower_device_index_to_zero;
2778
2779 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2780 bool lower_wpos_pntc;
2781
2782 bool lower_hadd;
2783 bool lower_add_sat;
2784
2785 /**
2786 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2787 * for IO purposes and would prefer loads/stores be vectorized.
2788 */
2789 bool vectorize_io;
2790 bool lower_to_scalar;
2791
2792 /**
2793 * Should nir_lower_io() create load_interpolated_input intrinsics?
2794 *
2795 * If not, it generates regular load_input intrinsics and interpolation
2796 * information must be inferred from the list of input nir_variables.
2797 */
2798 bool use_interpolated_input_intrinsics;
2799
2800 /* Lowers when 32x32->64 bit multiplication is not supported */
2801 bool lower_mul_2x32_64;
2802
2803 /* Lowers when rotate instruction is not supported */
2804 bool lower_rotate;
2805
2806 /**
2807 * Backend supports imul24, and would like to use it (when possible)
2808 * for address/offset calculation. If true, driver should call
2809 * nir_lower_amul(). (If not set, amul will automatically be lowered
2810 * to imul.)
2811 */
2812 bool has_imul24;
2813
2814 /**
2815 * Is this the Intel vec4 backend?
2816 *
2817 * Used to inhibit algebraic optimizations that are known to be harmful on
2818 * the Intel vec4 backend. This is generally applicable to any
2819 * optimization that might cause more immediate values to be used in
2820 * 3-source (e.g., ffma and flrp) instructions.
2821 */
2822 bool intel_vec4;
2823
2824 unsigned max_unroll_iterations;
2825
2826 nir_lower_int64_options lower_int64_options;
2827 nir_lower_doubles_options lower_doubles_options;
2828 } nir_shader_compiler_options;
2829
2830 typedef struct nir_shader {
2831 /** list of uniforms (nir_variable) */
2832 struct exec_list uniforms;
2833
2834 /** list of inputs (nir_variable) */
2835 struct exec_list inputs;
2836
2837 /** list of outputs (nir_variable) */
2838 struct exec_list outputs;
2839
2840 /** list of shared compute variables (nir_variable) */
2841 struct exec_list shared;
2842
2843 /** Set of driver-specific options for the shader.
2844 *
2845 * The memory for the options is expected to be kept in a single static
2846 * copy by the driver.
2847 */
2848 const struct nir_shader_compiler_options *options;
2849
2850 /** Various bits of compile-time information about a given shader */
2851 struct shader_info info;
2852
2853 /** list of global variables in the shader (nir_variable) */
2854 struct exec_list globals;
2855
2856 /** list of system value variables in the shader (nir_variable) */
2857 struct exec_list system_values;
2858
2859 struct exec_list functions; /** < list of nir_function */
2860
2861 /**
2862 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2863 * access plus one
2864 */
2865 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2866
2867 /** Size in bytes of required scratch space */
2868 unsigned scratch_size;
2869
2870 /** Constant data associated with this shader.
2871 *
2872 * Constant data is loaded through load_constant intrinsics. See also
2873 * nir_opt_large_constants.
2874 */
2875 void *constant_data;
2876 unsigned constant_data_size;
2877 } nir_shader;
2878
2879 #define nir_foreach_function(func, shader) \
2880 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2881
2882 static inline nir_function_impl *
2883 nir_shader_get_entrypoint(nir_shader *shader)
2884 {
2885 nir_function *func = NULL;
2886
2887 nir_foreach_function(function, shader) {
2888 assert(func == NULL);
2889 if (function->is_entrypoint) {
2890 func = function;
2891 #ifndef NDEBUG
2892 break;
2893 #endif
2894 }
2895 }
2896
2897 if (!func)
2898 return NULL;
2899
2900 assert(func->num_params == 0);
2901 assert(func->impl);
2902 return func->impl;
2903 }
2904
2905 nir_shader *nir_shader_create(void *mem_ctx,
2906 gl_shader_stage stage,
2907 const nir_shader_compiler_options *options,
2908 shader_info *si);
2909
2910 nir_register *nir_local_reg_create(nir_function_impl *impl);
2911
2912 void nir_reg_remove(nir_register *reg);
2913
2914 /** Adds a variable to the appropriate list in nir_shader */
2915 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
2916
2917 static inline void
2918 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
2919 {
2920 assert(var->data.mode == nir_var_function_temp);
2921 exec_list_push_tail(&impl->locals, &var->node);
2922 }
2923
2924 /** creates a variable, sets a few defaults, and adds it to the list */
2925 nir_variable *nir_variable_create(nir_shader *shader,
2926 nir_variable_mode mode,
2927 const struct glsl_type *type,
2928 const char *name);
2929 /** creates a local variable and adds it to the list */
2930 nir_variable *nir_local_variable_create(nir_function_impl *impl,
2931 const struct glsl_type *type,
2932 const char *name);
2933
2934 /** creates a function and adds it to the shader's list of functions */
2935 nir_function *nir_function_create(nir_shader *shader, const char *name);
2936
2937 nir_function_impl *nir_function_impl_create(nir_function *func);
2938 /** creates a function_impl that isn't tied to any particular function */
2939 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
2940
2941 nir_block *nir_block_create(nir_shader *shader);
2942 nir_if *nir_if_create(nir_shader *shader);
2943 nir_loop *nir_loop_create(nir_shader *shader);
2944
2945 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
2946
2947 /** requests that the given pieces of metadata be generated */
2948 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
2949 /** dirties all but the preserved metadata */
2950 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
2951
2952 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2953 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
2954
2955 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
2956 nir_deref_type deref_type);
2957
2958 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
2959
2960 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
2961 unsigned num_components,
2962 unsigned bit_size);
2963
2964 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
2965 nir_intrinsic_op op);
2966
2967 nir_call_instr *nir_call_instr_create(nir_shader *shader,
2968 nir_function *callee);
2969
2970 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
2971
2972 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
2973
2974 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
2975
2976 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
2977 unsigned num_components,
2978 unsigned bit_size);
2979
2980 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
2981
2982 /**
2983 * NIR Cursors and Instruction Insertion API
2984 * @{
2985 *
2986 * A tiny struct representing a point to insert/extract instructions or
2987 * control flow nodes. Helps reduce the combinatorial explosion of possible
2988 * points to insert/extract.
2989 *
2990 * \sa nir_control_flow.h
2991 */
2992 typedef enum {
2993 nir_cursor_before_block,
2994 nir_cursor_after_block,
2995 nir_cursor_before_instr,
2996 nir_cursor_after_instr,
2997 } nir_cursor_option;
2998
2999 typedef struct {
3000 nir_cursor_option option;
3001 union {
3002 nir_block *block;
3003 nir_instr *instr;
3004 };
3005 } nir_cursor;
3006
3007 static inline nir_block *
3008 nir_cursor_current_block(nir_cursor cursor)
3009 {
3010 if (cursor.option == nir_cursor_before_instr ||
3011 cursor.option == nir_cursor_after_instr) {
3012 return cursor.instr->block;
3013 } else {
3014 return cursor.block;
3015 }
3016 }
3017
3018 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3019
3020 static inline nir_cursor
3021 nir_before_block(nir_block *block)
3022 {
3023 nir_cursor cursor;
3024 cursor.option = nir_cursor_before_block;
3025 cursor.block = block;
3026 return cursor;
3027 }
3028
3029 static inline nir_cursor
3030 nir_after_block(nir_block *block)
3031 {
3032 nir_cursor cursor;
3033 cursor.option = nir_cursor_after_block;
3034 cursor.block = block;
3035 return cursor;
3036 }
3037
3038 static inline nir_cursor
3039 nir_before_instr(nir_instr *instr)
3040 {
3041 nir_cursor cursor;
3042 cursor.option = nir_cursor_before_instr;
3043 cursor.instr = instr;
3044 return cursor;
3045 }
3046
3047 static inline nir_cursor
3048 nir_after_instr(nir_instr *instr)
3049 {
3050 nir_cursor cursor;
3051 cursor.option = nir_cursor_after_instr;
3052 cursor.instr = instr;
3053 return cursor;
3054 }
3055
3056 static inline nir_cursor
3057 nir_after_block_before_jump(nir_block *block)
3058 {
3059 nir_instr *last_instr = nir_block_last_instr(block);
3060 if (last_instr && last_instr->type == nir_instr_type_jump) {
3061 return nir_before_instr(last_instr);
3062 } else {
3063 return nir_after_block(block);
3064 }
3065 }
3066
3067 static inline nir_cursor
3068 nir_before_src(nir_src *src, bool is_if_condition)
3069 {
3070 if (is_if_condition) {
3071 nir_block *prev_block =
3072 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3073 assert(!nir_block_ends_in_jump(prev_block));
3074 return nir_after_block(prev_block);
3075 } else if (src->parent_instr->type == nir_instr_type_phi) {
3076 #ifndef NDEBUG
3077 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3078 bool found = false;
3079 nir_foreach_phi_src(phi_src, cond_phi) {
3080 if (phi_src->src.ssa == src->ssa) {
3081 found = true;
3082 break;
3083 }
3084 }
3085 assert(found);
3086 #endif
3087 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3088 * to have a more specific name.
3089 */
3090 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3091 return nir_after_block_before_jump(phi_src->pred);
3092 } else {
3093 return nir_before_instr(src->parent_instr);
3094 }
3095 }
3096
3097 static inline nir_cursor
3098 nir_before_cf_node(nir_cf_node *node)
3099 {
3100 if (node->type == nir_cf_node_block)
3101 return nir_before_block(nir_cf_node_as_block(node));
3102
3103 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3104 }
3105
3106 static inline nir_cursor
3107 nir_after_cf_node(nir_cf_node *node)
3108 {
3109 if (node->type == nir_cf_node_block)
3110 return nir_after_block(nir_cf_node_as_block(node));
3111
3112 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3113 }
3114
3115 static inline nir_cursor
3116 nir_after_phis(nir_block *block)
3117 {
3118 nir_foreach_instr(instr, block) {
3119 if (instr->type != nir_instr_type_phi)
3120 return nir_before_instr(instr);
3121 }
3122 return nir_after_block(block);
3123 }
3124
3125 static inline nir_cursor
3126 nir_after_cf_node_and_phis(nir_cf_node *node)
3127 {
3128 if (node->type == nir_cf_node_block)
3129 return nir_after_block(nir_cf_node_as_block(node));
3130
3131 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3132
3133 return nir_after_phis(block);
3134 }
3135
3136 static inline nir_cursor
3137 nir_before_cf_list(struct exec_list *cf_list)
3138 {
3139 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3140 exec_list_get_head(cf_list), node);
3141 return nir_before_cf_node(first_node);
3142 }
3143
3144 static inline nir_cursor
3145 nir_after_cf_list(struct exec_list *cf_list)
3146 {
3147 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3148 exec_list_get_tail(cf_list), node);
3149 return nir_after_cf_node(last_node);
3150 }
3151
3152 /**
3153 * Insert a NIR instruction at the given cursor.
3154 *
3155 * Note: This does not update the cursor.
3156 */
3157 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3158
3159 static inline void
3160 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3161 {
3162 nir_instr_insert(nir_before_instr(instr), before);
3163 }
3164
3165 static inline void
3166 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3167 {
3168 nir_instr_insert(nir_after_instr(instr), after);
3169 }
3170
3171 static inline void
3172 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3173 {
3174 nir_instr_insert(nir_before_block(block), before);
3175 }
3176
3177 static inline void
3178 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3179 {
3180 nir_instr_insert(nir_after_block(block), after);
3181 }
3182
3183 static inline void
3184 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3185 {
3186 nir_instr_insert(nir_before_cf_node(node), before);
3187 }
3188
3189 static inline void
3190 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3191 {
3192 nir_instr_insert(nir_after_cf_node(node), after);
3193 }
3194
3195 static inline void
3196 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3197 {
3198 nir_instr_insert(nir_before_cf_list(list), before);
3199 }
3200
3201 static inline void
3202 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3203 {
3204 nir_instr_insert(nir_after_cf_list(list), after);
3205 }
3206
3207 void nir_instr_remove_v(nir_instr *instr);
3208
3209 static inline nir_cursor
3210 nir_instr_remove(nir_instr *instr)
3211 {
3212 nir_cursor cursor;
3213 nir_instr *prev = nir_instr_prev(instr);
3214 if (prev) {
3215 cursor = nir_after_instr(prev);
3216 } else {
3217 cursor = nir_before_block(instr->block);
3218 }
3219 nir_instr_remove_v(instr);
3220 return cursor;
3221 }
3222
3223 /** @} */
3224
3225 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3226
3227 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3228 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3229 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3230 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3231 void *state);
3232 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3233 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3234
3235 nir_const_value *nir_src_as_const_value(nir_src src);
3236
3237 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3238 static inline c_type * \
3239 nir_src_as_ ## name (nir_src src) \
3240 { \
3241 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3242 ? cast_macro(src.ssa->parent_instr) : NULL; \
3243 }
3244
3245 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3246 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3247 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3248 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3249
3250 bool nir_src_is_dynamically_uniform(nir_src src);
3251 bool nir_srcs_equal(nir_src src1, nir_src src2);
3252 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3253 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3254 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3255 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3256 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3257 nir_dest new_dest);
3258
3259 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3260 unsigned num_components, unsigned bit_size,
3261 const char *name);
3262 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3263 unsigned num_components, unsigned bit_size,
3264 const char *name);
3265 static inline void
3266 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3267 const struct glsl_type *type,
3268 const char *name)
3269 {
3270 assert(glsl_type_is_vector_or_scalar(type));
3271 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3272 glsl_get_bit_size(type), name);
3273 }
3274 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3275 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3276 nir_instr *after_me);
3277
3278 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3279
3280 /*
3281 * finds the next basic block in source-code order, returns NULL if there is
3282 * none
3283 */
3284
3285 nir_block *nir_block_cf_tree_next(nir_block *block);
3286
3287 /* Performs the opposite of nir_block_cf_tree_next() */
3288
3289 nir_block *nir_block_cf_tree_prev(nir_block *block);
3290
3291 /* Gets the first block in a CF node in source-code order */
3292
3293 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3294
3295 /* Gets the last block in a CF node in source-code order */
3296
3297 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3298
3299 /* Gets the next block after a CF node in source-code order */
3300
3301 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3302
3303 /* Macros for loops that visit blocks in source-code order */
3304
3305 #define nir_foreach_block(block, impl) \
3306 for (nir_block *block = nir_start_block(impl); block != NULL; \
3307 block = nir_block_cf_tree_next(block))
3308
3309 #define nir_foreach_block_safe(block, impl) \
3310 for (nir_block *block = nir_start_block(impl), \
3311 *next = nir_block_cf_tree_next(block); \
3312 block != NULL; \
3313 block = next, next = nir_block_cf_tree_next(block))
3314
3315 #define nir_foreach_block_reverse(block, impl) \
3316 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3317 block = nir_block_cf_tree_prev(block))
3318
3319 #define nir_foreach_block_reverse_safe(block, impl) \
3320 for (nir_block *block = nir_impl_last_block(impl), \
3321 *prev = nir_block_cf_tree_prev(block); \
3322 block != NULL; \
3323 block = prev, prev = nir_block_cf_tree_prev(block))
3324
3325 #define nir_foreach_block_in_cf_node(block, node) \
3326 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3327 block != nir_cf_node_cf_tree_next(node); \
3328 block = nir_block_cf_tree_next(block))
3329
3330 /* If the following CF node is an if, this function returns that if.
3331 * Otherwise, it returns NULL.
3332 */
3333 nir_if *nir_block_get_following_if(nir_block *block);
3334
3335 nir_loop *nir_block_get_following_loop(nir_block *block);
3336
3337 void nir_index_local_regs(nir_function_impl *impl);
3338 void nir_index_ssa_defs(nir_function_impl *impl);
3339 unsigned nir_index_instrs(nir_function_impl *impl);
3340
3341 void nir_index_blocks(nir_function_impl *impl);
3342
3343 void nir_print_shader(nir_shader *shader, FILE *fp);
3344 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3345 void nir_print_instr(const nir_instr *instr, FILE *fp);
3346 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3347
3348 /** Shallow clone of a single ALU instruction. */
3349 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3350
3351 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3352 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3353 const nir_function_impl *fi);
3354 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3355 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3356
3357 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3358
3359 void nir_shader_serialize_deserialize(nir_shader *s);
3360
3361 #ifndef NDEBUG
3362 void nir_validate_shader(nir_shader *shader, const char *when);
3363 void nir_metadata_set_validation_flag(nir_shader *shader);
3364 void nir_metadata_check_validation_flag(nir_shader *shader);
3365
3366 static inline bool
3367 should_skip_nir(const char *name)
3368 {
3369 static const char *list = NULL;
3370 if (!list) {
3371 /* Comma separated list of names to skip. */
3372 list = getenv("NIR_SKIP");
3373 if (!list)
3374 list = "";
3375 }
3376
3377 if (!list[0])
3378 return false;
3379
3380 return comma_separated_list_contains(list, name);
3381 }
3382
3383 static inline bool
3384 should_clone_nir(void)
3385 {
3386 static int should_clone = -1;
3387 if (should_clone < 0)
3388 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3389
3390 return should_clone;
3391 }
3392
3393 static inline bool
3394 should_serialize_deserialize_nir(void)
3395 {
3396 static int test_serialize = -1;
3397 if (test_serialize < 0)
3398 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3399
3400 return test_serialize;
3401 }
3402
3403 static inline bool
3404 should_print_nir(void)
3405 {
3406 static int should_print = -1;
3407 if (should_print < 0)
3408 should_print = env_var_as_boolean("NIR_PRINT", false);
3409
3410 return should_print;
3411 }
3412 #else
3413 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3414 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3415 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3416 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3417 static inline bool should_clone_nir(void) { return false; }
3418 static inline bool should_serialize_deserialize_nir(void) { return false; }
3419 static inline bool should_print_nir(void) { return false; }
3420 #endif /* NDEBUG */
3421
3422 #define _PASS(pass, nir, do_pass) do { \
3423 if (should_skip_nir(#pass)) { \
3424 printf("skipping %s\n", #pass); \
3425 break; \
3426 } \
3427 do_pass \
3428 nir_validate_shader(nir, "after " #pass); \
3429 if (should_clone_nir()) { \
3430 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3431 nir_shader_replace(nir, clone); \
3432 } \
3433 if (should_serialize_deserialize_nir()) { \
3434 nir_shader_serialize_deserialize(nir); \
3435 } \
3436 } while (0)
3437
3438 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3439 nir_metadata_set_validation_flag(nir); \
3440 if (should_print_nir()) \
3441 printf("%s\n", #pass); \
3442 if (pass(nir, ##__VA_ARGS__)) { \
3443 progress = true; \
3444 if (should_print_nir()) \
3445 nir_print_shader(nir, stdout); \
3446 nir_metadata_check_validation_flag(nir); \
3447 } \
3448 )
3449
3450 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3451 if (should_print_nir()) \
3452 printf("%s\n", #pass); \
3453 pass(nir, ##__VA_ARGS__); \
3454 if (should_print_nir()) \
3455 nir_print_shader(nir, stdout); \
3456 )
3457
3458 #define NIR_SKIP(name) should_skip_nir(#name)
3459
3460 /** An instruction filtering callback
3461 *
3462 * Returns true if the instruction should be processed and false otherwise.
3463 */
3464 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3465
3466 /** A simple instruction lowering callback
3467 *
3468 * Many instruction lowering passes can be written as a simple function which
3469 * takes an instruction as its input and returns a sequence of instructions
3470 * that implement the consumed instruction. This function type represents
3471 * such a lowering function. When called, a function with this prototype
3472 * should either return NULL indicating that no lowering needs to be done or
3473 * emit a sequence of instructions using the provided builder (whose cursor
3474 * will already be placed after the instruction to be lowered) and return the
3475 * resulting nir_ssa_def.
3476 */
3477 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3478 nir_instr *, void *);
3479
3480 /**
3481 * Special return value for nir_lower_instr_cb when some progress occurred
3482 * (like changing an input to the instr) that didn't result in a replacement
3483 * SSA def being generated.
3484 */
3485 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3486
3487 /** Iterate over all the instructions in a nir_function_impl and lower them
3488 * using the provided callbacks
3489 *
3490 * This function implements the guts of a standard lowering pass for you. It
3491 * iterates over all of the instructions in a nir_function_impl and calls the
3492 * filter callback on each one. If the filter callback returns true, it then
3493 * calls the lowering call back on the instruction. (Splitting it this way
3494 * allows us to avoid some save/restore work for instructions we know won't be
3495 * lowered.) If the instruction is dead after the lowering is complete, it
3496 * will be removed. If new instructions are added, the lowering callback will
3497 * also be called on them in case multiple lowerings are required.
3498 *
3499 * The metadata for the nir_function_impl will also be updated. If any blocks
3500 * are added (they cannot be removed), dominance and block indices will be
3501 * invalidated.
3502 */
3503 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3504 nir_instr_filter_cb filter,
3505 nir_lower_instr_cb lower,
3506 void *cb_data);
3507 bool nir_shader_lower_instructions(nir_shader *shader,
3508 nir_instr_filter_cb filter,
3509 nir_lower_instr_cb lower,
3510 void *cb_data);
3511
3512 void nir_calc_dominance_impl(nir_function_impl *impl);
3513 void nir_calc_dominance(nir_shader *shader);
3514
3515 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3516 bool nir_block_dominates(nir_block *parent, nir_block *child);
3517 bool nir_block_is_unreachable(nir_block *block);
3518
3519 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3520 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3521
3522 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3523 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3524
3525 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3526 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3527
3528 int nir_gs_count_vertices(const nir_shader *shader);
3529
3530 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3531 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3532 bool nir_split_var_copies(nir_shader *shader);
3533 bool nir_split_per_member_structs(nir_shader *shader);
3534 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3535
3536 bool nir_lower_returns_impl(nir_function_impl *impl);
3537 bool nir_lower_returns(nir_shader *shader);
3538
3539 void nir_inline_function_impl(struct nir_builder *b,
3540 const nir_function_impl *impl,
3541 nir_ssa_def **params);
3542 bool nir_inline_functions(nir_shader *shader);
3543
3544 bool nir_propagate_invariant(nir_shader *shader);
3545
3546 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3547 void nir_lower_deref_copy_instr(struct nir_builder *b,
3548 nir_intrinsic_instr *copy);
3549 bool nir_lower_var_copies(nir_shader *shader);
3550
3551 void nir_fixup_deref_modes(nir_shader *shader);
3552
3553 bool nir_lower_global_vars_to_local(nir_shader *shader);
3554
3555 typedef enum {
3556 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3557 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3558 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3559 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3560 } nir_lower_array_deref_of_vec_options;
3561
3562 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3563 nir_lower_array_deref_of_vec_options options);
3564
3565 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3566
3567 bool nir_lower_locals_to_regs(nir_shader *shader);
3568
3569 void nir_lower_io_to_temporaries(nir_shader *shader,
3570 nir_function_impl *entrypoint,
3571 bool outputs, bool inputs);
3572
3573 bool nir_lower_vars_to_scratch(nir_shader *shader,
3574 nir_variable_mode modes,
3575 int size_threshold,
3576 glsl_type_size_align_func size_align);
3577
3578 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3579
3580 void nir_gather_ssa_types(nir_function_impl *impl,
3581 BITSET_WORD *float_types,
3582 BITSET_WORD *int_types);
3583
3584 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3585 int (*type_size)(const struct glsl_type *, bool));
3586
3587 /* Some helpers to do very simple linking */
3588 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3589 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3590 uint64_t *used_by_other_stage,
3591 uint64_t *used_by_other_stage_patches);
3592 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3593 bool default_to_smooth_interp);
3594 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3595 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3596
3597 bool nir_lower_amul(nir_shader *shader,
3598 int (*type_size)(const struct glsl_type *, bool));
3599
3600 void nir_assign_io_var_locations(struct exec_list *var_list,
3601 unsigned *size,
3602 gl_shader_stage stage);
3603
3604 typedef enum {
3605 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3606 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3607 * modes.
3608 */
3609 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3610
3611 /* If set, this forces all non-flat fragment shader inputs to be
3612 * interpolated as if with the "sample" qualifier. This requires
3613 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3614 */
3615 nir_lower_io_force_sample_interpolation = (1 << 1),
3616 } nir_lower_io_options;
3617 bool nir_lower_io(nir_shader *shader,
3618 nir_variable_mode modes,
3619 int (*type_size)(const struct glsl_type *, bool),
3620 nir_lower_io_options);
3621
3622 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3623
3624 bool
3625 nir_lower_vars_to_explicit_types(nir_shader *shader,
3626 nir_variable_mode modes,
3627 glsl_type_size_align_func type_info);
3628
3629 typedef enum {
3630 /**
3631 * An address format which is a simple 32-bit global GPU address.
3632 */
3633 nir_address_format_32bit_global,
3634
3635 /**
3636 * An address format which is a simple 64-bit global GPU address.
3637 */
3638 nir_address_format_64bit_global,
3639
3640 /**
3641 * An address format which is a bounds-checked 64-bit global GPU address.
3642 *
3643 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3644 * address stored with the low bits in .x and high bits in .y, .z is a
3645 * size, and .w is an offset. When the final I/O operation is lowered, .w
3646 * is checked against .z and the operation is predicated on the result.
3647 */
3648 nir_address_format_64bit_bounded_global,
3649
3650 /**
3651 * An address format which is comprised of a vec2 where the first
3652 * component is a buffer index and the second is an offset.
3653 */
3654 nir_address_format_32bit_index_offset,
3655
3656 /**
3657 * An address format which is a simple 32-bit offset.
3658 */
3659 nir_address_format_32bit_offset,
3660
3661 /**
3662 * An address format representing a purely logical addressing model. In
3663 * this model, all deref chains must be complete from the dereference
3664 * operation to the variable. Cast derefs are not allowed. These
3665 * addresses will be 32-bit scalars but the format is immaterial because
3666 * you can always chase the chain.
3667 */
3668 nir_address_format_logical,
3669 } nir_address_format;
3670
3671 static inline unsigned
3672 nir_address_format_bit_size(nir_address_format addr_format)
3673 {
3674 switch (addr_format) {
3675 case nir_address_format_32bit_global: return 32;
3676 case nir_address_format_64bit_global: return 64;
3677 case nir_address_format_64bit_bounded_global: return 32;
3678 case nir_address_format_32bit_index_offset: return 32;
3679 case nir_address_format_32bit_offset: return 32;
3680 case nir_address_format_logical: return 32;
3681 }
3682 unreachable("Invalid address format");
3683 }
3684
3685 static inline unsigned
3686 nir_address_format_num_components(nir_address_format addr_format)
3687 {
3688 switch (addr_format) {
3689 case nir_address_format_32bit_global: return 1;
3690 case nir_address_format_64bit_global: return 1;
3691 case nir_address_format_64bit_bounded_global: return 4;
3692 case nir_address_format_32bit_index_offset: return 2;
3693 case nir_address_format_32bit_offset: return 1;
3694 case nir_address_format_logical: return 1;
3695 }
3696 unreachable("Invalid address format");
3697 }
3698
3699 static inline const struct glsl_type *
3700 nir_address_format_to_glsl_type(nir_address_format addr_format)
3701 {
3702 unsigned bit_size = nir_address_format_bit_size(addr_format);
3703 assert(bit_size == 32 || bit_size == 64);
3704 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3705 nir_address_format_num_components(addr_format));
3706 }
3707
3708 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3709
3710 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3711 nir_address_format addr_format);
3712
3713 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3714 nir_address_format addr_format);
3715
3716 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3717 nir_deref_instr *deref,
3718 nir_ssa_def *base_addr,
3719 nir_address_format addr_format);
3720 void nir_lower_explicit_io_instr(struct nir_builder *b,
3721 nir_intrinsic_instr *io_instr,
3722 nir_ssa_def *addr,
3723 nir_address_format addr_format);
3724
3725 bool nir_lower_explicit_io(nir_shader *shader,
3726 nir_variable_mode modes,
3727 nir_address_format);
3728
3729 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3730 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3731
3732 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3733
3734 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3735 bool nir_lower_regs_to_ssa(nir_shader *shader);
3736 bool nir_lower_vars_to_ssa(nir_shader *shader);
3737
3738 bool nir_remove_dead_derefs(nir_shader *shader);
3739 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3740 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3741 bool nir_lower_constant_initializers(nir_shader *shader,
3742 nir_variable_mode modes);
3743
3744 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3745 bool nir_lower_vec_to_movs(nir_shader *shader);
3746 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3747 bool alpha_to_one,
3748 const gl_state_index16 *alpha_ref_state_tokens);
3749 bool nir_lower_alu(nir_shader *shader);
3750
3751 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3752 bool always_precise, bool have_ffma);
3753
3754 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3755 bool nir_lower_bool_to_float(nir_shader *shader);
3756 bool nir_lower_bool_to_int32(nir_shader *shader);
3757 bool nir_lower_int_to_float(nir_shader *shader);
3758 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3759 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3760 bool nir_lower_phis_to_scalar(nir_shader *shader);
3761 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3762 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3763 bool outputs_only);
3764 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3765 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3766 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3767
3768 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3769 void nir_lower_viewport_transform(nir_shader *shader);
3770 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3771
3772 typedef struct nir_lower_subgroups_options {
3773 uint8_t subgroup_size;
3774 uint8_t ballot_bit_size;
3775 bool lower_to_scalar:1;
3776 bool lower_vote_trivial:1;
3777 bool lower_vote_eq_to_ballot:1;
3778 bool lower_subgroup_masks:1;
3779 bool lower_shuffle:1;
3780 bool lower_shuffle_to_32bit:1;
3781 bool lower_quad:1;
3782 } nir_lower_subgroups_options;
3783
3784 bool nir_lower_subgroups(nir_shader *shader,
3785 const nir_lower_subgroups_options *options);
3786
3787 bool nir_lower_system_values(nir_shader *shader);
3788
3789 enum PACKED nir_lower_tex_packing {
3790 nir_lower_tex_packing_none = 0,
3791 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3792 * or unsigned ints based on the sampler type
3793 */
3794 nir_lower_tex_packing_16,
3795 /* The sampler returns 1 32-bit word of 4x8 unorm */
3796 nir_lower_tex_packing_8,
3797 };
3798
3799 typedef struct nir_lower_tex_options {
3800 /**
3801 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3802 * sampler types a texture projector is lowered.
3803 */
3804 unsigned lower_txp;
3805
3806 /**
3807 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3808 */
3809 bool lower_txf_offset;
3810
3811 /**
3812 * If true, lower away nir_tex_src_offset for all rect textures.
3813 */
3814 bool lower_rect_offset;
3815
3816 /**
3817 * If true, lower rect textures to 2D, using txs to fetch the
3818 * texture dimensions and dividing the texture coords by the
3819 * texture dims to normalize.
3820 */
3821 bool lower_rect;
3822
3823 /**
3824 * If true, convert yuv to rgb.
3825 */
3826 unsigned lower_y_uv_external;
3827 unsigned lower_y_u_v_external;
3828 unsigned lower_yx_xuxv_external;
3829 unsigned lower_xy_uxvx_external;
3830 unsigned lower_ayuv_external;
3831 unsigned lower_xyuv_external;
3832
3833 /**
3834 * To emulate certain texture wrap modes, this can be used
3835 * to saturate the specified tex coord to [0.0, 1.0]. The
3836 * bits are according to sampler #, ie. if, for example:
3837 *
3838 * (conf->saturate_s & (1 << n))
3839 *
3840 * is true, then the s coord for sampler n is saturated.
3841 *
3842 * Note that clamping must happen *after* projector lowering
3843 * so any projected texture sample instruction with a clamped
3844 * coordinate gets automatically lowered, regardless of the
3845 * 'lower_txp' setting.
3846 */
3847 unsigned saturate_s;
3848 unsigned saturate_t;
3849 unsigned saturate_r;
3850
3851 /* Bitmask of textures that need swizzling.
3852 *
3853 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3854 * swizzles[texture_index] is applied to the result of the texturing
3855 * operation.
3856 */
3857 unsigned swizzle_result;
3858
3859 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3860 * while 4 and 5 represent 0 and 1 respectively.
3861 */
3862 uint8_t swizzles[32][4];
3863
3864 /* Can be used to scale sampled values in range required by the format. */
3865 float scale_factors[32];
3866
3867 /**
3868 * Bitmap of textures that need srgb to linear conversion. If
3869 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3870 * of the texture are lowered to linear.
3871 */
3872 unsigned lower_srgb;
3873
3874 /**
3875 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3876 * LODs to nir_texop_txl.
3877 */
3878 bool lower_tex_without_implicit_lod;
3879
3880 /**
3881 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3882 */
3883 bool lower_txd_cube_map;
3884
3885 /**
3886 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3887 */
3888 bool lower_txd_3d;
3889
3890 /**
3891 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3892 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3893 * with lower_txd_cube_map.
3894 */
3895 bool lower_txd_shadow;
3896
3897 /**
3898 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3899 * Implies lower_txd_cube_map and lower_txd_shadow.
3900 */
3901 bool lower_txd;
3902
3903 /**
3904 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3905 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3906 */
3907 bool lower_txb_shadow_clamp;
3908
3909 /**
3910 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3911 * with nir_texop_txl. This includes cube maps.
3912 */
3913 bool lower_txd_shadow_clamp;
3914
3915 /**
3916 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3917 * with nir_texop_txl. This includes cube maps.
3918 */
3919 bool lower_txd_offset_clamp;
3920
3921 /**
3922 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3923 * sampler is bindless.
3924 */
3925 bool lower_txd_clamp_bindless_sampler;
3926
3927 /**
3928 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3929 * sampler index is not statically determinable to be less than 16.
3930 */
3931 bool lower_txd_clamp_if_sampler_index_not_lt_16;
3932
3933 /**
3934 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3935 * 0-lod followed by a nir_ishr.
3936 */
3937 bool lower_txs_lod;
3938
3939 /**
3940 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3941 * mixed-up tg4 locations.
3942 */
3943 bool lower_tg4_broadcom_swizzle;
3944
3945 /**
3946 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3947 */
3948 bool lower_tg4_offsets;
3949
3950 enum nir_lower_tex_packing lower_tex_packing[32];
3951 } nir_lower_tex_options;
3952
3953 bool nir_lower_tex(nir_shader *shader,
3954 const nir_lower_tex_options *options);
3955
3956 enum nir_lower_non_uniform_access_type {
3957 nir_lower_non_uniform_ubo_access = (1 << 0),
3958 nir_lower_non_uniform_ssbo_access = (1 << 1),
3959 nir_lower_non_uniform_texture_access = (1 << 2),
3960 nir_lower_non_uniform_image_access = (1 << 3),
3961 };
3962
3963 bool nir_lower_non_uniform_access(nir_shader *shader,
3964 enum nir_lower_non_uniform_access_type);
3965
3966 enum nir_lower_idiv_path {
3967 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
3968 * the two but it is not exact in some cases (for example, 1091317713u /
3969 * 1034u gives 5209173 instead of 1055432) */
3970 nir_lower_idiv_fast,
3971 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
3972 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
3973 * the nv50 path and many of them are integer multiplications, so it is
3974 * probably slower. It should always return the correct result, though. */
3975 nir_lower_idiv_precise,
3976 };
3977
3978 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
3979
3980 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
3981
3982 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
3983 bool use_vars,
3984 bool use_clipdist_array,
3985 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3986 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
3987 bool use_clipdist_array,
3988 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3989 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
3990 bool use_clipdist_array);
3991 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
3992
3993 void nir_lower_point_size_mov(nir_shader *shader,
3994 const gl_state_index16 *pointsize_state_tokens);
3995
3996 bool nir_lower_frexp(nir_shader *nir);
3997
3998 void nir_lower_two_sided_color(nir_shader *shader);
3999
4000 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4001
4002 bool nir_lower_flatshade(nir_shader *shader);
4003
4004 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4005 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4006 const gl_state_index16 *uniform_state_tokens);
4007
4008 typedef struct nir_lower_wpos_ytransform_options {
4009 gl_state_index16 state_tokens[STATE_LENGTH];
4010 bool fs_coord_origin_upper_left :1;
4011 bool fs_coord_origin_lower_left :1;
4012 bool fs_coord_pixel_center_integer :1;
4013 bool fs_coord_pixel_center_half_integer :1;
4014 } nir_lower_wpos_ytransform_options;
4015
4016 bool nir_lower_wpos_ytransform(nir_shader *shader,
4017 const nir_lower_wpos_ytransform_options *options);
4018 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4019
4020 bool nir_lower_fb_read(nir_shader *shader);
4021
4022 typedef struct nir_lower_drawpixels_options {
4023 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4024 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4025 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4026 unsigned drawpix_sampler;
4027 unsigned pixelmap_sampler;
4028 bool pixel_maps :1;
4029 bool scale_and_bias :1;
4030 } nir_lower_drawpixels_options;
4031
4032 void nir_lower_drawpixels(nir_shader *shader,
4033 const nir_lower_drawpixels_options *options);
4034
4035 typedef struct nir_lower_bitmap_options {
4036 unsigned sampler;
4037 bool swizzle_xxxx;
4038 } nir_lower_bitmap_options;
4039
4040 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4041
4042 bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
4043
4044 typedef enum {
4045 nir_lower_int_source_mods = 1 << 0,
4046 nir_lower_float_source_mods = 1 << 1,
4047 nir_lower_triop_abs = 1 << 2,
4048 nir_lower_all_source_mods = (1 << 3) - 1
4049 } nir_lower_to_source_mods_flags;
4050
4051
4052 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4053
4054 bool nir_lower_gs_intrinsics(nir_shader *shader);
4055
4056 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4057
4058 bool nir_lower_bit_size(nir_shader *shader,
4059 nir_lower_bit_size_callback callback,
4060 void *callback_data);
4061
4062 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4063 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4064
4065 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4066 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4067 nir_lower_doubles_options options);
4068 bool nir_lower_pack(nir_shader *shader);
4069
4070 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4071
4072 typedef enum {
4073 nir_lower_interpolation_at_sample = (1 << 1),
4074 nir_lower_interpolation_at_offset = (1 << 2),
4075 nir_lower_interpolation_centroid = (1 << 3),
4076 nir_lower_interpolation_pixel = (1 << 4),
4077 nir_lower_interpolation_sample = (1 << 5),
4078 } nir_lower_interpolation_options;
4079
4080 bool nir_lower_interpolation(nir_shader *shader,
4081 nir_lower_interpolation_options options);
4082
4083 bool nir_normalize_cubemap_coords(nir_shader *shader);
4084
4085 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4086
4087 void nir_loop_analyze_impl(nir_function_impl *impl,
4088 nir_variable_mode indirect_mask);
4089
4090 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4091
4092 bool nir_repair_ssa_impl(nir_function_impl *impl);
4093 bool nir_repair_ssa(nir_shader *shader);
4094
4095 void nir_convert_loop_to_lcssa(nir_loop *loop);
4096 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4097 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4098
4099 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4100 * registers. If false, convert all values (even those not involved in a phi
4101 * node) to registers.
4102 */
4103 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4104
4105 bool nir_lower_phis_to_regs_block(nir_block *block);
4106 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4107 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4108
4109 bool nir_lower_samplers(nir_shader *shader);
4110
4111 /* This is here for unit tests. */
4112 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4113
4114 bool nir_opt_comparison_pre(nir_shader *shader);
4115
4116 bool nir_opt_access(nir_shader *shader);
4117 bool nir_opt_algebraic(nir_shader *shader);
4118 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4119 bool nir_opt_algebraic_late(nir_shader *shader);
4120 bool nir_opt_constant_folding(nir_shader *shader);
4121
4122 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4123
4124 bool nir_copy_prop(nir_shader *shader);
4125
4126 bool nir_opt_copy_prop_vars(nir_shader *shader);
4127
4128 bool nir_opt_cse(nir_shader *shader);
4129
4130 bool nir_opt_dce(nir_shader *shader);
4131
4132 bool nir_opt_dead_cf(nir_shader *shader);
4133
4134 bool nir_opt_dead_write_vars(nir_shader *shader);
4135
4136 bool nir_opt_deref_impl(nir_function_impl *impl);
4137 bool nir_opt_deref(nir_shader *shader);
4138
4139 bool nir_opt_find_array_copies(nir_shader *shader);
4140
4141 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4142
4143 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4144
4145 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4146
4147 bool nir_opt_intrinsics(nir_shader *shader);
4148
4149 bool nir_opt_large_constants(nir_shader *shader,
4150 glsl_type_size_align_func size_align,
4151 unsigned threshold);
4152
4153 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4154
4155 typedef enum {
4156 nir_move_const_undef = (1 << 0),
4157 nir_move_load_ubo = (1 << 1),
4158 nir_move_load_input = (1 << 2),
4159 nir_move_comparisons = (1 << 3),
4160 } nir_move_options;
4161
4162 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4163
4164 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4165
4166 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4167
4168 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4169 bool indirect_load_ok, bool expensive_alu_ok);
4170
4171 bool nir_opt_rematerialize_compares(nir_shader *shader);
4172
4173 bool nir_opt_remove_phis(nir_shader *shader);
4174 bool nir_opt_remove_phis_block(nir_block *block);
4175
4176 bool nir_opt_shrink_load(nir_shader *shader);
4177
4178 bool nir_opt_trivial_continues(nir_shader *shader);
4179
4180 bool nir_opt_undef(nir_shader *shader);
4181
4182 bool nir_opt_vectorize(nir_shader *shader);
4183
4184 bool nir_opt_conditional_discard(nir_shader *shader);
4185
4186 void nir_strip(nir_shader *shader);
4187
4188 void nir_sweep(nir_shader *shader);
4189
4190 void nir_remap_dual_slot_attributes(nir_shader *shader,
4191 uint64_t *dual_slot_inputs);
4192 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4193
4194 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4195 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4196
4197 static inline bool
4198 nir_variable_is_in_ubo(const nir_variable *var)
4199 {
4200 return (var->data.mode == nir_var_mem_ubo &&
4201 var->interface_type != NULL);
4202 }
4203
4204 static inline bool
4205 nir_variable_is_in_ssbo(const nir_variable *var)
4206 {
4207 return (var->data.mode == nir_var_mem_ssbo &&
4208 var->interface_type != NULL);
4209 }
4210
4211 static inline bool
4212 nir_variable_is_in_block(const nir_variable *var)
4213 {
4214 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4215 }
4216
4217 #ifdef __cplusplus
4218 } /* extern "C" */
4219 #endif
4220
4221 #endif /* NIR_H */