src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, nir_const_value value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    load_const->value = value;
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_bool(nir_builder *build, bool x)
 213 {
 214    nir_const_value v;
 215
 216    memset(&v, 0, sizeof(v));
 217    v.b[0] = x;
 218
 219    return nir_build_imm(build, 1, 1, v);
 220 }
 221
 222 static inline nir_ssa_def *
 223 nir_imm_true(nir_builder *build)
 224 {
 225    return nir_imm_bool(build, true);
 226 }
 227
 228 static inline nir_ssa_def *
 229 nir_imm_false(nir_builder *build)
 230 {
 231    return nir_imm_bool(build, false);
 232 }
 233
 234 static inline nir_ssa_def *
 235 nir_imm_float16(nir_builder *build, float x)
 236 {
 237    nir_const_value v;
 238
 239    memset(&v, 0, sizeof(v));
 240    v.u16[0] = _mesa_float_to_half(x);
 241
 242    return nir_build_imm(build, 1, 16, v);
 243 }
 244
 245 static inline nir_ssa_def *
 246 nir_imm_float(nir_builder *build, float x)
 247 {
 248    nir_const_value v;
 249
 250    memset(&v, 0, sizeof(v));
 251    v.f32[0] = x;
 252
 253    return nir_build_imm(build, 1, 32, v);
 254 }
 255
 256 static inline nir_ssa_def *
 257 nir_imm_double(nir_builder *build, double x)
 258 {
 259    nir_const_value v;
 260
 261    memset(&v, 0, sizeof(v));
 262    v.f64[0] = x;
 263
 264    return nir_build_imm(build, 1, 64, v);
 265 }
 266
 267 static inline nir_ssa_def *
 268 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 269 {
 270    switch (bit_size) {
 271    case 16:
 272       return nir_imm_float16(build, x);
 273    case 32:
 274       return nir_imm_float(build, x);
 275    case 64:
 276       return nir_imm_double(build, x);
 277    }
 278
 279    unreachable("unknown float immediate bit size");
 280 }
 281
 282 static inline nir_ssa_def *
 283 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 284 {
 285    nir_const_value v;
 286
 287    memset(&v, 0, sizeof(v));
 288    v.f32[0] = x;
 289    v.f32[1] = y;
 290    v.f32[2] = z;
 291    v.f32[3] = w;
 292
 293    return nir_build_imm(build, 4, 32, v);
 294 }
 295
 296 static inline nir_ssa_def *
 297 nir_imm_ivec2(nir_builder *build, int x, int y)
 298 {
 299    nir_const_value v;
 300
 301    memset(&v, 0, sizeof(v));
 302    v.i32[0] = x;
 303    v.i32[1] = y;
 304
 305    return nir_build_imm(build, 2, 32, v);
 306 }
 307
 308 static inline nir_ssa_def *
 309 nir_imm_int(nir_builder *build, int x)
 310 {
 311    nir_const_value v;
 312
 313    memset(&v, 0, sizeof(v));
 314    v.i32[0] = x;
 315
 316    return nir_build_imm(build, 1, 32, v);
 317 }
 318
 319 static inline nir_ssa_def *
 320 nir_imm_int64(nir_builder *build, int64_t x)
 321 {
 322    nir_const_value v;
 323
 324    memset(&v, 0, sizeof(v));
 325    v.i64[0] = x;
 326
 327    return nir_build_imm(build, 1, 64, v);
 328 }
 329
 330 static inline nir_ssa_def *
 331 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 332 {
 333    nir_const_value v;
 334
 335    memset(&v, 0, sizeof(v));
 336    assert(bit_size <= 64);
 337    if (bit_size == 1)
 338       v.b[0] = x & 1;
 339    else
 340       v.i64[0] = x & (~0ull >> (64 - bit_size));
 341
 342    return nir_build_imm(build, 1, bit_size, v);
 343 }
 344
 345 static inline nir_ssa_def *
 346 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 347 {
 348    nir_const_value v;
 349
 350    memset(&v, 0, sizeof(v));
 351    v.i32[0] = x;
 352    v.i32[1] = y;
 353    v.i32[2] = z;
 354    v.i32[3] = w;
 355
 356    return nir_build_imm(build, 4, 32, v);
 357 }
 358
 359 static inline nir_ssa_def *
 360 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 361 {
 362    /* We use a 0/-1 convention for all booleans regardless of size */
 363    return nir_imm_intN_t(build, -(int)x, bit_size);
 364 }
 365
 366 static inline nir_ssa_def *
 367 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 368               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 369 {
 370    const nir_op_info *op_info = &nir_op_infos[op];
 371    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 372    if (!instr)
 373       return NULL;
 374
 375    instr->exact = build->exact;
 376
 377    instr->src[0].src = nir_src_for_ssa(src0);
 378    if (src1)
 379       instr->src[1].src = nir_src_for_ssa(src1);
 380    if (src2)
 381       instr->src[2].src = nir_src_for_ssa(src2);
 382    if (src3)
 383       instr->src[3].src = nir_src_for_ssa(src3);
 384
 385    /* Guess the number of components the destination temporary should have
 386     * based on our input sizes, if it's not fixed for the op.
 387     */
 388    unsigned num_components = op_info->output_size;
 389    if (num_components == 0) {
 390       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 391          if (op_info->input_sizes[i] == 0)
 392             num_components = MAX2(num_components,
 393                                   instr->src[i].src.ssa->num_components);
 394       }
 395    }
 396    assert(num_components != 0);
 397
 398    /* Figure out the bitwidth based on the source bitwidth if the instruction
 399     * is variable-width.
 400     */
 401    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 402    if (bit_size == 0) {
 403       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 404          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 405          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 406             if (bit_size)
 407                assert(src_bit_size == bit_size);
 408             else
 409                bit_size = src_bit_size;
 410          } else {
 411             assert(src_bit_size ==
 412                nir_alu_type_get_type_size(op_info->input_types[i]));
 413          }
 414       }
 415    }
 416
 417    /* When in doubt, assume 32. */
 418    if (bit_size == 0)
 419       bit_size = 32;
 420
 421    /* Make sure we don't swizzle from outside of our source vector (like if a
 422     * scalar value was passed into a multiply with a vector).
 423     */
 424    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 425       for (unsigned j = instr->src[i].src.ssa->num_components;
 426            j < NIR_MAX_VEC_COMPONENTS; j++) {
 427          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 428       }
 429    }
 430
 431    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 432                      bit_size, NULL);
 433    instr->dest.write_mask = (1 << num_components) - 1;
 434
 435    nir_builder_instr_insert(build, &instr->instr);
 436
 437    return &instr->dest.dest.ssa;
 438 }
 439
 440 #include "nir_builder_opcodes.h"
 441
 442 static inline nir_ssa_def *
 443 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 444 {
 445    switch (num_components) {
 446    case 4:
 447       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 448    case 3:
 449       return nir_vec3(build, comp[0], comp[1], comp[2]);
 450    case 2:
 451       return nir_vec2(build, comp[0], comp[1]);
 452    case 1:
 453       return comp[0];
 454    default:
 455       unreachable("bad component count");
 456       return NULL;
 457    }
 458 }
 459
 460 /**
 461  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 462  */
 463 static inline nir_ssa_def *
 464 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 465 {
 466    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 467    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 468                      nir_src_bit_size(src.src), NULL);
 469    mov->exact = build->exact;
 470    mov->dest.write_mask = (1 << num_components) - 1;
 471    mov->src[0] = src;
 472    nir_builder_instr_insert(build, &mov->instr);
 473
 474    return &mov->dest.dest.ssa;
 475 }
 476
 477 static inline nir_ssa_def *
 478 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 479 {
 480    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 481    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 482                      nir_src_bit_size(src.src), NULL);
 483    mov->exact = build->exact;
 484    mov->dest.write_mask = (1 << num_components) - 1;
 485    mov->src[0] = src;
 486    nir_builder_instr_insert(build, &mov->instr);
 487
 488    return &mov->dest.dest.ssa;
 489 }
 490
 491 /**
 492  * Construct an fmov or imov that reswizzles the source's components.
 493  */
 494 static inline nir_ssa_def *
 495 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 496             unsigned num_components, bool use_fmov)
 497 {
 498    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 499    nir_alu_src alu_src = { NIR_SRC_INIT };
 500    alu_src.src = nir_src_for_ssa(src);
 501
 502    bool is_identity_swizzle = true;
 503    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 504       if (swiz[i] != i)
 505          is_identity_swizzle = false;
 506       alu_src.swizzle[i] = swiz[i];
 507    }
 508
 509    if (num_components == src->num_components && is_identity_swizzle)
 510       return src;
 511
 512    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 513                      nir_imov_alu(build, alu_src, num_components);
 514 }
 515
 516 /* Selects the right fdot given the number of components in each source. */
 517 static inline nir_ssa_def *
 518 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 519 {
 520    assert(src0->num_components == src1->num_components);
 521    switch (src0->num_components) {
 522    case 1: return nir_fmul(build, src0, src1);
 523    case 2: return nir_fdot2(build, src0, src1);
 524    case 3: return nir_fdot3(build, src0, src1);
 525    case 4: return nir_fdot4(build, src0, src1);
 526    default:
 527       unreachable("bad component size");
 528    }
 529
 530    return NULL;
 531 }
 532
 533 static inline nir_ssa_def *
 534 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 535 {
 536    switch (src0->num_components) {
 537    case 1: return nir_ine(b, src0, src1);
 538    case 2: return nir_bany_inequal2(b, src0, src1);
 539    case 3: return nir_bany_inequal3(b, src0, src1);
 540    case 4: return nir_bany_inequal4(b, src0, src1);
 541    default:
 542       unreachable("bad component size");
 543    }
 544 }
 545
 546 static inline nir_ssa_def *
 547 nir_bany(nir_builder *b, nir_ssa_def *src)
 548 {
 549    return nir_bany_inequal(b, src, nir_imm_false(b));
 550 }
 551
 552 static inline nir_ssa_def *
 553 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 554 {
 555    return nir_swizzle(b, def, &c, 1, false);
 556 }
 557
 558 static inline nir_ssa_def *
 559 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 560 {
 561    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 562
 563    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 564       if ((mask & (1 << i)) == 0)
 565          continue;
 566       swizzle[num_channels++] = i;
 567    }
 568
 569    return nir_swizzle(b, def, swizzle, num_channels, false);
 570 }
 571
 572 static inline nir_ssa_def *
 573 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 574 {
 575    if (x->bit_size == dest_bit_size)
 576       return x;
 577
 578    switch (dest_bit_size) {
 579    case 64: return nir_i2i64(build, x);
 580    case 32: return nir_i2i32(build, x);
 581    case 16: return nir_i2i16(build, x);
 582    case 8:  return nir_i2i8(build, x);
 583    default: unreachable("Invalid bit size");
 584    }
 585 }
 586
 587 static inline nir_ssa_def *
 588 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 589 {
 590    if (x->bit_size == dest_bit_size)
 591       return x;
 592
 593    switch (dest_bit_size) {
 594    case 64: return nir_u2u64(build, x);
 595    case 32: return nir_u2u32(build, x);
 596    case 16: return nir_u2u16(build, x);
 597    case 8:  return nir_u2u8(build, x);
 598    default: unreachable("Invalid bit size");
 599    }
 600 }
 601
 602 static inline nir_ssa_def *
 603 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 604 {
 605    assert(x->bit_size <= 64);
 606    if (x->bit_size < 64)
 607       y &= (1ull << x->bit_size) - 1;
 608
 609    if (y == 0) {
 610       return x;
 611    } else {
 612       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 613    }
 614 }
 615
 616 static inline nir_ssa_def *
 617 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 618 {
 619    assert(x->bit_size <= 64);
 620    if (x->bit_size < 64)
 621       y &= (1ull << x->bit_size) - 1;
 622
 623    if (y == 0) {
 624       return nir_imm_intN_t(build, 0, x->bit_size);
 625    } else if (y == 1) {
 626       return x;
 627    } else if (util_is_power_of_two_or_zero64(y)) {
 628       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 629    } else {
 630       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 631    }
 632 }
 633
 634 static inline nir_ssa_def *
 635 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 636 {
 637    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 638 }
 639
 640 static inline nir_ssa_def *
 641 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 642 {
 643    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 644 }
 645
 646 static inline nir_ssa_def *
 647 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 648 {
 649    assert(src->num_components * src->bit_size == dest_bit_size);
 650
 651    switch (dest_bit_size) {
 652    case 64:
 653       switch (src->bit_size) {
 654       case 32: return nir_pack_64_2x32(b, src);
 655       case 16: return nir_pack_64_4x16(b, src);
 656       default: break;
 657       }
 658       break;
 659
 660    case 32:
 661       if (src->bit_size == 16)
 662          return nir_pack_32_2x16(b, src);
 663       break;
 664
 665    default:
 666       break;
 667    }
 668
 669    /* If we got here, we have no dedicated unpack opcode. */
 670    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 671    for (unsigned i = 0; i < src->num_components; i++) {
 672       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 673       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 674       dest = nir_ior(b, dest, val);
 675    }
 676    return dest;
 677 }
 678
 679 static inline nir_ssa_def *
 680 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 681 {
 682    assert(src->num_components == 1);
 683    assert(src->bit_size > dest_bit_size);
 684    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 685    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 686
 687    switch (src->bit_size) {
 688    case 64:
 689       switch (dest_bit_size) {
 690       case 32: return nir_unpack_64_2x32(b, src);
 691       case 16: return nir_unpack_64_4x16(b, src);
 692       default: break;
 693       }
 694       break;
 695
 696    case 32:
 697       if (dest_bit_size == 16)
 698          return nir_unpack_32_2x16(b, src);
 699       break;
 700
 701    default:
 702       break;
 703    }
 704
 705    /* If we got here, we have no dedicated unpack opcode. */
 706    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 707    for (unsigned i = 0; i < dest_num_components; i++) {
 708       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 709       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 710    }
 711    return nir_vec(b, dest_comps, dest_num_components);
 712 }
 713
 714 static inline nir_ssa_def *
 715 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 716 {
 717    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 718    const unsigned dest_num_components =
 719       (src->bit_size * src->num_components) / dest_bit_size;
 720    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 721
 722    if (src->bit_size > dest_bit_size) {
 723       assert(src->bit_size % dest_bit_size == 0);
 724       if (src->num_components == 1) {
 725          return nir_unpack_bits(b, src, dest_bit_size);
 726       } else {
 727          const unsigned divisor = src->bit_size / dest_bit_size;
 728          assert(src->num_components * divisor == dest_num_components);
 729          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 730          for (unsigned i = 0; i < src->num_components; i++) {
 731             nir_ssa_def *unpacked =
 732                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 733             assert(unpacked->num_components == divisor);
 734             for (unsigned j = 0; j < divisor; j++)
 735                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 736          }
 737          return nir_vec(b, dest, dest_num_components);
 738       }
 739    } else if (src->bit_size < dest_bit_size) {
 740       assert(dest_bit_size % src->bit_size == 0);
 741       if (dest_num_components == 1) {
 742          return nir_pack_bits(b, src, dest_bit_size);
 743       } else {
 744          const unsigned divisor = dest_bit_size / src->bit_size;
 745          assert(src->num_components == dest_num_components * divisor);
 746          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 747          for (unsigned i = 0; i < dest_num_components; i++) {
 748             nir_component_mask_t src_mask =
 749                ((1 << divisor) - 1) << (i * divisor);
 750             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 751                                        dest_bit_size);
 752          }
 753          return nir_vec(b, dest, dest_num_components);
 754       }
 755    } else {
 756       assert(src->bit_size == dest_bit_size);
 757       return src;
 758    }
 759 }
 760
 761 /**
 762  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 763  * nir_build_alu()-based builder calls.
 764  *
 765  * See nir_ssa_for_alu_src() for alu instructions.
 766  */
 767 static inline nir_ssa_def *
 768 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 769 {
 770    if (src.is_ssa && src.ssa->num_components == num_components)
 771       return src.ssa;
 772
 773    nir_alu_src alu = { NIR_SRC_INIT };
 774    alu.src = src;
 775    for (int j = 0; j < 4; j++)
 776       alu.swizzle[j] = j;
 777
 778    return nir_imov_alu(build, alu, num_components);
 779 }
 780
 781 /**
 782  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 783  * nir_alu_src's swizzle.
 784  */
 785 static inline nir_ssa_def *
 786 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 787 {
 788    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 789    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 790       trivial_swizzle[i] = i;
 791    nir_alu_src *src = &instr->src[srcn];
 792    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 793
 794    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 795        !src->abs && !src->negate &&
 796        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 797       return src->src.ssa;
 798
 799    return nir_imov_alu(build, *src, num_components);
 800 }
 801
 802 static inline nir_deref_instr *
 803 nir_build_deref_var(nir_builder *build, nir_variable *var)
 804 {
 805    nir_deref_instr *deref =
 806       nir_deref_instr_create(build->shader, nir_deref_type_var);
 807
 808    deref->mode = var->data.mode;
 809    deref->type = var->type;
 810    deref->var = var;
 811
 812    nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 32, NULL);
 813
 814    nir_builder_instr_insert(build, &deref->instr);
 815
 816    return deref;
 817 }
 818
 819 static inline nir_deref_instr *
 820 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 821                       nir_ssa_def *index)
 822 {
 823    assert(glsl_type_is_array(parent->type) ||
 824           glsl_type_is_matrix(parent->type) ||
 825           glsl_type_is_vector(parent->type));
 826
 827    nir_deref_instr *deref =
 828       nir_deref_instr_create(build->shader, nir_deref_type_array);
 829
 830    deref->mode = parent->mode;
 831    deref->type = glsl_get_array_element(parent->type);
 832    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 833    deref->arr.index = nir_src_for_ssa(index);
 834
 835    nir_ssa_dest_init(&deref->instr, &deref->dest,
 836                      parent->dest.ssa.num_components,
 837                      parent->dest.ssa.bit_size, NULL);
 838
 839    nir_builder_instr_insert(build, &deref->instr);
 840
 841    return deref;
 842 }
 843
 844 static inline nir_deref_instr *
 845 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 846                              nir_ssa_def *index)
 847 {
 848    assert(parent->deref_type == nir_deref_type_array ||
 849           parent->deref_type == nir_deref_type_ptr_as_array ||
 850           parent->deref_type == nir_deref_type_cast);
 851
 852    nir_deref_instr *deref =
 853       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 854
 855    deref->mode = parent->mode;
 856    deref->type = parent->type;
 857    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 858    deref->arr.index = nir_src_for_ssa(index);
 859
 860    nir_ssa_dest_init(&deref->instr, &deref->dest,
 861                      parent->dest.ssa.num_components,
 862                      parent->dest.ssa.bit_size, NULL);
 863
 864    nir_builder_instr_insert(build, &deref->instr);
 865
 866    return deref;
 867 }
 868
 869 static inline nir_deref_instr *
 870 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 871 {
 872    assert(glsl_type_is_array(parent->type) ||
 873           glsl_type_is_matrix(parent->type));
 874
 875    nir_deref_instr *deref =
 876       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 877
 878    deref->mode = parent->mode;
 879    deref->type = glsl_get_array_element(parent->type);
 880    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 881
 882    nir_ssa_dest_init(&deref->instr, &deref->dest,
 883                      parent->dest.ssa.num_components,
 884                      parent->dest.ssa.bit_size, NULL);
 885
 886    nir_builder_instr_insert(build, &deref->instr);
 887
 888    return deref;
 889 }
 890
 891 static inline nir_deref_instr *
 892 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 893                        unsigned index)
 894 {
 895    assert(glsl_type_is_struct_or_ifc(parent->type));
 896
 897    nir_deref_instr *deref =
 898       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 899
 900    deref->mode = parent->mode;
 901    deref->type = glsl_get_struct_field(parent->type, index);
 902    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 903    deref->strct.index = index;
 904
 905    nir_ssa_dest_init(&deref->instr, &deref->dest,
 906                      parent->dest.ssa.num_components,
 907                      parent->dest.ssa.bit_size, NULL);
 908
 909    nir_builder_instr_insert(build, &deref->instr);
 910
 911    return deref;
 912 }
 913
 914 static inline nir_deref_instr *
 915 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 916                      nir_variable_mode mode, const struct glsl_type *type,
 917                      unsigned ptr_stride)
 918 {
 919    nir_deref_instr *deref =
 920       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 921
 922    deref->mode = mode;
 923    deref->type = type;
 924    deref->parent = nir_src_for_ssa(parent);
 925    deref->cast.ptr_stride = ptr_stride;
 926
 927    nir_ssa_dest_init(&deref->instr, &deref->dest,
 928                      parent->num_components, parent->bit_size, NULL);
 929
 930    nir_builder_instr_insert(build, &deref->instr);
 931
 932    return deref;
 933 }
 934
 935 /** Returns a deref that follows another but starting from the given parent
 936  *
 937  * The new deref will be the same type and take the same array or struct index
 938  * as the leader deref but it may have a different parent.  This is very
 939  * useful for walking deref paths.
 940  */
 941 static inline nir_deref_instr *
 942 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
 943                          nir_deref_instr *leader)
 944 {
 945    /* If the derefs would have the same parent, don't make a new one */
 946    assert(leader->parent.is_ssa);
 947    if (leader->parent.ssa == &parent->dest.ssa)
 948       return leader;
 949
 950    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
 951
 952    switch (leader->deref_type) {
 953    case nir_deref_type_var:
 954       unreachable("A var dereference cannot have a parent");
 955       break;
 956
 957    case nir_deref_type_array:
 958    case nir_deref_type_array_wildcard:
 959       assert(glsl_type_is_matrix(parent->type) ||
 960              glsl_type_is_array(parent->type) ||
 961              (leader->deref_type == nir_deref_type_array &&
 962               glsl_type_is_vector(parent->type)));
 963       assert(glsl_get_length(parent->type) ==
 964              glsl_get_length(leader_parent->type));
 965
 966       if (leader->deref_type == nir_deref_type_array) {
 967          assert(leader->arr.index.is_ssa);
 968          return nir_build_deref_array(b, parent, leader->arr.index.ssa);
 969       } else {
 970          return nir_build_deref_array_wildcard(b, parent);
 971       }
 972
 973    case nir_deref_type_struct:
 974       assert(glsl_type_is_struct_or_ifc(parent->type));
 975       assert(glsl_get_length(parent->type) ==
 976              glsl_get_length(leader_parent->type));
 977
 978       return nir_build_deref_struct(b, parent, leader->strct.index);
 979
 980    default:
 981       unreachable("Invalid deref instruction type");
 982    }
 983 }
 984
 985 static inline nir_ssa_def *
 986 nir_load_reg(nir_builder *build, nir_register *reg)
 987 {
 988    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
 989 }
 990
 991 static inline nir_ssa_def *
 992 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
 993 {
 994    nir_intrinsic_instr *load =
 995       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
 996    load->num_components = glsl_get_vector_elements(deref->type);
 997    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
 998    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
 999                      glsl_get_bit_size(deref->type), NULL);
1000    nir_builder_instr_insert(build, &load->instr);
1001    return &load->dest.ssa;
1002 }
1003
1004 static inline void
1005 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1006                 nir_ssa_def *value, unsigned writemask)
1007 {
1008    nir_intrinsic_instr *store =
1009       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1010    store->num_components = glsl_get_vector_elements(deref->type);
1011    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1012    store->src[1] = nir_src_for_ssa(value);
1013    nir_intrinsic_set_write_mask(store,
1014                                 writemask & ((1 << store->num_components) - 1));
1015    nir_builder_instr_insert(build, &store->instr);
1016 }
1017
1018 static inline void
1019 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1020 {
1021    nir_intrinsic_instr *copy =
1022       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1023    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1024    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1025    nir_builder_instr_insert(build, &copy->instr);
1026 }
1027
1028 static inline nir_ssa_def *
1029 nir_load_var(nir_builder *build, nir_variable *var)
1030 {
1031    return nir_load_deref(build, nir_build_deref_var(build, var));
1032 }
1033
1034 static inline void
1035 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1036               unsigned writemask)
1037 {
1038    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1039 }
1040
1041 static inline void
1042 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1043 {
1044    nir_copy_deref(build, nir_build_deref_var(build, dest),
1045                          nir_build_deref_var(build, src));
1046 }
1047
1048 static inline nir_ssa_def *
1049 nir_load_param(nir_builder *build, uint32_t param_idx)
1050 {
1051    assert(param_idx < build->impl->function->num_params);
1052    nir_parameter *param = &build->impl->function->params[param_idx];
1053
1054    nir_intrinsic_instr *load =
1055       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1056    nir_intrinsic_set_param_idx(load, param_idx);
1057    load->num_components = param->num_components;
1058    nir_ssa_dest_init(&load->instr, &load->dest,
1059                      param->num_components, param->bit_size, NULL);
1060    nir_builder_instr_insert(build, &load->instr);
1061    return &load->dest.ssa;
1062 }
1063
1064 #include "nir_builder_opcodes.h"
1065
1066 static inline nir_ssa_def *
1067 nir_f2b(nir_builder *build, nir_ssa_def *f)
1068 {
1069    return nir_f2b1(build, f);
1070 }
1071
1072 static inline nir_ssa_def *
1073 nir_i2b(nir_builder *build, nir_ssa_def *i)
1074 {
1075    return nir_i2b1(build, i);
1076 }
1077
1078 static inline nir_ssa_def *
1079 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1080 {
1081    switch (bit_size) {
1082    case 64: return nir_b2f64(build, b);
1083    case 32: return nir_b2f32(build, b);
1084    case 16: return nir_b2f16(build, b);
1085    default:
1086       unreachable("Invalid bit-size");
1087    };
1088 }
1089
1090 static inline nir_ssa_def *
1091 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1092                      unsigned interp_mode)
1093 {
1094    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1095    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1096    nir_intrinsic_set_interp_mode(bary, interp_mode);
1097    nir_builder_instr_insert(build, &bary->instr);
1098    return &bary->dest.ssa;
1099 }
1100
1101 static inline void
1102 nir_jump(nir_builder *build, nir_jump_type jump_type)
1103 {
1104    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1105    nir_builder_instr_insert(build, &jump->instr);
1106 }
1107
1108 static inline nir_ssa_def *
1109 nir_compare_func(nir_builder *b, enum compare_func func,
1110                  nir_ssa_def *src0, nir_ssa_def *src1)
1111 {
1112    switch (func) {
1113    case COMPARE_FUNC_NEVER:
1114       return nir_imm_int(b, 0);
1115    case COMPARE_FUNC_ALWAYS:
1116       return nir_imm_int(b, ~0);
1117    case COMPARE_FUNC_EQUAL:
1118       return nir_feq(b, src0, src1);
1119    case COMPARE_FUNC_NOTEQUAL:
1120       return nir_fne(b, src0, src1);
1121    case COMPARE_FUNC_GREATER:
1122       return nir_flt(b, src1, src0);
1123    case COMPARE_FUNC_GEQUAL:
1124       return nir_fge(b, src0, src1);
1125    case COMPARE_FUNC_LESS:
1126       return nir_flt(b, src0, src1);
1127    case COMPARE_FUNC_LEQUAL:
1128       return nir_fge(b, src1, src0);
1129    }
1130    unreachable("bad compare func");
1131 }
1132
1133 #endif /* NIR_BUILDER_H */